M52342FP [MITSUBISHI]
PLL-SPLIT VIF/SIF IC; PLL - SPLIT VIF / SIF IC
| 型号： | M52342FP |
| 厂家： | 
Mitsubishi Group |
| 描述： | PLL-SPLIT VIF/SIF IC |
| 文件： | 总13页 (文件大小：100K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MITSUBISHI ICs (TV)
M52342FP
PLL-SPLIT VIF/SIF IC
DESCRIPTION
PIN CONFIGURATION (TOP VIEW)
The M52342FP is IF signal-processing IC for VCRs and TVs. It
enable the PLL detection system despite size as small as that of
conventional quasi-synchronous VIF/SIF detector, IF/RF AGC, SIF
limiter, FM detector, QIF AGC and EQ AMP.
RF AGC DELAY
AFT OUT
RF AGC OUT
VIF IN
EQ F/B
1
2
3
4
5
6
7
8
9
24
23
APC FILTER
22 VIDEO OUT
21 Vreg. OUT
FEATURES
• Video detection output is 2VP-P. It has built-in EQ AMP.
• The package is a 24-pin flat package, suitable for space saving.
• The video detector uses PLL for full synchronous detection
circuit. It produces excellent characteristics of DG, DP, 920kHz
beat, and cross color.
VIF IN
Vreg. OUT
VCO COIL
VCO COIL
Vcc
20
19
18
17
16
GND
GND
• Dynamic AGC realizes high speed response with only single
GND
filter.
QIF DET IN
Vcc
• Video IF and sound IF signal processings are separated from
each other. VCO output is used to obtain intercarrier. This PLL-
SPLIT method and built-in QIF AGC provide good sound
sensitivity and reduces buzz.
IF AGC FILTER 10
NFB 11
15 QIF OUT
AFT SW/NPSW
14
12
13 LIMITER IN
AUDIO OUT
• As AFT output voltage uses the APC output voltage, VCO coil is
not used.
Outline 24P2N-A
• Audio FM demodulation uses PLL system, so it has wide
frequency range with no external parts and no adjustment.
APPLICATION
TV sets, VCR tuners
RECOMMENDED OPERATING CONDITION
In case of VCC and Vreg. out short
Supply voltage range....................................................4.75 to 5.25V
Recommended supply voltage...................................................5.0V
Incase of Vreg. out open
Supply voltage range......................................................8.5 to 12.5V
BLOCK DIAGRAM
APC FILTER
Vreg. OUT
21
VCO COIL
19
QIF OUT
LIMITER IN
EQ F/B
24
VIDEO OUT
Vreg. OUT
20
VCO COIL
18
Vcc
17
Vcc
16
AFT SW/NPSW
23
22
15
14
13
Vcc REG
VCO
LIM AMP
Inter
Split
AFT
QIF DET
EQ
AMP
VIDEO
DET
QIF AGC
APC
FM DET
AF AMP
QIF AMP
IF AGC
10
RF AGC
VIF AMP
12
1
2
3
4
5
6
7
8
9
11
RF AGC DELAY
RF AGC OUT
VIF IN
GND
GND
GND
IF AGC FILTER
QIF DET IN NFB
AUDIO OUT
AFT OUT
VIF IN
1
MITSUBISHI ICs (TV)
M52342FP
PLL-SPLIT VIF/SIF IC
ABSOLUTE MAXIMUM RATINGS (Ta=25°C, surge protection capacitance 200pF resistance 0Ω, unless otherwise noted)
Symbol
VCC
Parameter
Supply voltage1
Condition
Ratings
13.2
Unit
V
VCC and Vreg. out is not connected to each
other.
Vreg.
OUT
VCC and Vreg. out is not connected to each
other.
Supply voltage Vreg. OUT
6.0
V
Pd
Power dissipation
1524
-20 to +75
-40 to +150
±200
mW
°C
°C
V
Topr
Tstg
Surge
Operating temperature
Storage temperature
Surge voltage resistance
AMBIENT OPERATING CONDITION (Ta=25°C, unless otherwise noted)
Recommended supply
Supply voltage
Supply voltage range
4.75 to 5.25V
voltage
In case of VCC and
Vreg. out short
5.0V
In case of Vreg. out
open
8.5 to 12.5V
−
ELECTRICAL CHARACTERISTICS (VCC=5V, Ta=25°C, unless otherwise noted)
Measurement condition
Limits
Typ.
Test
Test
Input Input
SG
External
power supply
switches set to
position 1 unless
otherwise indicated
Symbol
Parameter
Unit
circuit point point
V12
V7 V8
Min.
Max.
VIF section
Circuit current1
VCC=5V
VCC=5V
SW17=1, SW14=2
ICC1
1
1
1
A
A
VIF IN SG1
VIF IN SG1
−
−
−
−
−
−
5
5
5
33
33
46
46
59
59
mA
mA
V
VCC=12V
SW14=SW17=2
Circuit current2
VCC=12V
ICC2
VCC=12V
SW7=2
VCC2
Vreg voltage
TP17
−
−
−
−
4.60
4.95
5.30
V18
Video output DC voltage
Video output voltage
Video S/N
1
1
1
1
1
TP18A
−
−
−
−
−
0
−
−
−
−
−
−
−
SW8=2
3.2
1.8
51
7.0
−
3.5
2.1
56
3.8
2.4
−
V
Vo det
Video S/N
BW
TP18A VIF IN SG1
TP18B VIF IN SG2
TP18A VIF IN SG3
TP18A VIF IN SG4
VP-P
dB
SW18=2
SW8=2
Vari
able
Video band width
Input sensitivity
9.0
48
−
MHz
dBµ
VIN MIN
−
−
52
Maximum allowable
input
VIN MAX
1
TP18A VIF IN SG5
−
−
101
105
−
dBµ
−
−
−
−
GR
V8
AGC control range input
IF AGC voltage
−
−
−
−
−
−
50
57
−
dB
V
1
TP8 VIF IN SG6
2.9
3.2
3.5
Maximum IF AGC
voltage
−
−
V8H
V8L
1
1
TP8
−
−
−
−
−
−
4.0
2.2
4.4
2.4
−
V
V
Minimum IF AGC
voltage
TP8 VIF IN SG7
TP3 VIF IN SG6
2.6
4.2
8.0
11.0
−
4.7
8.9
−
Maximum RF AGC
voltage
V3H
1
−
−
−
(VCC=9V)
−
V
(VCC=12V)
11.9
0.1
−
0.5
0.7
0.7
Minimum RF AGC
voltage
V3L
V3
1
1
TP3 VIF IN SG7
TP3 VIF IN SG8
−
−
−
−
−
−
(VCC=9V)
−
0.2
V
(VCC=12V)
−
0.2
RF AGC operation
voltage
89
92
95
dBµ
CL-U
CL-L
CL-T
µ
Capture range U
Capture range L
Capture range T
AFT sensitivity
1
1
1
1
TP18A VIF IN SG9
TP18A VIF IN SG9
−
−
−
−
−
−
−
−
−
−
1.0
1.8
3.1
20
1.7
2.4
4.1
30
−
−
−
MHz
MHz
MHz
−
−
−
−
TP2 VIF IN SG10
3.3
60 mV/kHz
2
MITSUBISHI ICs (TV)
M52342FP
PLL-SPLIT VIF/SIF IC
ELECTRICAL CHARACTERISTICS (cont.)
Measurement condition
Limits
Test
Test
Input Input
SG
External
switches set to
position 1 unless
otherwise indicated
Symbol
Parameter
Unit
power supply
circuit point point
V12
V7 V8
Min.
3.85
7.7
10.7
−
Typ.
4.15
8.1
11.1
0.7
0.7
0.7
2.5
4.5
6.0
2.5
4.5
6.0
40
Max.
−
V2H
V2L
AFT maximum voltage
AFT minimum voltage
1
1
1
1
TP2 VIF IN SG10
TP2 VIF IN SG10
TP2 VIF IN SG10
TP2 VIF IN SG10
−
−
−
−
−
−
−
−
3.3 (VCC=9V)
−
V
V
V
V
(VCC=12V)
−
1.2
1.2
1.2
2.8
4.9
6.5
2.8
4.9
6.5
−
3.3 (VCC=9V)
(VCC=12V)
−
−
2.2
4.1
5.5
2.2
4.1
5.5
35
−
1.65
AFT def1 AFT defeat 1
AFT def2 AFT defeat 2
(VCC=9V)
(VCC=12V)
4.6 (VCC=9V)
(VCC=12V)
Vari
able
−
−
−
−
−
−
SW8=2
IM
Inter modulation
Differential gain
Differential phase
1
1
1
TP18A VIF IN SG11
TP18A VIF IN SG12
TP18A VIF IN SG12
dB
%
DG
DP
−
−
2
5
−
2
5
deg
V18
SYNC
Sync. tip level
1
TP18A VIF IN SG2
−
−
−
0.85
1.15
1.45
V
RINV
VIF input resister
2
2
TP4
TP4
−
−
1.2
5
−
−
kΩ
CINV
VIF input capacitance
pF
SIF section
VIF IN SG2
TP13
QIF1
QIF2
QIF output 1
QIF output 2
1
1
−
−
−
−
−
−
94
94
100
100
106
106
dBµ
dBµ
QIF IN SG13
VIF IN SG2
TP13
QIF IN SG14
Vos
SIF detection output
AF output DC voltage
AF output (4.5MHz)
AF output (5.5MHz)
1
1
1
1
TP13 VIF IN SG15
TP10 SIF IN SG20
TP10 SIF IN SG16
TP10 SIF IN SG21
0
−
−
−
−
−
−
−
5
5
5
0
SW7=2
94
1.6
100
2.2
106
2.8
dBµ
V1
V
VoAF1
VoAF2
400
320
560
450
800 mVrms
630 mVrms
AF output distortion
(4.5MHz)
THD AF1
THD AF2
LIM1
1
1
1
1
TP10 SIF IN SG16
TP10 SIF IN SG21
−
−
−
−
−
−
−
−
5
0
5
0
−
−
−
−
0.2
0.2
42
0.9
0.9
55
%
%
AF output distortion
(5.5MHz)
SG17
TP10 SIF IN
SG19
Limiting sensitivity
(4.5MHz)
dBµ
dBµ
SG22
TP10 SIF IN
SG24
Limiting sensitivity
(5.5MHz)
LIM2
42
55
AMR1
AMR2
AM rejection (4.5MHz)
AM rejection (5.5MHz)
1
1
1
1
2
2
TP10 SIF IN SG18
TP10 SIF IN SG23
TP10 SIF IN SG20
TP10 SIF IN SG25
TP7
−
−
−
−
−
−
−
−
5
0
5
0
55
55
55
55
−
62
64
62
64
1.5
4
−
−
−
−
−
−
dB
dB
dB
dB
kΩ
pF
AF S/N 1 AF S/N (4.5MHz)
AF S/N 2 AF S/N (5.5MHz)
RINS
CINS
SIF input resistance
SIF input capacitance
TP7
−
Control section
Vari
able
SW7=2
CQIF
QIF control
1
TP7
−
−
−
−
−
0.7
1.0
V
PIN12 VOLTAGE CONTROL
Pin12 voltage (V)
AF
AFT
0 to 0.6
0 to 2.3
NORMAL
DEFEAT
NORMAL
DEFEAT
PAL
1.0 to 2.3
2.7 to 4.0
2.7 to 5.0
NTSC
4.4 to 5.0
3
MITSUBISHI ICs (TV)
M52342FP
PLL-SPLIT VIF/SIF IC
ELECTRICAL CHARACTERISTICS TEST METHOD
V3 RF AGC operating voltage
Input SG8 into VIF IN, and gradually reduce Vi and then measure
the input level when RF AGC output TP3 reaches 1/2 VCC, as
shown below.
Video S/N
Input SG2 into VIF IN and measure the video out (Pin 18) noise in
r.m.s at TP18B through a 5MHz (-3dB) L.P.F.
TP3
Voltage
0.7×Vo det
(dB)
S/N=20 log
NOISE
V3H
BW Video band width
1. Measure the 1MHz component level of EQ output TP18A with a
spectrum analyzer when SG3 (f2=57.75MHz) is input into VIF
IN. At that time, measure the voltage at TP8 with SW8, set to
position 2, and then fix V8 at that voltage.
1/2VCC
2. Reduce f2 and measure the value of (f2-f0) when the (f2-f0)
component level reaches -3dB from the 1MHz component level
as shown below.
V3L
Vi
Vi (dBµ)
TP18
CL-U Capture range
1. Increase the frequency of SG9 until the VCO is out of locked-
oscillation.
2. Decrease the frequency of SG9 and measure the frequency fU
when the VCO locks.
-3dB
CL-U=fU-58.75 (MHz)
CL-L Capture range
1. Decrease the frequency of SG9 until the VCO is out of locked-
oscillation.
( f2 - f0 )
2. Increase the frequency of SG9 and measure the frequency fL
when the VCO locks.
1MHz
BW
CL-L=58.75-fL (MHz)
VIN MIN Input sensitivity
Input SG4 (Vi=90dBµ) into VIF IN, and then gradually reduce Vi and
measure the input level when the 20kHz component of EQ output
TP18A reaches -3dB from Vo det level.
CL-T Capture range
CL-T=CL-U+CL-L (MHz)
µ AFT sensitivity,V2H Maximum AFT voltage,V2L Minimum AFT
VIN MAX Maximum allowable input
voltage
1. Input SG5 (Vi=90dBµ) into VIF IN, and measure the level of the
1. Input SG10 into VIF IN , and set the frequency of SG10 so that
20kHz component of EQ output.
the voltage of AFT output TP2 is 3V. This frequency is named
f(3).
2. Gradually increase the Vi of SG and measure the input level
when the output reaches -3dB.
2. Set the frequency of SG10 so that the AFT output voltage is 2V.
This frequency is named f (2)
GR AGC control range
GR=VIN MAX-VIN MIN (dB)
4
MITSUBISHI ICs (TV)
M52342FP
PLL-SPLIT VIF/SIF IC
3. IN the graph, maximum and minimum DC voltage are V2H and
V2L, respectively.
AF S/N
1. Input SG20 (SG25) into SIF input, and measure the output noise
level of AF output TP1. This level is named VN.
2. S/N is;
TP2
Voltage
VoAF (mVr.m.s)
(dB)
S/N=20log
3V
VN (mVr.m.s)
CQIF QIF control
V2H
Lower the voltage of V7, and measure the voltage of V7 when DC
voltage of TP13 begins to change.
2V
THE NOTE IN THE SYSTEM SETUP
V2L
M52342FP has 2 power supply pins of Vcc (pin 14) and Vreg. OUT
(pin 17). Pin 14 is for AFT output, RF AGC output circuits and 5V
regulated power circuit and Pin 17 is for the other circuit blocks.
In case M52342FP is used together with other ICs like VIF
operating at more than 5V, the same supply voltage as that of
connected ICs is applied to VCC and Vreg. Out is opened. The other
circuit blocks, connected to Vreg. OUT are powered by internal 5V
regulated power supply.
f (3)
f (2)
f (MHz)
1000 (mV)
µ =
(mV/kHz)
f (2) - f (3) (kHz)
IM Intermodulation
1. Input SG11 into VIF IN, and measure EQ output TP18A with an
oscilloscope.
In case the connecting ICs are operated at 5V, 5V is supplied to
both VCC and Vreg.OUT.
2. Adjust AGC filter voltage V8 so that the minimum DC level of the
output waveform is 1.0V.
3. At this time, measure, TP18A with a spectrum analyzer.
The intermodulation is defined as a difference between 920kHz
and 3.58MHz frequency components.
LOGIC TABLE
AF
AFT
20k “H”
20k “L”
20k “H”
20k “L”
DEFEAT
NORMAL
DEFEAT
NORMAL
10k “H”
10k “L”
NTSC
LIM Limiting sensitivity
1. Input SG17 (SG22) into SIF input, and measure the 400Hz
PAL
component level of AF output TP10.
2. Input SG19 (SG24) into SIF input, and measure the 400Hz
component level of AF output TP10.
3. The input limiting sensitivity is defined as the input level when a
difference between each 400Hz components of audio output
(TP10) is 30dB, as shown below.
Audio output
Audio output while
(mVrms)
SG17 (SG22) is input
30dB
Audio output while
SG19 (SG24) is input
SIF input
(dBµ)
AMR AM Rejection
1. Input SG18 (SG23) into SIF input, and measure the output level
of AF output TP10. This level is named VAM.
2. AMR is;
VoAF (mVr.m.s)
(dB)
AMR=20log
VAM (mVr.m.s)
5
MITSUBISHI ICs (TV)
M52342FP
PLL-SPLIT VIF/SIF IC
INPUT SIGNAL
TYPICAL CHARACTERISTICS
SG No.
Signals (50Ω termination)
THERMAL DERATING (MAXIMUM RATING)
1750
1
2
f0=58.75MHz AM20kHz 77.8% 90dBµ
f0=58.75MHz 90dBµ CW
1524
1500
f1=58.75MHz 90dBµ CW (Mixed signal)
f2=Frequency variable 70dBµ CW (Mixed signal)
3
1250
1000
750
500
250
0
4
5
f0=58.75MHz AM20kHz 77.8% level variable
f0=58.75MHz AM20kHz 14.0% level variable
f0=58.75MHz 80dBµ CW
914
6
7
f0=58.75MHz 110dBµ CW
8
f0=58.75MHz CW level variable
f0=Variable AM20kHz 77.8% 90dBµ
f0=Variable 90dBµ CW
9
10
f1=58.75MHz 90dBµ CW (Mixed signal)
f2=55.17MHz 80dBµ CW (Mixed signal)
f3=54.25MHz 80dBµ CW (Mixed signal)
11
12
-20
0
25
50
75 100 125 150
f0=58.75MHz 87.5%
TV modulation ten-step waveform
Sync tip level 90dBµ
AMBIENT TEMPERATURE Ta (°C)
13
14
f1=54.25MHz 95dBµ CW
f1=54.25MHz 75dBµ CW
f1=58.75MHz 90dBµ CW (Mixed signal)
f2=54.25MHz 70dBµ CW (Mixed signal)
15
16
17
18
19
20
21
22
23
24
25
f0=4.5MHz 90dBµ FM400Hz±25kHz dev
f0=4.5MHz FM400Hz±25kHz dev level variable
f0=4.5MHz 90dBµ AM400Hz 30%
f0=4.5MHz CW level variable
f0=4.5MHz 90dBµ CW
f0=5.5MHz 90dBµ FM400Hz±50kHz dev
f0=5.5MHz FM400Hz±50kHz dev level variable
f0=5.5MHz 90dBµ AM400Hz 30%
f0=5.5MHz CW level variable
f0=5.5MHz 90dBµ CW
6
MITSUBISHI ICs (TV)
M52342FP
PLL-SPLIT VIF/SIF IC
TYPICAL APPLICATION EXAMPLE (for 38.9MHz SPLIT)
ON
VCC
8.5 to 12V
18µ
OFF
GND
47µ
10k
300
180
1k
150
22p 47µ
SFE 5.5MD
VCO COIL 5531
33µ
0.01µ
82p
62
1k
0.01µ
10k
1p
OFF
ON
100µ
220k
10p
20k
13
24
23
22
21
20
19
18
17
Vcc REG
16
15
14
VCO
LIM AMP
Inter
Split
AFT
QIF DET
EQ
AMP
VIDEO
DET
QIF AGC
APC
FM DET
QIF AMP
IF AGC
10
RF AGC
VIF AMP
AF AMP
12
11
1
2
3
4
5
6
7
8
9
0.01µ
0.56µ
2.4k
5.1k
36k
15k
0.47µ
39k
10µ
1k
0.01µ
0.01µ
SAW
150k
150k
0.01µ
390
0.01µ
220µ
0.01µ
3.9k
In case the other components are connected
to the GND area nearby the VCO coil, a leakage
interference to them should be considered.
The bypass capacitors of 33µF and 0.01µF are
grounded as close as possible to the GND pins
(pin 6, 7, 8) so as to minimize the interference.
0.33µ
0.01µ
910
IF IN
33
2200p
51
Units Resistance : Ω
Capacitance : F
7
MITSUBISHI ICs (TV)
M52342FP
PLL-SPLIT VIF/SIF IC
Pin 1 (RF AGC DELAY)
An applied voltage to the pin1 is for changing a RF AGC delay point.
VCC
1
Pin 2 (AFT OUTPUT)
Since an AFT output is provided by a high impedance source, the detection
sensitivity can be set by an external resistor.
The muting operation will be on in following two cases;
VCC (supply to a tuner)
1) the APC is out of locking,
2) the video output becomes small enough in a weak
electric field.
The maximum
outflow current
is 0.2 mA.
2
Tuner
The maximum
inflow current
is 0.2mA.
Vcc
[V2]
(in open-loop condition)
Vcc
2
0
[fo]
Pin 3 (RF AGC OUTPUT)
A current mode output is available in the reverse AGC operation.
The fluctuation of a bottom voltage is made small by loading higher impedance for
a deep saturation.
VCC (supply to a tuner)
VCC
(supply voltage to a tuner)
3
Tuner
(in open-loop condition)
[V3]
The maximum
inflow current
is 1.5mA.
strong
electric field
weak
electric field
0
[IF input]
Note: Connecting a nonpolarity capacitor of 1µF between pin1 and pin 3 improves AGC operating speed.
In that case, the capacitors between pin1/pin3 and ground should be removed.
8
MITSUBISHI ICs (TV)
M52342FP
PLL-SPLIT VIF/SIF IC
Pin 4, Pin 5 (VIF INPUT)
It should be designed considering careful impedance matching with the
SAW filter.
Bias
5
4
SAW
1.2kΩ
1.2kΩ
terminal voltage : 1.45V
Pin 6, Pin 7, Pin 8 (GND)
6
7
8
They are all ground pins.
Pin 9 (QIF INPUT, INTER SW)
terminal voltage : 2.4V
SAW
5kΩ
9
Bias
The input impedance is 1.5kΩ.
In the intercarrier system application, the intercarrier output is available
in pin 15 by connecting pin 9 to ground.
1.5kΩ
1.5kΩ
Inter
Inter/Split
Pin 10 (IF AGC FILTER)
VCC
In spite of the 1-pin filter configuration, 2-pin filter
characteristics are available by utilizing the dynamic AGC circuit.
[V10]
10
1kΩ
weak
strong
electric field
electric field
0
[IF input]
9
MITSUBISHI ICs (TV)
M52342FP
PLL-SPLIT VIF/SIF IC
Pin 11 (AUDIO F/B)
terminal voltage : 2.1V
11
The FM detector can respond to several kinds of SIF signals without an
adjustment and external components by adopting the PLL technique.
It also is in compliance with the multi-SIF by selecting an appropriate
deemphasis and audio output amplifier using the pin14 switch.
The capacitor between pin 11 and 12, which fixes the deemphasis
characteristics, can be determined considering the combination of an
equivalent resistance of the IC and this capacitor itself.
5kΩ
5kΩ
Pin 12 (AF OUTPUT)
In the 4.5MHz application, the internal voltage gain is increased by 6-dB in
comparison with the other applications and then the signals are delivered
through an emitter follower.
12
terminal voltage : 2.2V
Pin 13 (LIMITER INPUT)
terminal voltage : 2.2V
13
Bias
The input impedance is 8kΩ.
8kΩ
8kΩ
Pin 14 (AFT SW, NP SW)
It works as a switch by connecting the resistor to 5V(High)
or GND (Low), alternately.
SIF4.5MHz : H
Others : L
VCC (5V)
10kΩ
Pin 14
applied voltage
10kΩ
20kΩ AF AMP
AFT
2kΩ
14
4.5MHz DEFFET
4.5MHz NORMAL
OTHER DEFFET
OTHER NORMAL
4.4 to 5.0V
2.7 to 4.0V
1.0 to 2.3V
0 to 0.6V
H
H
L
H
L
22kΩ
H
L
AFT Defeat :H
AFT ON :L
L
The terminal voltage is set by the external resistors
because of an open base input.
10
MITSUBISHI ICs (TV)
M52342FP
PLL-SPLIT VIF/SIF IC
Pin 15 (QIF OUTPUT / INTER OUTPUT)
terminal voltage : 2.45V
In both the split and intercarrier system, the carrier signal
15
to SIF provided from pin 15 through an emitter follower.
Drive current
: 0.5mA
Pin 16, Pin 17 (VCC)
VCC
The recommended supply voltage is 5V or 9 to 12V.
In the case of 5V supply, these pins should be tied to pin 20
and pin 21.
In the case of 9 to 12V supply, a regulated output of 5V
are available in pin 20 and 21.
16
17
Pin 18, Pin 19 (VCO COIL)
Connecting a tuning coil and capacitor to these pins enables
an oscillation.
850Ω
850Ω
18
19
The tuning capacitor of about 30pF is recommended.
The oscillation frequency is tuned in f0.
In the actual adjustment, the coil is tuned so that the AFT
voltage is reached to Vcc/2 with f0 as an input.
The printed pattern around these pins should be designed
carefully to prevent an pull-in error of VCO, caused by the leakage
interference from the large signal level oscillator to adjacent pins.
The interconnection also should be designed as short as possible.
466Ω
466Ω
Pin 20, Pin 21 (REG OUTPUT)
21
20
It is a regulated 5V output which has current drive
capability of approximately 15mA.
12.1kΩ
3.8kΩ
11
MITSUBISHI ICs (TV)
M52342FP
PLL-SPLIT VIF/SIF IC
Pin 22 (VIDEO OUTPUT)
An output amplitude is positive 2VP-P in the case of 87.5%
video modulation.
22
internal
driving current : 3mA
1.1VO-P
Pin 23 (APC FILTER)
In the locked state, the cut-off frequency of the filter is
adjusted effectively by an external resistor so that it will be
in the range of around 30 to 200kHz.
In case the cut-off frequency is lower, the pull-in speed
becomes slow. On the other hand, a higher cut-off frequency
widen the pull-in range and band width, which results
in a degradation in the S/N ratio. So, in the actual TV system
design, the appropriate constant should be chosen for getting
desirable performance considering above conditions.
23
Bias
12kΩ
[V23]
[Pin 23 output]
3.4VO-P
[FM mod. frequency]
fo
[IF input frequency]
100kHz
In the application, an offset between AFT center frequency and VCO free-running frequency, can be improved by connecting a 220kΩ resistor
to Vcc supply (pin 21).
23
21
A buzz noise also decreases by connecting a capacitor from
pin 23 to Vcc (pin 21) or GND. This effect utilizes the signal
interference on the printed circuit board. So, the determination
that which connection is effective, to Vcc or GND, is done by a
cut and try method.
220kΩ
C
The capacitor of less than 680pF, which depends on Q of VCO coil,
is recommended to prevent an APC pull-in range from narrowing.
Taking it into consideration in the actual TV set design.
12
MITSUBISHI ICs (TV)
M52342FP
PLL-SPLIT VIF/SIF IC
Pin 24 (EQ F/B)
Both the external coil and capacitor determine the
frequency response of EQ output.
The series connected resistor is for damping.
16.8kΩ
24
500Ω
3.1kΩ
3.9kΩ
1.1VO-P
In the intercarrier system, the following phenomenon should be considered;
a strong equalization (EQ) enlarge the sound carrier output from pin 22, because the EQ is applied before an audio trap.
In that case, the next two solutions are recommended;
decrease in S level of SAW, avoiding to peak a sound carrier in EQ.
Video
Det.
+
-
3.17kΩ
500Ω
3.1kΩ
3.75mA
22
24
Video output
(Circuit Diagram of EQ Amp.)
13
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