LE79R240QC [MICROSEMI]
SLIC, Bipolar, CQCC32, 8 X 8 MM, QFN-32;
| 型号： | LE79R240QC |
| 厂家： | 
Microsemi |
| 描述： | SLIC, Bipolar, CQCC32, 8 X 8 MM, QFN-32 电信 电信集成电路 |
| 文件： | 总23页 (文件大小：606K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ISLIC™
Intelligent Subscriber Line Interface Circuit
Am79R240*/Le79R240 Device
APPLICATIONS
ORDERING INFORMATION
An ISLAC™ device must be used with this part.
I Optimized for Voice over Broadband and related
applications
Device
Am79R240JC*
Package
32-pin PLCC
— Cable telephony
— Integrated Access Devices (IAD)
— Smart Residential Gateways (SRG)
— LAN Systems
Le79R240JC
Le79R240QC**
32-pin PLCC
32-pin QFN
*This product can be ordered using ordering part numbers Am79R240
or Le79R240. The Am79R240 ordering part number will be discontin-
ued after 6/30/02, at which time the product will only be available using
the Le79R240 ordering part number.
**Due to size constraints, QFN devices are marked by omitting the “Le”
prefix. For example, Le79R240QC is marked 79R240QC.
FEATURES
I Monitor of two-wire interface voltages and currents
supports
— Voice transmission
— Internal chip ring generation
— Programmable DC feed characteristics
DESCRIPTION
In combination with an ISLAC™ device, the Le79R240 device
implements the telephone line interface function. This enables
the design of a low cost, high performance, fully software
programmable line interface for multiple country applications
worldwide. All AC, DC, and signaling parameters are fully
programmable via microprocessor or GCI interfaces on the
ISLAC device. Additionally, the Le79R240 device has
integrated self-test capabilities to resolve faults to the line
circuit.
–
–
Independent of battery
Current limited
— Selectable off-hook and ground-key thresholds
— Power cross and fault detection
I Supports internal short loop ringing
I +5 V and battery supplies
I Dual battery operation for system power saving
— Automatic battery switching
I Compatible with inexpensive protection networks
BLOCK DIAGRAM
— Accommodates low tolerance fuse resistors or PTC
thermistors
Signal
Transmission
RSN
VTX
I Metering capable
AD
SA
— 12 kHz and 16 kHz
Longitudinal
Control
I Tip-open state supports ground start signaling
I 5 REN with 15 V DC offset trapezoid.
For US standard:
HPA
HPB
SB
Two-Wire
Interface
Attenuator
VSAB
VREF
BD
— drives ring up to 4.4 kft of 26 gauge wire.
or
— drives ring up to 7 kft of 24 gauge wire.
For European (British) standard:
— drives ring up to 1.7 km of 0.5 mm copper cable.
I Space Saving Package Options (8x8 QFN)
Signal
Conditioning
IMT
ILG
CREF
Fault
Meas.
VBL
VBH
Switch Driver
RELATED LITERATURE
P1
P2
P3
LD
I 080250 Le79Q2241/2242/2243 QISLAC Data Sheet
Input Decoder and
Control Registers
I 080262 Intelligent Access™ Voice Solutions Evaluation
Board User’s Guide
I 080344 Le79R2xx/Le79Q224x ISLIC™/Quad ISLAC™
Technical Reference
Document ID# 080693 Date:
Apr 17, 2002
1
Rev:
E
Version:
Distribution:
Public Document
Am/Le79R240 Data Sheet
Table of Contents
APPLICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
RELATED LITERATURE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
ORDERING INFORMATION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
BLOCK DIAGRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
PRODUCT DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
LE79R240 DEVICE INTERNAL BLOCK DIAGRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
FEATURES OF THE INTELLIGENT ACCESS™ CHIP SET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
CHIP SET BLOCK DIAGRAM - FOUR CHANNEL LINE CARD EXAMPLE . . . . . . . . . . . . . . . . . . . . .6
CONNECTION DIAGRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
PIN DESCRIPTIONS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
THERMAL RESISTANCE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
ELECTRICAL OPERATING RANGES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
POWER DISSIPATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
DC SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
TRANSMISSION SPECIFICATIONS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
RINGING SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
CURRENT-LIMIT BEHAVIOR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
THERMAL SHUTDOWN FAULT INDICATIONS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
OPERATING MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
OPERATING MODE DESCRIPTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
THERMAL-MANAGEMENT EQUATIONS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
TIMING SPECIFICATIONS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
WAVEFORMS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
APPLICATION CIRCUIT. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
INTERNAL RINGING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
LINE CARD PARTS LIST. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
PHYSICAL DIMENSIONS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
32-PIN PLCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
32-PIN QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
REVISION HISTORY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
REVISION B TO C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
REVISION C TO D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
REVISION D TO E. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
2
Am/Le79R240 Data Sheet
PRODUCT DESCRIPTION
The Intelligent Access™ voice chip sets integrate all functions of the subscriber line. Two chip types are used to implement the
line card — an Le79R240 device and the Le79Q2241/2242/2243 ISLAC device. These provide the following basic functions:
1. The Le79R240 device: A high voltage, bipolar device that drives the subscriber line, maintains longitudinal
balance and senses line conditions.
2. The Le79Q2241/2242/2243 ISLAC device: A low voltage CMOS IC that provides conversion, control and
DSP functions for the Le79R240 device.
A complete schematic of a line card using the Intelligent Access voice chip sets for internal ringing is shown in the “Chip set Block
Diagram - Four Channel Line card Example” on page 6.
The Le79R240 device uses reliable, bipolar technology to provide the power necessary to drive a wide variety of subscriber lines.
It can be programmed by the ISLAC device to operate in eight different modes that control power consumption and signaling.
This enables it to have full control over the subscriber loop. The Le79R240 device is designed to be used exclusively with the
ISLAC devices. The Le79R240 device requires only +5 V power and the battery supplies for its operation.
The Le79R240 device implements a linear loop-current feeding method.
The ISLAC device contains high-performance circuits that provide A/D and D/A conversion for the voice (codec), DC-feed and
supervision signals. The ISLAC device contains a DSP core that handles signaling, DC-feed and supervision for all channels.
The DSP core selectively interfaces with three types of backplanes:
•
•
•
Standard PCM/MPI
Standard GCI
Modified GCI with a single analog line per GCI channel
The Intelligent Access voice chip set provides a complete software configurable solution to the BORSCHT functions as well as
complete programmable control over subscriber line DC-feed characteristics, such as current limit and feed resistance. In
addition, these chip sets provide system level solutions for the loop supervisory functions and metering. In total, they provide a
programmable solution that can satisfy worldwide line card requirements by software configuration.
Software programmed filter coefficients, DC-feed data and supervision data are easily calculated with the WinSLACꢀ software.
This PC software is provided free of charge, and allows the designer to enter a description of system requirements. WinSLAC
then computes the necessary coefficients and plots the predicted system results.
The Le79R240 device includes circuitry to report Tip•Ring voltage and metallic and longitudinal currents to the ISLAC device.
These inputs allow the ISLAC device to place several key Le79R240 device performance parameters under software control.
The main functions that can be observed and/or controlled through the ISLAC device backplane interface are:
•
•
•
•
•
•
•
•
•
DC-feed characteristics
Ground-key detection
Off-hook detection
Metering signal
Subscriber line voltage and currents
Ring-trip detection
Abrupt and smooth battery reversal
Subscriber line matching
Ringing generation
To accomplish these functions, the ISLIC device collects the following information and feeds it in analog form to the ISLAC device:
•
•
The metallic (IMT) and longitudinal (ILG) loop currents
The AC (VTX) and DC (VSAB) loop voltage
The outputs supplied by the ISLAC device to the ISLIC device are then:
•
A voltage (VHLi) that provides control for the following high-level ISLIC device outputs:
–
–
–
DC loop current
Internal ringing signal
12 or 16 kHz metering signal
•
A low-level voltage proportional to the voice signal (VOUTi)
The ISLAC device performs the codec and filter functions associated with the four-wire section of the subscriber line circuitry in
a digital switch. These functions involve converting an analog voice signal into digital PCM samples and converting digital PCM
samples back into an analog signal. During conversion, digital filters are used to band-limit the voice signals.
Am/Le79R240 Data Sheet
3
The user-programmable filters set the receive and transmit gain, perform the transhybrid balancing function, permit adjustment
of the two-wire termination impedance and provide frequency attenuation adjustment (equalization) of the receive and transmit
paths. Adaptive transhybrid balancing is also included. All programmable digital filter coefficients can be calculated using
WinSLAC software and loaded into the ISLAC device registers using the system microprocessor. The PCM codes can be either
16-bit linear twos-complement or 8-bit companded A-law or µ-law.
Besides the codec functions, the Intelligent Access voice chip set provides all the sensing, feedback, and clocking necessary to
completely control ISLIC device functions with programmable parameters. System-level parameters under programmable control
include active loop current limits, feed resistance, and feed mode voltages.
The ISLAC device supplies complete mode control to the ISLIC device using the control bus (P1-P3) and tri-level load signal
(LDi).
The Intelligent Access voice chip set provides extensive loop supervision capability including off-hook, ring-trip and ground-key
detection. Detection thresholds for these functions are programmable. A programmable debounce timer is available that
eliminates false detection due to contact bounce.
AC and DC fault detection is also provided.
Note:
i denotes channel number
4
Am/Le79R240 Data Sheet
LE79R240 DEVICE INTERNAL BLOCK DIAGRAM
AD
SA
IA sense
RSN
IA
IA
600
A Amplifier
+
-
+
-
HPA
+
VTX
VREF
+
-
HPB
-
+
+
β
-
= 0.01
VREF
VSAB
VREF
SB
BD
B Amplifier
IB
IB sense
IB
600
VREF
To Power
Amplifiers
Thermal
Shutdown
VBH
VBL
High Neg
Batt
Select
IA
IB
IMT
ILG
+
600 600
IA IB
-
600 600
Decoder
C2 C3
CREF
RSVD RSVD RSVD
C1
Control Register
Demux
Power amplifiers positive supply
P3
BGND
P1
P2
LD
VCC
GND
Am/Le79R240 Data Sheet
5
FEATURES OF THE INTELLIGENT ACCESS™ CHIP SET
•
•
•
Performs all battery feed, ringing, signaling, hybrid and
•
•
•
•
Polarity reversal
test (BORSCHT) functions
Supports both loop-start and ground-start signaling
Exceeds central office requirements
Selectable PCM or GCI interface
Two chip solution supports high density, multi-channel
architecture
Single hardware design meets multiple country require-
–
Supports most available master clock frequencies
ments through software programming of:
from 512 kHz to 8.192 MHz
–
–
–
Ringing waveform and frequency
DC loop-feed characteristics and current-limit
Loop-supervision detection thresholds
•
•
•
•
•
•
•
On-hook transmission
Power/service denial mode
Line-feed characteristics independent of battery voltage
Only 5 V, 3.3 V and battery supplies needed
Low idle-power per line
–
–
Off-hook debounce circuit
Ground-key and ring-trip filters
–
–
–
–
–
–
–
Off-hook detect de-bounce interval
Two-wire AC impedance
Transhybrid balance
Transmit and receive gains
Equalization
Digital I/O pins
A-law/µ-law and linear selection
Linear power-feed
Compatible with inexpensive protection networks;
Accommodates low-tolerance fuse resistors while main-
taining longitudinal balance
Monitors two-wire interface voltages and currents
Power-cross, fault, and foreign voltage detection
•
•
•
Integrated self-test features and built-in voice-path test
modes
•
•
Supports internal balanced ringing with offset
–
Echo gain, distortion, and noise
–
–
Self-contained ringing generation and control
Integrated ring-trip filter and software enabled man-
•
•
Guaranteed performance over commercial temperature
range.
Small physical size
ual or automatic ring-trip mode
Supports metering generation with envelope shaping
CHIP SET BLOCK DIAGRAM - FOUR CHANNEL LINE CARD EXAMPLE
7
4
4
VCCA
A1
Le79R240
Le79R240
Le79R240
Le79R240
LD1
VCCD
B1
DGND1
DGND2
IO(1-4)
TSCA/G
TSCB
VREF
7
7
A2
B2
LD2
RC
Networks
and
AGND1
AGND2
A3
B3
DRA/DD
DRB
Protection
LD3
Quad
ISLAC
Le79Q224x
P1-P3
DXB
3
7
DXA/DU
DCLK/S0
PCLK/FS
MCLK
A4
B4
LD4
RREF
FS/DCL
CS/RST
DIO/S1
INT
RSHB
BATH
BATL
RSLB
6
Am/Le79R240 Data Sheet
CONNECTION DIAGRAM
4
3
2
1
32 31 30
5
6
29
28
27
26
25
24
23
22
21
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
P1
SB
SA
7
IMT
8
ILG
9
CREF
RSVD
HPB
HPA
VTX
32-Pin PLCC
10
11
12
13
P2
14 15 16 17 18 19 20
32 31
1
30 29
28 27
26 25
24
RSVD
SA
2
23
RSVD
IMT
3
4
22
21
RSVD
RSVD
ILG
CREF
32-Pin QFN
5
6
20
19
RSVD
RSVD
RSVD
HPB
18
17
RSVD
P1
HPA
VTX
7
8
Exposed Pad
9
10
11 12
13 14
15 16
Note:
1. Pin1 is marked for orientation.
2. RSVD = Reserved. Do not connect to this pin.
3. The thermally enhanced QFN package features an exposed pad on the underside which must be electrically tied to VBH.
Am/Le79R240 Data Sheet
7
PIN DESCRIPTIONS
Pin Name
AD, BD
BGND
Type
Output
Description
Provide the currents to the A and B leads of the subscriber loop.
Ground return for high and low battery supplies.
VCCD reference. It is the digital high logic supply rail, used by the ISLIC device to ISLAC device
interface.
Analog and digital ground return for VCC.
These pins connect to CHP, the external high-pass filter capacitor that separates the DC loop-
voltage from the voice transmission path.
Ground
+3.3 VDC
Ground
Output
CREF
GND
HPA, HPB
ILG is proportional to the common-mode line current (IAD – IBD), except in disconnect mode,
where ILG is proportional to the current into grounded SB.
IMT is proportional to the differential line current (IAD + IBD), except in disconnect mode, where
IMT is proportional to the current into grounded SA. The Le79R240 device indicates thermal
overload by pulling IMT to CREF.
ILG
IMT
Output
Output
The LD pin controls the input latch and responds to a 3-level input. When the LD pin is a logic
1 < (V
+ 0.3 V), the logic levels on P1 – P3 latch into the Le79R240 device control register
REF
LD
Input
bits that operate the mode-decoder. When the LD pin level is at < VREF ± 0.3 V, the control
register contents are locked.
P1 – P3
RSN
Input
Input
Inputs to the latch for the operating-mode decoder and the relay-drivers.
The metallic current between AD and BD is equal to 500 times the current into this pin. Networks
that program receive gain and two-wire impedance connect to this node. This input is at a virtual
potential of VREF.
RSVD
Reserved
Input
These pins are used during Legerity testing. In the application, these pins must be left floating.
Sense the voltages on the line side of the fuse resistors at the A and B leads. External sense
resistors, RSA and RSB, protect these pins from lightning or power-cross.
SA, SB
Connection to high-battery supply used for ringing and long loops. Connects to the substrate.
When only a single battery is available, it connects to both VBH and VBL.
Connection to low-battery supply used for short loops. When only a single battery is available,
this pin can be connected to VBH.
VBH
VBL
VCC
Battery (Power)
Battery (Power)
+5 V Power
Supply
Positive supply for low voltage analog and digital circuits in the Le79R240 device.
The ISLAC chip provides this voltage which is used by the Le79R240 device for internal
reference purposes. All analog input and output signals interfacing to the ISLAC chip are
referenced to this pin.
VREF
VSAB
Input
Output
Scaled-down version of the voltage between the sense points SA and SB on this pin.
The voltage between this pin and VREF is a scaled down version of the AC component of the
voltage sensed between the SA and SB pins. One end of the two-wire input impedance
programming network connects to VTX. The voltage at VTX swings positive and negative with
respect to VREF.
VTX
Output
Battery
Exposed
Pad
This must be electrically tied to VBH.
8
Am/Le79R240 Data Sheet
Absolute Maximum Ratings
Stresses greater than those listed under "Absolute Maximum Ratings" can cause permanent device failure. Functionality at or
above these limits is not implied. Exposure to absolute maximum ratings for extended periods can affect device reliability.
Storage temperature
Ambient temperature, under bias
Humidity
–55 to +150°C
0 to 70°C
5% to 95%
–0.4 to +7 V
+0.4 to –95 V
–3 to +3 V
V
V
with respect to GND
CC
, V with respect to GND (See Note 2)
BH
BL
BGND with respect to GND
AD or BD to BGND:
Continuous
V
V
V
V
- 1 to BGND + 1
- 5 to BGND + 5
- 10 to BGND + 10
- 15 to BGND + 15
BH
BH
BH
BH
10 ms (F = 0.1 Hz)
1 µs (F = 0.1 Hz)
250 ns (F = 0.1 Hz)
Current into SA or SB:
10 µs rise to I
PEAK
I
= ±5 mA
PEAK
1000 µs fall to 0.5 I
PEAK
2000 µs fall to I = 0
Current into SA or SB:
2 µs rise to I
10 µs fall to 0.5 I
PEAK
I
= ±12.5 mA
PEAK
PEAK
20 µs fall to I = 0
SA SB continuous
5 mA
Current through AD or BD
P1, P2, P3, LD to GND
± 150 mA
–0.4 to V + 0.4 V
CC
Maximum power dissipation, (See Note 1)
T = 70°C
A
1.67 W
3.00 W
1.5 kV min
In 32-pin PLCC package
In 32-pin QFN package
ESD Immunity (Human Body Model)
Note:
1. Thermal limiting circuitry on chip will shut down the circuit at a junction temperature of about 165°C. Continuous operation above 145°C
junction temperature may degrade device reliability.
The thermal performance of a thermally enhanced package is assured through optimized printed circuit board layout. Specified performance
requires that the exposed thermal pad be soldered to an equally sized exposed copper surface, which, in turn, conducts heat through
multiple vias to a large internal copper plane.
2. Rise time of V (dv/dt) must be limited to less than 27 v/µs.
BH
Thermal Resistance
The junction to air thermal resistance of the Le79R240 device in a 32-pin PLCC package is 45°C/W and in a 32-pin QFN package
is 25 °C/W (measured under free air convection conditions and without external heat sinking).
Electrical Operating Ranges
Legerity guarantees the performance of this device over the commercial (0ºC to 70ºC) temperature range by conducting electrical
characterization and by conducting a production test with single insertion coupled to periodic sampling. These characterization
and test procedures comply with section 4.6.2 of Bellcore TR-TSY-000357 Component Reliability Assurance Requirements for
Telecommunications Equipment.
Environmental Ranges
Ambient Temperature
Ambient Relative Humidity
0 to 70°C Commercial
15 to 85%
Am/Le79R240 Data Sheet
9
Electrical Ranges
Voltage at VCC
Voltage at VBL
Voltage at VBH
BGND with respect to GND
Load resistance on VTX to VREF
Load resistance on VSAB to VREF
5 V ± 5%
–15 V to VBH
–42.5 V to –90 V
–100 mV to +100 mV
20 kΩ minimum
20 kΩ minimum
SPECIFICATIONS
Power Dissipation
Loop resistance = 0 to ∞ unless otherwise noted (not including fuse resistors), 2 x 50 Ω fuse resistors, BATL = –24 V,
BATH = –90 V, VCC = +5 V. For power dissipation measurements, DC-feed conditions are as follows:
•
•
•
•
ILA (active mode current limit) = 25 mA (IRSN = 50 µA)
RFD (feed resistance) = 500 Ω
VAS (anti-sat activate voltage) = 10 V
VAPP (apparent battery voltage) = 48
Description
Test Conditions
On-Hook Disconnect
On-Hook Standby
Min
Typ
55
80
Max
80
125
Unit
On-Hook Transmission
ISLIC
175
340
900
250
450
1050
0.7
Power Dissipation Normal
Polarity
Fixed Longitudinal Voltage
mW
On-Hook Active High Battery
Off-Hook Active Low Battery
ISLIC
ISLIC
R = 294 Ω
L
On-Hook Disconnect
VBH
VBL
VCC
VBH
VBL
VCC
VBH
VBL
VCC
VBH
VBL
VCC
0.4
0.1
3.0
0.75
0
3.1
1.85
0
5
3.6
0
7.3
4.0
1.2
On-Hook Standby
4.0
3.0
On-Hook Transmission
Fixed Longitudinal Voltage
Power Supply Currents
mA
6.5
5.0
On-Hook Active High Battery
8.5
2.0
Off-Hook Active Low Battery
VBH
VBL
VCC
0.9
26.9
7.5
R = 294 Ω
L
10
10
Am/Le79R240 Data Sheet
DC SPECIFICATIONS
Unless otherwise specified, test conditions are: VCC = 5 V, BATH = –90 V, BATL = –24V, RRX = 150 kΩ,
RL = 600 Ω, RSA = RSB = 200 kΩ, RFA = RFB = 50 Ω, CHP = 22 nF, CAD = CBD = 22 nF,
IRSN = 50 mA, Active low battery. DC-feed conditions are normally set by the ISLAC device. When the
Le79R240 device is tested by itself, its operating conditions must be simulated as if it were connected to
an ideal ISLAC device.
30 k
Ω
30 k
390 pf
VREF
Ω
RT Network
No.
Item
Condition
Min
Typ
Max
Unit
Note
Standby mode, open circuit,
BH
|V | < 55 V
V
- 8
48
V
- 7
51
V
- 6
BH
BH
BH
|V | > 55 V
Two-wire loop voltage
(including offset)
55.5
56.5
16.5
BH
1
V
2
GND − VB
Active mode, RL = 600 Ω,
13.5
15
I
= 20 µA
RSN
Feed resistance per leg at
pins AD & BD
Feed current limit
IMT current
2
3
Standby mode
130
250
375
45
W
2
Standby mode, R = 600 Ω
18
34
56
mA
L
Standby mode, R = 2200 Ω
44.6
L
Standby mode
A to VBH
B to Ground
µA
ILG current
28
28
V
+ 0.3
Low boundary
V
REF
Ternary input voltage
boundaries for LD pin. Mid-
level input source must be
Vref.
C
- 1
High boundary
Input high current
Input low current
Mid-level current
V
REF
108
47
51
4
5
µA
µA
µA
2
2
2
Input high voltage
Input low voltage
Input high current
Input low current
2.0
V
V
µA
µA
0.8
20
20
Logic Inputs P1, P2, P3
–20
–20
0
0
6
7
8
VTX output offset
VREF input current
CREF input current
–50
0
50
0
+50
mV
µA
µA
V
= 1.4 V
= 3.3 V
2
2
REF
C
–3
3
REF
ß, DC Ratio of V
voltage:
to loop
SAB
9
Tj < 145°C, VSA - VSB = 22 V
0.0088
0.0097
0.0106
V/V
V
SAB
β =
----------------------------
V
– V
SA
SB
I
I
/I
I
I
= 10 mA
= 10 mA
10
11
275
560
300
605
325
650
A/A
A/A
LOOP MT
LOOP
/I
LONG LG
LONG
Input current, SA and SB
pins
K1
12
13
Active modes
1.0
3.0
µA
2
2
Incremental DC current gain
462.5
500
537.5
A/A
Am/Le79R240 Data Sheet
11
Transmission Specifications
No.
1
Item
RSN input impedance
VTX output impedance
Condition
f = 300 to 3400 Hz
Min
Typ
1
3
Max
Unit
Note
2
Ω
2
Active High Battery or Active Low
Battery
3
Max, AC + DC loop current
50
mA
2
2
Longitudinal impedance,
A or B to GND
2-4 wire gain
2-4 wire gain variation with
frequency
4
5
6
Active mode
70
135
Ω
–10 dBm, 1 kHz, 0 to 70°C
300 to 3400 Hz, relative to 1 kHz
14.18
–0.15
13.98
13.78
+0.15
+3 dBm to –55 dBm
Reference: –10 dBm
–10 dBm, 1 kHz
7
8
9
2-4 wire gain tracking
–0.15
–0.20
–0.1
+0.15
+0.20
+0.1
5
dB
4-2 wire gain
4-2 wire gain variation with
frequency
300 to 3400 Hz, relative to 1 kHz
+3 dBm to –55 dBm
Reference: –10 dBm
10
4-2 wire gain tracking
–0.15
+0.15
5
300 Hz to 3400 Hz
0 dBm
Total harmonic distortion level
2-wire
dB
dB
3
2
–50
–48
–14 dBm
11
4-wire
R
= 600 Ω
- 50 V 0 dBm
4-wire overload level at VTX
OHT
±1
–50
Vp
dB
2
2
LOAD
V
AB
Active modes, R = 600 Ω
Idle channel noise
C-message
L
+9
–5
+12
–78
dBrnC
dBmC
dBmp
dBmp
2
2
2-wire
4-wire
2-wire
4-wire
12
Psophometric
Weighted
–8
–95
2
Longitudinal balance
(IEEE method)
Active
L - T 200 to 3400 Hz
52
40
13
14
T - L 200 to 3400 Hz
50 to 3400 Hz
3.4 to 50 kHz
45
40
dB
3, 4
1, 2, 4
PSRR (VBH, VBL)
25
50 to 3400 Hz
3.4 to 50 kHz
F = 15 to 60 Hz Active mode
Freq = 12 kHz 0.5 Vrms
Freq = 16 kHz
Metering load = 200 Ω
45
35
3, 4
15
16
PSRR (VCC)
25
10
1, 2, 4
Longitudinal AC current per wire
mArms
dB
2
2
17
Metering distortion
40
Ringing Specifications
Item
Condition
Min
Typ
Max
Unit
Note
Ringing Voltage
Active internal ringing
VBH + 6
V
7
Current-Limit Behavior
SLIC Mode
Condition
Min
Typ
1
35
Max
100
46
Unit
µA
Note
6
Disconnect
Tip Open
Applied fault between ground and T/R
Ring Short to GND
24
Short Tip to VBH
Short Ring to GND
20
20
38
35
47
44
Standby
mA
Active Ringing
ISLAC device generating internal ringing
100
2
12
Am/Le79R240 Data Sheet
Thermal Shutdown Fault Indications
Fault
Indication
IMT operates normally (V ±1 V)
No Fault
REF
Thermal Shutdown
KG, IMT above 2.8 V
Note:
1. These tests are performed with the following load impedances:
Frequency < 12 kHz – Longitudinal impedance = 500 Ω; metallic impedance = 300 Ω
Frequency > 12 kHz – Longitudinal impedance = 90 Ω; metallic impedance = 135 Ω
2. Not tested or partially tested in production. This parameter is guaranteed by characterization or correlation to other tests.
3. This parameter is tested at 1 kHz in production. Performance at other frequencies is guaranteed by characterization.
4. When the Le79R240 device and ISLAC device is in the anti-sat operating region, this parameter is degraded. The exact degradation
depends on system design.
5.
–55 dBm gain tracking level not tested in production. This parameter is guaranteed by characterization and correlation to other tests.
6. This spec is valid from 0 V to V or –50 V, whichever is lower in magnitude.
BL
7. Other ringing voltage characteristics are set by the ISLAC device.
Operating Modes
The Le79R240 device receives multiplexed control data on the P1, P2 and P3 pins. The LD pin then controls the loading of P1,
P2, and P3 values into the proper bits in the Le79R240 device control register. When the LD pin is less than 0.3 V below VREF
<
(VREF - 0.3 V), P1–P3 must be low. When the LD pin is more than 0.3 V above VREF > (VREF + 0.3 V), P1–P3 must contain ISLIC
device control data C1, C2, and C3, which are latched into the Le79R240 device control register. Connecting the LD pin to VREF
locks the contents of the Le79R240 device control register.
The operating mode of the Le79R240 device is determined by the C1, C2, and C3 bits in the control register of the Le79R240
device. The following table defines the Le79R240 device operating modes set by these signals.
Table 1. Operating Modes
Battery Voltage
C3
C2
C1
Operating Mode
Selection
Operating Mode
High Battery (BATH) and
BGND
(High ohmic feed): Loop supervision active, A
and B amplifiers shut down
0
0
0
Standby (See Note)
High Battery (BATH) and
BGND
High Battery (BATH) and
BGND
Tip Open: AD at High-Impedance, Channel A
power amplifier shut down
0
0
0
1
1
0
Tip Open (See Note)
On-Hook Transmission,
Fixed Longitudinal Voltage
Fixed longitudinal voltage of –28 V
Low Battery selection at
VBL
AD and BD at High-Impedance, Channel A and
B power amplifiers shut down
0
1
1
1
0
0
1
0
1
Disconnect
RSVD
High Battery (BATH) and
BGND
Low Battery (BATL) and
BGND
High Battery (BATH) and
BGND
Active High Battery
Active feed, normal or reverse polarity
Active internal ringing
1
1
1
1
0
1
Active Low Battery
Active Internal Ringing
Note:
In these modes, the ring lead (B-lead) output has a –50 V internal clamp to battery ground (BGND).
Am/Le79R240 Data Sheet
13
Operating Mode Descriptions
Operating Mode
Description
This mode disconnects both A and B output amplifiers from the AD and BD outputs. The A and B amplifiers
are shut down and the Le79R240 device selects the low battery voltage at the VBL pin. In the Disconnect
state, the currents on IMT and ILG represent the voltages on the SA and SB pins, respectively. These
Disconnect
V
V
SA
currents are scaled to produce voltages across RMTi and RLGi of ----------- and ----------- , respectively.
SB
400 400
The power amplifiers are turned off. The AD output is driven by an internal 250 Ω (typical) resistor, which
connects to ground. The BD output is driven by an internal 250 Ω (typical) resistor, which connects to the
high battery (BATH) at the VBH pin, through a clamp circuit, which clamps to approximately –50 V with
respect to BGND. For VBH values above –55 V, the open-circuit voltage, which appears at this output is
Standby
~VBH + 7 V. If V is below –55 V, the voltage at this output is – 50 V. The battery selection for the balance
BH
of the circuitry on the chip is VBL. Line supervision remains active. Current limiting is provided on each
line to limit power dissipation under short-loop conditions as specified in “Current-Limit Behavior” on
page 12. In external ringing, the standby ISLIC device state is selected.
In this mode, the AD (Tip) lead is opened and the BD (Ring) lead is connected to a clamp, which operates
from the high battery on VBH pin and clamps to approximately –50 V with respect to BGND through a
resistor of approximately 250 Ω (typical). The battery selection for the balance of the circuitry on the chip
is VBL.
Tip Open
In the Active High Battery mode, battery connections are connected as shown in Table 1. Both output
amplifiers deliver the full power level determined by the programmed DC-feed conditions. Active High
Battery mode is enabled during a call in applications when a long loop can be encountered.
Both output amplifiers deliver the full power level determined by the programmed DC-feed conditions.
VBL, the low negative battery, is selected in the Active Low Battery mode. This is typically used during the
voice part of a call.
Active High Battery
Active Low Battery
In the Internal Ringing mode, the Le79R240 device selects the battery connections as shown in Table 1.
Active Internal Ringing When using internal ringing, both the AD and BD output amplifiers deliver the ringing signal determined
by the programmed ringing level.
On-Hook
In the On-Hook Transmission, Fixed Longitudinal Voltage mode, battery connections are connected as
Transmission (OHT),
shown in Table 1. The longitudinal voltage is fixed at the voltage (also in the table above) to allow
Fixed Longitudinal
compliance with safety specifications for some classes of products.
Voltage
Thermal-Management Equations
Applies to all modes except Standby, which has no thermal management.
I < 5 mA
L
P
= (S
– I (R + 2R
)) • I + 0.3 W
FUSE L
SLIC
BAT
L
L
PT
= 0
RTMG
14
Am/Le79R240 Data Sheet
TIMING SPECIFICATIONS
Symbol
Signal
Parameter
Min
Typ
Max
2
Unit
tr
tf
LD
Rise time Le79R240 device LD pin
Fall time Le79R240 device LD pin
LD minimum pulse width
SLD
LD
2
SLD
t
t
t
LD
3
µs
SLDPW
SDXSU
SDXHD
P1,P2,P3
P1,P2,P3
P1–P3 data Setup time
4.5
4.5
P1–P3 data hold time
Note:
1. The P1–P3 pins are updated continuously during operation by the LD signal.
2. When writing to the ISLIC device registers, the sequence is:
a) Set LD pin to mid-state
b) Place appropriate data on the P1–P3 pins
c) Assert the LD pin to High to write the proper data
d) Return LD pin to mid-state
3. Le79R240 device registers are refreshed at 5.33 kHz when used with an ISLAC device.
4. If the clock or MPI becomes disabled, the LD pins and P1–P3 returns to 0 V state, thus protecting the Le79R240 device and the line
connection.
5. Not tested in production. Guaranteed by characterization.
Am/Le79R240 Data Sheet
15
WAVEFORMS
187.5 µs
LD
*
P1,P2,P3
S
S
S
Write State Register
Lock Registers
VCC
VREF
LD
0V
New State
Data
Previous
State Data
State Data
P1,P2,P3
DETAIL A
VREF
Write State Register
trSLD
tfSLD
LD
tSLDPW
tSDXHD
tSDXSU
P1,P2,P3
*Note:
When the LD pin is less than 0.3 V below V
, P1-P3 must be low.
REF
16
Am/Le79R240 Data Sheet
APPLICATION CIRCUIT
Internal Ringing
+5 V
VCC
3.3 V
CREF
RSAi
RRXi
RHLai
SA
VOUTi
RSN
DGND
AGND
RFAi
A
AD
VHLi
RHLci
RTi
RHLdi
CHLdi
U3
VREF
CADi
VCCA
VCCD
VCC
+3.3VDC
VSAB
VTX
VSABi
CHPi
HPA
HPB
VINi
U4
RFBi
B
BD
SB
RSBi
VIMTi
IMT
ILG
CBDi
RMTi
U1
Le79R240
U2
ISLAC
VREF
RSVD
RSVD
RSVD
VILGi
BACK
PLANE
RLGi
VREF
DHi
VREF
VREF
BATH
BATL
VBH
DLi
VBL
LD
LDi
P1
CBATHi
CBATLi
GND
P1
P2
P3
SLB
BATL
BATH
RSLB
P2
P3
SHB
RSVD
RSHB
RSVD
RSVD
RSVD
RSVD
IREF
RREF
BGND
RSVD
** Connections shown for one channel
Am/Le79R240 Data Sheet
17
LINE CARD PARTS LIST
The following list defines the parts and part values required to meet target specification limits for channel i of the line card (i = 1, 2).
Item
Type
Le79R240
Le79Q224x
P0741SA
Diode
Value
Tol.
Rating
Comments
U1
U2
ISLIC device
ISLAC device
U3, U4
DHi, DLi
RFAi, RFBi
RSAi, RSBi
RTi
TECCOR protector
50 ns
Fusible PTC protection resistors
Sense resistors
100 mA
50 Ω
100 V
2 W
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Capacitor
Resistor
Resistor
Capacitor
Capacitor
Capacitor
Capacitor
5%
2%
1%
1%
1%
1%
1%
1%
1%
10%
1%
1%
10%
20%
20%
20%
200 kΩ
80.6 kΩ
100 kΩ
69.8 kΩ
750 kΩ
40.2 kΩ
2.87 kΩ
2.87 kΩ
0.82 µF
3.01 kΩ
6.04 kΩ
22 nF
1/4 W
1/10 W
1/10 W
1/10 W
1/8 W
1/10 W
1/10 W
1/10 W
10 V
1/8 W
1/8 W
100 V
100 V
100 V
50 V
RRXi
RREF
Current reference
Ceramic
RSHB, RSLB, RSPB
RHLai
RHLci
RHLdi
CHLdi
RMTi
RLGi
CADi, CBDi
CBATHi, CBATLi
CHPi
Ceramic, not voltage sensitive
100 nF
22 nF
100 nF
Ceramic
Ceramic
Ceramic
CVC
Note:
1. Value can be adjusted to suit application.
2. Can be looser for relaxed ring-trip requirements.
18
Am/Le79R240 Data Sheet
PHYSICAL DIMENSIONS
32-Pin PLCC
Am/Le79R240 Data Sheet
19
32-Pin QFN
20
Am/Le79R240 Data Sheet
REVISION HISTORY
Revision B to C
•
•
•
•
•
•
Applied new format.
Added 5 REN statement and sub-bullets to “Distinctive Characteristics”
Corrections to “Internal Ringing Application Circuit”
Changed limits for On-Hook Standby, Power Dissipation Normal Polarity in “Power Dissipation” table.
New value for VBL in “Electrical Ranges” table.
Added VRING condition to row 1 in “DC Specifications” table. Also provided min values for row 3, and created rows 15 and
16.
•
•
•
•
Added max value for row 4 in “Transmission Specifications” table. Also changed min and max for row 6.
Supplied ringing voltage in “Ringing Specifications” table.
Supplied max values in “Current-Limit Behavior” table.
Imported correct graphics for “Physical Dimensions.”
Revision C to D
•
“Distinctive Characteristics changed to “Features.” 5 REN bullet changed from 9.2 to 9.55 kft and from 14.6 to 15.2 kft.
Diameter information deleted from 5 REN bullet.
•
•
•
“Environmental Ranges,” and “Chip Set Features” new temperature statement.
Updated “Internal Ringing” Application Circuit for component “CBATLi” circuitry.
“Waveforms,” new image.
Revision D to E
•
•
•
Added QFN package data to “Connection Diagram,” “Absolute Maximum Ratings,” and “Physical Dimensions.”
Updated "Am" OPNs (Ordering Part Numbers) to "Le" throughout document
In "Ordering Information" the following changes were made:
–
–
–
Added entries for Le79R240JC and Le79R240QC
Removed the chip graphic
Added notes
•
•
•
•
•
In "Features," added "Foreign Voltage Sensing" feature
Standardized notes in "Absolute Maximum Ratings" section
Made minor edits to paragraph in "Electrical Operating Ranges" section
Updated 32-pin PLCC physical dimensions graphic
Removed obsolete “Sales Office Listing.”
Am/Le79R240 Data Sheet
21
The contents of this document are provided in connection with Legerity, Inc. products. Legerity makes no representations or warranties with respect to the accuracy
or completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. No
license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this publication. Except as set forth in Legerity's
Standard Terms and Conditions of Sale, Legerity assumes no liability whatsoever, and disclaims any express or implied warranty, relating to its products including,
but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right.
Legerity's products are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other
applications intended to support or sustain life, or in any other application in which the failure of Legerity's product could create a situation where personal injury,
death, or severe property or environmental damage may occur. Legerity reserves the right to discontinue or make changes to its products at any time without notice.
© 2002 Legerity, Inc.
All rights reserved.
Trademarks
Legerity, the Legerity logo and combinations thereof, and ISLIC, ISLAC, Intelligent Access, and WinSLAC are trademarks of Legerity, Inc.
Other product names used in this publication are for identification purposes only and may be trademarks of their respective companies.
Legerity
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