LE79R241DJC [ZARLINK]
SLIC, Bipolar, PQCC32, GREEN, PLASTIC, MS-016, LCC-32;
| 型号： | LE79R241DJC |
| 厂家： | 
ZARLINK SEMICONDUCTOR INC |
| 描述： | SLIC, Bipolar, PQCC32, GREEN, PLASTIC, MS-016, LCC-32 电池 电信 电信集成电路 |
| 文件： | 总31页 (文件大小：251K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Le79R241
Intelligent Subscriber Line Interface Circuit
Ve790 Series
Data Sheet
Document ID#: 080249
Version 3
May 2011
Features
•
Monitor of two-wire interface voltages and
currents supports
Ordering Information
Device
Package1,2
Packing3
•
•
Voice transmission
Le79R241JC
Le79R241DJC
Le79R241QC
32 Pin PLCC
32 Pin PLCC (Green) Tubes
32 Pin QFN Trays
Tubes
Programmable DC feed characteristics
-
-
Independent of battery
Current limited
1. Due to size constraints, QFN devices are marked by omitting the
“Le” prefix. For example, Le79R241QC is marked 79R241QC.
2. The green package meets RoHS Directive 2002/95/EC of the Eu-
ropean Council to minimize the environmental impact of electrical
equipment.
•
•
Selectable off-hook and ground-key
thresholds
3. For delivery using a tape and reel packing system, add a "T" suffix
to the OPN (Ordering Part Number) when placing an order.
Subscriber line diagnostics
-
-
-
-
-
Leakage resistance
Loop resistance
Applications
Line capacitance
Bell capacitance
•
Enables a cost effective voice solution for long or
short loop applications providing POTS and
integrated test capabilities
Foreign voltage sensing
•
•
•
•
CO
•
Power cross and fault detection
DLC
•
•
•
Supports internal short loop or external ringing
+5 V and battery supplies
PBX/KTS
Pair Gain
Dual battery operation for system power saving
•
•
Automatic battery switching
Description
Intelligent thermal management
The Le79R241 Intelligent Subscriber Line Interface
Circuit (ISLIC™) device, in combination with a VE790
series ISLAC™ device, implements the telephone line
interface function. This enables the design of a low
cost, high performance, fully software programmable
line interface for multiple country applications
worldwide. All AC, DC, and signaling parameters are
fully programmable via microprocessor or GCI
interfaces on the VE790 series ISLAC device.
Additionally, the Le79R241 ISLIC device has
integrated self-test and line-test capabilities to resolve
faults to the line or line circuit. The integrated test
capability is crucial for remote applications where
dedicated test hardware is not cost effective.
•
•
Compatible with inexpensive protection networks
•
Accommodates low tolerance fuse resistors or
PTC thermistors
Metering capable
•
•
12 kHz and 16 kHz
Smooth polarity reversal
•
•
•
Tip-open state supports ground start signaling
Integrated test load switches/relay drivers
5 REN with DC offset trapezoid.
•
•
•
•
•
For US standard:
drives ring up to 4.4 kft of 26 gauge wire.
drives ring up to 7 kft of 24 gauge wire.
For European (British) standard:
drives ring up to 1.7 km of 0.5 mm copper cable.
•
Space Saving Package Options (8 x 8 QFN)
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2007-2011, Zarlink Semiconductor Inc. All Rights Reserved.
Le79R241
Data Sheet
Related Literature
•
•
•
•
•
•
•
•
080248 Le79231 ISLIC™ Device Data Sheet
080253 Le79R251 ISLIC™ Device Data Sheet
080250 Le79Q224x Quad ISLAC™ Device Data Sheet
081065 Le79228 Quad ISLAC™ Device Data Sheet
080262 VE790 Series Evaluation Board User’s Guide
080804 Le79R2xx/Le79Q224x Chip Set User’s Guide
080923 Le79R2xx/Le79228 Chip Set User’s Guide
081103 Le79610 PacketSLAC™ Device Data Sheet
Revision History
Below are the changes from the September 2007 version to the May 2011 version.
Page
Item
Description
1
Ordering Information
Obsoleted Le79R241FQC package.
2
Zarlink Semiconductor Inc.
Le79R241
Data Sheet
Table of Contents
1.0 Product Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.0 Features of the VE790 Series Chipset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.0 Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.0 Pin Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5.0 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.1 Absolute Maximum Ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.2 Thermal Resistance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.2.1 Package Assembly. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.3 Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.3.1 Environmental Ranges. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.3.2 Electrical Ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
6.0 Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
6.1 Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
6.2 DC Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
6.3 Relay Driver Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6.4 Transmission Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
6.5 Ringing Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
6.6 Current-Limit Behavior. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
6.7 Thermal Shutdown Fault Indications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
7.0 Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
7.1 Operating Mode Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
7.2 Driver Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
7.3 Thermal-Management Equations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
8.0 Timing Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
9.0 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
10.0 Application Circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
10.1 Internal Ringing Line Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
11.0 Line Card Parts List - Internal Ringing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
11.1 External Ringing Line Schematic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
12.0 Line card Parts List - External Ringing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
13.0 Physical Dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
13.1 32-Pin PLCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
13.2 32-Pin QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
3
Zarlink Semiconductor Inc.
Le79R241
Data Sheet
List of Figures
Figure 1 - Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 2 - Le79R241 ISLIC Device Internal Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 3 - Chip Set Block Diagram - Four Channel Line Card Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 4 - Le79241DJC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 5 - Le79R241QC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 6 - Relay Drivers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4
Zarlink Semiconductor Inc.
Le79R241
Data Sheet
1.0 Product Description
Zarlink’s VE790 series voice chip sets integrate all functions of the subscriber line. Two chip types are used to
implement the line card — the Le79R241 ISLIC device and a VE790 series ISLAC device. These provide the
following basic functions:
1. The Le79R241 ISLIC device: A high voltage, bipolar device that drives the subscriber line, maintains longitudinal
balance and senses line conditions.
2. The VE790 series ISLAC devices: Low voltage CMOS ICs that provide conversion, control and DSP functions
for the Le79R241 ISLIC device.
A complete schematic of the line card using a VoiceEdge chip set for internal and external ringing is shown in
“Application Circuit” on page 25.
The Le79R241 ISLIC device uses reliable, bipolar technology to provide the power necessary to drive a wide
variety of subscriber lines. It can be programmed by the VE790 series ISLAC device to operate in eight different
modes that control power consumption and signaling. This enables it to have full control over the subscriber loop.
The Le79R241 ISLIC device is designed to be used exclusively with the VE790 series ISLAC devices. The
Le79R241 ISLIC device requires only +5 V power and the battery supplies for its operation.
The Le79R241 ISLIC device implements a linear loop-current feeding method with the enhancement of intelligent
thermal management. This limits the amount of power dissipated on the Le79R241 ISLIC device by dissipating
power in external resistors in a controlled manner.
Each codec contains high-performance circuits that provide A/D and D/A conversion for the voice (codec), DC-feed
and supervision signals. The VE790 series ISLAC devices contain a DSP core that handles signaling, DC-feed,
supervision and line diagnostics for all channels.
The DSP core selectively interfaces with three types of backplanes:
•
•
•
Standard PCM/MPI
Standard GCI
Modified GCI with a single analog line per GCI channel
The 790 series voice chip set provides a complete software configurable solution to the BORSCHT functions as
well as complete programmable control over subscriber line DC-feed characteristics, such as current limit and feed
resistance. In addition, these chip sets provide system level solutions for the loop supervisory functions and
metering. In total, they provide a programmable solution that can satisfy worldwide line card requirements by
software configuration.
Software programmed filter coefficients, DC-feed data and supervision data are easily calculated with WinSLAC™
software. This PC software is provided free of charge. It allows the designer to enter a description of system
requirements. WinSLAC then computes the necessary coefficients and plots the predicted system results.
The Le79R241 ISLIC device interface unit inside the VE790 series ISLAC device processes information regarding
the line voltages, loop currents and battery voltage levels. These inputs allow the VE790 series ISLAC device to
place several key Le79R241 ISLIC device performance parameters under software control.
The main functions that can be observed and/or controlled through the VE790 series ISLAC device backplane
interface are:
•
•
•
•
•
DC-feed characteristics
Ground-key detection
Off-hook detection
Metering signal
Longitudinal operating point
5
Zarlink Semiconductor Inc.
Le79R241
Data Sheet
•
•
•
•
•
•
Subscriber line voltage and currents
Ring-trip detection
Abrupt and smooth battery reversal
Subscriber line matching
Ringing generation
Sophisticated line and circuit tests
To accomplish these functions, the Le79R241 ISLIC device collects the following information and feeds it, in analog
form, to the VE790 series ISLAC device:
•
•
The metallic (IMT) and longitudinal (ILG) loop currents
The AC (VTX) and DC (VSAB) loop voltage
The outputs supplied by the VE790 series ISLAC devices to the Le79R241 ISLIC device are then:
•
A voltage (VHLi*) that provides control for the following high-level Le79R241 ISLIC device outputs:
•
•
•
DC loop current
Internal ringing signal
12 or 16 kHz metering signal
•
•
A low-level voltage proportional to the voice signal (VOUTi)
A voltage that controls longitudinal offset for test purposes (VLBi)
The VE790 series ISLAC devices perform the codec and filter functions associated with the four-wire section of the
subscriber line circuitry in a digital switch. These functions involve converting an analog voice signal into digital
PCM samples and converting digital PCM samples back into an analog signal. During conversion, digital filters are
used to band-limit the voice signals.
The user-programmable filters set the receive and transmit gain, perform the transhybrid balancing function, permit
adjustment of the two-wire termination impedance and provide frequency attenuation adjustment (equalization) of
the receive and transmit paths. Adaptive transhybrid balancing is also included. All programmable digital filter
coefficients can be calculated using WinSLAC software. The PCM codes can be either 16-bit linear
two’s-complement or 8-bit companded A-law or µ-law.
Besides the codec functions, the 790 series voice chip set provides all the sensing, feedback, and clocking
necessary to completely control Le79R241 ISLIC device functions with programmable parameters. System-level
parameters under programmable control include active loop current limits, feed resistance, and feed mode
voltages.
The VE790 series ISLAC devices supply complete mode control to the Le79R241 ISLIC device using the control
bus (P1-P3) and tri-level load signal (LDi).
The 790 series voice chip set provides extensive loop supervision capability including off-hook, ring-trip and
ground-key detection. Detection thresholds for these functions are programmable. A programmable debounce
timer is available that eliminates false detection due to contact bounce.
For subscriber line diagnostics, AC and DC line conditions can be monitored using built-in test tools. Measured
parameters can be compared to programmed threshold levels to set a pass/fail bit. The user can choose to send
the actual measurement data directly to a higher level processor by way of the PCM voice channel. Both
longitudinal and metallic resistance and capacitance can be measured, which allows leakage resistance, line
capacitance, and telephones to be identified.
*Note:
i = channel number
6
Zarlink Semiconductor Inc.
Le79R241
Data Sheet
Signal
Transmission
RSN
VTX
AD
SA
Longitudinal
Control
Gain/Level
Shift
VLB
HPA
HPB
SB
Two-Wire
Interface
Attenuator
VSAB
VREF
BD
Signal
Conditioning
IMT
ILG
TMN
TMP
TMS
Thermal
Management
Control
CREF
Fault
Meas.
VBL
Switch Driver
VBH
Relay
Control
R2
R3
RYE
Relay
Drivers
P1
P2
P3
LD
Input Decoder and
Control Registers
Relay
R1
Driver 1
Figure 1 - Block Diagram
7
Zarlink Semiconductor Inc.
Le79R241
Data Sheet
A Amplifier
AD
SA
IA sense
RSN
IA
IA
600
+
-
Fault
Meas.
+
-
HPA
VTX
+
TMS
HPB
VREF
BGND
+
-
-
+
Fault
Meas.
+
β
=
0.01
VSAB
-
SB
BD
VREF
B Amplifier
IB
VREF
IB sense
IB
600
VREF
TMN
Thermal
Management
Control
Gain/Level Shift
VLB
TMP
VBH
To Power
Amplifiers
Thermal
Shutdown
High Neg.
Bat. sel.
IA
IB
+
IMT
ILG
VBL
R3
600 600
IA
IB
-
600 600
RYE
R2
Decoder
C2 C3
CREF
RD1 RD2 RD3
C1
Control Register
R1
Demux
Power amplifiers positive supply
BGND
P1
P2
P3
LD
VCC
GND
Figure 2 - Le79R241 ISLIC Device Internal Block Diagram
8
Zarlink Semiconductor Inc.
Le79R241
Data Sheet
2.0 Features of the VE790 Series Chipset
•
•
•
Performs all battery feed, ringing, signaling, hybrid
and test (BORSCHT) functions
•
•
•
Supports both loop-start and ground-start
signaling
Two chip solution supports high density,
multi-channel architecture
Exceeds LSSGR and CCITT central office
requirements
Single hardware design meets multiple country
requirements through software programming of:
Selectable PCM or GCI interface
•
Supports most available master clock
frequencies from 512 kHz to 8.192 MHz
•
•
•
Ringing waveform and frequency
DC loop-feed characteristics and current-limit
Loop-supervision detection thresholds
•
•
•
On-hook transmission
Power/service denial mode
Line-feed characteristics independent of battery
voltage
-
-
Off-hook debounce circuit
Ground-key and ring-trip filters
•
•
•
Only 5 V, 3.3 V and battery supplies needed
Low idle-power per line
•
•
•
•
•
•
•
Off-hook detect de-bounce interval
Two-wire AC impedance
Transhybrid balance
Linear power-feed with intelligent
power-management feature
•
•
Compatible with inexpensive protection networks;
Accommodates low-tolerance fuse resistors while
maintaining longitudinal balance
Transmit and receive gains
Equalization
Digital I/O pins
Monitors two-wire interface voltages and currents
for subscriber line diagnostics
A-law/µ-law and linear selection
•
•
•
Built-in voice-path test modes
•
Supports internal and external battery-backed
ringing
Power-cross, fault, and foreign voltage detection
Integrated line-test features
•
•
Self-contained ringing generation and control
•
•
•
Leakage
Supports external ringing generator and ring
relay
Line and ringer capacitance
Loop resistance
•
•
Ring relay operation synchronized to zero
crossings of ringing voltage and current
•
Integrated self-test features
Echo gain, distortion, and noise
Integrated ring-trip filter and software enabled
manual or automatic ring-trip mode
•
•
•
Guaranteed performance over commercial and
industrial temperature ranges.
•
Supports metering generation with envelope
shaping
Up to three relay drivers per Le79R241 ISLIC
device
•
•
Smooth or abrupt polarity reversal
Adaptive transhybrid balance
•
Configurable as test load switches
•
Continuous or adapt and freeze
9
Zarlink Semiconductor Inc.
Le79R241
Data Sheet
7
7
4
4
VCCA
A1
B1
Le79R241
Le79R241
Le79R241
Le79R241
LD1
VCCD
DGND1
DGND2
IO(1-4)
TSCA/G
TSCB
VREF
A2
B2
LD2
RC
Networks
and
AGND1
AGND2
7
A3
B3
DRA/DD
DRB
Protection
LD3
Le79Q224x
Quad Codec/
Filter
P1-P3
DXB
3
7
DXA/DU
DCLK/S0
PCLK/FS
MCLK
A4
B4
LD4
RREF
FS/DCL
CS/RST
DIO/S1
INT
RSHB
RSLB
BATH
BATL
Figure 3 - Chip Set Block Diagram - Four Channel Line Card Example
10
Zarlink Semiconductor Inc.
Le79R241
Data Sheet
3.0 Connection Diagrams
4
3
2
1
32 31 30
5
6
29
28
27
26
25
24
23
22
21
R1
R2
SB
SA
7
RYE
R3
IMT
8
ILG
9
TMS
TMP
TMN
P1
CREF
RSVD
HPB
HPA
VTX
32-Pin PLCC
10
11
12
13
P2
14 15 16 17 18 19 20
Figure 4 - Le79241DJC
32 31 30 29 28 27 26 25
1
24
R1
SA
2
23
R2
IMT
3
4
22
21
RYE
R3
ILG
CREF
32-Pin QFN
5
6
20
19
TMS
TMP
RSVD
HPB
18
17
TMN
P1
HPA
VTX
7
8
Exposed Pad
9
10 11 12 13 14 15 16
Figure 5 - Le79R241QC
Notes:
1. Pin 1 is marked for orientation.
2. RSVD = Reserved. Do not connect to this pin.
3. The thermally enhanced QFN package features an exposed pad on the underside which must be electrically tied to VBH.
11
Zarlink Semiconductor Inc.
Le79R241
Data Sheet
4.0 Pin Descriptions
Pin Name
AD, BD
BGND
Type
Description
Output
Provide the currents to the A and B leads of the subscriber loop.
Ground return for high and low battery supplies.
Ground
VCCD reference. It is the digital high logic supply rail, used by the Le79R241 ISLIC device to codec
interface.
CREF
+3.3 VDC
Ground
Output
GND
Analog and digital ground return for VCC.
These pins connect to CHP, the external high-pass filter capacitor that separates the DC loop-voltage
from the voice transmission path.
HPA, HPB
ILG is proportional to the common-mode line current (IAD–IBD), except in disconnect mode, where
ILG is proportional to the current into grounded SB.
ILG
IMT
Output
Output
IMT is proportional to the differential line current (IAD + IBD), except in disconnect mode, where IMT
is proportional to the current into grounded SA. The Le79R241 ISLIC device indicates thermal
overload by pulling IMT to CREF.
The LD pin controls the input latch and responds to a 3-level input. When the LD pin is a logic 1 (CREF
1), the logic levels on P1–P3 latch into the Le79241 control register bits that operate the
mode-decoder. When the LD pin is a logic 0 ( 0.6), the logic levels on P1–P3 latch into the Am79241
control register bits that control the relay drivers (RD1–RD3). When the LD pin level is at ~VREF ± 0.3
LD
Input
V, the control register contents are locked.
P1–P3
R1
Input
Inputs to the latch for the operating-mode decoder and the relay-drivers.
Collector connection for relay 1 driver. Emitter internally connected to BGND.
Collector connection for relay 2 driver. Emitter internally connected to RYE
Collector connection for relay 3 driver. Emitter internally connected to RYE.
Output
Output
Output
R2
R3
The metallic current between AD and BD is equal to 500 times the current into this pin. Networks that
program receive gain and two-wire impedance connect to this node. This input is at a virtual potential
of VREF.
RSN
Input
RSVD
RYE
Reserved
Output
These pins are used during Zarlink testing. In the application, they must be left floating.
Emitter connection for R2 and R3. Normally connected to relay ground.
Sense the voltages on the line side of the fuse resistors at the A and B leads. External sense resistors,
RSA and RSB, protect these pins from lightning or power-cross.
SA, SB
Input
TMP,
TMN, TMS
External resistors connected from TMP to TMS and TMN to VBL to offload excess power from the
Le79R241 ISLIC device.
Output
Connection to high-battery supply used for ringing and long loops. Connects to the substrate. When
only a single battery is available, it connects to both VBH and VBL.
VBH
Battery (Power)
Connection to low-battery supply used for short loops. When only a single battery is available, this pin
can be connected to VBH.
VBL
Battery (Power)
VCC
+5 V Power Supply
Positive supply for low voltage analog and digital circuits in the Le79R241 ISLIC device.
Sets the DC longitudinal voltage of the Le79R241 ISLIC device. It is the reference for the longitudinal
control loop. When the VLB pin is greater than VREF, the Le79R241 ISLIC device sets the
longitudinal voltage to a voltage approximately half-way between the positive and negative power
supply battery rails. When the VLB pin is driven to levels between 0V and VREF, the longitudinal
voltage decreases linearly with the voltage on the VLB pin.
VLB
Input
12
Zarlink Semiconductor Inc.
Le79R241
Data Sheet
Pin Name
VREF
Type
Description
The VE790 series SLAC device provides this voltage which is used by the Le79R241 ISLIC device
for internal reference purposes. All analog input and output signals interfacing to the VE790 series
SLAC device are referenced to this pin.
Input
VSAB
Output
Output
Scaled-down version of the voltage between the sense points SA and SB on this pin.
The voltage between this pin and VREF is a scaled down version of the AC component of the voltage
sensed between the SA and SB pins. One end of the two-wire input impedance programming network
connects to VTX. The voltage at VTX swings positive and negative with respect to VREF.
VTX
Exposed
Pad
Battery
This must be electrically tied to VBH.
13
Zarlink Semiconductor Inc.
Le79R241
Data Sheet
5.0 Electrical Characteristics
5.1 Absolute Maximum Ratings
Stresses above those listed under Absolute Maximum Ratings can cause permanent device failure. Functionality at
or above these limits is not implied. Exposure to absolute maximum ratings for extended periods can affect device
reliability.
Storage temperature
Ambient temperature, under bias
Humidity
–55° to +150° C
–40° to +85° C
5% to 95%
–0.4 to +7 V
+0.4 to –104 V
–3 to +3 V
VCC with respect to GND
VBH, VBL with respect to GND (see note 2)
BGND with respect to GND
Voltage on relay outputs
AD or BD to BGND:
+7 V
Continuous
VBH – 1 to BGND + 1
VBH – 5 to BGND + 5
VBH – 10 to BGND + 10
VBH – 15 to BGND + 15
10 ms (F = 0.1 Hz)
1 µs (F = 0.1 Hz)
250 ns (F = 0.1 Hz)
Current into SA or SB:
10 µs rise to Ipeak
Ipeak = ±5 mA
1000 µs fall to 0.5 Ipeak;
2000 µs fall to I =0
Current into SA or SB:
2 µs rise to Ipeak
Ipeak = ±12.5 mA
10 µs fall to 0.5 Ipeak;
20 µs fall to I = 0
SA SB continuous
5 mA
Current through AD or BD
P1, P2, P3, LD to GND
± 150 mA
–0.4 to VCC + 0.4 V
Maximum power dissipation (see note 1)
TA = 70° C
In 32-pin PLCC package
In 32-pin QFN package
1.67 W
3.00 W
TA = 85° C
1.33 W
2.40 W
In 32-pin PLCC package
In 32-pin QFN package
ESD Immunity (Human Body Model)
JESD22 Class 1C compliant
Notes:
1. Thermal limiting circuitry on chip will shut down the circuit at a junction temperature of about 165° C. Operation above 145° C junction
temperature may degrade device reliability.
The thermal performance of a thermally enhanced package is assured through optimized printed circuit board layout. Specified performance
requires that the exposed thermal pad be soldered to an equally sized exposed copper surface, which, in turn, conducts heat through
multiple vias to a large internal copper plane.
2. Rise time of VBH (dv/dt) must be limited to less than 27 v/µs.
14
Zarlink Semiconductor Inc.
Le79R241
Data Sheet
5.2 Thermal Resistance
The junction to air thermal resistance of the Le79R241 ISLIC device in a 32-pin PLCC package is 45° C/W and in a
32-pin QFN package is 25° C/W (measured under free air convection conditions and without external heat sinking).
5.2.1 Package Assembly
The standard (non-green) package devices are assembled with industry-standard mold compounds, and the leads
possess a tin/lead (Sn/Pb) plating. These packages are compatible with conventional SnPb eutectic solder board
assembly processes. The peak soldering temperature should not exceed 225°C during printed circuit board
assembly.
Green package devices are assembled with enhanced, environmental compatible lead-free, halogen-free, and
antimony-free materials. The leads possess a matte-tin plating which is compatible with conventional board
assembly processes or newer lead-free board assembly processes. The peak soldering temperature should not
exceed 245°C during printed circuit board assembly.
Refer to IPC/JEDEC J-Std-020B Table 5-2 for the recommended solder reflow temperature profile.
5.3 Operating Ranges
Zarlink guarantees the performance of this device over commercial (0ºC to 70ºC) and industrial (-40ºC to 85ºC)
temperature ranges by conducting electrical characterization over each range and by conducting a production test
with single insertion coupled to periodic sampling. These characterization and test procedures comply with section
4.6.2 of Bellcore GR-357-CORE Component Reliability Assurance Requirements for Telecommunications
Equipment.
5.3.1 Environmental Ranges
0 to 70° C Commercial
Ambient Temperature
–40 to +85 ° C extended temperature
Ambient Relative Humidity
15 to 85%
5.3.2 Electrical Ranges
VCC
5 V ± 5%
VBL
–15 V to VBH
–42.5 to –99V
–100 to +100 mV
20 k minimum
VBH
BGND with respect to GND
Load resistance on VTX to VREF
Load resistance on VSAB to VREF
20 k minimum
15
Zarlink Semiconductor Inc.
Le79R241
Data Sheet
6.0 Specifications
6.1 Power Dissipation
Loop resistance = 0 to unless otherwise noted (not including fuse resistors), 2 x 50 fuse resistors, BATL =
–36 V, BATH = –90 V, VCC = +5 V. For power dissipation measurements, DC-feed conditions are as follows:
•
•
•
•
•
ILA (Active mode current limit) = 25 mA (IRSN = 50 µA)
RFD (Feed resistance) = 500
VAS (Anti-sat activate voltage) = 10 V
VAPP (Apparent Battery Voltage) = 48 V
RMGLi = RMGPi (Thermal management resistors) = 1 k
Description
Test Conditions
On-Hook Disconnect
Min.
Typ.
55
Max.
70
Unit
On-Hook Standby
80
100
On-Hook Transmission Le79R241 ISLIC device
Fixed Longitudinal Voltage
175
340
215
400
Power Dissipation
Normal Polarity
mW
On-Hook Active High Battery Le79R241 ISLIC
device
Off-Hook Active Low Battery Le79R241ISLIC
device
700
200
800
0.7
RL = 294
TMG
On-Hook Disconnect
VBH
VBL
VCC
0.4
0.1
3.0
3.5
1.1
On-Hook Standby
VBH
VBL
VCC
0.75
0
3.1
3.5
2.5
On-Hook Transmission
Fixed Longitudinal Voltage
VBH
VBL
VCC
1.85
0
5
Power Supply Currents
mA
6
4.5
On-Hook Active High Battery
VBH
VBL
VCC
3.6
0
7.3
8.0
2.0
Off-Hook Active Low Battery
RL = 294
VBH
VBL
VCC
0.9
26.9
7.5
10
16
Zarlink Semiconductor Inc.
Le79R241
Data Sheet
6.2 DC Specifications
Unless otherwise specified, test conditions are: VCC = 5 V, RMGPi = RMGLi = 1 k, BATH =
–90 V, BATL = –36 V, RRX = 150 k, RL = 600 , RSA = RSB = 200 k, RFA = RFB = 50 ,
CHP = 22 nF, CAD = CBD = 22 nF, IRSN = 50 A, Active low battery. DC-feed conditions are
normally set by the 790 series codec. When the Le79R241 ISLIC device is tested by itself, its
operating conditions must be simulated as if it were connected to an ideal 790 series codec.
30 k
Ω
30 k
390 pf
VREF
Ω
RT Network
No.
Item
Condition
Min.
Typ.
Max.
Unit
Note
Standby mode, open circuit,
|VBH| < 55 V
|VBH| > 55 V
GND VB
Any Active mode (does not
VBH–6
55.5
55.5
VBH – 8
48
13.88
VBH–7
51
15
Two-wire loop voltage
(including offset)
1
16.13
V
2.
include OHT),
RL = 600 , IRSN = 50 µA
OHT mode, RL = 2200
19.8
130
22
IRSN = 20 µA
Feed resistance per leg
at pins AD & BD
ohm
s
2
3
Standby mode
250
375
45
2.
Feed current
Standby mode, RL = 600
Feed current limit
IMT current
18
34
56
mA
44.6
Standby mode, RL = 2200
Standby mode
A to VBH
B to Ground
µA
ILG current
28
28
0.6
VREF+0.
3
Low boundary
Mid boundary
High boundary
Input high current
Input low current
Mid-level current
V
V
V
µA
µA
µA
VREF–0.
3
CREF – 1
VREF
Ternary input voltage
boundaries for LD pin.
Mid-level input source
must be Vref.
4
5
2.
2.
2.
108
47
51
Input high voltage
Input low voltage
Input high current
Input low current
2.0
V
V
µA
µA
0.8
20
20
Logic Inputs P1, P2, P3
-20
-20
0
0
6
7
8
VTX output offset
VREF input current
CREF input current
–50
0
50
0
+50
mV
µA
µA
VREF = 1.4 V
CREF = 3.3 V
2.
2.
-3
3
ß, DC Ratio of VSAB to
loop voltage:
9
Tj < 145°C, VSA – VSB = 22 V
Voltage Output on IMT
0.0088
2.8
0.0097
0.0106
CREF
V/V
VSAB
---------------------------
=
V
SA – VSB
Fault Indicator
Threshold
10
11
CREF – 0.3 V
30
V
2.
2.
Gain from VLB pin to A
or B pin, KLG
V/V
12
13
14
VLB pin input current
ILOOP/IMT
VLB = VREF ± 1 V
ILOOP = 10 mA
ILONG = 10 mA
0
100
333
655
µA
A/A
A/A
283
575
308
615
ILONG/ILG
17
Zarlink Semiconductor Inc.
Le79R241
Data Sheet
No.
Item
Condition
Active modes
Min.
Typ.
Max.
Unit
Note
2.
Input current, SA and
SB pins
15
1.0
3.0
µA
16
17
18
K1
Incremental DC current gain
Disconnect ISA = 2 mA
Disconnect ISB = 2 mA
462.5
4
500
6
537.5
8.75
16
2.
ISA/IMT
ISB/ILG
A/A
10
12
–40°C
+25°C
+85°C
7.0
3.6
1.4
19
VSAB output offset
mV
20
21
IMT output offset
ILG output offset
–3
–1
0
0
3
1
µA
µA
6.3 Relay Driver Specifications
Item
Condition
Min.
Typ.
Max.
0.5
Unit
Note
25 mA/relay sink
40 mA/ relay sink
0.4
0.8
On Voltage
V
2
1.0
R2,R3 = BGND
RYE = VBH
R2,R3 Off Leakage
0
100
µA
V
Zener Break Over
Zener On Voltage
Iz = 100 A
6.6
6
7.9
11
10
17
Iz = 30 mA
R3
R2
RYE
A. Relay Driver Configuration
R1
BGND
B. Ring Relay
Figure 6 - Relay Drivers
18
Zarlink Semiconductor Inc.
Le79R241
Data Sheet
6.4 Transmission Specifications
No.
1
Item
Condition
Min.
Typ.
Max.
Unit
Note
RSN input impedance
VTX output impedance
f = 300 to 3400 Hz
1
3
2
2
Active High Battery or Active Low
Battery
3
4
5
Max, AC + DC loop current
70
mA
2
Longitudinal impedance,
A or B to GND
Active mode
70
135
–10 dBm, 1 kHz, 0 to 70°C
–14.13
–14.18
–13.98
–13.98
–13.83
–13.78
2-4 wire gain
TA = –40°C to 85°C
2
2
300 to 3400 Hz, relative to 1 kHz
TA = –40°C to 85°C
2-4 wire gain variation with
frequency
–0.1
–0.15
+0.1
+0.15
6
7
+3 dBm to –55 dBm
Reference: –10 dBm
TA = –40 to 85°C
–0.1
+0.1
2-4 wire gain tracking
4-2 wire gain
2,5
–0.15
+0.15
dB
–10 dBm, 1 kHz
–0.15
–0.2
+0.15
+0.2
8
9
2
TA = –40°C to 85°C
4-2 wire gain variation with
frequency
300 to 3400 Hz, relative to 1 kHz
–0.1
+0.1
+3 dBm to –55 dBm
Reference: –10 dBm
–40°C to 85°C
–0.1
–0.15
+0.1
+0.15
10
4-2 wire gain tracking
2,5
Total harmonic distortion
level
2-wire
300 Hz to 3400 Hz
0 dBm
–50
–40
–48
–38
dB
dB
dB
dB
Vp
dB
11.2 dBm
–12 dBm
–0.8 dBm
RLOAD = 600
VAB - 50 V 0 dBm
11
4-wire
4-wire overload level at VTX
OHT
±1
–50
3
3
Idle channel noise
C-message
Active modes, RL = 600
+9
–5
–81
–95
+11
–79
dBrnC
2-wire
4-wire
2-wire
4-wire
12
13
Weighted
Psophometric
dBmp
—
Weighted
L - T 200 to 1000 Hz
TA = –40°C to 85°C
58
53
53
48
3
2
Longitudinal balance
(IEEE method)
Normal Polarity
1000 to 3400 Hz
TA = –40°C to 85°C
T - L 200 to 3400 Hz
40
L - T, IL = 0 50 to 3400 Hz
63
3
2
dB
L - T
200 to 1000 Hz
50
48
Reverse Polarity
PSRR (VBH, VBL)
PSRR (VCC)
TA = –40°C to 85°C
50 to 3400 Hz
3.4 to 50 kHz
45
40
3,4,1,
2,4
14
15
16
25
25
20
50 to 3400 Hz
3.4 to 50 kHz
45
35
3,4,1,
2,4
Longitudinal AC current per
wire
F = 15 to 60 Hz Active mode
30
mArms
2
19
Zarlink Semiconductor Inc.
Le79R241
Data Sheet
No.
Item
Condition
Min.
Typ.
Max.
Unit
Note
Freq = 12 kHz 2.8 Vrms
17
Metering distortion
Freq = 16 kHz
40
dB
2
metering load = 200
6.5 Ringing Specifications
Item
Condition
Min.
Typ.
VBH+6
Max.
Unit
Note
Peak Ringing Voltage
Active Internal Ringing
V
7
6.6 Current-Limit Behavior
SLIC Mode
Condition
Min.
Typ.
Max.
Unit
Note
Applied fault between ground and T/R
VBH applied to Tip or Ring
1
100
µA
A
Disconnect
Tip Open
6
VBH/200 k
Ring Short to GND
20
35
46
Short Tip-to-VBH
38
35
47
44
24
26
Standby
mA
Short Ring-to-GND
Active Ringing
790 series codec generating internal ringing
100
2
6.7 Thermal Shutdown Fault Indications
Fault
Indication
IMT operates normally (VREF ±1 V)
No Fault
Thermal Shutdown
KG, IMT above 2.8 V; ILG operates normally
Note:
1. These tests are performed with the following load impedances:
Frequency < 12 kHz – Longitudinal impedance = 500 ; metallic impedance = 300
Frequency > 12 kHz – Longitudinal impedance = 90 ; metallic impedance = 135
2. Not tested or partially tested in production. This parameter is guaranteed by characterization or correlation to other tests.
3. This parameter is tested at 1 kHz in production. Performance at other frequencies is guaranteed by characterization.
4. When the Le79R241 ISLIC device and 790 series codec is in the anti-sat operating region, this parameter is degraded. The exact
degradation depends on system design.
5. –55 dBm gain tracking level not tested in production. This parameter is guaranteed by characterization and correlation to other tests.
6. This spec is valid from 0 V to VBL or –50 V, whichever is lower in magnitude.
7. Other ringing-voltage characteristics are set by the 790 series codec.
20
Zarlink Semiconductor Inc.
Le79R241
Data Sheet
7.0 Operating Modes
The Le79R241 ISLIC device receives multiplexed control data on the P1, P2 and P3 pins. The LD pin then controls
the loading of P1, P2, and P3 values into the proper bits in the Le79R241 ISLIC device control register. When the
LD pin is less than 0.3 V below VREF (< (VREF – 0.3 V)), P1–P3 must contain data for relay control bits RD1, RD2
and RD3. These are latched into the first three bits in the Le79R241 ISLIC device control register. When the LD pin
is more than 0.3 V above VREF, P1–P3 must contain Le79R241 ISLIC device control data C1, C2, and C3, which
are latched into the last three bits of the Le79R241 ISLIC device control register. Connecting the LD pin to VREF
locks the contents of the Le79R241 ISLIC device control register.
The operating mode of the Le79R241 ISLIC device is determined by the C1, C2, and C3 bits in the control register
of the Le79R241 ISLIC device. Table 1 defines the Le79R241 ISLIC device operating modes set by these signals.
Under normal operating conditions, the Le79R241 ISLIC device does not have active relays. The Le79R241 ISLIC
device to VE790 series ISLAC device interface is designed to allow continuous real-time control of the relay drivers
to avoid incorrect data loads to the relay bit latches of the Le79R241 devices.
To perform external ringing, the VE790 series ISLAC device is set to external ringing mode (RMODE = 1), enables
the ring relay, and puts the Le79R241 ISLIC device in the Standby mode.
Connection to
Battery Voltage
Selection
RMGPi & RMGLi
Resistors
C3
C2
C1
Operating Mode
Operating Mode
High Battery
(BATH) and BGND
(High ohmic feed): Loop supervision
active, A and B amplifiers shut down
0
0
0
Standby (See note 1)
Open
Open
High Battery
(BATH) and BGND
Tip Open: AD at High-Impedance,
Channel A power amplifier shut down
0
0
0
1
1
0
Tip Open (See note 1)
On-Hook
Transmission, Fixed
Longitudinal Voltage
High Battery
(BATH) and BGND
Fixed longitudinal voltage of –28 V
Low Battery
selection at VBL
AD and BD at High-Impedance, Channel A
and B power amplifiers shut down
0
1
1
1
0
0
1
0
1
Disconnect
RSVD
A and B Amplifier
Output
High Battery
(BATH) and BGND
Active High Battery
Active feed, normal or reverse polarity
Low Battery (BATL)
and BGND
1
1
1
1
0
1
Active Low Battery
High Battery
(BATH) and BGND
Active Internal Ringing
Active Internal Ringing
Table 1 - Operating Modes
Note:
1. In these modes, the ring lead (B-lead) output has a –50 V internal clamp to battery ground (BGND).
21
Zarlink Semiconductor Inc.
Le79R241
Data Sheet
7.1 Operating Mode Descriptions
Operating Mode
Description
This mode disconnects both A and B output amplifiers from the AD and BD outputs. The A and B
amplifiers are shut down and the Le79R241 ISLIC device selects the low battery voltage at the VBL pin.
In the Disconnect state, the currents on IMT and ILG represent the voltages on the SA and SB pins,
respectively. These currents are scaled to produce voltages across RMTi and RLGi of
Disconnect
V
V
SA
SB
------------ and ------------ , respectively.
400 400
The power amplifiers are turned off. The AD output is driven by an internal 250 (typical) resistor,
which connects to ground. The BD output is driven by an internal 250 (typical) resistor, which
connects to the high battery (BATH) at the VBH pin, through a clamp circuit, which clamps to
approximately –50 V with respect to BGND. For VBH values above –55 V, the open-circuit voltage,
which appears at this output is ~VBH + 7 V. If VBH is below –55 V, the voltage at this output is –50 V.
The battery selection for the balance of the circuitry on the chip is VBL. Line supervision remains active.
Current limiting is provided on each line to limit power dissipation under short-loop conditions as
specified in “Current-Limit Behavior” on page 20. In external ringing, the Standby Le79R241 ISLIC
device state is selected.
Standby
In this mode, the AD (Tip) lead is opened and the BD (Ring) lead is connected to a clamp, which
operates from the high battery on VBH pin and clamps to approximately –50 V with respect to BGND
through a resistor of approximately 250 (typical). The battery selection for the balance of the circuitry
on the chip is VBL.
Tip Open
In the Active High Battery mode, battery connections are connected as shown in Table 1. Both output
amplifiers deliver the full power level determined by the programmed DC-feed conditions. Active High
Battery mode is enabled during a call in applications when a long loop can be encountered.
Active High Battery
Active Low Battery
Active Internal Ringing
Both output amplifiers deliver the full power level determined by the programmed DC-feed conditions.
VBL, the low negative battery, is selected in the Active Low Battery mode. This is typically used during
the voice part of a call.
In the Internal Ringing mode, the Le79R241 ISLIC device selects the battery connections as shown in
Table 1. When using internal ringing, both the AD and BD output amplifiers deliver the ringing signal
determined by the programmed ringing level.
On-Hook Transmission
(OHT), Fixed Longitudinal
Voltage
In the On-Hook Transmission, Fixed Longitudinal Voltage mode, battery connections are as shown in
Table 1. The longitudinal voltage is fixed at the voltage shown in Table 1 to allow compliance with safety
specifications for some classes of products.
7.2 Driver Descriptions
Driver
Description
A logic 1 on RD1 turns the R1 driver on and operates a relay connected between the R1 pin and VCCD. R1
drives the ring relay when external ringing is selected.
R1
A logic 1 on the RD2 signal turns the R2 driver on and routes current from the R2 pin to the RYE pin. In the
option where the RYE pin is connected to ground, the R2 pin can sink current from a relay connected to
VCCD.
R2
Another option is to connect the RYE pin to the BD (Ring) lead and connect a test load between R2 and the
AD (Tip) lead. This technique avoids the use of a relay to connect a test load. However, it does not isolate
the subscriber line from the line card. The test load must be connected to the Le79R241 ISLIC device side
of the protection resistor to avoid damage to the R2 driver.
A logic 1 on the RD3 signal turns the R3 driver on and routes current from the R3 pin to the RYE pin. In the
option where the RYE pin is connected to ground, the R3 pin can sink current from a relay connected to
VCCD.
R3
Another option is to connect the RYE pin to the B (Ring) lead and connect a test load between R3 and the A
(Tip) lead. This technique avoids the use of a relay to connect a test load. However, it does not isolate the
subscriber line from the line card. The test load must be connected to the Le79R241 ISLIC device side of the
protection resistor to avoid damage to the R3 driver.
Control bits RD1, RD2, and RD3 do not affect the operating mode of the Le79R241 ISLIC device. These signals
usually perform the following functions.
22
Zarlink Semiconductor Inc.
Le79R241
Data Sheet
7.3 Thermal-Management Equations
Applies to all modes except Standby and Ringing, which has no thermal management..
Equation
Description
IL < 5 mA
TMG resistor-current is limited to be 5 mA < IL. If IL < 5
PSLIC = (SBAT – IL(RL + 2RFUSE)) • IL + 0.3 W
PTRTMG = 0
mA, no current flows in the TMG resistor and it all flows in
the Am79241.
IL > 5 mA
These equations are valid when
RMGPi = RMGLi = RTMG
RTMG • (IL – 5 mA) < (SBAT – (RF + RL)IL) / 2 – 2
PTRTMG: total power dissipation of RMGPi and RMGLi
because the longitudinal voltage is one-half the battery
voltage and the TMG switches require approximately 2 V.
R
TMG = (SBAT – IL(RL + 2RFUSE)) / (2(IL – 5 mA))
SLIC = IL(SBAT – IL(RL + 2RFUSE)) + 0.3 W – PTRTMG
PTRTMG = (IL – 5 mA)2(2RTMG
To choose a power rating for RTMG
PRATING > PTRTMG / 2
:
P
)
8.0 Timing Specifications
Symbol
trSLD
Signal
Parameter
Min.
Typ.
Max.
Unit
Rise time Le79R241 ISLIC device LD
pin
LD
2
Fall time Le79R241 ISLIC device LD
pin
tfSLD
LD
LD
2
µs
tSLDPW
tSDXSU
tSDXHD
tSDXD
LD minimum pulse width
P1–3 data Setup time
P1–3 data hold time
Max P1–3 data delay
3
P1,P2,P3
P1,P2,P3
P1,P2,P3
4.5
4.5
5
Note:
1. The P1–3 pins are updated continuously during operation by the LD signal.
2. After a power-on reset or hardware reset, the relay outputs from the Le79R241 ISLIC device turn all relays off. An unassuming state is to
place the relay control pins, which are level triggered, to a reset state for all relays. Any noise encountered only raises the levels toward the
register lock state.
3. When writing to the Le79R241 ISLIC device registers, the sequence is:
a) Set LD pin to mid-state
b) Place appropriate data on the P1–3 pins
c) Assert the LD pin to High or Low to write the proper data
d) Return LD pin to mid-state
4. Le79R241 ISLIC device registers are refreshed at 5.33 kHz when used with a 790 series codec.
5. If the clock or MPI becomes disabled, the LD pins and P1–3 returns to 0 V state, thus protecting the Le79R241 ISLIC device and the line
connection.
6. Not tested in production. Guaranteed by characterization.
23
Zarlink Semiconductor Inc.
Le79R241
Data Sheet
9.0 Waveforms
187.5 usec
LD
P1,P2,P3
S
R
S
R
S
R
Write State Register
Lock Registers
VCC
VREF
LD
0V
Write Relay Register
New State
Data
Previous
Relay Data
State Data
Relay Data
P1,P2,P3
DETAIL A
VREF
VREF
Write State Register
Write Relay Register
trSLD
tfSLD
LD
tSLDPW
tSDXHD
tSDXSU
P1,P2,P3
Relay driver
response
tSDXD
24
Zarlink Semiconductor Inc.
Le79R241
Data Sheet
10.0 Application Circuit
10.1 Internal Ringing Line Schematic
+5V
3.3V
VCC
CREF
RSAi
RFAi
RRXi
SA
AD
RSN
VOUTi
DGND
AGND
RHLai
CHLbi
A
RHLbi
VHLi
RHLci
RTi
RHLdi
CHLdi
U3
U5
VREF
CADi
CHPi
VCCA
VCCD
VCC
+3.3VDC
VSAB
VTX
VSABi
VINi
HPA
HPB
BD
CS1
U4
CS2
U6
BATP
BATH
DT1i
U1
U2
Le79R241
or
Le79R251
Le79228x
codec
RFBi
RSBi
B
VLB
IMT
VLBi
VIMTi
SB
CBDi
TMS
RMTi
RTEST
VREF
RMGPi
ILG
VILGi
BACK
TMP
TMN
PLANE
RLGi
VREF
RMGLi
DLHi
DHi
VREF
VREF
VBH
VBL
BATH
BATL
CBATHi
DLi
LD
LDi
P1
SPB
SLB
SHB
BATP
BATL
BATH
CBATLi
GND
RSPB
RSLB
RSHB
P1
P2
P3
P2
P3
CBATPi
VBP
RYE
R2
BATP
IREF
RREF
R3
R1
BGND
RSVD
XSC
XSBi
* Connections shown for one channel
25
Zarlink Semiconductor Inc.
Le79R241
Data Sheet
11.0 Line Card Parts List - Internal Ringing
The following list defines the parts and part values required to meet target specification limits for channel i of the line
card (i = 1, 2, 3, 4).
Item
Type
Value
Tol.
Rating
Comments
Le79R241 ISLIC
device
U1
U2
-
VE790 series ISLAC
device
-
codec
U3, U4, U5, U6
DT1i, DT2i
B1100CC
Diode
-
-
100 V
100 V
TECCOR Battrax protector
1 A
DHi1, DLi, DT1i, DT2i, DLHi
Diode
100 mA
50
-
100 V
2 W
50 ns response time
RFAi, RFBi
RSAi, RSBi
RTi
Resistor
Resistor
Resistor
2%
2%
1%
Fusible or PTC protection resistors
Sense resistors
200 k
80.6 k
1/4 W
1/8 W
Impedance control resistor
RRXi
Resistor
Resistor
Resistor
Resistor
90.9 k
69.8 k
750 k
40.2 k
1%
1%
1%
1%
1/8 W
1/8 W
1/8 W
Receive path gain resistor
Current reference setting resistor
Battery sense resistors
RREF
RSHB, RSLB, RSPB
RHLai
1/10 W Feed/metering resistor
1/10 W Feed/metering resistor
1/10 W Feed/metering resistor
1/10 W Feed/metering resistor
RHLbi
Resistor
Resistor
Resistor
Capacitor
Capacitor
Resistor
Resistor
Resistor
Capacitor
4.32 k
2.87 k
2.87 k
3.3 nF
1%
1%
RHLci
RHLdi
1%
CHLbi
10%
10 V
10 V
Feed/metering capacitor - Not Polarized
CHLdi
0.82 F 10%
Feed/metering capacitor -Ceramic
Metallic loop current gain resistor
Longitudinal loop current gain resistor
Test board
RMTi
3.01 k
6.04 k
2 k
1%
1%
1/8 W
1/8 W
1 W
RLGi
RTEST
1%
CADi, CBDi2
CBATHi, CBATLi, CBATPi
CHPi
22 nF
10%
100 V
Ceramic
Capacitor
Capacitor
Capacitor
Resistor
Resistor
100 nF
22 nF
100 nF
1 k
20%
20%
20%
5%
100 V
100 V
100 V
2 W
Ceramic
High pass filter capacitor - Ceramic
Protector speed up capacitor
Thermal management resistor
Thermal management resistor
CS1i, CS2i2
RMGLi
RMGPi
1 k
5%
2 W
Notes:
1. Required to insure VBH < VBL during startup. May not be needed for some supplies.
2. DT2i is optional - Should be put if Le79R251 is used.
3. Value can be adjusted to suit application.
26
Zarlink Semiconductor Inc.
Le79R241
Data Sheet
11.1 External Ringing Line Schematic
+5 V
3.3 V
VCC
CREF
RSAi
RRXi
SA
AD
RSN
VOUTi
VHLi
DGND
AGND
RHLai
RFAi
A
1
8
CHLbi
RHLbi
KRi(A)
CADi
RHLci
RHLdi
CHLdi
VREF
RTi
6
7
U5
VCCA
VCCD
VCC
+3.3 VDC
VSAB
VTX
VSABi
VINi
2
CHPi
HPA
HPB
BD
DT1i
U1
U2
BATH
Le79231,
Le79R241
or
Le79Q224x
or Le79228x
codec
CS
Le79R251
VLB
IMT
VLBi
RFBi
CBDi
B
4
5
VIMTi
RSBi
KRi (B)
RMTi
SB
RTEST
TMS
VREF
VILGi
ILG
U2
ISLAC
RMGPi
DT2i***
RLGi
BACK
PLANE
TMP
TMN
VREF
VREF
VREF
RMGLi
DHi
DLi
LD
GND
P1
LDi
P1
BATH
VBH
VBL
CBATHi
DLHi
BATL
P2
P3
P2
P3
SPB
SLB
CBATLi
BATL
BATH
RSLB
RSHB
RSVD2
RYE
SHB
VBP
IREF
R2H
R3H
RREF
R1
RGFDi
KRi
+5 V
BGND
RSVD
XSBi
XSC
*Connections shown for one channel
**DT2i is optional - Should be put if Le79R251 is used.
Ring Bus
RSRBi
RSRC
27
Zarlink Semiconductor Inc.
Le79R241
Data Sheet
12.0 Line card Parts List - External Ringing
The following list defines the parts and part values required to meet target specification limits for channel i of the line card (i = 1,
2, 3, 4).
Item
Type
Value
Tol.
Rating
Comments
U1
U2
Le79R241 ISLIC device
VE790 series ISLAC
device
codec
Transient Voltage Suppressor, Power
Innovations
U5
TISP61089
Diode
80 V
DLHi1, DHi, DLi, DT1i DT2i2
100 mA
100 V
50 ns response time
RFAi, RFBi
RSAi, RSBi
RTi
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
50
2%
2%
1%
1%
1%
5%
1%
1%
1%
2 W
1/4 W
1/8 W
1/8 W
1/8 W
1 W
Fusible or PTC protection resistors
Sense resistors
200 k
80.6 k
90.9 k
69.8 k
1 k
Impedance control resistor
Receive path gain resistor
Current reference setting resistor
Thermal management resistors
Battery Sense Resistors
Feed/Metering resistor
RRXi
RREF
RMGLi, RMGPi
RSHB, RSLB
RHLai
750 k
40.2 k
4.32 k
1/8 W
1/10 W
1/10 W
RHLbi
RHLci
Feed/Metering resistor
Use 2.87kin metering
Feed/Metering resistor
Resistor
Resistor
2.49 k
2.49 k
1%
1%
1/10 W
1/10 W
Use 2.87kin metering
Feed/Metering resistor
RHLdi
CHLbi
CHLdi
RMTi
Capacitor
Capacitor
Resistor
Resistor
Resistor
Capacitor
3.3 nF
0.82 µF
3.01 k
6.04 k
2 k
10%
10%
1%
10 V
10 V
Feed/Metering capacitor - Not Polarized
Feed/Metering capacitor - Ceramic
Metallic Current Sense Resistors
Longitudinal Current Sense Resistors
Test board
1/8 W
1/8 W
1 W
RLGi
1%
RTEST
1%
3
22 nF
10%
100 V
Ceramic
CADi, CBDi
CBATHi, CBATLi
CHPi
Capacitor
Capacitor
Capacitor
Resistor
Resistor
Relay
100 nF
22 nF
20%
20%
20%
2%
100 V
100 V
100 V
2 W
Ceramic
Ceramic
CSi3
100 nF
510
Protector speed up capacitor
1.2 W typ
RGFDi
RSRBi, RSRC
KRi
750 k
5 V Coil
1%
1/4 W
External Ringing sense resistors
DPDT
Notes:
1. Required to insure VBH < VBL during startup. May not be needed for some supplies.
2. DT2i is optional - Should be put if Le79R251 is used.
3. Value can be adjusted to suit application.
28
Zarlink Semiconductor Inc.
Le79R241
Data Sheet
13.0 Physical Dimensions
13.1 32-Pin PLCC
NOTES:
1
2
3
Dimensioning and tolerancing conform to ASME Y14,5M-1994.
To be measured at seating plan - C - contact point.
32-Pin PLCC
JEDEC # MS-016
Symbol
Min
Nom
--
Max
0.140
0.095
0.495
0.453
A
A1
D
D1
D2
E
E1
E2
Ө
0.125
0.075
0.485
0.447
Dimensions “D1” and “E1” do not include mold protrusion.
Allowable mold protrusion is 0.010 inch per side. Dimensions
“D” and “E” include mold mismatch and determined at the
parting line; that is “D1” and “E1” are measured at the extreme
material condition at the upper or lower parting line.
0.090
0.490
0.450
0.205 REF
0.590
0.550
0.255 REF
--
0.585
0.547
0.595
0.553
4
5
Exact shape of this feature is optional.
Details of pin 1 identifier are optional but must be located
within the zone indicated.
0 deg
10 deg
6
7
8
Sum of DAM bar protrusions to be 0.007 max per lead.
Controlling dimension : Inch.
Reference document : JEDEC MS-016
32-Pin PLCC
Note:
Packages may have mold tooling markings on the surface. These markings have no impact on the form, fit or function of the
device. Markings will vary with the mold tool used in manufacturing.
29
Zarlink Semiconductor Inc.
Le79R241
Data Sheet
13.2 32-Pin QFN
NOTES:
32 LEAD QFN
Nom
Symbol
1. Dimensioning and tolerancing conform to ASME Y14.5M-1994.
Min
Max
2. All dimensions are in millimeters.
3. N is the total number of terminals.
is in degrees.
A
A2
b
D
D2
E
E2
e
L
N
A1
A3
aaa
bbb
ccc
0.80
0.90
1.00
0.57 REF
0.23
8.00 BSC
5.80
8.00 BSC
5.80
0.80 BSC
0.53
32
0.02
0.20 REF
0.20
0.10
0.10
4.
The Terminal #1 identifier and terminal numbering convention
shall conform to JEP 95-1 and SSP-012. Details of the erminal #1
0.18
5.70
5.70
0.43
0.00
0.28
5.90
5.90
0.63
0.05
T
identifier are optional, but must be located within the zone
indicated. The Terminal #1 identifier may be either a mold or
marked feature.
5. Coplanarity applies to the exposed pad as well as the terminals.
6. Reference Document: JEDEC MO-220.
7. Lead width deviates from the JEDEC MO-220 standard.
32-Pin QFN
Note:
Packages may have mold tooling markings on the surface. These markings have no impact on the form, fit or function of the de-
vice. Markings will vary with the mold tool used in manufacturing.
30
Zarlink Semiconductor Inc.
Le79R241
Data Sheet
For more information about all Zarlink products
visit our Web Site at
www.zarlink.com
Information relating to products and services furnished herein by Zarlink Semiconductor Inc. or its subsidiaries (collectively “Zarlink”) is believed to be reliable.
However, Zarlink assumes no liability for errors that may appear in this publication, or for liability otherwise arising from the application or use of any such
information, product or service or for any infringement of patents or other intellectual property rights owned by third parties which may result from such application or
use. Neither the supply of such information or purchase of product or service conveys any license, either express or implied, under patents or other intellectual
property rights owned by Zarlink or licensed from third parties by Zarlink, whatsoever. Purchasers of products are also hereby notified that the use of product in
certain ways or in combination with Zarlink, or non-Zarlink furnished goods or services may infringe patents or other intellectual property rights owned by Zarlink.
This publication is issued to provide information only and (unless agreed by Zarlink in writing) may not be used, applied or reproduced for any purpose nor form part
of any order or contract nor to be regarded as a representation relating to the products or services concerned. The products, their specifications, services and other
information appearing in this publication are subject to change by Zarlink without notice. No warranty or guarantee express or implied is made regarding the
capability, performance or suitability of any product or service. Information concerning possible methods of use is provided as a guide only and does not constitute
any guarantee that such methods of use will be satisfactory in a specific piece of equipment. It is the user’s responsibility to fully determine the performance and
suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not been superseded. Manufacturing does
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significant injury or death to the user. All products and materials are sold and services provided subject to Zarlink’s conditions of sale which are available on request.
Purchase of Zarlink’s I2C components conveys a license under the Philips I2C Patent rights to use these components in an I2C System, provided that the system
conforms to the I2C Standard Specification as defined by Philips.
Zarlink, ZL, the Zarlink Semiconductor logo and the Legerity logo and combinations thereof, VoiceEdge, VoicePort, SLAC, ISLIC, ISLAC and VoicePath are
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TECHNICAL DOCUMENTATION - NOT FOR RESALE
31
Zarlink Semiconductor Inc.
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