TC7129IPL_技术文档

TC7129

4-1/2 Digit Analog-to-Digital Converters with

On-Chip LCD Drivers

Features

General Description

• Count Resolution: ±19,999

The TC7129 is a 4-1/2 digit analog-to-digital converter

(ADC) that directly drives a multiplexed liquid crystal

display (LCD). Fabricated in high performance, low

power CMOS, the TC7129 ADC is designed specifi-

cally for high resolution, battery powered digital multi-

meter applications. The traditional dual slope method

of A/D conversion has been enhanced with a succes-

sive integration technique to produce readings accu-

rate to better than 0.005% of full scale, and resolution

down to 10µV per count.

• Resolution on 200mV Scale: 10µV

• True Differential Input and Reference

• Low Power Consumption: 500µA at 9V

• Direct LCD Driver for 4-1/2 Digits, Decimal Points,

Low Battery Indicator, and Continuity Indicator

• Over Range and Under Range Outputs

• Range Select Input: 10:1

• High Common Mode Rejection Ratio: 110dB

• External Phase Compensation Not Required

The TC7129 includes features important to multimeter

applications. It detects and indicates low battery condi-

tion. A continuity output drives an annunciator on the

display, and can be used with an external driver to

sound an audible alarm. Over range and under range

outputs and a range change input provide the ability to

create auto-ranging instruments. For snapshot read-

ings, the TC7129 includes a latch-and-hold input to

freeze the present reading. This combination of features

makes the TC7129 the ideal choice for full featured

multimeter and digital measurement applications.

Applications

• Full Featured Multimeters

• Digital Measurement Devices

Device Selection Table

Package

Code

Layout

Temperature

Range

Package

TC7129CPL

Normal

40-Pin PDIP

44-Pin PQFP

44-Pin PLCC

0°C to +70°C

TC7129CKW Formed

TC7129CLW

–

Typical Application

Low Battery

Continuity

V+

5pF

20 19 18 17 16 15 14 13 12 11 10

9

8

7

6

5

4

3

2

1

TC7129

120kHz

21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

330kΩ

*

0.1µF

10pF

0.1

+

µF

20

0.1µF

1µF

150kΩ

kΩ

V+

10kΩ

+

100kΩ

*Note: RC network between Pins 26 and 28 is not required.

9V

+

–

V

IN

2002 Microchip Technology Inc.

DS21459B-page 1

TC7129

Package Type

40-Pin PDIP

OSC1

OSC3

40 OSC2

1

2

39 DP

1

38 DP

2

ANNUNICATOR

B , C , CONT

3

37

4

RANGE

1

A , G , D

5

36 DGND

1

F , E , DP

6

REF LO

REF HI

IN HI

1

35

34

33

32

B , C , LO BATT

7

2

A , G , D

8

2

F , E , DP

9

2

IN LO

31 BUFF

10

11

12

13

14

15

16

17

18

19

20

B , C MINUS

TC7129CPL

3

,

Display

Output

Lines

A , G , D

C

-

30

29

28

3

5

4

REF

F , E , DP

+

3

REF

B , C BC

COMMON

4

,

A , G , D

27 CONTINUITY

26 INT OUT

25 INT IN

24 V+

4

F , E , DP

4

BP

3

2

1

23 V-

V

22

LATCH/HOLD

DISP

DP /OR

21 DP /UR

3

4

44-Pin QFP

44-Pin PLCC

6

5

4

3

2

1

44 43 42 41 40

44 43 42 41 40 39 38 37 36 35 34

F , E , DP

1

REF LO

33

32

31

30

29

28

27

26

25

24

23

7

39

38 REF HI

IN HI

1

2

3

4

REF LO

REF HI

1

8

B , C , BATT

2 2

2

A , G , D

2 2 2

9

37

36 IN LO

IN HI

IN LO

BUFF

NC

2

F , E , DP

2 2 2

10

11

12

13

14

15

16

2

B , C MINUS

35

34

33

32

31

30

29

BUFF

NC

5

6

3

,

3

,

NC

TC7129CKW

TC7129CLW

A , G , D

C

-

C

-

7

3

REF

F , E , DP

3 3

C

+

8

C

+

3

B , C BC

4 4 5

,

9

COMMON

CONTINUITY

INT OUT

4

5

COMMON

CONTINUITY

INT OUT

,

A , G , D

4 4 4

10

11

4

F , E , DP

F , E , DP 17

4 4 4

4

18 19 20 21 22 23 24 25 26 27 28

12 13 14 15 16 17 18 19 20 21 22

DS21459B-page 2

2002 Microchip Technology Inc.

TC7129

*Stresses above those listed under "Absolute Maximum

Ratings" may cause permanent damage to the device. These

are stress ratings only and functional operation of the device

at these or any other conditions above those indicated in the

operation sections of the specifications is not implied.

Exposure to Absolute Maximum Rating conditions for

extended periods may affect device reliability.

1.0

ELECTRICAL

CHARACTERISTICS

Absolute Maximum Ratings*

Supply Voltage (V+ to V-)....................................... 15V

Reference Voltage (REF HI or REF LO) ......... V+ to V-

Input Voltage (IN HI or IN LO) (Note 1)........... V+ to V-

V

.......................................... V+ to (DGND – 0.3V)

DISP

Digital Input (Pins 1, 2, 19, 20,

21, 22, 27, 37, 39, 40).......................... DGND to V+

Analog Input (Pins 25, 29, 30) ........................ V+ to V-

Package Power Dissipation (T ≤ 70°C)

A

Plastic DIP .....................................................1.23W

PLCC .............................................................1.23W

Plastic QFP ....................................................1.00W

Operating Temperature Range ............... 0°C to +70°C

Storage Temperature Range.............. -65°C to +150°C

TC7129 ELECTRICAL SPECIFICATIONS

Electrical Characteristics: V+ to V- = 9V, V_REF= 1V, T_A= +25°C, f_CLK= 120kHz, unless otherwise indicated.

Pin numbers refer to 40-pin DIP.

Symbol

Input

Parameter

Min

Typ

Max

Unit

Test Conditions

Zero Input Reading

-0000

—

0000

±0.5

+0000

—

Counts V_IN= 0V, 200mV Scale

µV/°C V_IN= 0V, 0°C < T_A< +70°C

Counts V_IN= V_REF= 1000mV, Range = 2V

Ratio V_IN= 1V on High Range,

_IN= 0.1V on Low Range

Zero Reading Drift

Ratiometric Reading

Range Change Accuracy

9997

0.9999

9999

10000

1.0001

1.0000

V

RE

Rollover Error

—

1

2

Counts V_IN- = V_IN+ = 199mV

Counts 200mV Scale

NL

Linearity Error

—

CMRR

CMVR

Common Mode Rejection Ratio

Common Mode Voltage Range

110

dB

V

V_CM= 1V, V_IN= 0V, 200mV Scale

(V-) + 1.5

(V+) – 1

14

V_IN= 0V

V

200mV Scale

e_N

I_IN

Noise (Peak-to-Peak Value not

Exceeded 95% of Time)

µV_P-P

V_IN= 0V

200mV Scale

Input Leakage Current

—

1

2

10

7

pA

V_IN= 0V, Pins 32, 33

Scale Factor Temperature Coefficient

ppm/°C V_IN= 199mV, 0°C < T_A< +70°C

External V_REF= 0ppm/°C

Power

V_COM

Common Voltage

2.8

—

4.5

—

6

3.2

0.6

10

3.5

—

V

mA

µA

V

V+ to Pin 28

Common Sink Current

Common Source Current

Digital Ground Voltage

Sink Current

∆Common = +0.1V

∆Common = -0.1V

V+ to Pin 36, V+ to V- = 9V

∆DGND = +0.5V

V+ to V-

—

DGND

5.3

1.2

9

5.8

—

mA

V

Supply Voltage Range

12

1.3

I_S

Supply Current Excluding Common

Current

—

0.8

mA

V+ to V- = 9V

Note 1: Input voltages may exceed supply voltages, provided input current is limited to ±400µA. Currents above this value may

result in invalid display readings, but will not destroy the device if limited to ±1mA. Dissipation ratings assume device is

mounted with all leads soldered to printed circuit board.

2002 Microchip Technology Inc.

DS21459B-page 3

TC7129

TC7129 ELECTRICAL SPECIFICATIONS (CONTINUED)

Electrical Characteristics: V+ to V- = 9V, V_REF= 1V, T_A= +25°C, f_CLK= 120kHz, unless otherwise indicated.

Pin numbers refer to 40-pin DIP.

Symbol

Parameter

Clock Frequency

Min

Typ

Max

Unit

Test Conditions

f_CLK

—

120

50

360

—

kHz

kΩ

V

V_DISPResistance

V_DISPto V+

Low Battery Flag Activation Voltage

6.3

7.2

7.7

V+ to V-

Digital

Continuity Comparator Threshold

Voltages

100

—

200

2

—

400

10

—

mV

µA

V_OUTPin 27 = High

V_OUTPin 27 = Low

Pins 37, 38, 39

Pull-down Current

"Weak Output" Current

Sink/Source

3/3

3/9

40

3

Pins 20, 21 Sink/Source

Pin 27 Sink/Source

—

Pin 22 Source Current

Pin 22 Sink Current

—

Note 1: Input voltages may exceed supply voltages, provided input current is limited to ±400µA. Currents above this value may

result in invalid display readings, but will not destroy the device if limited to ±1mA. Dissipation ratings assume device is

mounted with all leads soldered to printed circuit board.

DS21459B-page 4

2002 Microchip Technology Inc.

TC7129

2.0

PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 2-1.

TABLE 2-1:

PIN FUNCTION TABLE

Pin No.

Symbol

Function

40-Pin PDIP 44-Pin PQFP 44-Pin PLCC

1

2

40

41

42

43

44

1

2

3

OSC1

OSC3

Input to first clock inverter.

Output of second clock inverter.

3

4

ANNUNCIATOR Backplane square wave output for driving annunciators.

B₁, C₁, CONT Output to display segments.

4

5

6

A₁, G₁, D₁

Output to display segments.

6

7

F₁, E₁, DP₁

7

2

8

B₂, C₂, LO BATT Output to display segments.

8

3

9

A₂, G₂, D₂

Output to display segments.

9

4

10

11

13

14

15

16

17

18

19

20

21

22

F₂, E₂, DP₂

10

11

12

13

14

15

16

17

18

19

20

5

B₃, C₃, MINUS Output to display segments.

7

A₃, G₃, D₃

F₃, E₃, DP₃

B₄, C₄, BC₅

A₄, D₄, G₄

F₄, E₄, DP₄

BP₃

Output to display segments.

Backplane #3 output to display.

Backplane #2 output to display.

Backplane #1 output to display.

Negative rail for display drivers.

8

9

10

11

12

13

14

15

16

BP₂

BP₁

V_DISP

DP₄/OR

Input: When HI, turns on most significant decimal point.

Output: Pulled HI when result count exceeds ±19,999.

21

22

18

19

24

25

DP₃/UR

Input: Second most significant decimal point on when HI.

Output: Pulled HI when result count is less than ±1000.

LATCH/HOLD Input: When floating, ADC operates in the Free Run mode. When

pulled HI, the last displayed reading is held. When pulled LO, the

result counter contents are shown incrementing during the

de-integrate phase of cycle.

Output: Negative going edge occurs when the data latches are

updated. Can be used for converter status signal.

23

24

25

26

27

20

21

22

23

24

26

27

28

29

30

V-

V+

Negative power supply terminal.

Positive power supply terminal and positive rail for display drivers.

Input to integrator amplifier.

INT IN

INT OUT

Output of integrator amplifier.

CONTINUITY Input: When LO, continuity flag on the display is OFF. When HI,

continuity flag is ON.

Output: HI when voltage between inputs is less than +200mV. LO

when voltage between inputs is more than +200mV.

28

25

31

COMMON

C_REF

Sets Common mode voltage of 3.2V below V+ for DE, 10X, etc.

Can be used as pre-regulator for external reference.

29

30

31

32

33

34

35

26

27

29

30

31

32

33

32

33

35

36

37

38

39

+

Positive side of external reference capacitor.

Negative side of external reference capacitor.

Output of buffer amplifier.

C_REF-

BUFFER

IN LO

Negative input voltage terminal.

Positive input voltage terminal.

Positive reference voltage.

IN HI

REF HI

REF LO

Negative reference voltage

2002 Microchip Technology Inc.

DS21459B-page 5

TC7129

TABLE 2-1:

PIN FUNCTION TABLE (CONTINUED)

Pin No.

Symbol

Function

40-Pin PDIP 44-Pin PQFP 44-Pin PLCC

36

34

40

DGND

Internal ground reference for digital section. See Section 4.3,

±5V Power Supply.

37

38

39

40

—

35

36

37

38

41

42

43

44

RANGE

DP₂

3µA pull-down for 200mV scale. Pulled HI externally for 2V scale.

Internal 3µA pull-down. When HI, decimal point 2 will be on.

Internal 3µA pull-down. When HI, decimal point 1 will be on.

Output of first clock inverter. Input of second clock inverter.

No connection.

DP₁

OSC2

NC

6,17, 28, 39 12, 23, 34, 1

DS21459B-page 6

2002 Microchip Technology Inc.

TC7129

The resistor and capacitor values are not critical; those

shown work for most applications. In some situations,

the capacitor values may have to be adjusted to com-

pensate for parasitic capacitance in the circuit. The

capacitors can be low cost ceramic devices.

3.0

DETAILED DESCRIPTION

(All Pin Designations Refer to 40-Pin PDIP.)

The TC7129 is designed to be the heart of a high

resolution analog measurement instrument. The only

additional components required are a few passive ele-

ments: a voltage reference, an LCD, and a power

source. Most component values are not critical; substi-

tutes can be chosen based on the information given

below.

Some applications can use a simple RC network

instead of a crystal oscillator. The RC oscillator has

more potential for jitter, especially in the least

significant digit. See Section 4.8, RC Oscillator.

3.2

Integrating Resistor (R_INT)

The basic circuit for a digital multimeter application is

shown in Figure 3-1. See Section 4.0, Typical Applica-

tions for variations. Typical values for each component

are shown. The sections below give component selec-

tion criteria.

The integrating resistor sets the charging current for

the integrating capacitor. Choose a value that provides

a current between 5µA and 20µA at 2V, the maximum

full scale input. The typical value chosen gives a

charging current of 13.3µA:

3.1

Oscillator (X_OSC, C_O1, C_O2, R_O)

EQUATION 3-2:

The primary criterion for selecting the crystal oscillator

is to choose a frequency that achieves maximum rejec-

tion of line frequency noise. To do this, the integration

phase should last an integral number of line cycles.

The integration phase of the TC7129 is 10,000 clock

cycles on the 200mV range and 1000 clock cycles on

the 2V range. One clock cycle is equal to two oscillator

cycles. For 60Hz rejection, the oscillator frequency

should be chosen so that the period of one line cycle

equals the integration time for the 2V range:

2V

150kΩ

I

=

13.3µA

CHARGE

Too high a value for R

increases the sensitivity to

INT

noise pickup and increases errors due to leakage cur-

rent. Too low a value degrades the linearity of the

integration, leading to inaccurate readings.

EQUATION 3-1:

1/60 second = 16.7msec =

1000 clock cycles *2 OSC cycles/clock cycle

OSC Frequency

This equation gives an oscillator frequency of 120kHz.

A similar calculation gives an optimum frequency of

100kHz for 50Hz rejection.

2002 Microchip Technology Inc.

DS21459B-page 7

TC7129

FIGURE 3-1:

STANDARD CIRCUIT

Low Battery

Continuity

V+

C

5pF

O1

20 19 18 17 16 15 14 13 12 11 10

9

8

7

6

5

4

3

2

1

Display Drive Outputs

TC7129

120

kHz

Crystal

21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

330kΩ

R

O

C

INT

0.1µF

C

10pF

O2

R

D

REF

C

+

0.1

µF

REF

20

kΩ

REF

1µF

C

RF

0.1µF

V+

150kΩ

C

IF

R

INT

10kΩ

+

R

IF

100kΩ

R

BIAS

9V

–

+

V

IN

The capacitor should have low dielectric absorption to

ensure good integration linearity. Polypropylene and

Teflon capacitors are usually suitable. A good mea-

surement of the dielectric absorption is to connect the

reference capacitor across the inputs by connecting:

3.3

Integrating Capacitor (C_INT)

The charge stored in the integrating capacitor during

the integrate phase is directly proportional to the input

voltage. The primary selection criterion for C

choose a value that gives the highest voltage swing

while remaining within the high linearity portion of the

integrator output range. An integrator swing of 2V is the

recommended value. The capacitor value can be

calculated using the following equation:

is to

INT

Pin to Pin:

20 → 33 (C

+ to IN HI)

- to IN LO)

REF

30 → 32 (C

REF

A reading between 10,000 and 9998 is acceptable;

anything lower indicates unacceptably high dielectric

absorption.

EQUATION 3-3:

t

x I

INT

C

=

INT

V

SWING

3.4

Reference Capacitor (C_REF)

Where t

is the integration time.

INT

The reference capacitor stores the reference voltage

during several phases of the measurement cycle. Low

leakage is the primary selection criterion for this com-

ponent. The value must be high enough to offset the

effect of stray capacitance at the capacitor terminals. A

value of at least 1µF is recommended.

Using the values derived above (assuming 60Hz

operation), the equation becomes:

EQUATION 3-4:

16.7msec x 13.3µA

C

=

= 0.1µA

INT

2V

DS21459B-page 8

2002 Microchip Technology Inc.

TC7129

FIGURE 4-1:

POWERING THE TC7129

FROM A ±5V POWER

SUPPLY

3.5

Voltage Reference

(D_REF, R_REF, R_BIAS, C_RF

)

The reference potentiometer (R

)

provides an

REF

adjustment for adjusting the reference voltage; any

+5V

value above 20kΩ is adequate. The bias resistor

TC7129

(R

) limits the current through D

to less than

BIAS

REF

150µA. The reference filter capacitor (C ) forms an

RF

24

RC filter with R

to help eliminate noise.

BIAS

V+

34

REF HI

0.1µF

3.6

Input Filter (R_IF, C_IF)

35

For added stability, an RC input noise filter is usually

included in the circuit. The input filter resistor value

should not exceed 100kΩ. A typical RC time constant

value is 16.7msec to help reject line frequency noise.

The input filter capacitor should have low leakage for a

high-impedance input.

REF LO

36

DGND

28

33

COMMON

0.1µF

+

IN HI

V

IN

32

–

0.1µF

IN LO

V-

3.7

Battery

23

The typical circuit uses a 9V battery as a power source.

Any value between 6V and 12V can be used. For oper-

ation from batteries with voltages lower than 6V and for

operation from power supplies, see Section 4.2,

Powering the TC7129.

-5V

4.4

Low Voltage Battery Source

A battery with voltage between 3.8V and 6V can be

used to power the TC7129, when used with a voltage

doubler circuit, as shown in Figure 4-2. The voltage

doubler uses the TC7660 DC-to-DC voltage converter

and two external capacitors.

4.0

4.1

TYPICAL APPLICATIONS

TC7129 as a Replacement Part

The TC7129 is a direct pin-for-pin replacement part for

the ICL7129. Note, however, that part requires a

capacitor and resistor between Pins 26 and 28 for

phase compensation. Since the TC7129 uses internal

phase compensation, these parts are not required and,

in fact, must be removed from the circuit for stable

operation.

FIGURE 4-2:

POWERING THE TC7129

FROM A LOW VOLTAGE

BATTERY

24

4.2

Powering the TC7129

V+

34

REF HI

36

While the most common power source for the TC7129

is a 9V battery, there are other possibilities. Some of

the more common ones are explained below.

DGND

+

3.8V

to

35

REF LO

6V

28

COMMON

4.3

±5V Power Supply

TC7129

33

+

IN HI

Measurements are made with respect to power supply

ground. DGND (Pin 36) is set internally to about 5V

less than V+ (Pin 24); it is not intended as a power sup-

ply input and must not be tied directly to power supply

ground. It can be used as a reference for external logic,

as explained in Section 4.6, Connecting to External

Logic (see Figure 4-1).

V

IN

8

32

IN LO

V-

23

–

2

+

10µF

TC7660

4

5

10µF

3

+

2002 Microchip Technology Inc.

DS21459B-page 9

TC7129

FIGURE 4-4:

EXTERNAL LOGIC

REFERENCED DIRECTLY

TO DGND

4.5

+5V Power Supply

Measurements are made with respect to power supply

ground. COMMON (Pin 28) is connected to REF LO

(Pin 35). A voltage doubler is needed, since the supply

voltage is less than the 6V minimum needed by the

TC7129. DGND (Pin 36) must be isolated from power

supply ground (see Figure 4-3).

+

V

24

FIGURE 4-3:

POWERING THE TC7129

FROM A +5V POWER

SUPPLY

External

Logic

TC7129

36

+5V

DGND

I

LOGIC

24

23

V+

34

0.1µF

V-

TC7129

35

FIGURE 4-5:

EXTERNAL LOGIC

REFERENCED TO DGND

WITH BUFFER

36

DGND

28

33

32

+

V

IN

8

V+

–

V+

2

V-

23

+

10µF

TC7660

4

5

24

GND

3

External

Logic

10µF

TC7129

+

–

36

4.6

Connecting to External Logic

+

DGND

I

External logic can be directly referenced to DGND

(Pin 36), provided that the supply current of the exter-

nal logic does not exceed the sink current of DGND

(Figure 4-4). A safe value for DGND sink current is

1.2mA. If the sink current is expected to exceed this

value, a buffer is recommended (see Figure 4-5).

LOGIC

23

V-

4.7

Temperature Compensation

For most applications, V

(Pin 19) can be connected

DISP

directly to DGND (Pin 36). For applications with a wide

temperature range, some LCDs require that the drive

levels vary with temperature to maintain good viewing

angle and display contrast. Figure 4-6 shows two cir-

cuits that can be adjusted to give temperature com-

pensation of about 10mV/°C between V+ (Pin 24) and

V

. The diode between DGND and V

should

cannot

DISP

have a low turn-on voltage because V

exceed 0.3V below DGND.

DS21459B-page 10

2002 Microchip Technology Inc.

TC7129

FIGURE 4-6:

TEMPERATURE COMPENSATING CIRCUITS

V+

1N4148

39kΩ

24

200kΩ

TC7129

20kΩ

2N2222

19

TC7129

–

19

36

V

DISP

V

+

DISP

5kΩ

36

DGND

75kΩ

18kΩ

23

V-

4.8

RC Oscillator

4.9

Measuring Techniques

For applications in which 3-1/2 digit (100µV) resolution

is sufficient, an RC oscillator is adequate. A recom-

mended value for the capacitor is 51pF. Other values

can be used as long as they are sufficiently larger than

the circuit parasitic capacitance. The resistor value is

calculated as:

Two important techniques are used in the TC7129: suc-

cessive integration and digital auto-zeroing. Succes-

sive integration is a refinement to the traditional dual

slope conversion technique.

4.10 Dual Slope Conversion

A dual slope conversion has two basic phases: inte-

grate and de-integrate. During the integrate phase, the

input signal is integrated for a fixed period of time; the

integrated voltage level is thus proportional to the input

voltage. During the de-integrate phase, the integrated

voltage is ramped down at a fixed slope, and a counter

counts the clock cycles until the integrator voltage

crosses zero. The count is a measurement of the time

to ramp the integrated voltage to zero, and is, there-

fore, proportional to the input voltage being measured.

This count can then be scaled and displayed as a mea-

surement of the input voltage. Figure 4-8 shows the

phases of the dual slope conversion.

EQUATION 4-1:

0.45

R =

Freq * C

For 120kHz frequency and C = 51pF, the calculated

value of R is 75kΩ. The RC oscillator and the crystal

oscillator circuits are shown in Figure 4-7.

FIGURE 4-7:

OSCILLATOR CIRCUITS

TC7129

FIGURE 4-8:

DUAL SLOPE

CONVERSION

1

40

2

270kΩ

5pF

V+

10pF

120kHz

De-integrate

Integrate

V+

Zero

Crossing

TC7129

1

40

2

Time

75kΩ

The dual slope method has a fundamental limitation.

The count can only stop on a clock cycle, so that mea-

surement accuracy is limited to the clock frequency. In

addition, a delay in the zero crossing comparator can

add to the inaccuracy. Figure 4-9 shows these errors in

an actual measurement.

51pF

2002 Microchip Technology Inc.

DS21459B-page 11

TC7129

FIGURE 4-9:

ACCURACY ERRORS IN DUAL SLOPE CONVERSION

De-integrate

Integrate

Over shoot due to zero crossing between

clock pulses

Time

Integrator Residue Voltage

Over shoot caused by comparator

delay of 1 clock pulse

Clock Pulses

FIGURE 4-10:

INTEGRATION WAVEFORM

Zero Integrate

and Latch

INT

Integrate

DE

De-integrate

1

REST X10

DE

REST X10

DE

Zero Integrate

2

3

TC7129

Integrator

Note: Shaded area greatly expanded in time and amplitude.

Residual Voltage

DS21459B-page 12

2002 Microchip Technology Inc.

TC7129

4.11 Successive Integration

4.12 Digital Auto-Zeroing

The successive integration technique picks up where

dual slope conversion ends. The over shoot voltage

shown in Figure 4-9, called the "integrator residue volt-

age," is measured to obtain a correction to the initial

count. Figure 4-10 shows the cycles in a successive

integration measurement.

To eliminate the effect of amplifier offset errors, the

TC7129 uses a digital auto-zeroing technique. After the

input voltage is measured as described above, the

measurement is repeated with the inputs shorted inter-

nally. The reading with inputs shorted is a measure-

ment of the internal errors and is subtracted from the

previous reading to obtain a corrected measurement.

Digital auto-zeroing eliminates the need for an external

auto-zeroing capacitor used in other ADCs.

The waveform shown is for a negative input signal. The

sequence of events during the measurement cycle is

shown in Table 4-1.

4.13 Inside the TC7129

TABLE 4-1:

MEASUREMENT CYCLE

SEQUENCE

Figure 4-11 shows a simplified block diagram of the

TC7129.

Phase

Description

INT₁Input signal is integrated for fixed time (1000 clock

cycles on 2V scale, 10,000 on 200 mV).

DE₁Integrator voltage is ramped to zero. Counter

counts up until zero crossing to produce reading

accurate to 3-1/2 digits. Residue represents an

over shoot of the actual input voltage.

REST Rest; circuit settles.

X10 Residue voltage is amplified 10 times and inverted.

DE₂Integrator voltage is ramped to zero. Counter

counts down until zero crossing to correct reading

to 4-1/2 digits. Residue represents an under shoot

of the actual input voltage.

REST Rest; circuit settles.

X10 Residue voltage is amplified 10 times and inverted.

DE₃Integrator voltage is ramped to zero. Counter

counts up until zero crossing to correct reading to

5-1/2 digits. Residue is discarded.

2002 Microchip Technology Inc.

DS21459B-page 13

TC7129

FIGURE 4-11:

TC7129 FUNCTIONAL BLOCK DIAGRAM

Low Battery

Continuity

Backplane

Drives

Segment Drives

Annunciator

Drive

TC7129

OSC1

V

Latch, Decode Display Multiplexer

DISP

OSC2

OSC3

Up/Down Results Counter

Sequence Counter/Decoder

Control Logic

RANGE

DP

1

L/H

2

CONT

UR/DP

3

OR/DP

4

V+

V-

Analog Section

REF HI

DGND

REF LO

INT OUT

INT IN

BUFF

COMMON

IN IN

HI LO

FIGURE 4-12:

INTEGRATOR BLOCK DIAGRAM

C

REF

R

INT

REF HI

REF LO

DE

Integrator

X10

Comparator 1

–

10

pF

INT

1

–

+

IN HI

+

To Digital

Section

Buffer

DE-

DE+

DE-

+

–

100pF

Comparator 2

DE+

ZI, X10

Common

INT

REST

INT INT

1

2

,

IN LO

–

500kΩ

TC7129

+

–

+

V

Continuity

Comparator

200mV

Continuity

To Display Driver

DS21459B-page 14

2002 Microchip Technology Inc.

TC7129

FIGURE 4-13:

CONTINUITY INDICATOR

CIRCUIT

4.14 Integrator Section

The integrator section includes the integrator, compar-

ator, input buffer amplifier, and analog switches (see

Table 4-2), used to change the circuit configuration dur-

ing the separate measurement phases described ear-

lier. See Integrator Block Diagram (Figure 4-12).

–

+

IN HI

COM

Buffer

TABLE 4-2:

SWITCH LEGENDS

Label

Description

Label

DE

Meaning.

TC7129

Open during all de-integrate phases.

DE–

Closed during all de-integrate phases when

input voltage is negative.

IN LO

–

500kΩ

DE+

INT₁

INT₂

Closed during all de-integrate phases when

input voltage is positive.

200mV

V

To Display Driver

(Not Latched)

+

Closed during the first integrate phase (mea-

surement of the input voltage).

CONT

Closed during the second integrate phase

(measurement of the amplifier offset).

INT

REST

ZI

Open during both integrate phases.

Closed during the rest phase.

FIGURE 4-14:

INPUT/OUTPUT PIN

SCHEMATIC

Closed during the zero integrate phase.

Closed during the X10 phase.

Open during the X10 phase.

X10

TC7129

The buffer amplifier has a Common mode input voltage

range from 1.5V above V- to 1V below V+. The integra-

tor amplifier can swing to within 0.3V of the rails,

although for best linearity, the swing is usually limited to

within 1V. Both amplifiers can supply up to 80µA of out-

put current, but should be limited to 20µA for good

linearity.

500kΩ

DP /OR, Pin 20

4

DP /UR, Pin 21

3

LATCH/HOLD Pin 22

CONTINUITY, Pin 27

4.15 Continuity Indicator

A comparator with a 200mV threshold is connected

between IN HI (Pin 33) and IN LO (Pin 32). Whenever

the voltage between inputs is less than 200mV, the

CONTINUITY output (Pin 27) will be pulled HIGH, acti-

vating the continuity annunciator on the display. The

continuity pin can also be used as an input to drive the

continuity annunciator directly from an external source

(see Figure 4-13).

4.16 Common and Digital Ground

The common and digital ground (DGND) outputs are

generated from internal zener diodes. The voltage

between V+ and DGND is the internal supply voltage

for the digital section of the TC7129. Common can

source approximately 12µA; DGND has essentially no

source capability (see Figure 4-15).

A schematic of the input/output nature of this pin is also

shown in Figure 4-14.

2002 Microchip Technology Inc.

DS21459B-page 15

TC7129

FIGURE 4-15:

DIGITAL GROUND (DGND)

AND COMMON OUTPUTS

4.20 LATCH/Hold

The L/H output goes LOW during the last 100 cycles of

each conversion. This pulse latches the conversion

data into the display driver section of the TC7129. This

pin can also be used as an input. When driven HIGH,

the display will not be updated; the previous reading is

displayed. When driven LOW, the display reading is not

latched; the sequence counter reading will be dis-

played. Since the counter is counting much faster than

the backplanes are being updated, the reading shown

in this mode is somewhat erratic.

24

V+

12µA

3.2V

COM

28

–

N

5V

+

Logic

Section

36

DGND

P

4.21 Display Driver

TC7129

N

The TC7129 drives a triplexed LCD with three back-

planes. The LCD can include decimal points, polarity

sign, and annunciators for continuity and low battery.

Figure 4-16 shows the assignment of the display seg-

ments to the backplanes and segment drive lines. The

backplane drive frequency is obtained by dividing the

oscillator frequency by 1200. This results in a back-

plane drive frequency of 100Hz for 60Hz operation

(120kHz crystal) and 83.3Hz for 50Hz operation

(100kHz crystal).

23

V-

4.17 Low Battery

The low battery annunciator turns on when supply volt-

age between V- and V+ drops below 6.8V. The internal

zener has a threshold of 6.3V. When the supply voltage

drops below 6.8V, the transistor tied to V- turns OFF,

pulling the "Low Battery" point HIGH.

Backplane waveforms are shown in Figure 4-17.

These appear on outputs BP , BP , BP (Pins 16, 17,

1

2

3

and 18). They remain the same, regardless of the seg-

ments being driven.

4.18 Sequence and Results Counter

A sequence counter and associated control logic pro-

vide signals that operate the analog switches in the

integrator section. The comparator output from the inte-

grator gates the results counter. The results counter is

a six-section up/down decade counter, which holds the

intermediate results from each successive integration.

Other display output lines (Pins 4 through 15) have

waveforms that vary depending on the displayed val-

ues. Figure 4-18 shows a set of waveforms for the A, G,

D outputs (Pins 5, 8, 11, and 14) for several combina-

tions of "ON" segments.

The ANNUNCIATOR DRIVE output (Pin 3) is a square

wave, running at the backplane frequency (100Hz or

83.3Hz) with a peak-to-peak voltage equal to DGND

voltage. Connecting an annunciator to Pin 3 turns it

ON; connecting it to its backplane turns it OFF.

4.19 Over Range and Under Range

Outputs

When the results counter holds a value greater than

±19,999, the DP /OR output (Pin 20) is driven HIGH.

4

When the results counter value is less than ±1000, the

DP /UR output (Pin 21) is driven HIGH. Both signals

3

are valid on the falling edge of LATCH/HOLD (L/H) and

do not change until the end of the next conversion

cycle. The signals are updated at the end of each con-

version, unless the L/H input (Pin 22) is held HIGH.

Pins 20 and 21 can also be used as inputs for external

control of decimal points 3 and 4. Figure 4-14 shows a

schematic of the input/output nature of these pins.

DS21459B-page 16

2002 Microchip Technology Inc.

TC7129

FIGURE 4-16:

DISPLAY SEGMENT ASSIGNMENTS

Low Battery

Continuity

BP

1

2

Backplane

Connections

BP

3

Low Battery

Continuity

F

E

DP

4

,

D

4

,

4

3

B

C

Continuity

1

,

1

,

A

G

4

A

F

G

D

,

1

,

B

C

E

BC

DP

D

4

E

DP

1

,

1

,

F

3

B

C

Low Battery

,

2

,

A

G

A

F

G

E

D

2

3

,

2

,

B

C

MINUS

3

,

DP

2

,

3

2

,

FIGURE 4-17:

BACKPLANE

WAVEFORMS

FIGURE 4-18:

TYPICAL DISPLAY

OUTPUT WAVEFORMS

V

DD

H

b Segment

Line

BP

1

V

All Off

L

DISP

V

DD

H

a Segment

On

2

d, g Off

V

L

DISP

V

DD

H

a, g On

d Off

BP

3

V

L

DISP

V

DD

H

All On

V

L

DISP

2002 Microchip Technology Inc.

DS21459B-page 17

TC7129

5.0

5.1

PACKAGING INFORMATION

Package Marking Information

Package marking data not available a this time.

5.2

Taping Forms

Component Taping Orientation for 44-Pin PLCC Devices

User Direction of Feed

PIN 1

W

P

Standard Reel Component Orientation

for TR Suffix Device

Carrier Tape, Number of Components Per Reel and Reel Size

Package

Carrier Width (W)

Pitch (P)

Part Per Full Reel

Reel Size

44-Pin PLCC

32 mm

24 mm

500

13 in

Note: Drawing does not represent total number of pins.

Component Taping Orientation for 44-Pin PQFP Devices

User Direction of Feed

PIN 1

W

P

Standard Reel Component Orientation

for TR Suffix Device

Carrier Tape, Number of Components Per Reel and Reel Size

Package

Carrier Width (W)

Pitch (P)

Part Per Full Reel

Reel Size

44-Pin PQFP

24 mm

16 mm

500

13 in

Note: Drawing does not represent total number of pins.

DS21459B-page 18

2002 Microchip Technology Inc.

TC7129

5.3

Package Dimensions

40-Pin PDIP (Wide)

PIN 1

.555 (14.10)

.530 (13.46)

2.065 (52.45)

2.027 (51.49)

.610 (15.49)

.590 (14.99)

.200 (5.08)

.140 (3.56)

.040 (1.02)

.020 (0.51)

.015 (0.38)

.008 (0.20)

.150 (3.81)

.115 (2.92)

3° MIN.

.700 (17.78)

.610 (15.50)

.110 (2.79)

.090 (2.29)

.070 (1.78)

.045 (1.14)

.022 (0.56)

.015 (0.38)

Dimensions: inches (mm)

44-Pin PLCC

PIN 1

.021 (0.53)

.013 (0.33)

.050 (1.27) TYP.

.695 (17.65)

.685 (17.40)

.630 (16.00)

.591 (15.00)

.656 (16.66)

.650 (16.51)

.032 (0.81)

.026 (0.66)

.020 (0.51) MIN.

.656 (16.66)

.650 (16.51)

.120 (3.05)

.090 (2.29)

.695 (17.65)

.685 (17.40)

.180 (4.57)

.165 (4.19)

Dimensions: inches (mm)

2002 Microchip Technology Inc.

DS21459B-page 19

TC7129

5.3

Package Dimensions (Continued)

44-Pin PQFP

7° MAX.

.009 (0.23)

.005 (0.13)

PIN 1

.041 (1.03)

.026 (0.65)

.018 (0.45)

.012 (0.30)

.398 (10.10)

.390 (9.90)

.557 (14.15)

.537 (13.65)

.031 (0.80) TYP.

.010 (0.25) TYP.

.398 (10.10)

.390 (9.90)

.083 (2.10)

.075 (1.90)

.557 (14.15)

.537 (13.65)

.096 (2.45) MAX.

Dimensions: inches (mm)

DS21459B-page 20

2002 Microchip Technology Inc.

TC7129

NOTES:

2002 Microchip Technology Inc.

DS21459B-page 21

TC7129

SALES AND SUPPORT

Data Sheets

Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recom-

mended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:

1. Your local Microchip sales office

2. The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277

3. The Microchip Worldwide Site (www.microchip.com)

Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.

New Customer Notification System

Register on our web site (www.microchip.com/cn) to receive the most current information on our products.

DS21459B-page 22

2002 Microchip Technology Inc.

TC7129

Information contained in this publication regarding device

applications and the like is intended through suggestion only

and may be superseded by updates. It is your responsibility to

ensure that your application meets with your specifications.

No representation or warranty is given and no liability is

assumed by Microchip Technology Incorporated with respect

to the accuracy or use of such information, or infringement of

patents or other intellectual property rights arising from such

use or otherwise. Use of Microchip’s products as critical com-

ponents in life support systems is not authorized except with

express written approval by Microchip. No licenses are con-

veyed, implicitly or otherwise, under any intellectual property

rights.

Trademarks

The Microchip name and logo, the Microchip logo, FilterLab,

KEELOQ, microID, MPLAB, PIC, PICmicro, PICMASTER,

PICSTART, PRO MATE, SEEVAL and The Embedded Control

Solutions Company are registered trademarks of Microchip Tech-

nology Incorporated in the U.S.A. and other countries.

dsPIC, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB,

In-Circuit Serial Programming, ICSP, ICEPIC, microPort,

Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM,

MXDEV, PICC, PICDEM, PICDEM.net, rfPIC, Select Mode

and Total Endurance are trademarks of Microchip Technology

Incorporated in the U.S.A.

Serialized Quick Turn Programming (SQTP) is a service mark

of Microchip Technology Incorporated in the U.S.A.

All other trademarks mentioned herein are property of their

respective companies.

Printed on recycled paper.

Microchip received QS-9000 quality system

certification for its worldwide headquarters,

design and wafer fabrication facilities in

Chandler and Tempe, Arizona in July 1999

and Mountain View, California in March 2002.

The Company’s quality system processes and

procedures are QS-9000 compliant for its

PICmicro^®8-bit MCUs, KEELOQ^®code hopping

devices, Serial EEPROMs, microperipherals,

non-volatile memory and analog products. In

addition, Microchip’s quality system for the

design and manufacture of development

systems is ISO 9001 certified.

2002 Microchip Technology Inc.

DS21459B-page 23

WORLDWIDE SALES AND SERVICE

Japan

AMERICAS

ASIA/PACIFIC

Microchip Technology Japan K.K.

Benex S-1 6F

3-18-20, Shinyokohama

Kohoku-Ku, Yokohama-shi

Kanagawa, 222-0033, Japan

Tel: 81-45-471- 6166 Fax: 81-45-471-6122

Corporate Office

Australia

2355 West Chandler Blvd.

Microchip Technology Australia Pty Ltd

Suite 22, 41 Rawson Street

Epping 2121, NSW

Chandler, AZ 85224-6199

Tel: 480-792-7200 Fax: 480-792-7277

Technical Support: 480-792-7627

Web Address: http://www.microchip.com

Australia

Tel: 61-2-9868-6733 Fax: 61-2-9868-6755

Korea

Rocky Mountain

China - Beijing

Microchip Technology Korea

168-1, Youngbo Bldg. 3 Floor

Samsung-Dong, Kangnam-Ku

Seoul, Korea 135-882

2355 West Chandler Blvd.

Chandler, AZ 85224-6199

Tel: 480-792-7966 Fax: 480-792-7456

Microchip Technology Consulting (Shanghai)

Co., Ltd., Beijing Liaison Office

Unit 915

Bei Hai Wan Tai Bldg.

Atlanta

500 Sugar Mill Road, Suite 200B

Atlanta, GA 30350

Tel: 770-640-0034 Fax: 770-640-0307

Boston

2 Lan Drive, Suite 120

Westford, MA 01886

Tel: 978-692-3848 Fax: 978-692-3821

Tel: 82-2-554-7200 Fax: 82-2-558-5934

Singapore

Microchip Technology Singapore Pte Ltd.

200 Middle Road

#07-02 Prime Centre

No. 6 Chaoyangmen Beidajie

Beijing, 100027, No. China

Tel: 86-10-85282100 Fax: 86-10-85282104

China - Chengdu

Microchip Technology Consulting (Shanghai)

Co., Ltd., Chengdu Liaison Office

Rm. 2401, 24th Floor,

Ming Xing Financial Tower

No. 88 TIDU Street

Singapore, 188980

Tel: 65-6334-8870 Fax: 65-6334-8850

Taiwan

Microchip Technology Taiwan

11F-3, No. 207

Tung Hua North Road

Taipei, 105, Taiwan

Tel: 886-2-2717-7175 Fax: 886-2-2545-0139

Chicago

333 Pierce Road, Suite 180

Itasca, IL 60143

Chengdu 610016, China

Tel: 86-28-6766200 Fax: 86-28-6766599

Tel: 630-285-0071 Fax: 630-285-0075

China - Fuzhou

Dallas

Microchip Technology Consulting (Shanghai)

Co., Ltd., Fuzhou Liaison Office

Unit 28F, World Trade Plaza

No. 71 Wusi Road

Fuzhou 350001, China

4570 Westgrove Drive, Suite 160

Addison, TX 75001

EUROPE

Denmark

Microchip Technology Nordic ApS

Regus Business Centre

Lautrup hoj 1-3

Ballerup DK-2750 Denmark

Tel: 45 4420 9895 Fax: 45 4420 9910

Tel: 972-818-7423 Fax: 972-818-2924

Detroit

Tri-Atria Office Building

32255 Northwestern Highway, Suite 190

Farmington Hills, MI 48334

Tel: 248-538-2250 Fax: 248-538-2260

Tel: 86-591-7503506 Fax: 86-591-7503521

China - Shanghai

Microchip Technology Consulting (Shanghai)

Co., Ltd.

Room 701, Bldg. B

Far East International Plaza

No. 317 Xian Xia Road

Shanghai, 200051

Tel: 86-21-6275-5700 Fax: 86-21-6275-5060

Kokomo

France

2767 S. Albright Road

Kokomo, Indiana 46902

Tel: 765-864-8360 Fax: 765-864-8387

Los Angeles

Microchip Technology SARL

Parc d’Activite du Moulin de Massy

43 Rue du Saule Trapu

Batiment A - ler Etage

91300 Massy, France

Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79

Germany

Microchip Technology GmbH

Gustav-Heinemann Ring 125

D-81739 Munich, Germany

Tel: 49-89-627-144 0 Fax: 49-89-627-144-44

18201 Von Karman, Suite 1090

Irvine, CA 92612

Tel: 949-263-1888 Fax: 949-263-1338

China - Shenzhen

Microchip Technology Consulting (Shanghai)

Co., Ltd., Shenzhen Liaison Office

Rm. 1315, 13/F, Shenzhen Kerry Centre,

Renminnan Lu

Shenzhen 518001, China

Tel: 86-755-2350361 Fax: 86-755-2366086

New York

150 Motor Parkway, Suite 202

Hauppauge, NY 11788

Tel: 631-273-5305 Fax: 631-273-5335

San Jose

Microchip Technology Inc.

2107 North First Street, Suite 590

San Jose, CA 95131

Tel: 408-436-7950 Fax: 408-436-7955

Toronto

Hong Kong

Italy

Microchip Technology Hongkong Ltd.

Unit 901-6, Tower 2, Metroplaza

223 Hing Fong Road

Kwai Fong, N.T., Hong Kong

Tel: 852-2401-1200 Fax: 852-2401-3431

Microchip Technology SRL

Centro Direzionale Colleoni

Palazzo Taurus 1 V. Le Colleoni 1

20041 Agrate Brianza

Milan, Italy

6285 Northam Drive, Suite 108

Mississauga, Ontario L4V 1X5, Canada

Tel: 905-673-0699 Fax: 905-673-6509

India

Tel: 39-039-65791-1 Fax: 39-039-6899883

United Kingdom

Arizona Microchip Technology Ltd.

505 Eskdale Road

Winnersh Triangle

Wokingham

Berkshire, England RG41 5TU

Tel: 44 118 921 5869 Fax: 44-118 921-5820

Microchip Technology Inc.

India Liaison Office

Divyasree Chambers

1 Floor, Wing A (A3/A4)

No. 11, O’Shaugnessey Road

Bangalore, 560 025, India

Tel: 91-80-2290061 Fax: 91-80-2290062

03/01/02

DS21459B-page 24

2002 Microchip Technology Inc.


型号：	TC7129IPL
厂家：	MICROCHIP
描述：	1-CH DUAL-SLOPE ADC, PDIP40, 0.600 INCH, MO-011, PLASTIC, DIP-40 驱动器转换器 CD
文件：	总24页 (文件大小：550K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

TC7129IPL [MICROCHIP]

相关型号：

TC7129IPL713

TC7129_06

TC7129_13

TC7135

TC7135

TC7135C/KW

TC7135C/LI

TC7135C/PI

TC7135CBU

TC7135CBU

TC7135CBUTR

TC7135CKW