HV9911NG-G [MICROCHIP]
LED DISPLAY DRIVER, PDSO16;
| 型号： | HV9911NG-G |
| 厂家： | 
MICROCHIP |
| 描述： | LED DISPLAY DRIVER, PDSO16 驱动 光电二极管 接口集成电路 |
| 文件： | 总22页 (文件大小：856K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HV9911
Switch-Mode LED Driver IC with High Current Accuracy
Features
General Description
The HV9911 is an LED driver IC designed to control
single-switch PWM converters (buck, boost,
buck-boost and SEPIC) in a Constant Frequency or
Constant Off-time mode. The controller uses a peak
current control scheme with programmable slope
• Switch-mode Controller for Single-switch Drivers:
- Buck
- Boost
- Buck-boost
- SEPIC
compensation
and
includes
an
internal
transconductance amplifier to control the output current
in closed loop, enabling high output current accuracy.
In the Constant Frequency mode, multiple HV9911s
can be synchronized with each other or with an
external clock using the sync pin. Programmable
MOSFET current limit enables current limiting during
Input Undervoltage and Output Overload conditions.
The IC also includes a 0.2A source and 0.4A sink gate
driver for high-power applications. An internal
9V–250V linear regulator powers the IC, eliminating the
need for a separate power supply. The HV9911
provides a TTL-compatible PWM dimming input that
can accept an external control signal with a duty ratio
of 0%–100% and a frequency of up to a few kilohertz.
The IC also provides a FAULT output which, can be
used to disconnect the LEDs in case of a Fault
condition, using an external disconnect FET.
• Works with High-side Current Sensing
• Closed-loop Control of Output Current
• High Pulse-Width Modulation (PWM) Dimming
Ratio
• Internal 250V Linear Regulator (can be extended
using external Zener Diodes)
• Internal 2% Voltage Reference (0°C < TA < 85°C)
• Constant Frequency or Constant Off-time
Operation
• Programmable Slope Compensation
• Logic Input for Enable and PWM Dimming
• +0.2A/-0.4A Gate Driver
• Output Short-circuit Protection
• Output Overvoltage Protection
• Synchronization Capability
• Programmable Metal-Oxide Semiconductor
Field-Effect Transistor (MOSFET) Current Limit
The HV9911-based LED driver is ideal for RGB
backlight applications with DC inputs. HV9911-based
LED lamp drivers can achieve efficiency in excess of
90% for buck and boost applications.
Applications
• RGB Backlight Applications
• Battery-powered LED Lamps
• Other DC/DC LED Drivers
Package Type
16-lead SOIC
(Top view)
1
2
3
4
5
6
7
8
16
VIN
FDBK
IREF
15
14
13
12
11
10
9
VDD
GATE
COMP
PWMD
OVP
GND
CS
SC
FAULT
REF
RT
SYNC
CLIM
See Table 2-1 for pin information.
2017 Microchip Technology Inc.
DS20005580A-page 1
HV9911
Functional Block Diagram
Linear
Regulator
Vbg
REF
VIN
POR
VDD
GATE
FAULT
_
+
CLIM
DIS
Blanking
100ns
CS
SC
+
_
Q
R
S
1:2
+
ramp
R
S
POR
_
Q
Q
_
+
VBG
OVP
+
_
DIS
Gm
_
+
FDBK
IREF
13R
SYNC
RT
R
One Shot
COMP
DIS
2
PWMD
DS20005580A-page 2
2017 Microchip Technology Inc.
HV9911
Typical Application Circuit (Boost)
L1
D1
Q1
CIN
ROVP1
CO
VIN
GATE
1
3
CDD
RSC
RCS
ROVP2
2
4
5
VDD
GND
CS
OVP
SC
12
11
16
14
13
8
RSLOPE
RT
6
7
SC
RT
FAULT
Q2
HV9911
FDBK
COMP
CREF
CC
RS
REF
10
9
CLIM
IREF
PWMD
SYNC
RL2
RL1
RR1
15
RR2
Typical Application Circuit (Buck)
RS
CIN
HV7800
CO
D1
1
12
11
3
VIN
OVP
CDD
L1
2
4
VDD
GND
FAULT
GATE
CS
Q1
RSLOPE
RT
5
6
7
SC
RT
RSC
CC
HV9911
RCS
14
16
13
8
COMP
FDBK
PWMD
SYNC
CREF
REF
10
9
CLIM
IREF
RL2
RL1
RR1
15
RR2
2017 Microchip Technology Inc.
DS20005580A-page 3
HV9911
Typical Application Circuit (SEPIC)
L1
D1
C1
Q1
CIN
ROVP1
L2
CO
GATE
1
2
4
VIN
3
CDD
RSC
RCS
ROVP2
5
VDD
GND
CS
12
11
16
14
13
8
OVP
RSLOPE
RT
HV9911FAULT
6
7
SC
RT
Q2
FDBK
CC
CREF
RS
REF
10
9
COMP
PWMD
SYNC
RL2
CLIM
IREF
RL1
RR1
15
RR2
DS20005580A-page 4
2017 Microchip Technology Inc.
HV9911
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings †
VIN to GND................................................................................................................................................ –0.5 to +250V
VDD to GND............................................................................................................................................–0.3V to +13.5V
CS to GND......................................................................................................................................–0.3V to (VDD+0.3V)
PWMD to GND................................................................................................................................–0.3V to (VDD+0.3V)
Gate to GND ...................................................................................................................................–0.3V to (VDD+0.3V)
All Other Pins to GND .....................................................................................................................–0.3V to (VDD+0.3V)
Continuous Power Dissipation (TA= +25°C; Derate 10 mW/°C above +25°C) ................................................ 1000 mW
Operating Ambient Temperature, TA .......................................................................................................–40°C to +85°C
Maximum Junction Temperature, TJ(MAX) ...........................................................................................................+125°C
Storage Temperature, TS ......................................................................................................................–65°C to +150°C
† Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only, and functional operation of the device at those or any other conditions above those
indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for
extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
Electrical Specifications: TA = 25°C and VIN = 24V unless otherwise specified.
Parameter
Sym.
Min.
Typ. Max.
Unit
Conditions
INPUT
Input DC Supply Voltage Range
Shutdown Mode Supply Current
INTERNAL REGULATOR
VINDC
IINSD
Note 2
—
1
250
1.5
V
DC input voltage (Note 1)
PWMD connected to GND,
VIN = 24V (Note 1)
—
mA
VIN = 9V–250V, IDD(EXT) = 0,
PWMD connected to GND
(Note 1)
Internally Regulated Voltage
VDD
7.25
7.75 8.25
V
VDD Undervoltage Lockout
Threshold
UVLO
∆UVLO
VDD(EXT)
6.65
—
6.9
500
—
7.2
—
V
mV
V
VDD Rising
VDD Undervoltage Lockout
Hysteresis
Steady State External Voltage that
can be applied at the VDD Pin
—
12
Note 3
REFERENCE
REF bypassed with a 0.1 µF
capacitor to GND, IREF = 0,
VDD = 7.75V, PWMD = GND
(Note 1)
REF Pin Voltage
VREF
1.225 1.25 1.275
V
REF bypassed with a 0.1 µF
capacitor to GND, IREF = 0,
VDD = 7.25V–12V,
Line Regulation of Reference
Voltage
VREFLINE
0
—
20
mV
PWMD = GND
Note 1: Denotes specifications which apply over the full operating ambient temperature range of
–40°C < TA < +85°C
2: See Section 3.3 “Minimum Input Voltage at VIN Pin” for minimum input voltage.
3: Parameters might not be within specifications if the external VDD voltage is greater than VDD(EXT) or if VDD
is less than 7.25V.
4: For design guidance only
2017 Microchip Technology Inc.
DS20005580A-page 5
HV9911
ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Specifications: TA = 25°C and VIN = 24V unless otherwise specified.
Parameter
Sym.
Min.
Typ. Max.
Unit
Conditions
REF bypassed with a 0.1 µF
capacitor to GND,
IREF = 0µ–500µ,
Load Regulation of Reference
Voltage
VREFLOAD
0
—
10
mV
PWMD = GND
PMW DIMMING
PWMD Input Low Voltage
PWMD Input High Voltage
PWMD Pull-down Resistance
GATE
VPWMD(LO)
VPWMD(HI)
RPWMD
—
2
—
—
0.8
—
V
V
VDD = 7.25V–12V (Note 1)
VDD = 7.25V–12V (Note 1)
VPWMD = 5V
50
100
150
kΩ
Gate Short-circuit Current
Gate Sinking Current
Gate Output Rise Time
Gate Output Fall Time
OVERVOLTAGE PROTECTION
ISOURCE
ISINK
0.2
0.4
—
—
—
50
25
—
—
85
45
A
A
VGATE = 0V, VDD = 7.75V
VGATE = 7.75V, VDD = 7.75V
CGATE = 1 nF, VDD = 7.75V
CGATE = 1 nF, VDD = 7.75V
TRISE
TFALL
ns
ns
—
VDD = 7.25V–12V,
OVP rising (Note 1)
IC Shutdown Voltage
VOVP
1.215 1.25 1.285
V
CURRENT SENSE
Leading Edge Blanking
TBLANK
100
—
—
—
375
180
ns
ns
COMP = VDD, CLIM = REF,
VCS = 0 mV to 600 mV
(step up)
Delay to Output of COMP Compara-
tor
TDELAY1
COMP = VDD
CLIM = 300 mV, VCS = 0 mV to
400 mV (step up)
,
Delay to Output of CLIMIT Compara-
tor
TDELAY2
VOFFSET
—
—
—
180
10
ns
Comparator Offset Voltage
–10
mV
INTERNAL TRANSCONDUCTANCE OPAMP
75 pF capacitance at COMP
pin (Note 4)
Gain Bandwidth Product
GB
—
1
—
MHz
Open-loop DC Gain
Input Common Mode Range
Output Voltage Range
Transconductance
Input Offset Voltage
Input Bias Current
AV
VCM
66
–0.3
0.7
340
–2
—
—
—
3
dB
V
Output open
Note 4
VO
—
6.75
530
4
—
VDD = 7.75V (Note 4)
gm
435
—
µA/V
mV
nA
VOFFSET
IBIAS
—
0.5
1
Note 4
OSCILLATOR
fOSC1
fOSC2
88
308
—
100
350
90
112
392
—
kHz RT = 909 kΩ (Note 1)
Oscillator Frequency
kHz RT = 261 kΩ (Note 1)
Maximum Duty Cycle
Sync Output Current
Sync Input Current
DMAX
%
IOUTSYNC
IINSYNC
—
10
20
µA
0
—
200
µA
VSYNC < 0.1V
Note 1: Denotes specifications which apply over the full operating ambient temperature range of
–40°C < TA < +85°C
2: See Section 3.3 “Minimum Input Voltage at VIN Pin” for minimum input voltage.
3: Parameters might not be within specifications if the external VDD voltage is greater than VDD(EXT) or if VDD
is less than 7.25V.
4: For design guidance only
DS20005580A-page 6
2017 Microchip Technology Inc.
HV9911
ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Specifications: TA = 25°C and VIN = 24V unless otherwise specified.
Parameter
Sym.
Min.
Typ. Max.
Unit
Conditions
OUTPUT SHORT CIRCUIT
IREF = 200 mV,
FDBK = 450 mV, FAULT goes
Propagation Time for Short-circuit
TOFF
—
—
250
ns
Detection
from high to low
Fault Output Rise Time
TRISE, FAULT
TFALL, FAULT
GFAULT
—
—
—
—
2
300
200
2.2
ns
ns
—
1 nF capacitor at FAULT pin
1 nF capacitor at FAULT pin
IREF = 200 mV
Fault Output Fall Time
Amplifier Gain at IREF Pin
SLOPE COMPENSATION
Current sourced out of SC Pin
1.8
ISLOPE
0
—
2
100
2.2
µA
—
ISLOPE = 50 µA,
RCSENSE= 1 kΩ
Internal Current Mirror Ratio
GSLOPE
1.8
Note 1: Denotes specifications which apply over the full operating ambient temperature range of
–40°C < TA < +85°C
2: See Section 3.3 “Minimum Input Voltage at VIN Pin” for minimum input voltage.
3: Parameters might not be within specifications if the external VDD voltage is greater than VDD(EXT) or if VDD
is less than 7.25V.
4: For design guidance only
TEMPERATURE SPECIFICATIONS
Temperature Characteristics: Unless otherwise noted, for all specifications TA =TJ = +25°C.
Parameter
Sym.
Min.
Typ.
Max.
Unit
Conditions
TEMPERATURE RANGE
Operating Ambient Temperature
Maximum Junction Temperature
Storage Temperature
TA
TJ(MAX)
Ts
–40
—
—
—
—
+85
+125
+150
°C
°C
°C
–65
PACKAGE THERMAL RESISTANCE
16-lead SOIC
JA
—
83
—
°C/W
2017 Microchip Technology Inc.
DS20005580A-page 7
HV9911
2.0
PIN DESCRIPTION
Table 2-1 shows the description of pins in HV9911.
Refer to Package Type for the location of pins.
TABLE 2-1:
PIN DESCRIPTION TABLE
Pin Number
Pin Name
Description
1
2
3
4
VIN
VDD
Gate
GND
This pin is the input of a 250V high-voltage regulator.
This is a power supply pin for all internal circuits. It must be bypassed with a low
ESR capacitor to GND (at least 0.1 uF).
This pin is the output gate driver for an external N-channel power MOSFET.
This is the ground return for all circuits. This pin must be connected to the return
path from the input.
This pin is used to sense the drain current of the external power FET. It includes a
built-in 100 ns (minimum) blanking time.
5
6
CS
SC
This is slope compensation for current sense. A resistor between SC and GND will
program the slope compensation. In case of constant Off-time mode of operation,
slope compensation is unnecessary and the pin can be left open.
This pin sets the frequency or the off-time of the power circuit. A resistor between
RT and GND will program the circuit in Constant Frequency mode. A resistor
between RT and gate will program the circuit in a constant Off-time mode.
7
RT
This I/O pin may be connected to the sync pin of other HV9911 circuits and will
cause the oscillators to lock to the highest frequency oscillator.
8
9
Sync
CLIM
REF
This pin provides a programmable input current limit for the converter. The current
limit can be set by using a resistor divider from the REF pin.
This pin provides 2% accurate reference voltage. It must be bypassed with at least a
10 nF–0.22 µF capacitor to GND.
10
This pin is pulled to ground when there is an Output Short-circuit condition or Output
Overvoltage condition. This pin can be used to drive an external MOSFET in the
case of boost converters to disconnect the load from the source.
11
12
FAULT
OVP
This pin provides the overvoltage protection for the converter. When the voltage at
this pin exceeds 1.25V, the gate output of the HV9911 is turned off and FAULT goes
low. The IC will turn on when the power is recycled.
When this pin is pulled to GND (or left open), switching of the HV9911 is disabled.
When an external TTL high level is applied to it, switching will resume.
13
14
15
16
PWMD
COMP
IREF
Stable closed-loop control can be accomplished by connecting a compensation net-
work between COMP and GND.
The voltage at this pin sets the output current level. The current reference can be set
using a resistor divider from the REF pin.
This pin provides output current feedback to the HV9911 by using a current sense
resistor.
FDBK
DS20005580A-page 8
2017 Microchip Technology Inc.
HV9911
The typical waveform of the current being sourced out
of gate is illustrated in Figure 3-1. Figure 3-2 shows the
equivalent circuit of the gate driver and the external
FET. The values of VDD and RGATE for the HV9911 are
7.75V and 40ꢀ, respectively.
3.0
3.1
DETAILED DESCRIPTION
Power Topology
The built-in linear regulator of the HV9911 can operate
up to 250V at the VIN pin. The linear regulator provides
an internally regulated voltage of 7.75V (typical) at VDD
if the input voltage is within 9V to 250V. This voltage is
used to power the IC and also provide the power to
external circuits connected at the VDD and VREF pins.
This linear regulator can be turned off by overdriving
the VDD pin using an external bootstrap circuit at
voltages higher than 8.25V (up to 12V).
Note: The equations given below are approxima-
tions and are to be used for estimation pur-
poses only. The actual values will likely differ
from the computed values.
Consider the case when the external FET is FDS3692
and the switching frequency is fS = 200 kHz with an
LED string voltage VO = 80V. With the FET’s
specifications, the following parameters can be
determined:
In practice, the input voltage range of the IC is limited
by the current drawn by the IC. Thus, it becomes
important to determine the current drawn by the IC to
find out the maximum and minimum operating voltages
at the VIN pin. The main component of the current
drawn by the IC is the current drawn by the switching
FET driver at the gate pin. To estimate this current, we
need to know a few parameters of the FET being used
in the design and the switching frequency.
CISS = 746pF
CGD = CRSS = 27pF
CGS = CISS – CGD
VTH = 3V
= 719pF
IPK
I1
Iavg
t1
0
t2
t3
FIGURE 3-1:
Current Sourced Out of Gate at FET Turn-on Driver.
CGD
RGATE
VDD
CGS
HV9911
FIGURE 3-2:
Equivalent Circuit of the Gate Driver.
2017 Microchip Technology Inc.
DS20005580A-page 9
HV9911
When the external FET is being turned on, current is
being sourced out of the gate, and that current is being
drawn from the input. Thus, the average current drawn
from VDD (and from VIN) needs to be computed.
Without going into the details of the FET operation, the
various values in the graph in Figure 3-1 can be
computed as specified in Table 3-1.
3.2
Maximum Input Voltage at VIN Pin
Computed using the Power
Dissipation Limit
When the regulator is drawing about 2.8 mA, the
maximum input voltage that the HV9911 can withstand
without damage will depend on the ambient
temperature. If we consider an ambient temperature of
40°C, the power dissipation in the package cannot
exceed the PMAX in Equation 3-1:
TABLE 3-1:
Value
Parameter
Formula
(foragiven
example)
EQUATION 3-1:
IPK
I1
VDD/RGATE
193.75 mA
118.75 mA
14.61 ns
17.5 ns
PMAX = 1000mW – 10mW 40C – 25C
= 850mW
(VDD – VTH)/RGATE
t1
–RGATE x CISS x In (I1/IPK)
The above equation is based on package power
dissipation limits as indicated in the Absolute
Maximum Ratings † of this data sheet.
t2
[(VO – VTH) x CGD]/I1 ( 1)
[(VIN – VTH) x GD]/I1 ( 2)
2.3 x RGATE x CGS
t3
66 ns
To dissipate a maximum power of 850 mW in the
package, the maximum input voltage cannot exceed
the value in Equation 3-2:
Iavg
[I1 x (t1 + t2) + 0.5 x (IPK – I1) x
t1 + 0.5 x I1 x t3] x fS
1.66 mA
Note 1: For a boost converter
2: For a buck converter
EQUATION 3-2:
The total current being drawn from the linear regulator
for a typical HV9911 circuit can be computed as shown
in Table 3-2.
VINMAX = PMAX ITOTAL
= 296V
TABLE 3-2:
Since the maximum voltage is far greater than the
actual input voltage of 24V, power dissipation will not
be a problem for this design.
Typical
Value ( 2)
Current
Formula
Quiescent Current
1000 µA
1000 µA
For this design, at 24V input, the increase in the
junction temperature of the IC (over ambient) is
determined as show in Equation 3-3:
Current sourced
out of REF pin
(VREF/RL1 + RL2) +
(VREF/RR1 + RR2
100 µA
13.25 µA
30.8 µA
61.6 µA
1660 µA
)
Current sourced
out of RT pin
6V/RT
EQUATION 3-3:
Current sourced
out of SC pin ( 1)
(1/2) x (2.5V/RSLOPE
2.5V/RSLOPE
IAVG
)
= VIN ITOTAL ja
= 5.64C
Current sourced
out of CS pin ( 1)
Where:
Current drawn by
FET Gate Driver
θja is the junction to ambient thermal impedance
Total Current
of HV9911’s 16-lead SOIC package.
drawn from the
Linear Regulator
2.865 mA
Note 1: For a Discontinuous mode converter, the
currents sourced out of the SC and CS pins will
be zero.
2: The values provided are based on the
Continuous Conduction mode boost design in
the Microchip application note, “AN-H55 Boost
Converter LED Drivers Using the HV9911.”
DS20005580A-page 10
2017 Microchip Technology Inc.
HV9911
3.3
Minimum Input Voltage at VIN Pin
Note:
In some cases, if the gate drive draws too
much current, VIN(START) might be less
than VIN(STOP). In such cases, the control
IC will oscillate between on and off if the
input voltage is between the start and stop
voltages. In these circumstances, it is rec-
ommended that the input voltage be kept
higher than VIN(STOP).
The minimum input voltage at which the converter will
start and stop depends on the minimum voltage drop
required for the linear regulator. The internal linear
regulator will control the voltage at the VDD pin when
VIN is between 9V and 250V. However, when VIN is less
than 9V, the converter will still function as long as VDD
is greater than the undervoltage lockout. Thus, the
converter might be able to start at input voltages lower
than 9V. The start/stop voltages at the VIN pin can be
determined using the minimum voltage drop across the
linear regulator as a function of the current drawn. This
data is shown in Figure 3-3 for different junction
temperatures.
3.4
Reference
The HV9911 includes a 2% accurate 1.25V reference,
which can be used as the reference for the output
current as well as to set the switch current limit. This
reference is also used internally to set the overvoltage
protection threshold. The reference is buffered so that
it can deliver a maximum of 500 µA external current to
drive the external circuitry. The reference should be
bypassed with at least a 10 nF low ESR capacitor.
14
-40°C
13
12
11
25°C
10
Note:
To avoid abnormal startup conditions, the
bypass capacitor at the REF pin should
not exceed 0.22 µF.
9
85°C
8
125°C
7
6
5
4
3
2
1
0
3.5
Oscillator
The oscillator can be set in two ways. Connecting the
oscillator resistor between the RT and gate pins will
program the off-time. Connecting the resistor between
RT and GND will program the time period.
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
2.2
2.4
Minimum drop in Linear Regulator (V)
In both cases, resistor RT sets the current, which
charges an internal oscillator capacitor. The capacitor
voltage ramps up linearly and when the voltage
FIGURE 3-3:
vs. Minimum Voltage Drop Across Linear
Regulator for Different Junction Temperatures.
Graph of the Input Current
increases beyond the internal set voltage,
a
comparator triggers the set input of the internal SR
flip-flop. This starts the next switching cycle. The time
period of the oscillator can be computed as shown in
Equation 3-6.
Assume a maximum junction temperature of 85°C
(this gives a reasonable temperature rise of 45°C at an
ambient temperature of 40°C). At 2.86 mA input
current, the minimum voltage drop from Figure 3-3 can
be approximately estimated to be VDROP = 0.75V.
However, before the IC starts switching, the current
drawn will be the total current minus the gate drive
current. In this case, that current is IQ_TOTAL = 1.2 mA.
At this current level, the voltage drop is approximately
VDROP1 = 0.4V. Thus, the start/stop VIN voltages can be
computed as demonstrated in Equation 3-4 and
Equation 3-5 below.
EQUATION 3-6:
TS RT 11pF
3.6
Slope Compensation
For converters operating in the Constant Frequency
mode, slope compensation becomes necessary to
ensure stability of the Peak Current mode controller, if
the operating duty cycle is greater than 50%. Choosing
a slope compensation which is one half of the down
slope of the inductor current ensures that the converter
will be stable for all duty cycles.
EQUATION 3-4:
VINSTART = UVLOMAX + VDROP1
= 7.2V + 0.4V
= 7.60V
Slope compensation can be programmed by two
resistors RSLOPE and RSC. Assuming a down slope of
DS (A/µs) for the inductor current, the slope
compensation resistors can be computed as illustrated
in Equation 3-7.
EQUATION 3-5:
V
INSTOP= UVLOMAX – 0.5V + VDROP
= 7.2V – 0.5V + 0.75V
= 7.45V
2017 Microchip Technology Inc.
DS20005580A-page 11
HV9911
EQUATION 3-7:
3.9
Fault Protection
RSLOPE = 10 RSC DS 106 TS RCS
The HV9911 has
a built-in output overvoltage
protection and output short-circuit protection. Both
protection features are latched, which means that the
power to the IC must be recycled to reset the IC. The
IC also includes a FAULT pin which goes low during
any Fault condition. At startup, a monoshot circuit
(triggered by the POR circuit) resets an internal flip-flop
which causes FAULT to go high and remains high
during normal operation. This also allows the gate drive
to function normally. This pin can be used to drive an
external disconnect switch (Q2 in the Typical
Application Circuit (Boost)) which will disconnect the
load during a Fault condition. This disconnect switch is
very important in a boost converter, as turning off the
switching FET (Q1) during an Output Short-circuit
condition will not remove the fault (Q1 is not in the path
of the fault current). The disconnect switch will help to
disconnect the shorted load from the input.
A typical value for RSC is 499ꢀ.
Note:
The maximum current that can be sourced
out of the SC pin is 100 µA. This limits the
minimum value of the RSLOPE resistor to
25 kꢀ. If the equation for slope
compensation produces
a
value of
RSLOPE less than this value, then RSC
would have to be increased accordingly. It
is recommended that RSLOPE be chosen
within the range of 25 kꢀ–50 kꢀ.
3.7
Current Sense
The current sense input of the HV9911 includes a
built-in 100 ns (minimum) blanking time to prevent
spurious turn off due to the initial current spike when
the FET turns on.
3.10 Overvoltage Protection
Overvoltage protection is achieved by connecting the
output voltage to the OVP pin through a resistive
divider. The voltage at the OVP pin is constantly
compared to the internal 1.25V. When the voltage at
this pin exceeds 1.25V, the IC is turned off and FAULT
goes low.
The HV9911 includes two high-speed comparators—
one is used during normal operation and the other is
used to limit the maximum input current during Input
Undervoltage or Overload conditions.
The IC includes an internal resistor divider network,
which steps down the voltage at the COMP pin by a
factor of 15. This stepped-down voltage is given to one
of the comparators as the current reference. The
reference to the other comparator, which acts to limit
the maximum inductor current, is given externally.
3.11 Output Short-circuit Protection
The output short circuit condition is indicated by FAULT.
As mentioned earlier, at startup, a monoshot circuit
(triggered by the POR circuit) resets an internal
flip-flop, which causes FAULT to go high and remains
high during normal operation. This also makes the gate
drive function normally.
It is recommended that the sense resistor RCS be
chosen so as to provide about 250 mV current sense
signal.
The steady state current is reflected in the reference
voltage connected to the transconductance amplifier.
The instantaneous output current is sensed from the
FDBK terminal of the amplifier. The short circuit
threshold current is internally set to 200% of the
steady-state current.
3.8
Current Limit
Current limit has to be set by a resistor divider from the
1.25V reference available on the IC. Assuming a
maximum operating inductor current Ipk (including the
ripple current), the voltage at the CLIM pin can be set
as shown in Equation 3-8.
During Short-circuit condition, when the current
exceeds the internally set threshold, the SR flip-flop is
set and FAULT goes low. At the same time, the gate
driver of the power FET is inhibited, providing a latching
protection. The system can be reset by cycling the
input voltage to the IC.
EQUATION 3-8:
VCLIM 1.2 IPK RCS + 5 RSC RSLOPE 0.9
Note:
The short circuit FET should be connected
before the current sense resistor as
reversing RS and Q2 will affect the accu-
racy of the output current (due to the addi-
tional voltage drop across Q2 which will be
sensed).
Note that this equation assumes a current limit at 120%
of the maximum input current. Also, if VCLIM is greater
than 450 mV, the saturation of the internal opamp will
determine the limit on the input current rather than the
CLIM pin. In such a case, the sense resistor RCS
should be reduced until VCLIM reduces below 450 mV.
It is recommended that no capacitor be connected
between CLIM and GND.
DS20005580A-page 12
2017 Microchip Technology Inc.
HV9911
3.12 Synchronization
3.14 Linear Dimming
The sync pin is an input/output (I/O) port to a fault
Linear dimming can be achieved by varying the voltage
at the IREF pin, as the output current is proportional to
the voltage at the IREF pin. This can be done either by
using a potentiometer from the IREF pin or applying an
external voltage source to the IREF pin.
tolerant
peer-to-peer
and/or
master
clock
synchronization circuit. For synchronization, the sync
pins of multiple HV9911-based converters can be
connected together and may also be connected to the
open drain output of a master clock. When connected
in this manner, the oscillators will lock to the device with
the highest operating frequency. When synchronizing
multiple ICs, it is recommended that the same timing
resistor corresponding to the switching frequency be
used in all the HV9911 circuits.
Note:
Due to the offset voltage of the transcon-
ductance opamp, pulling the IREF pin very
close to GND will cause the internal short
circuit comparator to trigger and shut
down the IC. This limits the linear dimming
range of the IC. However, a 1:10 linear
dimming range can be easily obtained. It
is recommended that the PWMD pin be
used to get zero output current rather than
pull the IREF pin to GND.
Due to the length of the connecting lines for the sync
pins, a resistor between sync and GND may be
required to damp any ringing due to parasitic
capacitances on rare occasions. It is recommended
that the resistor chosen be greater than 300 kꢀ.
When synchronized in this manner, a permanent High
or Low condition on the sync pin will result in a loss of
synchronization, but the HV9911-based converters will
continue to operate at their individually set operating
frequencies. Since loss of synchronization will not
result in a total system failure, the sync pin is
considered fault tolerant.
3.15 PWM Dimming
PWM dimming can be achieved by driving the PWMD
pin with a TTL-compatible source. The PWM signal is
connected internally to three different nodes—the
transconductance amplifier, the FAULT output and the
gate output.
When the PWMD signal is high, the gate and FAULT
pins are enabled, and the transconductance opamp’s
output is connected to the external compensation
network. Thus, the internal amplifier controls the output
current. When the PWMD signal goes low, the output of
the transconductance amplifier is disconnected from
the compensation network. Therefore the integrating
capacitor maintains the voltage across it. The gate is
disabled, so the converter stops switching and the
FAULT pin goes low, turning off the disconnect switch.
Note:
The HV9911 is designed to sync up to four
ICs at a time without the use of an external
buffer. To sync more than four ICs, it is
recommended that a buffered external
clock be used.
3.13 Internal 1 MHz Transconductance
Amplifier
The HV9911 includes
a
built-in
1
MHz
The output capacitor of the converter determines the
converter’s PWM dimming response because the
capacitor has to get charged and discharged whenever
the PWMD signal goes high or low. In the case of a
buck converter, since the inductor current is
continuous, a very small capacitor is used across the
LEDs. This minimizes the effect of the capacitor on the
PWM dimming response of the converter. However, in
the case of a boost converter, the output current is
discontinuous, and a very large output capacitor is
required to reduce the ripple in the LED current. Thus,
this capacitor will have a significant impact on the PWM
dimming response. By turning off the disconnect switch
when PWMD goes low, the output capacitor is
prevented from being discharged. This dramatically
improves the boost converter’s PWM dimming
response.
transconductance amplifier with tri-state output, which
can be used to close the feedback loop. The output
current sense signal is connected to the FDBK pin and
the current reference is connected to the IREF pin.
The output of the opamp is controlled by the signal
applied to the PWMD pin. When PWMD is high, the
output of the opamp is connected to the COMP pin.
When PWMD is low, the output is left open. This
enables the integrating capacitor to hold the charge
when the PWMD signal has turned off the gate drive.
When the IC is enabled, the voltage on the integrating
capacitor will force the converter into Steady state
almost instantaneously.
The output of the opamp is buffered and connected to
the current sense comparator using a 15:1 divider. The
buffer helps prevent the integrator capacitor from
discharging during the PWM Dimming state.
2017 Microchip Technology Inc.
DS20005580A-page 13
HV9911
Note:
Disconnecting the capacitor might cause
VO
a sudden spike in the capacitor voltage as
the energy in the inductor is dumped into
the capacitor. This might trigger the OVP
comparator if the OVP point is set too
close to the maximum operating voltage.
Thus, either the capacitor has to be sized
slightly larger or the OVP set point has to
be increased.
CO
CLED
ROVP2
VD
FAULT
FDBK
Q2
Note:
Pulling the PWMD pin 0.3V below the
GND may cause latch-up conditions on
the HV911 IC. This abnormal condition
can happen if there is a long cable
between the PWM signal and the PWMD
pin of the IC. It is recommended that a
1 kꢀ resistor be connected between the
PWMD pin and the PWM signal input to
the HV9911. This resistor, when placed
close to the IC, will damp out any ringing
that might cause the voltage at the PWMD
pin to go below GND.
iSENSE
RS
FIGURE 3-4:
Converter Showing LED Parsed Capacitance.
Output of the Boost
During normal PWM dimming operation, the HV9911
maintains the voltage across the output capacitor (CO)
by turning off the disconnect switch and preserving the
charge in the output capacitance when the PWM
dimming signal is low. At the same time, the voltage at
the drain of the disconnect FET is some non-zero value
VD. When the PWM dimming signal goes high, FET Q2
is turned on. This causes the voltage at the drain of the
FET (VD) to instantly become zero. Assuming a
constant output voltage VO, isense can be computed as
shown in Equation 3-9.
3.16 Avoiding False Shutdowns of the
HV9911
The HV9911 has two fault modes which trigger a
latched Protection mode—an Overcurrent (or
Short-circuit) Protection and an Overvoltage
Protection.
To prevent false triggering due to the tripping of the
overvoltage comparator resulting from noise in the
GND traces on the PCB, it is recommended that a
1 nF–10 nF capacitor be connected between the OVP
pin and GND. Although this capacitor slightly slows
down the response of the Overvoltage Protection
circuitry, it does not affect the overall performance of
the converter as the large output capacitance in the
boost design will limit the rate of output voltage
increase.
EQUATION 3-9:
iSENSE = CLED d VO – VD dt
= –CLED dVD dt
In this case, the rate of fall of the disconnect FET’s
drain voltage is a large value (since the FET turns on
very quickly) and this causes a spike of current through
the sense resistor, which could trigger the overcurrent
protection (depending on the parasitic capacitance of
the LED string).
In some cases, the Overcurrent Protection may be
triggered during PWM dimming, when the FAULT goes
high and the disconnect switch is turned on. This
triggering of the Overcurrent Protection is related to the
parasitic capacitance of the LED string (shown as a
lumped capacitance CLED in Figure 3-4).
To prevent this condition, a simple RC low-pass filter
network can be added as shown in Figure 3-5. Typical
values are RF = 1 kꢀ and CF = 470 pF. This filter will
block the FDBK pin from seeing the turn-on spike and
normalize the PWM dimming operation of the HV9911
boost converter. This will have a minimal effect on the
stability of the loop but will increase the response time
to an output short. If the increase in the response time
is large, it might damage the output current sense
resistor due to exceeding its peak-current rating.
DS20005580A-page 14
2017 Microchip Technology Inc.
HV9911
EQUATION 3-11:
PSC = I2SAT RS
= 11W
VO
CO
For a 1.24ꢀ 1/4W resistor, the maximum power it can
dissipate for a single 1 ms pulse of current is 11W.
Since the total short-circuit time is about 350 ns,
including the 300 ns time for turn-off, the resistor
should be able to handle the current.
ROVP2
CLED
VD
RS
FAULT
FDBK
Q2
iSENSE
Cf
FIGURE 3-5:
Adding a Low-pass Filter to
Prevent Pulse Triggering.
The increase in the short-circuit response time can be
computed using the various component values of the
boost converter. Consider a boost converter with a
nominal output current IO = 350 mA, an output sense
resistor RS = 1.24ꢀ, LED string voltage VO = 100V and
an output capacitor CO = 2 mF. The disconnect FET is
a TN2510N8 which has a saturation current ISAT = 3A
(at VGS
=
6V). See “TN2510N8 N-Channel
Enhancement-Mode Vertical DMOS FET.” The
increase in the short-circuit response time due to the
RC filter can then be computed as shown in
Equation 3-10:
EQUATION 3-10:
IO
---------------------
t RF CF In 1 –
ISAT – IO
0.35A
3A – 0.35A
--------------------------
= 1k 470pF In 1 –
66ns
This increase is found to be negligible (note that the
equation is valid for ꢁT << RS x CO). In this case,
RS x CO = 2.48 µs, and the condition holds.
3.17 Sizing the Output Sense Resistor
To avoid exceeding the peak current rating of the
output sense resistor during Short-circuit conditions,
the power rating of the resistor has to be chosen
properly.
In this case, the maximum power dissipated in the
sense resistor can be determined as demonstrated in
Equation 3-11.
2017 Microchip Technology Inc.
DS20005580A-page 15
HV9911
4.0
4.1
PACKAGING INFORMATION
Package Marking Information
16-lead SOIC
Example
e3
e3
HV9911NG
1714789
XXXXXXXXX
YYWWNNN
Legend: XX...X Product Code or Customer-specific information
Y
YY
WW
NNN
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
e
3
*
This package is Pb-free. The Pb-free JEDEC designator ( )
e
3
can be found on the outer packaging for this package.
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for product code or customer-specific information. Package may or
not include the corporate logo.
DS20005580A-page 16
2017 Microchip Technology Inc.
HV9911
16-Lead SOIC (Narrow Body) Package Outline (NG)
9.90x3.90mm body, 1.75mm height (max), 1.27mm pitch
θ1
D
16
E1 E
Note 1
(Index Area
D/2 x E1/2)
Gauge
Plane
L2
1
L
Seating
Plane
θ
L1
Top View
View B
View
B
A
h
Note 1
A A2
h
Seating
Plane
e
b
A1
Side View
A
View A-A
Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.
Note:
1. 7KLVꢁFKDPIHUꢁIHDWXUHꢁLVꢁRSWLRQDOꢂꢁ,IꢁLWꢁLVꢁQRWꢁSUHVHQWꢃꢁWKHQꢁDꢁ3LQꢁꢄꢁLGHQWL¿HUꢁPXVWꢁEHꢁORFDWHGꢁLQꢁWKHꢁLQGH[ꢁDUHDꢁLQGLFDWHGꢂꢁ7KHꢁ3LQꢁꢄꢁLGHQWL¿HUꢁFDQꢁEHꢅꢁ
DꢁPROGHGꢁPDUNꢆLGHQWL¿HUꢇꢁDQꢁHPEHGGHGꢁPHWDOꢁPDUNHUꢇꢁRUꢁDꢁSULQWHGꢁLQGLFDWRUꢂ
Symbol
A
A1
MIN 1.35* 0.10 1.25 0.31 9.80* 5.80* 3.80*
NOM 9.90 6.00 3.90
MAX 1.75 0.25 1.65* 0.51 10.00* 6.20* 4.00*
A2
b
D
E
E1
e
h
L
L1
L2
ș
0O
-
șꢀ
5O
-
0.25 0.40
Dimension
(mm)
1.27
BSC
1.04 0.25
REF BSC
-
-
-
-
-
-
0.50 1.27
8O 15O
JEDEC Registration MS-012, Variation AC, Issue E, Sept. 2005.
ꢀꢁ7KLVꢁGLPHQVLRQꢁLVꢁQRWꢁVSHFL¿HGꢁLQꢁWKHꢁ-('(&ꢁGUDZLQJꢂ
Drawings are not to scale.
2017 Microchip Technology Inc.
DS20005580A-page 17
HV9911
NOTES:
DS20005580A-page 18
2017 Microchip Technology Inc.
HV9911
APPENDIX A: REVISION HISTORY
Revision A (February 2017)
• Converted Supertex Doc# DSFP-HV9911 to
Microchip DS20005580A
• Changed the packing quantity of the NG M901
media type from 1000/Reel to 2600/Reel
• Changed the packaging quantity of the NG M934
media type from 2500/Reel to 2600/Reel
• Made minor text changes throughout the docu-
ment
2017 Microchip Technology Inc.
DS20005580A-page 19
HV9911
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office.
Examples:
XX
PART NO.
Device
-
X
-
X
a) HV9911NG-G:
Switch-mode LED Driver IC with
High Current Accuracy, 16-lead
SOIC Package, 45/Tube
Package
Options
Environmental
Media Type
b) HV9911NG-G-M901: Switch-mode LED Driver IC with
High Current Accuracy, 16-lead
SOIC, 2600/Reel
Device:
HV9911
=
Switch-mode LED Driver IC with High
Current Accuracy
c) HV9911NG-G-M934: Switch-mode LED Driver IC with
High Current Accuracy, 16-lead
SOIC, 2600/Reel
Package:
NG
G
=
=
16-lead SOIC
Environmental:
Media Types:
Lead (Pb)-free/RoHS-compliant Package
(blank)
M901
M934
=
=
=
45/Tube for an NG Package
2600/Reel for an NG package
2600/Reel for an NG package
Note: For Media Types M901 and M934, the base quantity for tape and reel
was standardized to 2600/reel. Both options will result in the delivery of
the same number of parts/reel.
DS20005580A-page 20
2017 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, AnyRate, AVR,
AVR logo, AVR Freaks, BeaconThings, BitCloud, CryptoMemory,
CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KEELOQ,
KEELOQ logo, Kleer, LANCheck, LINK MD, maXStylus,
maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB,
OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip
Designer, QTouch, RightTouch, SAM-BA, SpyNIC, SST, SST
Logo, SuperFlash, tinyAVR, UNI/O, and XMEGA are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
and other countries.
ClockWorks, The Embedded Control Solutions Company,
EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS,
mTouch, Precision Edge, and Quiet-Wire are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any
Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo,
CodeGuard, CryptoAuthentication, CryptoCompanion,
CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average
Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial
Programming, ICSP, Inter-Chip Connectivity, JitterBlocker,
KleerNet, KleerNet logo, Mindi, MiWi, motorBench, MPASM, MPF,
MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach,
Omniscient Code Generation, PICDEM, PICDEM.net, PICkit,
PICtail, PureSilicon, QMatrix, RightTouch logo, REAL ICE, Ripple
Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI,
SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC,
USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and
ZENA are trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated in
the U.S.A.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
Silicon Storage Technology is a registered trademark of Microchip
Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology
Germany II GmbH & Co. KG, a subsidiary of Microchip Technology
Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
QUALITYꢀMANAGEMENTꢀꢀSYSTEMꢀ
CERTIFIEDꢀBYꢀDNVꢀ
© 2017, Microchip Technology Incorporated, All Rights Reserved.
ISBN: 978-1-5224-1401-8
== ISO/TSꢀ16949ꢀ==ꢀ
2017 Microchip Technology Inc.
DS20005580A-page 21
Worldwide Sales and Service
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EUROPE
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Germany - Rosenheim
Tel: 49-8031-354-560
China - Hong Kong SAR
Tel: 852-2943-5100
Fax: 852-2401-3431
Israel - Ra’anana
Tel: 972-9-744-7705
Malaysia - Kuala Lumpur
Tel: 60-3-6201-9857
Fax: 60-3-6201-9859
Detroit
Novi, MI
Tel: 248-848-4000
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
China - Nanjing
Tel: 86-25-8473-2460
Fax: 86-25-8473-2470
Malaysia - Penang
Tel: 60-4-227-8870
Fax: 60-4-227-4068
Houston, TX
Tel: 281-894-5983
Italy - Padova
Tel: 39-049-7625286
China - Qingdao
Tel: 86-532-8502-7355
Fax: 86-532-8502-7205
Indianapolis
Noblesville, IN
Tel: 317-773-8323
Fax: 317-773-5453
Tel: 317-536-2380
Philippines - Manila
Tel: 63-2-634-9065
Fax: 63-2-634-9069
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
China - Shanghai
Tel: 86-21-3326-8000
Fax: 86-21-3326-8021
Singapore
Tel: 65-6334-8870
Fax: 65-6334-8850
Norway - Trondheim
Tel: 47-7289-7561
Los Angeles
China - Shenyang
Tel: 86-24-2334-2829
Fax: 86-24-2334-2393
Mission Viejo, CA
Tel: 949-462-9523
Fax: 949-462-9608
Tel: 951-273-7800
Poland - Warsaw
Tel: 48-22-3325737
Taiwan - Hsin Chu
Tel: 886-3-5778-366
Fax: 886-3-5770-955
Romania - Bucharest
Tel: 40-21-407-87-50
China - Shenzhen
Tel: 86-755-8864-2200
Fax: 86-755-8203-1760
Taiwan - Kaohsiung
Tel: 886-7-213-7830
Raleigh, NC
Tel: 919-844-7510
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
China - Wuhan
Tel: 86-27-5980-5300
Fax: 86-27-5980-5118
Taiwan - Taipei
Tel: 886-2-2508-8600
Fax: 886-2-2508-0102
New York, NY
Tel: 631-435-6000
Sweden - Gothenberg
Tel: 46-31-704-60-40
San Jose, CA
Tel: 408-735-9110
Tel: 408-436-4270
China - Xian
Tel: 86-29-8833-7252
Fax: 86-29-8833-7256
Thailand - Bangkok
Tel: 66-2-694-1351
Fax: 66-2-694-1350
Sweden - Stockholm
Tel: 46-8-5090-4654
Canada - Toronto
Tel: 905-695-1980
Fax: 905-695-2078
UK - Wokingham
Tel: 44-118-921-5800
Fax: 44-118-921-5820
DS20005580A-page 22
2017 Microchip Technology Inc.
11/07/16
相关型号：
HV9918K7-G
LED Driver, 1-Segment, 3 X 3 MM, 0.80 MM HEIGHT, 0.65 MM PITCH, GREEN, MO-229WEEC-2, DFN-8
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