MAX1473ETJ+ [MAXIM]
315MHz/433MHz ASK Superheterodyne Receiver with Extended Dynamic Range; 315MHz的/ 433MHz ASK超外差接收器，具有更宽的动态范围
| 型号： | MAX1473ETJ+ |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | 315MHz/433MHz ASK Superheterodyne Receiver with Extended Dynamic Range |
| 文件： | 总15页 (文件大小：231K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-2748; Rev 5; 1/11
315MHz/433MHz ASK Superheterodyne
Receiver with Extended Dynamic Range
MAX1473
General Description
Features
o Optimized for 315MHz or 433MHz ISM Band
The MAX1473 fully integrated low-power CMOS super-
heterodyne receiver is ideal for receiving amplitude-
shift-keyed (ASK) data in the 300MHz to 450MHz
frequency range. Its signal range is from -114dBm to
0dBm. With few external components and a low-current
power-down mode, it is ideal for cost- and power-sensi-
tive applications typical in the automotive and consumer
markets. The chip consists of a low-noise amplifier
(LNA), a fully differential image-rejection mixer, an on-
chip phase-locked-loop (PLL) with integrated voltage-
controlled oscillator (VCO), a 10.7MHz IF limiting
amplifier stage with received-signal-strength indicator
(RSSI), and analog baseband data-recovery circuitry.
The MAX1473 also has a discrete one-step automatic
gain control (AGC) that drops the LNA gain by 35dB
when the RF input signal is greater than -57dBm.
o Operates from Single 3.3V or 5.0V Supplies
o High Dynamic Range with On-Chip AGC
o Selectable Image-Rejection Center Frequency
o Selectable x64 or x32 f /f
Ratio
LO XTAL
o Low 5.2mA Operating Supply Current
o < 2.5µA Low-Current Power-Down Mode for
Efficient Power Cycling
o 250µs Startup Time
o Built-In 50dB RF Image Rejection
o Receive Sensitivity of -114dBm
Ordering Information
The MAX1473 is available in 28-pin TSSOP and 32-pin
thin QFN packages. Both versions are specified for the
extended (-40°C to +85°C) temperature range.
PART
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
28 TSSOP
MAX1473EUI+
MAX1473ETJ+
32 Thin QFN-EP*
Applications
Automotive Remote Keyless Entry Security Systems
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
Garage Door Openers
Remote Controls
Home Automation
Functional Diagram and Typical Application Circuit appear
at end of data sheet.
Local Telemetry
Systems
Wireless Sensors
Pin Configurations
TOP VIEW
+
XTAL1
AVDD
1
2
3
4
5
6
7
8
9
28 XTAL2
27 PWRDN
26 PDOUT
25 DATAOUT
+
LNAIN
LNASRC
AGND
N.C.
AGND
1
2
3
4
5
6
7
8
24 DATAOUT
23
24
V
DD5
V
DD5
MAX1473
LNAOUT
AVDD
23 DSP
LNAOUT
AVDD
22 DSP
21 N.C.
20 DFFB
19 OPP
18 DSN
17 DFO
22 DFFB
21 OPP
MAX1473
MIXIN1
MIXIN2
MIXIN1
MIXIN2
AGND
20 DSN
AGND 10
IRSEL 11
19 DFO
18 IFIN2
17 IFIN1
16 XTALSEL
15 AGCDIS
IRSEL
MIXOUT 12
DGND 13
DVDD 14
TSSOP
THIN QFN
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
315MHz/433MHz ASK Superheterodyne
Receiver with Extended Dynamic Range
ABSOLUTE MAXIMUM RATINGS
V
DD5
to AGND.......................................................-0.3V to +6.0V
Continuous Power Dissipation (T = +70°C)
A
AVDD to AGND .....................................................-0.3V to +4.0V
DVDD to DGND.....................................................-0.3V to +4.0V
AGND to DGND.....................................................-0.1V to +0.1V
IRSEL, DATAOUT, XTALSEL, AGCDIS,
28-Pin TSSOP (derate 12.8mW/°C above +70°C) .1025.6mW
32-Pin Thin QFN (derate 21.3mW/°C
above +70°C).........................................................1702.1mW
Operating Temperature Ranges
PWRDN to AGND .....................................-0.3V to (V
All Other Pins to AGND ..............................-0.3V to (V
+ 0.3V)
+ 0.3V)
MAX1473E__ ..................................................-40°C to +85°C
Storage Temperature Range.............................-60°C to +150°C
Lead Temperature (soldering 10s) ..................................+300°C
Soldering Temperature (reflow) .......................................+260°C
DD5
DD
MAX1473
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS (3.3V OPERATION)
(Typical Application Circuit, V
= 3.0V to 3.6V, no RF signal applied, T = -40°C to +85°C, unless otherwise noted. Typical values
A
DD
are at V
= 3.3V and T = +25°C.) (Note 1)
DD
A
PARAMETER
SYMBOL
CONDITIONS
3.3V nominal supply
MIN
TYP
3.3
5.2
5.8
1.6
2.5
MAX
3.6
UNITS
Supply Voltage
V
3.0
V
DD
f
RF
f
RF
f
RF
f
RF
= 315MHz
= 433MHz
= 315MHz
= 433MHz
6.23
6.88
Supply Current
I
V
= V
mA
µA
DD
P WRDN
DD
V
V
= 0V,
= 0V
P WRDN
Shutdown Supply Current
I
PWRDN
XTALSEL
5.3
0.4
Input Voltage Low
V
V
V
IL
IH
IH
Input Voltage High
Input Logic Current High
V
V
V
- 0.4
DD
I
10
µA
f
RF
f
RF
f
RF
= 433MHz, V
= 375MHz, V
= 315MHz, V
= V
V
V
- 0.4
IRSEL
IRSEL
IRSEL
DD
DD
DD
Image Reject Select (Note 2)
= V /2
DD
1.1
0.4
- 1.5
V
= 0V
DATAOUT Voltage Output Low
DATAOUT Voltage Output High
V
0.4
V
V
OL
R = 5kΩ
L
V
- 0.4
DD
OH
2
_______________________________________________________________________________________
315MHz/433MHz ASK Superheterodyne
Receiver with Extended Dynamic Range
MAX1473
DC ELECTRICAL CHARACTERISTICS (5.0V OPERATION)
(Typical Application Circuit, V
= 4.5V to 5.5V, no RF signal applied, T = -40°C to +85°C, unless otherwise noted. Typical values
DD
A
are at V
= 5.0V and T = +25°C.) (Note 1)
DD
A
PARAMETER
SYMBOL
CONDITIONS
5.0V nominal supply
MIN
TYP
5.0
5.2
5.7
2.3
2.8
MAX
5.5
UNITS
Supply Voltage
V
4.5
V
DD
f
RF
f
RF
f
RF
f
RF
= 315MHz
= 433MHz
= 315MHz
= 433MHz
6.04
6.76
Supply Current
I
V
= V
mA
µA
DD
P WRDN
DD
V
V
= 0V,
= 0V
P WRDN
Shutdown Supply Current
I
PWRDN
XTALSEL
6.2
0.4
Input Voltage Low
V
V
V
IL
IH
IH
Input Voltage High
Input Logic Current High
V
V
V
- 0.4
DD
I
10
µA
f
RF
f
RF
f
RF
= 433MHz, V
= 375MHz, V
= 315MHz, V
= V
V
V
- 0.4
IRSEL
IRSEL
IRSEL
DD
DD
DD
Image Reject Select (Note 2)
= V /2
DD
1.1
0.4
- 1.5
V
= 0V
DATAOUT Voltage Output Low
DATAOUT Voltage Output High
V
0.4
V
V
OL
R = 5kΩ
L
V
- 0.4
DD
OH
AC ELECTRICAL CHARACTERISTICS
(Typical Application Circuit, V
otherwise noted. Typical values are at V
= 3.0V to 3.6V, all RF inputs are referenced to 50Ω, f = 315MHz, T = -40°C to +85°C, unless
DD
RF
A
= 3.3V and T = +25°C.) (Note 1).
DD
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
GENERAL CHARACTERISTICS
Time for valid signal detection after
Startup Time
t
250
µs
ON
V
= V
OH
P WRDN
Receiver Input Frequency
f
300
450
MHz
dBm
RF
Maximum Receiver Input Level
P
Modulation depth > 18dB
Average carrier power level
Peak power level
0
RFIN_MAX
-120
-114
8
Sensitivity (Note 3)
AGC Hysteresis
P
dBm
RFIN_MIN
dB
ms
LNA gain from low to high
150
LNA IN HIGH-GAIN MODE
Power Gain
16
dB
f
RF
f
RF
f
RF
= 433MHz
= 375MHz
= 315MHz
1 - j3.4
1 - j3.9
1 - j4.7
-22
Normalized to
50Ω (Note 4)
Input Impedance
Z
IN_LNA
1dB Compression Point
P1dB
dBm
dBm
LNA
Input-Referred 3rd-Order
Intercept
IIP3
-12
LNA
_______________________________________________________________________________________
3
315MHz/433MHz ASK Superheterodyne
Receiver with Extended Dynamic Range
AC ELECTRICAL CHARACTERISTICS (continued)
(Typical Application Circuit, V
otherwise noted. Typical values are at V
= 3.0V to 3.6V, all RF inputs are referenced to 50Ω, f = 315MHz, T = -40°C to +85°C, unless
DD
RF
A
= 3.3V and T = +25°C.) (Note 1)
DD
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
-80
2
MAX
UNITS
dBm
dB
LO Signal Feedthrough to
Antenna
Noise Figure
NF
LNA
MAX1473
LNA IN LOW-GAIN MODE
f
RF
f
RF
f
RF
= 433MHz
= 375MHz
= 315MHz
1 - j3.4
1 - j3.9
1 - j4.7
-10
Normalized to
50Ω
Input Impedance (Note 4)
Z
IN_LNA
1dB Compression Point
P1dB
dBm
dBm
LNA
Input-Referred 3rd-Order
Intercept
IIP3
-7
LNA
LO Signal Feedthrough to
Antenna
-80
dBm
Noise Figure
Power Gain
NF
2
0
dB
dB
dB
LNA
Voltage Gain Reduction
MIXER
AGC enabled (depends on tank Q)
35
Input-Referred 3rd-Order
Intercept
IIP3
-18
dBm
MIX
Output Impedance
Noise Figure
Z
330
16
42
44
44
13
Ω
OUT_MIX
NF
dB
MIX
f
f
f
= 433MHz, V
= 375MHz, V
= 315MHz, V
= V
DD
RF
RF
RF
IRSEL
IRSEL
IRSEL
Image Rejection
(not Including LNA Tank)
= V /2
DD
dB
dB
= 0V
Conversion Gain
330Ω IF filter load
INTERMEDIATE FREQUENCY (IF)
Input Impedance
Z
330
10.7
20
Ω
IN_IF
Operating Frequency
3dB Bandwidth
f
IF
Bandpass response
MHz
MHz
dB
RSSI Linearity
0.5
RSSI Dynamic Range
80
dB
P
P
< -120dBm
1.15
2.35
14.2
1.45
2.05
RFIN
RFIN
RSSI Level
V
mV/dB
V
> 0dBm, AGC enabled
RSSI Gain
LNA gain from low to high
LNA gain from high to low
AGC Threshold
4
_______________________________________________________________________________________
315MHz/433MHz ASK Superheterodyne
Receiver with Extended Dynamic Range
MAX1473
AC ELECTRICAL CHARACTERISTICS (continued)
(Typical Application Circuit, V
= 3.0V to 3.6V, all RF inputs are referenced to 50Ω, f = 315MHz, T = -40°C to +85°C, unless
DD
RF
A
otherwise noted. Typical values are at V
= 3.3V and T = +25°C.) (Note 1)
A
DD
PARAMETER
DATA FILTER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Maximum Bandwidth
DATA SLICER
BW
100
kHz
DF
Comparator Bandwidth
Maximum Load Capacitance
Output High Voltage
Output Low Voltage
BW
100
10
kHz
pF
V
CMP
C
LOAD
V
DD5
0
V
CRYSTAL OSCILLATOR
V
V
V
V
= 0V
6.6128
13.2256
4.7547
9.5094
50
XTALSEL
XTALSEL
XTALSEL
XTALSEL
f
f
= 433MHz
= 315MHz
MHz
MHz
RF
= V
DD
Crystal Frequency (Note 5)
f
XTAL
= 0V
= V
RF
DD
Crystal Tolerance
Input Impedance
ppm
pF
From each pin to ground
6.2
Note 1: 100% tested at T = +25°C. Guaranteed by design and characterization over temperature.
A
Note 2: IRSEL is internally set to 375MHz IR mode. It can be left open when the 375MHz image rejection setting is desired. A 1nF
capacitor is recommended in noisy environments.
-3
Note 3: BER = 2 x 10 , Manchester encoded, data rate = 4kbps, IF bandwidth = 280kHz.
Note 4: Input impedance is measured at the LNAIN pin. Note that the impedance includes the 15nH inductive degeneration con-
nected from the LNA source to ground. The equivalent input circuit is 50Ω in series with 2.2pF.
Note 5: Crystal oscillator frequency for other RF carrier frequency within the 300MHz to 450MHz range is (f - 10.7MHz)/64 for
RF
XTALSEL = 0V, and (f - 10.7MHz)/32 for XTALSEL = V
.
RF
DD
_______________________________________________________________________________________
5
315MHz/433MHz ASK Superheterodyne
Receiver with Extended Dynamic Range
Typical Operating Characteristics
(Typical Application Circuit, V
= 3.3V, f = 315MHz, T = +25°C, unless otherwise noted.)
RF A
DD
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
SUPPLY CURRENT
vs. RF FREQUENCY
BIT-ERROR RATE
vs. AVERAGE RF INPUT POWER
100
10
5.6
5.5
5.4
5.3
5.2
5.1
5.0
4.9
7.0
6.5
6.0
5.5
5.0
4.5
+105°C
f
= 433MHz
RF
MAX1473
+105°C
+85°C
1
+25°C
f
= 315MHz
RF
+85°C
+25°C
-40°C
0.1
0.01
-40°C
-117 -116
-121 -120 -119 -118
-115 -114
3.0
3.1
3.2
3.3
3.4
3.5
3.6
250
300
350
400
450
500
AVERAGE INPUT POWER (dBm)
SUPPLY VOLTAGE (V)
RF FREQUENCY (MHz)
RSSI AND DELTA
vs. IF INPUT POWER
SENSITIVITY vs. TEMPERATURE
RSSI vs. RF INPUT POWER
MAX1473 toc06
-105
-106
-107
-108
-109
-110
-111
-112
-113
-114
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
3.5
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
PEAK RF INPUT POWER
1% BER
IF BANDWIDTH = 280MHz
IF BANDWIDTH = 280kHz
2.5
V
= V
DD
AGCDIS
1.5
f
= 433MHz
RF
0.5
V
= 0V
AGCDIS
-0.5
-1.5
-2.5
-3.5
DELTA
RSSI
f
= 315MHz
60
RF
-40
-15
10
35
85
-140 -120 -100 -80 -60 -40 -20
RF INPUT POWER (dBm)
0
110
-90
-70
-50
-30
-10
10
TEMPERATURE (°C)
IF INPUT POWER (dBm)
IMAGE REJECTION
vs. RF FREQUENCY
IMAGE REJECTION
vs. TEMPERATURE
SYSTEM GAIN vs. FREQUENCY
30
20
55
50
45
40
35
30
45
45
44
44
43
43
42
42
41
41
f
= 315MHz
UPPER
SIDEBAND
RF
10
50dB IMAGE
REJECTION
LOWER
SIDEBAND
f
= 375MHz
0
RF
-10
-20
-30
f
= 433MHz
f
= 375MHz
RF
RF
FROM RFIN TO
MIXOUT
f
= 315MHz
430
RF
f
= 433MHz
RF
f
= 315MHz
RF
0
5
10
15
20
25
30
280
330
380
480
-40
-15
10
35
60
85
IF FREQUENCY (MHz)
RF FREQUENCY (MHz)
TEMPERATURE (°C)
6
_______________________________________________________________________________________
315MHz/433MHz ASK Superheterodyne
Receiver with Extended Dynamic Range
MAX1473
Typical Operating Characteristics (continued)
(Typical Application Circuit, V
= 3.3V, f = 315MHz, T = +25°C, unless otherwise noted.)
DD
RF
A
NORMALIZED IF GAIN
vs. IF FREQUENCY
S11 SMITH PLOT OF RFIN
S11 MAGNITUDE-LOG PLOT OF RFIN
MAX1473 toc12
30
20
5
600MHz
10
0
-5
0
-10
-20
-30
-40
-50
-60
-70
100MHz
-10
-15
315MHz
-34dB
-20
10 109 208 307 406 505 604 703 802 901 1000
RF FREQUENCY (MHz)
1
10
100
IF FREQUENCY (MHz)
REGULATOR VOLTAGE
PHASE NOISE
PHASE NOISE
vs. REGULATOR CURRENT
vs. OFFSET FREQUENCY
vs. OFFSET FREQUENCY
3.1
0
0
f
= 315MHz
f
= 433MHz
RF
RF
-20
-20
3.0
2.9
2.8
2.7
2.6
2.5
-40°C
-40
-60
-40
-60
+25°C
+85°C
+105°C
-80
-80
-100
-100
-120
-140
-120
-140
V
= 5.0V
DD
5
15
25
35
45
1.E-05 1.E-04 1.E-03 1.E-02 1.E-01 1.E+00 1.E+01
1.E-05 1.E-04 1.E-03 1.E-02 1.E-01 1.E+00 1.E+01
REGULATOR CURRENT (mA)
OFFSET FREQUENCY (MHz)
OFFSET FREQUENCY (MHz)
_______________________________________________________________________________________
7
315MHz/433MHz ASK Superheterodyne
Receiver with Extended Dynamic Range
Pin Description
PIN
NAME
FUNCTION
TSSOP TQFN
1
29
XTAL1
1st Crystal Input. (See the Phase-Locked Loop section.)
Positive Analog Supply Voltage. For +5V operation, pin 2 is the output of an on-chip +3.2V
low-dropout regulator and should be bypassed to AGND with a 0.1µF capacitor as close as
possible to the pin. Pin 7 must be externally connected to the supply from pin 2 and bypassed to
AGND with a 0.01µF capacitor as close as possible to the pin (see the Voltage Regulator section
and the Typical Application Circuit).
2, 7
4, 30
AVDD
MAX1473
3
4
5
6
31
32
2
LNAIN
LNASRC
AGND
Low-Noise Amplifier Input. (See the Low-Noise Amplifier section.)
Low-Noise Amplifier Source for External Inductive Degeneration. Connect inductor to ground to set
LNA input impedance. (See the Low-Noise Amplifier section.)
Analog Ground
Low-Noise Amplifier Output. Connect to mixer through an LC tank filter. (See the Low-Noise
Amplifier section.)
3
LNAOUT
8
9
5
6
7
MIXIN1
MIXIN2
AGND
1st Differential Mixer Input. Connect through a 100pF capacitor to V
side of the LC tank.
DD3
2nd Differential Mixer Input. Connect through a 100pF capacitor to LC tank filter from LNAOUT.
Analog Ground
10
Image Rejection Select Pin. Set V
unconnected to center image rejection at 375MHz. Set V
= 0V to center image rejection at 315MHz. Leave IRSEL
IRSEL
11
8
IRSEL
= V to center image rejection at 433MHz.
DD
IRSEL
12
13
9
MIXOUT 330Ω Mixer Output. Connect to the input of the 10.7MHz bandpass filter.
10
DGND
Digital Ground
Positive Digital Supply Voltage. Connect to both of the AVDD pins. Bypass to DGND with a 0.01µF
capacitor as close as possible to the pin (see the Typical Application Circuit).
14
15
16
11
12
14
DVDD
AGCDIS AGC Control Pin. Pull high to disable AGC.
Crystal Divider Ratio Select Pin. Drive XTALSEL low to select divider ratio of 64, or drive XTALSEL
high to select divider ratio of 32.
XTALSEL
1st Differential Intermediate Frequency Limiter Amplifier Input. Decouple to AGND with a 1500pF
capacitor.
17
18
15
16
IFIN1
2nd Differential Intermediate Frequency Limiter Amplifier Input. Connect to the output of a 10.7MHz
bandpass filter.
IFIN2
19
20
21
22
23
17
18
19
20
22
DFO
DSN
OPP
DFFB
DSP
Data Filter Output
Negative Data Slicer Input
Noninverting Op-Amp Input for the Sallen-Key Data Filter
Data Filter Feedback Node. Input for the feedback of the Sallen-Key data filter.
Positive Data Slicer Input
+5V Supply Voltage. Bypass to AGND with a 0.01µF capacitor as close as possible to the pin. For
24
23
V
+5V operation, V
is the input to an on-chip voltage regulator whose +3.2V output appears at the
DD5
DD5
pin 2 AVDD pin. (See the Voltage Regulator section and the Typical Application Circuit.)
DATAOUT Digital Baseband Data Output
PDOUT Peak Detector Output
PWRDN Power-Down Select Input. Drive this pin with a logic high to power on the IC.
25
26
27
28
24
26
27
28
XTAL2
N.C.
EP
2nd Crystal Input
1, 13,
21, 25
—
—
No Connection
—
Exposed Pad (TQFN Only). Connect EP to GND.
8
_______________________________________________________________________________________
315MHz/433MHz ASK Superheterodyne
Receiver with Extended Dynamic Range
MAX1473
tion, the MAX1473 can reliably produce an ASK output
Detailed Description
for RF input levels up to 0dBm with a modulation depth
The MAX1473 CMOS superheterodyne receiver and a
of 18dB.
few external components provide the complete receive
chain from the antenna to the digital output data.
Depending on signal power and component selection,
data rates as high as 100kbps can be achieved.
The LC tank filter connected to LNAOUT comprises L3
and C2 (see the Typical Application Circuit). Select L3
and C2 to resonate at the desired RF input frequency.
The resonant frequency is given by:
The MAX1473 is designed to receive binary ASK data
modulated in the 300MHz to 450MHz frequency range.
ASK modulation uses a difference in amplitude of the
carrier to represent logic 0 and logic 1 data.
1
f =
2π L
C
TOTAL × TOTAL
Voltage Regulator
where:
For operation with a single +3.0V to +3.6V supply volt-
L
= L3 + L
PARASITICS
TOTAL
age, connect AVDD, DVDD, and V
to the supply
DD5
C
C2 + C
PARASITICS
TOTAL =
voltage. For operation with a single +4.5V to +5.5V
supply voltage, connect V to the supply voltage. An
DD5
L
and C
include inductance and
PARASITICS
PARASITICS
on-chip voltage regulator drives one of the AVDD pins
to approximately +3.2V. For proper operation, DVDD
and both the AVDD pins must be connected together.
capacitance of the PCB traces, package pins, mixer
input impedance, LNA output impedance, etc. These
parasitics at high frequencies cannot be ignored, and
can have a dramatic effect on the tank filter center fre-
quency. Lab experimentation should be done to opti-
mize the center frequency of the tank.
Bypass V
, DVDD, and the pin 7 AVDD pin to AGND
DD5
with 0.01µF capacitors, and the pin 2 AVDD pin to
AGND with a 0.1µF capacitor, all placed as close as
possible to the pins.
Mixer
A unique feature of the MAX1473 is the integrated
image rejection of the mixer. This device eliminates the
need for a costly front-end SAW filter for most applica-
tions. Advantages of not using a SAW filter are
increased sensitivity, simplified antenna matching, less
board space, and lower cost.
Low-Noise Amplifier
The LNA is an NMOS cascode amplifier with off-chip
inductive degeneration that achieves approximately
16dB of power gain with a 2.0dB noise figure and an
IIP3 of -12dBm. The gain and noise figure are depen-
dent on both the antenna matching network at the LNA
input and the LC tank network between the LNA output
and the mixer inputs.
The mixer cell is a pair of double balanced mixers that
perform an IQ downconversion of the RF input to the
The off-chip inductive degeneration is achieved by
connecting an inductor from LNASRC to AGND. This
inductor sets the real part of the input impedance at
LNAIN, allowing for a more flexible input impedance
match, such as a typical PCB trace antenna. A nominal
value for this inductor with a 50Ω input impedance is
15nH, but is affected by PCB trace. See the Typical
Operating Characteristics for the relationship between
the inductance and the LNA input impedance.
10.7MHz IF from a low-side injected LO (i.e., f = f
-
LO
RF
f ). The image-rejection circuit then combines these
IF
signals to achieve a minimum 45dB of image rejection
over the full temperature range. Low-side injection is
required due to the on-chip image rejection architec-
ture. The IF output is driven by a source-follower biased
to create a driving impedance of 330Ω; this provides a
good match to the off-chip 330Ω ceramic IF filter. The
voltage conversion gain is approximately 13dB when
the mixer is driving a 330Ω load.
The AGC circuit monitors the RSSI output. When the
RSSI output reaches 2.05V, which corresponds to an
RF input level of approximately -57dBm, the AGC
switches on the LNA gain reduction resistor. The resis-
tor reduces the LNA gain by 35dB, thereby reducing
the RSSI output by about 500mV. The LNA resumes
high-gain mode when the RSSI level drops back below
1.45V (approximately -65dBm at RF input) for 150ms.
The AGC has a hysteresis of ~8dB. With the AGC func-
The IRSEL pin is a logic input that selects one of the
three possible image-rejection frequencies. When
V
V
= 0V, the image rejection is tuned to 315MHz.
IRSEL
IRSEL
= V /2 tunes the image rejection to 375MHz,
DD
IRSEL
and when V
= V , the image rejection is tuned to
DD
433MHz. The IRSEL pin is internally set to V /2 (image
DD
rejection at 375MHz) when it is left unconnected, there-
by eliminating the need for an external V /2 voltage.
DD
_______________________________________________________________________________________
9
315MHz/433MHz ASK Superheterodyne
Receiver with Extended Dynamic Range
The AGC circuit monitors the RSSI output. When the
Phase-Locked Loop
The PLL block contains a phase detector, charge
pump/integrated loop filter, VCO, asynchronous 64x
clock divider, and crystal oscillator driver. Besides the
crystal, this PLL does not require any external compo-
nents. The VCO generates a low-side local oscillator
(LO). The relationship between the RF, IF, and refer-
ence frequencies is given by:
RSSI output reaches 2.05V, which corresponds to an RF
input level of approximately -57dBm, the AGC switches
on the LNA gain reduction resistor. The resistor reduces
the LNA gain by 35dB, thereby reducing the RSSI out-
put by about 500mV. The LNA resumes high-gain mode
when the RSSI level drops back below 1.45V (approxi-
mately -65dBm at RF input) for 150ms. The AGC has a
hysteresis of ~8dB. With the AGC function, the
MAX1473 can reliably produce an ASK output for RF
input levels up to 0dBm with modulation depth of 18dB.
f
= (f - f )/(32 ꢀ M)
RF IF
REF
MAX1473
where:
M = 1 (V
= V ) or 2 (V
= 0V)
XTALSEL
XTALSEL
DD
Applications Information
To allow the smallest possible IF bandwidth (for best sen-
sitivity), the tolerance of the reference must be minimized.
Crystal Oscillator
The XTAL oscillator in the MAX1473 is designed to pre-
sent a capacitance of approximately 3pF between the
XTAL1 and XTAL2. If a crystal designed to oscillate
with a different load capacitance is used, the crystal is
pulled away from its stated operating frequency, intro-
ducing an error in the reference frequency. Crystals
designed to operate with higher differential load capac-
itance always pull the reference frequency higher. For
example, a 4.7547MHz crystal designed to operate
with a 10pF load capacitance oscillates at 4.7563MHz
with the MAX1473, causing the receiver to be tuned to
315.1MHz rather than 315.0MHz, an error of about
100kHz, or 320ppm.
Intermediate Frequency/RSSI
The IF section presents a differential 330Ω load to pro-
vide matching for the off-chip ceramic filter. The six
internal AC-coupled limiting amplifiers produce an
overall gain of approximately 65dB, with a bandpass fil-
ter-type response centered near the 10.7MHz IF fre-
quency with a 3dB bandwidth of approximately
11.5MHz. The RSSI circuit demodulates the IF by pro-
ducing a DC output proportional to the log of the IF sig-
nal level, with a slope of approximately 14.2mV/dB (see
the Typical Operating Characteristics).
Table 1. Component Values for Typical Application Circuit
COMPONENT
VALUE FOR 433MHz RF
VALUE FOR 315MHz RF
DESCRIPTION
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
C13
L1
100pF
100pF
5%
2.7pF
4.7pF
0.1pF
100pF
100pF
5%
100pF
100pF
5%
1500pF
1500pF
10%
220pF
220pF
5%
470pF
470pF
5%
0.47µF
0.47µF
20%
10%
220pF
220pF
0.01µF
0.01µF
20%
0.01µF
0.01µF
20%
15pF
15pF
Depends on XTAL
Depends on XTAL
TOKO LL1608-FH
Murata LQP11A
Murata LQP11A
5%
15pF
15pF
56nH
110nH
L2
15nH
15nH
15nH
27nH
L3
R1
5kΩ
5kΩ
X1
6.6128MHz or 13.2256MHz
10.7MHz ceramic filter
4.7547MHz or 9.5094MHz
10.7MHz ceramic filter
—
X2
Murata SFECV10.7 series
10 ______________________________________________________________________________________
315MHz/433MHz ASK Superheterodyne
Receiver with Extended Dynamic Range
MAX1473
In actuality, the oscillator pulls every crystal. The crys-
1.000
tal’s natural frequency is really below its specified fre-
quency, but when loaded with the specified load
capacitance, the crystal is pulled and oscillates at its
specified frequency. This pulling is already accounted
for in the specification of the load capacitance.
C5 =
≈ 450pF
1.414 100kΩ 3.14 5kHz
(
)(
)(
)(
)
Choosing standard capacitor values changes C5 to
470pF and C6 to 220pF, as shown in the Typical
Application Circuit.
Additional pulling can be calculated if the electrical
parameters of the crystal are known. The frequency
pulling is given by:
Data Slicer
The purpose of the data slicer is to take the analog out-
put of the data filter and convert it to a digital signal.
This is achieved by using a comparator and comparing
the analog input to a threshold voltage. One input is
supplied by the data filter output. Both comparator
inputs are accessible off chip to allow for different
methods of generating the slicing threshold, which is
applied to the second comparator input.
⎛
⎜
⎜
⎝
⎞
C
1
1
6
m
f
=
-
⎟ ×10
p
⎟
⎠
2
C
C
C
C
case + spec
case + load
where:
f is the amount the crystal frequency pulled in ppm.
p
C
C
C
C
is the motional capacitance of the crystal.
m
The suggested data slicer configuration uses a resistor
(R1) connected between DSN and DSP with a capaci-
tor (C4) from DSN to DGND (Figure 2). This configura-
tion averages the analog output of the filter and sets the
threshold to approximately 50% of that amplitude. With
this configuration, the threshold automatically adjusts
as the analog signal varies, minimizing the possibility
for errors in the digital data. The sizes of R1 and C4
affect how fast the threshold tracks to the analog ampli-
tude. Be sure to keep the corner frequency of the RC
circuit much lower than the lowest expected data rate.
is the case capacitance.
case
spec
load
is the specified load capacitance.
is the actual load capacitance.
When the crystal is loaded as specified, i.e., C
spec
=
load
C
, the frequency pulling equals zero.
Data Filter
The data filter is implemented as a 2nd-order lowpass
Sallen-Key filter. The pole locations are set by the com-
bination of two on-chip resistors and two external
capacitors. Adjusting the value of the external capaci-
tors changes the corner frequency to optimize for dif-
ferent data rates. The corner frequency should be set
to approximately 1.5 times the fastest expected data
rate from the transmitter. Keeping the corner frequency
near the data rate rejects any noise at higher frequen-
cies, resulting in an increase in receiver sensitivity.
MAX1473
RSSI
The configuration shown in Figure 1 can create a
Butterworth or Bessel response. The Butterworth filter
offers a very flat amplitude response in the passband
and a rolloff rate of 40dB/decade for the two-pole filter.
The Bessel filter has a linear phase response, which
works well for filtering digital data. To calculate the
value of C5 and C6, use the following equations along
with the coefficients in Table 2:
R
R
DF1
DF2
100kΩ
100kΩ
22
DFFB
19
DFO
21
OPP
C6
C5
b
C5 =
a 100k π f
(
)( )(
c
)
)
Figure 1. Sallen-Key Lowpass Data Filter
a
C6 =
Table 2. Coefficents to Calculate C5 and C6
4 100k π f
(
)( )(
c
FILTER TYPE
Butterworth (Q = 0.707)
Bessel (Q = 0.577)
a
b
where f is the desired 3dB corner frequency.
C
1.414
1.3617
1.000
0.618
For example, choose a Butterworth filter response with
a corner frequency of 5kHz:
______________________________________________________________________________________ 11
315MHz/433MHz ASK Superheterodyne
Receiver with Extended Dynamic Range
MAX1473
MAX1473
DATA
SLICER
DATA
SLICER
MAX1473
25
DATAOUT
20
DSN
23
DSP
19
DFO
25
20
19
23
DATAOUT
DSN
DFO
DSP
R4
R1
R2
R3
R1
C4
C4
*OPTIONAL
Figure 2. Generating Data Slicer Threshold
Note that a long string of zeros or 1’s can cause the
threshold to drift. This configuration works best if a cod-
ing scheme, such as Manchester coding, which has an
equal number of zeros and 1’s, is used.
Figure 3. Generating Data Slicer Hysteresis
To prevent continuous toggling of DATAOUT in the
absence of an RF signal due to noise, hysteresis can
be added to the data slicer as shown in Figure 3.
MAX1473
Peak Detector
The peak detector output (PDOUT), in conjunction with
an external RC filter, creates a DC output voltage equal
to the peak value of the data signal. The resistor pro-
vides a path for the capacitor to discharge, allowing the
peak detector to dynamically follow peak changes of
the data filter output voltage. For faster receiver startup,
the circuit shown in Figure 4 can be used.
DATA
SLICER
25
DATAOUT
23
19
DFO
26
PDOUT
20
DSN
DSP
25kΩ
Layout Considerations
A properly designed PCB is an essential part of any
RF/microwave circuit. On high-frequency inputs and
outputs, use controlled-impedance lines and keep
them as short as possible to minimize losses and radia-
tion. At high frequencies, trace lengths that are on the
order of λ/10 or longer act as antennas.
Keeping the traces short also reduces parasitic induc-
tance. Generally, 1in of a PCB trace adds about 20nH
of parasitic inductance. The parasitic inductance can
have a dramatic effect on the effective inductance of a
passive component. For example, a 0.5in trace con-
necting a 100nH inductor adds an extra 10nH of induc-
tance or 10%.
47nF
Figure 4. Using PDOUT for Faster Startup
Chip Information
PROCESS: CMOS
To reduce the parasitic inductance, use wider traces
and a solid ground or power plane below the signal
traces. Also, use low-inductance connections to ground
on all GND pins, and place decoupling capacitors
close to all power-supply pins.
12 ______________________________________________________________________________________
315MHz/433MHz ASK Superheterodyne
Receiver with Extended Dynamic Range
MAX1473
Typical Application Circuit
V
V
DD
DD3
IF V IS
THEN V
IS
DD
DD3
(SEE TABLE)
X1
3.0V TO 3.6V CONNECTED TO V
DD
4.5V TO 5.5V CREATED BY LDO,
AVAILABLE AT AVDD
(PIN 2)
C12
C13
C11
1
2
3
4
28
27
26
25
XTAL1
AVDD
XTAL2
PWRDN
RF INPUT
TO/FROM μP
POWER DOWN
DATA OUT
C1
L1
L2
LNAIN
LNASRC
PDOUT
R2
MAX1473
DATAOUT
C15
5
6
24
23
AGND
V
DD5
R3
LNAOUT
DSP
C14
C3
V
DD3
7
22
L3
AVDD
DFFB
8
9
21
20
19
18
17
16
15
C2
MIXIN1
MIXIN2
AGND
OPP
DSN
C7
10
C4
DFO
C9
11
12
13
14
IRSEL
IFIN2
R1
MIXOUT
DGND
DVDD
IFIN1
XTALSEL
AGCDIS
X2
C5
C6
C8
IF FILTER
C10
IN
OUT
GND
COMPONENT VALUES
IN TABLE 1
______________________________________________________________________________________ 13
315MHz/433MHz ASK Superheterodyne
Receiver with Extended Dynamic Range
Functional Diagram
LNASRC
4
AGCDIS LNAOUT MIXIN1 MIXIN2
IRSEL
11
MIXOUT
12
IFIN1 IFIN2
17 18
15
6
8
9
MAX1473
0˚
IF LIMITING
AMPS
AUTOMATIC
GAIN
CONTROL
3
Q
I
LNA
LNAIN
AVDD
IMAGE
REJECTION
∑
2
24
7
90˚
3.2V REG
MAX1473
RSSI
V
DD5
AVDD
DVDD
DATA
FILTER
DIVIDE
BY 64
14
VCO
R
DF2
R
DF1
100kΩ
100kΩ
PHASE
DETECTOR
LOOP
FILTER
13
DGND
AGND
DATA
SLICER
5,10
÷1
÷2
CRYSTAL
DRIVER
POWER
DOWN
16
1
28
27
25
20 23 19
26
21
22
DFFB
XTALSEL
XTAL1 XTAL2
PWRDN DATAOUT
DSN DSP DFO
PDOUT OPP
Package Information
For the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages. Note that a “+”, “#”, or
“-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing per-
tains to the package regardless of RoHS status.
LAND
PACKAGE TYPE
PACKAGE CODE
OUTLINE NO.
PATTERN NO.
90-0171
28 TSSOP
U28+1
21-0066
21-0140
90-0001
32 Thin QFN-EP
T3255+3
14 ______________________________________________________________________________________
315MHz/433MHz ASK Superheterodyne
Receiver with Extended Dynamic Range
MAX1473
Revision History
REVISION REVISION
PAGES
CHANGED
DESCRIPTION
NUMBER
DATE
Added lead-free parts and exposed pad in Ordering Information and Pin
Description tables
4
5/10
1, 8
Updated Absolute Maximum Ratings, AC Electrical Characteristics, Pin
Description, Layout Considerations, Typical Application Circuit, Functional
Diagram, and Package Information; added Voltage Regulator section to the
Detailed Description section
2, 3, 4, 8, 9, 12,
13, 14
5
1/11
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 15
© 2011 Maxim Integrated Products
Maxim is a registered trademark of Maxim Integrated Products, Inc.
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