MAX1470 [MAXIM]
315MHz Low-Power, +3V Superheterodyne Receiver; 315MHz，低功耗， + 3V ，超外差接收器
| 型号： | MAX1470 |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | 315MHz Low-Power, +3V Superheterodyne Receiver |
| 文件： | 总12页 (文件大小：221K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-2135; Rev 1; 8/02
315MHz Low-Power, +3V Superheterodyne
Receiver
General Description
Features
ꢀ Operates from a Single +3.0V to +3.6V Supply
ꢀ Built-In 53dB RF Image Rejection
ꢀ -115dBm Receive Sensitivity*
The MAX1470 is a fully integrated low-power CMOS
superheterodyne receiver for use with amplitude-shift-
keyed (ASK) data in the 315MHz band. With few
required external components, and a low-current
power-down mode, it is ideal for cost- and power-sensi-
tive applications in the automotive and consumer mar-
kets. The chip consists of a 315MHz low-noise amplifier
(LNA), an image rejection mixer, a fully integrated
315MHz phase-lock-loop (PLL), a 10.7MHz IF limiting
amplifier stage with received-signal-strength indicator
(RSSI) and an ASK demodulator, and analog baseband
data-recovery circuitry.
ꢀ 250µs Startup Time
ꢀ Low 5.5mA Operating Supply Current
ꢀ 1.25µA Low-Current Power-Down Mode for
Efficient Power Cycling
ꢀ 250MHz to 500MHz Operating Band (Image
Rejection Optimized at 315MHz)
The MAX1470 is available in a 28-pin TSSOP package.
ꢀ Integrated PLL with On-Board Voltage-Controlled
Oscillator (VCO) and Loop Filter
Applications
ꢀ Selectable IF Bandwidth Through External Filter
Remote Keyless Entry
Garage Door Openers
Remote Controls
ꢀ Complete Receive System from RF to Digital Data
Out
*See Note 2, AC Electrical Characteristics.
Wireless Sensors
Ordering Information
Wireless Computer Peripherals
Security Systems
PART
TEMP RANGE
PIN-PACKAGE
Toys
MAX1470EUI
-40°C to +85°C
28 TSSOP
Video Game Controllers
Medical Systems
Typical Application Circuit appears at end of data sheet.
Pin Configuration appears at end of data sheet.
Functional Diagram
MIXOUT IFIN1
12 17
IFIN2
18
LNAOUT
6
MIXIN1
8
MIXIN2
9
IF
LIMITING
AMPS
3
LNA
LNAIN
0°
Q
I
MAX1470
4
LNASRC
90°
RSSI
DIVIDE
BY 64
14
DV
VCO
DD
DD
DATA
FILTER
2,7
R
R
DF2
100kΩ
DF1
100kΩ
AV
PHASE
DETECTOR
LOOP
FILTER
13
DGND
AGND
DATA
SLICER
CRYSTAL
DRIVER
SHUTDOWN
PEAK
5,10
DETECTOR
1
28
XTAL2
27
25
20
19
DSP
26
PDOUT
21
OPP
22
DF
XTAL1
PWRDN
DATAOUT
DSN
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
315MHz Low-Power, +3V Superheterodyne
Receiver
ABSOLUTE MAXIMUM RATINGS
AV
DV
to AGND ......................................................-0.3V to +4.0V
to DGND......................................................-0.3V to +4.0V
Operating Temperature Range
DD
DD
MAX1470EUI ...................................................-40°C to +85°C
Storage Temperature Range.............................-60°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
All Other Pins Referenced to AGND...........-0.3V to (V
+ 0.3V)
DD
Continuous Power Dissipation (T = +70°C)
A
28-Pin TSSOP (derate 13mW/°C above +70°C) .........1039mW
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(Typical Application Circuit, V
= +3.0V to +3.6V, no RF signal applied, T = -40°C to +85°C. Typical values are at V
= +3.3V, T
DD A
DD
A
= +25°C, unless otherwise noted.) (Note 1)
PARAMETER
Supply Voltage
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
V
V
3.0
3.6
DD
DD
Supply Current
I
PWRDN = V
5.5
mA
µA
DD
Shutdown Supply Current
PWRDN Voltage Input Low
I
PWRDN = GND
1.25
SHUTDOWN
V
0.4
0.4
V
IL
V
-
-
DD
PWRDN Voltage Input High
DATAOUT Voltage Output Low
DATAOUT Voltage Output High
V
V
V
V
IH
0.4
V
I
I
= 100µA
= -100µA
OL
OH
DATAOUT
DATAOUT
V
DD
V
0.4
AC ELECTRICAL CHARACTERISTICS
(Typical Application Circuit, all RF inputs and outputs are referenced to 50Ω, V
= +3.3V, T = +25°C, f
A
= 315MHz, unless oth-
RFIN
DD
erwise noted.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
GENERAL CHARACTERISTICS
Time from PWRDN deasserting to valid data
out
Maximum Startup Time
T
250
µs
ON
Maximum Receiver Input Level
RFIN
Modulation depth ≥ 60dB
0
-115
dBm
dBm
MAX
Average carrier power level (Note 2)
Peak power level (Note 2)
Minimum Receiver Input Level,
315MHz
RFIN
MIN
-109
Average carrier power level (Note 2)
Peak power level (Note 2)
-110
Minimum Receiver Input Level,
433.92MHz
dBm
MHz
-104
Receivers
f
250 to 500
RFIN
LOW-NOISE AMPLIFIER (LNA)
Input Impedance
S11
Normalized to 50Ω (Note 3)
1 - j4
-22
LNA
1dB Compression Point
P1dB
dBm
dBm
LNA
Input-Referred 3rd-Order
Intercept
IIP3
-18
-95
LNA
LO Signal Feedthrough to
Antenna
dBm
0.12 -
j4.4
Output Impedance
S22
Normalized to 50Ω
LNA
2
_______________________________________________________________________________________
315MHz Low-Power, +3V Superheterodyne
Receiver
AC ELECTRICAL CHARACTERISTICS (continued)
(Typical Application Circuit, all RF inputs and outputs are referenced to 50Ω, V
= +3.3V, T = +25°C, f
= 315MHz, unless oth-
RFIN
DD
A
erwise noted.) (Note 1)
PARAMETER
Noise Figure
SYMBOL
NF
CONDITIONS
MIN
TYP
MAX
UNITS
dB
2.0
16
LNA
Power Gain
dB
MIXER
0.25 -
j2.4
Input Impedance
S11
IIP3
Normalized to 50Ω
MIX
MIX
Input-Referred 3rd-Order
Intercept
-18
dBm
Output Impedance
Z
_
330
53
Ω
OUT MIX
f
= 315MHz, f
_ = 293.6MHz (Note 4)
40
RFIN
RF IMAGE
Image Rejection
dB
f
= 433.92MHz, f
_ = 412.52MHz
RF IMAGE
39
16
13
RFIN
Noise Figure
NF
dB
dB
MIX
Conversion Gain
330Ω IF filter load
INTERMEDIATE-FREQUENCY DEMODULATOR BLOCK
Input Impedance
Operating Frequency
RSSI Linearity
Z
_
330
10.7
1
Ω
MHz
dB
IN IF
f
IF
RSSI Dynamic Range
65
dB
P
P
< -120dBm
> -50dBm
1.2
2.0
RFIN
RFIN
RSSI Level
V
DATA FILTER
Maximum Bandwidth
DATA SLICER
BW
100
kHz
DF
Comparator Bandwidth
Maximum Load Capacitance
CRYSTAL OSCILLATOR
Reference Frequency
BW
100
10
kHz
pF
CMP
C
LOAD
f
4.7547
MHz
REF
Note 1: Parts are production tested at T = +25°C; Min and Max values are guaranteed by design and characterization.
A
Note 2: BER = 2E-3, Manchester encoded, data rate = 4kbps, IF bandwidth = 350kHz.
Note 3: Input impedance is measured at the LNAIN pin. Note that the impedance includes the 15nH inductive degeneration con-
nected from the LNASRC.
Note 4: Guaranteed by production test.
_______________________________________________________________________________________
3
315MHz Low-Power, +3V Superheterodyne
Receiver
Typical Operating Characteristics
(V
= +3.3V, T = +25°C, unless otherwise noted. Typical Application Circuit.)
A
DD
SUPPLY CURRENT vs.
SUPPLY VOLTAGE
BIT-ERROR RATE vs. AVERAGE
RF INPUT POWER
RSSI vs. AVERAGE RF INPUT POWER
6.1
5.9
5.7
5.5
5.3
5.1
4.9
4.7
10
2.2
2.0
1.8
1.6
1.4
1.2
1.0
IF BANDWIDTH = 350kHz
T
= +85°C
= +25°C
A
1
T
A
T
= -40°C
A
0.1
2.7
-40
250
2.9
3.1
3.3
3.5
-120
-118
-116
-114
-140 -120 -100 -80 -60 -40
AVERAGE RF INPUT POWER (dBm)
-20
SUPPLY VOLTAGE (V)
AVERAGE RF INPUT POWER (dBm)
RECEIVER SENSITIVITY
vs. TEMPERATURE
SYSTEM GAIN vs. IF FREQUENCY
IMAGE REJECTION vs. TEMPERATURE
60
50
40
30
20
10
0
-116.0
-116.5
-117.0
-117.5
-118.0
60
55
FROM RFIN TO MIXOUT
AVERAGE RF INPUT POWER
f
LO
= 304.3MHz
1% BER
IF BANDWIDTH = 350kHz
UPPER SIDEBAND
53dB IMAGE
REJECTION
50
45
LOWER SIDEBAND
30
-10
-20
0
20
40
60
80
-40
-20
0
20
40
60
80
0
10
20
40
TEMPERATURE (°C)
IF FREQUENCY (MHz)
TEMPERATURE (°C)
SUPPLY CURRENT
vs. LO FREQUENCY
INPUT IMPEDANCE vs.
LNA GAIN vs. RF FREQUENCY
INDUCTIVE DEGENERATION
MAX1470 toc09
0
30
25
20
15
10
7.2
6.7
6.2
5.7
5.2
4.7
4.2
70
60
50
40
30
20
10
0
LC TANK
FILTER TUNED
TO 315MHz
-50
-100
-150
-200
-250
-300
-350
REAL IMPEDANCE
IMAGINARY IMPEDANCE
275
300
325
350
375
150 200 250 300 350 400 450 500
LO FREQUENCY (MHz)
1
10
100
RF FREQUENCY (MHz)
INDUCTIVE DEGENERATION (nH)
4
_______________________________________________________________________________________
315MHz Low-Power, +3V Superheterodyne
Receiver
Typical Operating Characteristics (continued)
(V
= +3.3V, T = +25°C, unless otherwise noted. Typical Application Circuit.)
DD
A
NORMALIZED IF GAIN
vs. IF FREQUENCY
IMAGE REJECTION
vs. RF FREQUENCY
5
0
60
50
40
30
20
3dB BANDWIDTH = 11.7MHz
-5
-10
-15
-20
1
10
100
150 200 250 300 350 400 450 500
RF FREQUENCY (MHz)
IF FREQUENCY (MHz)
S11 MAGNITUDE-LOG PLOT OF RFIN
S11 SMITH PLOT OF RFIN
MAX1470 toc12
315MHz
0dB
50MHz
10dB/
div
315MHz,
-29.5dB
1GHz
1GHz
50MHz
_______________________________________________________________________________________
5
315MHz Low-Power, +3V Superheterodyne
Receiver
Pin Description
PIN
NAME
FUNCTION
1
2, 7
3
XTAL1
1st Crystal Input
AV
Positive Analog Supply Voltage for RF Sections. Decouple to AGND with 0.01µF capacitors.
Low-Noise Amplifier Input
DD
LNAIN
Low-Noise Amplifier Source. Connect inductor to ground to set LNA input impedance (see Low-
Noise Amplifier section).
4
LNASRC
5, 10
AGND
LNAOUT
MIXIN1
MIXIN2
Analog Ground
6
8
9
Low-Noise Amplifier Output
1st Differential Mixer Input. Must be AC-coupled to driving input.
2nd Differential Mixer Input. Must be AC-coupled to driving input.
11, 15, 16,
23, 24
I.C.
Internally Connected. Do not make connection to these pins.
12
13
14
17
18
19
20
21
22
25
26
27
28
MIXOUT
DGND
330Ω Mixer Output
Digital Ground
DV
Positive Digital Supply Voltage. Decouple to DGND with a 0.01µF capacitor.
1st Differential Intermediate Frequency Limiter Amplifier Input
2nd Differential Intermediate Frequency Limiter Amplifier Input
Positive Data Slicer Input
DD
IFIN1
IFIN2
DSP
DSN
Negative Data Slicer Input
OPP
Noninverting Op Amp. Input for the Sallen-Key data filter.
Data Filter Feedback Node. Input for the feedback of the Sallen-Key data filter.
Digital Baseband Data Output
DF
DATAOUT
PDOUT
PWRDN
XTAL2
Peak Detector Output
Power-Down Select Input. Drive this pin with a logic low to shut down the IC.
2nd Crystal Input
and the LC tank network between the LNA output and
Detailed Description
the mixer inputs.
The MAX1470 CMOS superheterodyne receiver and a
few external components provide the complete receive
chain from the antenna to the digital output data.
Depending on signal power and component selection,
data rates as high as 100kbps can be achieved.
The off-chip inductive degeneration is achieved by con-
necting an inductor from LNASRC to AGND. This inductor
sets the real part of the input impedance at LNAIN, allow-
ing for a more flexible match for low-input impedance
such as a PC board trace antenna. A nominal value for
this inductor with a 50Ω input impedance is 15nH, but is
affected by PC board trace. See Typical Operating
Characteristics for the relationship between the induc-
tance and input impedance.
The MAX1470 is designed to receive binary ASK data
on a 315MHz carrier. ASK modulation uses a difference
in amplitude of the carrier to represent logic 0 and logic
1 data.
Low-Noise Amplifier
The LNA is a cascode amplifier with off-chip inductive
degeneration that achieves approximately 16dB of
power gain with a 2.0dB noise figure and an IIP3 of
-18dBm. The gain and noise figure is dependent on
both the antenna matching network at the LNA input,
The LC tank filter connected to LNAOUT comprises L1
and C9 (see Typical Applications Circuit). L1 and C9 val-
ues are selected to resonate at the RF input frequency of
315MHz. The resonant frequency is given by:
6
_______________________________________________________________________________________
315MHz Low-Power, +3V Superheterodyne
Receiver
To allow the smallest possible IF bandwidth (for best
sensitivity), the tolerance of the reference must be mini-
mized.
1
ƒ =
2π L
× C
TOTAL
TOTAL
Intermediate Frequency
The IF section presents a differential 330Ω load to pro-
vide matching for the off-chip ceramic filter. The inter-
nal five AC-coupled limiting amplifiers produce an
overall gain of approximately 65dB, with a bandpass-fil-
ter-type response centered near the 10.7MHz IF fre-
quency with a 3dB bandwidth of approximately
11.5MHz. The RSSI circuit demodulates the IF to base-
band by producing a DC output proportional to the log
of the IF signal level with a slope of approximately
15mV/dB (see Typical Operating Characteristics).
where:
L
= L1+L
PARASITICS
TOTAL
C
= C9+C
TOTAL
PARASITICS
L
and C
include inductance and
PARASITICS
PARASITICS
capacitance of the PC board traces, package pins,
mixer input impedance, LNA output impedance, etc.
These parasitics at high frequencies cannot be ignored
and can have a dramatic effect on the tank filter center
frequency. Lab experimentation should be done to opti-
mize the center frequency of the tank.
Applications Information
Crystal Oscillator
The XTAL oscillator in the MAX1470 is designed to pre-
sent a capacitance of approximately 3pF between
XTAL1 and XTAL2. If a crystal designed to oscillate
with a different load capacitance is used, the crystal is
pulled away from its stated operating frequency, intro-
ducing an error in the reference frequency. Crystals
designed to operate with higher differential load capac-
itance always pull the reference frequency higher. For
example, a 4.7547MHz crystal designed to operate
with a 10pF load capacitance oscillates at 4.7563MHz
with the MAX1470, causing the receiver to be tuned to
315.1MHz rather than 315.0MHz, an error of about
100kHz, or 320ppm.
Mixer
A unique feature of the MAX1470 is the integrated
image rejection of the mixer. This device was designed
to eliminate the need for a costly front-end SAW filter for
many applications. The advantage of not using a SAW
filter is increased sensitivity, simplified antenna match-
ing, less board space, and lower cost.
The mixer cell is a pair of double-balanced mixers that
perform an IQ downconversion of the 315MHz RF input
to the 10.7MHz IF with low-side injection (i.e., f = f
LO
RF
- f ). The image rejection circuit then combines these
IF
signals to achieve ~50dB of image rejection over the
full temperature range. Low-side injection is required
due to the on-chip image-rejection architecture. The IF
output is driven by a source-follower, biased to create a
driving impedance of 330Ω to interface with an off-chip
330Ω ceramic IF filter. The voltage conversion gain dri-
ving a 330Ω load is approximately 13dB.
In actuality, the oscillator pulls every crystal. The crys-
tal’s natural frequency is really below its specified fre-
quency, but when loaded with the specified load
capacitance, the crystal is pulled and oscillates at its
specified frequency. This pulling is already accounted
for in the specification of the load capacitance.
Additional pulling can be calculated if the electrical
parameters of the crystal are known. The frequency
pulling is given by:
Phase-Lock Loop
The PLL block contains a phase detector, charge
pump/integrated loop filter, VCO, asynchronous 64x
clock divider, and crystal oscillator. This PLL does not
require any external components. The quadrature VCO
is centered at the nominal LO frequency of 304.3MHz.
For an input RF frequency of 315MHz, a reference fre-
quency of 4.7547MHz is needed for a 10.7MHz IF fre-
quency (low-side injection is required). The relationship
between the RF, IF, and reference frequencies is given
by:
C
2
1
+C
1
+C
6
m
ƒ
=
−
× 10
p
C
C
case
load
case
spec
where:
f is the amount the crystal frequency is pulled in ppm.
p
C
C
C
C
is the motional capacitance of the crystal.
is the case capacitance.
m
f
= (f - f ) / 64
RF IF
REF
case
spec
load
is the specified load capacitance.
is the actual load capacitance.
_______________________________________________________________________________________
7
315MHz Low-Power, +3V Superheterodyne
Receiver
When the crystal is loaded as specified, i.e., C
spec
=
load
C
, the frequency pulling equals zero.
MAX1470
Data Filter
RSSI
The data filter is implemented as a 2nd-order lowpass
Sallen-Key filter. The pole locations are set by the combi-
nation of two on-chip resistors and two external capaci-
tors. Adjusting the value of the external capacitors
changes the corner frequency to optimize for different
data rates. The corner frequency should be set to
approximately 1.5 times the fastest expected data rate
from the transmitter. Keeping the corner frequency near
the data rate rejects any noise at higher frequencies,
resulting in an increase in receiver sensitivity.
R
100kΩ
R
100kΩ
DF1
DF2
19
DSP
21
OPP
22
DF
C6
C5
The configuration shown in Figure 1 can create a
Butterworth or Bessel response. The Butterworth filter
offers a very flat amplitude response in the passband
and a roll-off rate of 40dB/decade for the two-pole filter.
The Bessel filter has a linear phase response, which
works well for filtering digital data. To calculate the
value of C5 and C6, use the following equations along
with the coefficients in Table 1:
Figure 1. Sallen-Key Lowpass Data Filter
Choosing standard capacitor values changes C5 to
470pF and C6 to 220pF, as shown in the Typical
Application Circuit.
Data Slicer
The purpose of the data slicer is to take the analog out-
put of the data filter and convert it to a digital signal.
This is achieved by using a comparator and comparing
the analog input to a threshold voltage. The threshold
voltage is set by the voltage on DSN, which is connect-
ed to the negative input of the data slicer comparator.
The positive input is connected to the output of the data
filter internally, and also the DSP pin for use with some
data slicer configurations.
b
C5 =
a 100kΩ π f
(
)( )(
c
)
)
a
C6 =
4 100kΩ π f
(
)( )(
c
where f is the desired 3dB corner frequency.
C
The suggested data slicer configuration uses a resistor
(R1) connected between DSN and DSP with a capaci-
tor (C4) from DSN to DGND (Figure 2). This configura-
tion averages the analog output of the filter and sets the
threshold to approximately 50% of that amplitude. With
this configuration, the threshold automatically adjusts
as the analog signal varies, minimizing the possibility
for errors in the digital data. The sizes of R1 and C4
affect how fast the threshold tracks the analog ampli-
tude. Be sure to keep the corner frequency of the RC
circuit lower than the lowest expected data rate.
For example, to choose a Butterworth filter response
with a corner frequency of 5kHz:
1.000
C5 =
C6 =
≈ 450pF
1.414 100kΩ 3.14 5kHz
(
)(
)(
)(
)
1.414
≈ 225pF
4 100kΩ 3.14 5kHz
( )(
)(
)(
)
Note that a long string of zeros or ones can cause the
threshold to drift. This configuration works best if a cod-
ing scheme, such as Manchester code, which has an
equal number of zeros and ones, is used.
Table 1. Coefficents to Calculate C5 and C6
FILTER TYPE
a
b
Butterworth
(Q = 0.707)
1.414
1.000
Peak Detector
The peak detector output (PDOUT), in conjunction with
an external RC filter, creates a DC output voltage equal
to the peak value of the data signal. The resistor pro-
vides a path for the capacitor to discharge, allowing the
Bessel
(Q = 0.577)
1.3617
0.618
8
_______________________________________________________________________________________
315MHz Low-Power, +3V Superheterodyne
Receiver
DATA
FILTER
MAX1470
MAX1470
DATA
FILTER
DATA
SLICER
DATA
SLICER
25
20
DSN
19
DSP
25
20
DSN
19
DSP
26
PDOUT
DATA OUT
R1
DATA OUT
C4
25kΩ
250kΩ
47nF
47nF
Figure 2. Generating Data Slicer Threshold
Figure 3. Using PDOUT for Faster Startup
peak detector to dynamically follow peak changes of
the data filter output voltage. For faster receiver startup,
the circuit shown in Figure 3 can be used.
Layout Considerations
A properly designed PC board is an essential part
of any RF/microwave circuit. On high-frequency inputs
and outputs, use controlled-impedance lines and
keep them as short as possible to minimize losses and
radiation. At high frequencies, trace lengths that are
approximately 1/20 the wavelength or longer become
antennas. For example, a 2in trace at 315MHz can act
as an antenna.
433.92MHz Band
The MAX1470 can be configured to receive ASK modu-
lated data with carrier frequency ranging from 250MHz
to 500MHz. Only a small number of components need
to be changed to retune the RF section to the desired
RF frequency.
Keeping the traces short also reduces parasitic induc-
tance. Generally, 1in of a PC board trace adds about
20nH of parasitic inductance. The parasitic inductance
can have a dramatic effect on the effective inductance.
For example, a 0.5in trace connecting a 100nH induc-
tor adds an extra 10nH of inductance or 10%.
Table 2 shows a list of changed components and their
values for a 433.92MHz RF; all other components
remain unchanged.
The integrated image rejection of the MAX1470 is
specifically designed to function with a 315MHz input
frequency by attenuating any signal at 293.6MHz. The
benefit of the on-chip image rejection is that an external
SAW filter is not needed, reducing cost and the inser-
tion loss associated with SAW filters. The image rejec-
tion cannot be retuned for different RF input
frequencies and therefore is degraded. The image
rejection at 433.92MHz is typically 39dB.
To reduce the parasitic inductance, use wider traces
and a solid ground or power plane below the signal
traces. Using a solid ground plane can reduce the par-
asitic inductance from approximately 20nH/in to 7nH/in.
Also, use low-inductance connections to ground on all
GND pins, and place decoupling capacitors close to all
V
DD
connections.
Table 2. Changed Component Values for
433.92MHz
Chip Information
TRANSISTOR COUNT: 1835
PROCESS: CMOS
COMPONENT
VALUE FOR 433MHz RF
C9
L1
L2
Y1
1.0pF
15nH
56nH
6.6128MHz
Note: These values are affected by PC board layout.
_______________________________________________________________________________________
9
315MHz Low-Power, +3V Superheterodyne
Receiver
Typical Application Circuit
+3.3V
Y1
4.7547MHz
C12
0.01µF
ANTENNA
(RFIN)
1
2
3
4
5
6
7
8
9
XTAL1
XTAL2 28
PWRDN 27
PDOUT 26
SHUTDOWN
AV
DD
C7
100pF
L2
100nH
LNAIN
L3
15nH
LNASRC
AGND
DATAOUT 25
I.C. 24
+3.3V
L1
27nH
DATAOUT
LNAOUT
I.C. 23
C2
0.01µF
C9
2.2pF
AV
DD
DF 22
MAX1470
C11
100pF
MIXIN1
MIXIN2
OPP 21
DSN 20
DSP 19
IFIN2 18
IFIN1 17
I.C. 16
C5
470pF
C8
100pF
C10
220pF
10 AGND
11 I.C.
C3
1500pF
C6
220pF
R1
5kΩ
12 MIXOUT
13 DGND
C4
0.47µF
14 DV
I.C. 15
DD
C1
0.01µF
U1
10.7MHz
10 ______________________________________________________________________________________
315MHz Low-Power, +3V Superheterodyne
Receiver
Pin Configuration
TOP VIEW
XTAL1
AV
1
2
3
4
5
6
7
8
9
28 XTAL2
27 PWRDN
26 PDOUT
25 DATAOUT
24 I.C.
DD
LNAIN
LNASRC
AGND
MAX1470
LNAOUT
23 I.C.
AV
22 DF
DD
MIXIN1
MIXIN2
21 OPP
20 DSN
19 DSP
18 IFIN2
17 IFIN1
16 I.C.
AGND 10
I.C. 11
MIXOUT 12
DGND 13
DV
14
15 I.C.
DD
TSSOP
______________________________________________________________________________________ 11
315MHz Low-Power, +3V Superheterodyne
Receiver
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2002 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
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