LTC4232_15 [Linear]
5A Integrated Hot Swap Controller;
| 型号： | LTC4232_15 |
| 厂家： | 
Linear |
| 描述： | 5A Integrated Hot Swap Controller |
| 文件： | 总16页 (文件大小：738K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC4232
5A Integrated Hot Swap
Controller
FEATURES
DESCRIPTION
The LTC®4232 is an integrated solution for Hot Swap™
applications that allows a board to be safely inserted and
removed from a live backplane. The part integrates a Hot
Swap controller, power MOSFET and current sense resis-
tor in a single package for small form factor applications.
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Small Footprint
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33mΩ MOSFET with R
SENSE
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Wide Operating Voltage Range: 2.9V to 15V
Adjustable, 10% Accurate Current Limit
Current and Temperature Monitor Outputs
Overtemperature Protection
Adjustable Current Limit Timer Before Fault
Power Good and Fault Outputs
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The LTC4232 provides separate inrush current control
and a 10% accurate 5A current limit with foldback cur-
rent limiting. The current limit threshold can be adjusted
dynamically using an external pin. Additional features
include a current monitor output that amplifies the sense
resistor voltage for ground referenced current sensing
andaMOSFETtemperaturemonitoroutput.Thermallimit,
overvoltage, undervoltage and power good monitoring
are also provided.
Adjustable Inrush Current Control
2% Accurate Undervoltage and Overvoltage Protection
Pin Compatible with LTC4217 (DFN Package Only)
Available in 16-Lead 5mm × 3mm DFN Package
APPLICATIONS
TheLTC4232-1(separatedatasheet)allowsfasterturn-on
than the LTC4232 by providing 16ms debounce delay and
external control of the GATE ramp rate.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. Hot Swap and PowerPath are trademarks of Linear Technology
Corporation. All other trademarks are the property of their respective owners.
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RAID Systems
Server I/O Cards
Industrial
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TYPICAL APPLICATION
12V, 5A Card Resident Application with Auto-Retry
Power-Up Waveforms
V
12V
5A
OUT
V
OUT
FB
12V
DD
*
V
IN
10V/DIV
+
CONTACT
BOUNCE
150k
20k
330µF
LTC4232DHC
107k
UV
I
IN
10k
0.1A/DIV
FLT
5.23k
10k
V
OUT
OV
GATE
PG
10V/DIV
TIMER
I
PG
10V/DIV
SET
I
INTV
CC
ADC
MON
1µF
GND
4232 TA01b
20k
25ms/DIV
4232 TA01a
*DIODES INC. SMAJ22A
4232fb
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For more information www.linear.com/LTC4232
LTC4232
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Notes 1, 2)
TOP VIEW
Supply Voltage (V )................................. –0.3V to 28V
DD
Input Voltages
V
1
2
3
4
5
6
7
8
16
15
14
V
DD
DD
SET
MON
FB, OV, UV ..............................................–0.3V to 12V
TIMER................................................... –0.3V to 3.5V
SENSE .............................V – 10V or – 0.3V to V
UV
OV
I
I
TIMER
13 FB
17
SENSE
DD
DD
INTV
CC
12 FLT
11 PG
10 GATE
Output Voltages
, I ................................................. –0.3V to 3V
GND
OUT
OUT
I
SET MON
PG, FLT .................................................. –0.3V to 35V
9
OUT
OUT ............................................ –0.3V to V + 0.3V
DD
INTV .................................................. –0.3V to 3.5V
DHC PACKAGE
16-LEAD (5mm × 3mm) PLASTIC DFN
CC
GATE (Note 3)........................................ –0.3V to 33V
T
= 125°C, θ = 46°C/W
JA
EXPOSED PAD (PIN 17) IS SENSE,
= 46°C/W SOLDERED, OTHERWISE θ = 140°C/W
JMAX
Operating Temperature Range
θ
JA
JA
LTC4232C................................................ 0°C to 70°C
LTC4232I .............................................–40°C to 85°C
Junction Temperature (Notes 4, 5)........................ 125°C
Storage Temperature Range .................. –65°C to 150°C
ORDER INFORMATION
LEAD FREE FINISH
LTC4232CDHC#PBF
LTC4232IDHC#PBF
TAPE AND REEL
PART MARKING*
4232
PACKAGE DESCRIPTION
TEMPERATURE RANGE
0°C to 70°C
LTC4232CDHC#TRPBF
LTC4232IDHC#TRPBF
16-Lead (5mm × 3mm) Plastic DFN
16-Lead (5mm × 3mm) Plastic DFN
4232
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS The l denotes those specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VDD = 12V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
DC Characteristics
l
l
l
V
Input Supply Range
2.9
15
3
V
mA
V
DD
I
Input Supply Current
MOSFET On, No Load
1.6
DD
V
Input Supply Undervoltage Lockout
OUT Pin Leakage Current
V
Rising
2.63
2.73
2.85
DD(UVL)
DD
l
l
I
V
V
= V
= V
= 0V, V = 15V
0
2
150
4
µA
µA
OUT
OUT
OUT
GATE
GATE
DD
= 12V
1
l
l
l
l
l
∆V
/∆t
GATE Pin Turn-On Ramp Rate
MOSFET + Sense Resistor On-Resistance
Current Limit Threshold
0.15
15
0.3
33
0.55
50
V/ms
mΩ
A
GATE
R
ON
I
V = 1.23V, I Open
5.0
1.2
2.6
5.6
1.5
2.9
6.1
1.8
3.3
LIM(TH)
SET
V
V
= 0V, I Open
A
FB
FB
SET
= 1.23V, R = 20kΩ
A
SET
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For more information www.linear.com/LTC4232
LTC4232
ELECTRICAL CHARACTERISTICS The l denotes those specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VDD = 12V unless otherwise noted.
SYMBOL
Inputs
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
l
l
l
l
l
l
I
OV, UV, FB Pin Input Current
OV, UV, FB Pin Threshold Voltage
OV Pin Hysteresis
V = 1.2V
0
1.235
20
1
1.26
30
µA
V
IN
V
V
Rising
1.21
10
TH
PIN
UV
∆V
∆V
mV
mV
V
OV(HYST)
UV(HYST)
UV(RTH)
UV Pin Hysteresis
50
80
110
0.7
30
V
UV Pin Reset Threshold Voltage
FB Pin Power Good Hysteresis
V
Falling
0.55
10
0.62
20
∆V
mV
kΩ
FB(HYST)
R
I
Pin Internal Resistor
SET
19
20
21
ISET
Outputs
l
l
l
l
l
l
l
l
l
l
l
l
V
V
INTV Output Voltage
V
= 5V, 15V, I = 0mA, –10mA
LOAD
2.8
3.1
0.4
0
3.3
0.8
V
V
INTVCC
OL
CC
DD
PG, FLT Pin Output Low Voltage
PG, FLT Pin Input Leakage Current
TIMER Pin High Threshold
I = 2mA
V = 30V
I
10
µA
V
OH
V
V
V
TIMER
V
TIMER
V
TIMER
V
TIMER
Rising
Falling
= 0V
1.2
0.1
1.235
0.21
–100
2
1.28
0.3
TIMER(H)
TIMER(L)
TIMER Pin Low Threshold
V
I
I
I
TIMER Pin Pull-Up Current
TIMER Pin Pull-Down Current
–80
1.4
–120
2.6
µA
µA
%
TIMER(UP)
TIMER(DN)
TIMER(RATIO)
= 1.2V
TIMER Pin Current Ratio I
/I
1.6
2
2.7
TIMER(DN) TIMER(UP)
A
I
I
Pin Current Gain
Pin Offset Current
I
I
= 2.5A
18.5
20
21.5
4.5
µA/A
µA
µA
µA
mA
IMON
MON
MON
OUT
OUT
I
I
I
I
= 150mA
0
OFF(IMON)
GATE(UP)
GATE(DN)
GATE(FST)
Gate Pull-Up Current
Gate Drive On, V
= V
= 12V
–18
180
–24
250
140
–29
400
GATE
OUT
Gate Pull-Down Current
Gate Drive Off, V
= 18V, V
= 12V
GATE
OUT
Gate Fast Pull-Down Current
Fast Turn Off, V
= 18V, V
= 12V
OUT
GATE
AC Characteristics
l
l
t
Input High (OV), Input Low (UV) to Gate Low
Propagation Delay
V
< 16.5V Falling
GATE
8
1
10
5
µs
µs
PHL(GATE)
t
Short-Circuit to Gate Low
V
= 0, Step I
to 6A,
SENSE
PHL(ILIM)
FB
V
< 15V Falling
GATE
l
l
l
t
t
t
Turn-On Delay
Step V to 2V, V
> 13V
to 3A
50
1.3
50
100
2
150
2.7
ms
ms
ms
D(ON)
UV
GATE
Circuit Breaker Filter Delay Time (Internal)
Auto-Retry Turn-On Delay (Internal)
V = 0V, Step I
FB SENSE
D(CB)
100
150
D(AUTO-RETRY)
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All currents into pins are positive, all voltages are referenced to
GND unless otherwise specified.
Note 3: An internal clamp limits the GATE pin to a maximum of 6.5V
above OUT. Driving this pin to voltages beyond the clamp may damage the
device.
Note 4: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
Note 5: T is calculated from the ambient temperature, T , and power
J A
dissipation, P , according to the formula:
D
T = T + (P • 46°C/W)
J
A
D
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For more information www.linear.com/LTC4232
LTC4232
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, VDD = 12V unless otherwise noted.
UV Low-High Threshold
vs Temperature
IDD vs VDD
INTVCC Load Regulation
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
2.0
1.8
1.6
1.4
1.234
1.232
1.230
1.228
1.226
V
= 5V
DD
V
= 3.3V
DD
85°C
25°C
–40°C
1.2
1.0
0
–2
–4
–6
–8 –10 –12 –14
(mA)
0
5
10
15
(V)
20
25
30
–50
–25
0
25
50
75
100
I
V
TEMPERATURE (°C)
LOAD
DD
4232 G02
4232 G01
4232 G03
Timer Pull-Up Current
vs Temperature
Current Limit Delay
UV Hysteresis vs Temperature
(tPHL(ILIM) vs Overdrive)
0.10
0.08
0.06
0.04
–110
–105
–100
–95
1000
100
10
1
–90
0.1
–50
–25
0
25
50
75
100
–50
–25
0
25
50
75
100
0
10
20
30
TEMPERATURE (°C)
TEMPERATURE (°C)
OUTPUT CURRENT (A)
4232 G04
4232 G05
4232 G06
Current Limit Adjustment
(IOUT vs RSET
Current Limit Threshold Foldback
)
ISET Resistor vs Temperature
6
5
4
3
2
1
0
6
5
4
3
2
1
0
22
21
20
19
18
I
OPEN
SET
0
0.2
0.4
0.6
0.8
1.0
1.2
1k
10k
100k
(Ω)
1M
10M
–50
–25
0
25
50
75
100
FB VOLTAGE (V)
R
SET
TEMPERATURE (°C)
4232 G07
4232 G08
4232 G09
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For more information www.linear.com/LTC4232
LTC4232
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, VDD = 12V unless otherwise noted.
PG, FLT Output Low Voltage
vs Current
RON vs VDD and Temperature
MOSFET SOA Curve
10
1
14
12
10
8
60
50
40
30
20
10
0
PG
FLT
V
= 3.3V, 12V
DD
1ms
10ms
6
100ms
1s
10s
DC
0.1
0.01
4
T
= 25°C
A
2
MULTIPLE PULSE
DUTY CYCLE = 0.2
0
0.1
1
10
100
0
2
4
6
8
10
12
–50
–25
0
25
50
75
100
V
(V)
CURRENT (mA)
TEMPERATURE (°C)
DS
4232 G11
4232 G12
4232 G10
GATE Pull-Up Current
vs Temperature
Gate Pull-Up Current
vs Gate Drive
IMON vs Temperature and VDD
7
6
5
4
3
2
1
0
105
100
95
–26.0
–25.5
–25.0
–24.5
–24.0
V
LOAD
= 3.3V, 12V
DD
V
= 12V
DD
I
= 5A
90
V
= 3.3V
DD
85
80
0
–5
–10
–15
(µA)
–50
–25
0
25
TEMPERATURE (°C)
50
75
100
–50
–25
0
25
50
75
100
–20
–25
–30
TEMPERATURE (°C)
I
GATE
4232 G15
4232 G13
4232 G14
Gate Drive vs VDD
Gate Drive vs Temperature
VISET vs Temperature
6.2
6.0
5.8
5.6
5.4
5.2
6.15
6.14
6.13
6.12
6.11
6.10
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0
5
10
15
(V)
20
25
30
–50
–25
0
25
50
75
100
–50 –25
0
25 50 75 100 125 150
V
TEMPERATURE (°C)
TEMPERATURE (°C)
DD
4232 G16
4232 G17
4232 G18
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For more information www.linear.com/LTC4232
LTC4232
PIN FUNCTIONS
FB: Foldback and Power Good Input. Connect this pin to
an external resistive divider from OUT. If the voltage falls
below 0.6V, the current limit is reduced using a foldback
profile (see the Typical Performance Characteristics sec-
tion). If the voltage falls below 1.21V, the PG pin will pull
low to indicate the power is bad.
OV: Overvoltage Comparator Input. Connect this pin to an
external resistive divider from V . If the voltage at this
DD
pin rises above 1.235V, an overvoltage is detected and
the switch turns off. Tie to GND if unused.
PG: Power Good Indicator. Open-drain output pulls low
whentheFBpindropsbelow1.21Vindicatingthepoweris
bad. If the FB pin rises above 1.23V and the GATE to OUT
voltage exceeds 4.2V, the open-drain pull-down releases
the PG pin to go high.
FLT: Overcurrent Fault Indicator. Open-drain output pulls
low when an overcurrent fault has occurred and the circuit
breaker trips. For overcurrent auto-retry tie to UV pin (see
the Applications Information section for details).
SENSE: Current Sense Node and MOSFET Drain. The cur-
GATE: Gate Drive for Internal N-channel MOSFET. An
internal 24µA current source charges the gate of the
N-channel MOSFET. At start-up the GATE pin ramps up at
a 0.3V/ms rate determined by internal circuitry. During an
undervoltage or overvoltage condition a 250µA pull-down
current turns the MOSFET off. During a short-circuit or
undervoltage lockout condition, a 140mA pull-down cur-
rent source between GATE and OUT is activated.
rent limit circuit controls the GATE pin to limit the sense
voltage between the V and SENSE pins to 42mV (5.6A)
DD
orlessdependingonthevoltageattheFBpin.Theexposed
pad on DHC packages are connected to SENSE and must
be soldered to an electrically isolated printed circuit board
trace to properly transfer the heat out of the package.
TIMER: Timer Input. Connect a capacitor between this pin
and ground to set a 12ms/µF duration for current limit
before the switch is turned off. If the UV pin is toggled
low while the MOSFET switch is off, the switch will turn
onagainfollowingacooldowntimeof518ms/µFduration.
GND: Device Ground.
I
: Current Monitor Output. The current in the internal
MON
MOSFETswitchisdividedby50,000andsourcedfromthis
pin. Placing a 20k resistor from this pin to GND creates a
0Vto2Vvoltageswingwhencurrentrangesfrom0Ato5A.
Tie this pin to INTV for a fixed 2ms overcurrent delay
CC
and 100ms auto-retry time.
UV: Undervoltage Comparator Input. Tie high if unused.
INTV : Internal 3.1V Supply Decoupling Output. This pin
CC
Connect this pin to an external resistive divider from V .
DD
must have a 1µF or larger bypass capacitor.
If the UV pin voltage falls below 1.15V, an undervoltage is
detected and the switch turns off. Pulling this pin below
0.62V resets the overcurrent fault and allows the switch
to turn back on (see the Applications Information section
for details). If overcurrent auto-retry is desired then tie
this pin to the FLT pin.
I
:CurrentLimitAdjustmentPin. Fora5.6Acurrentlimit
SET
value open this pin. This pin is driven by a 20k resistor
in series with a voltage source. The pin voltage is used
to generate the current limit threshold. The internal 20k
resistor and an external resistor between I and ground
SET
create an attenuator that lowers the current limit value.
V : Supply Voltage and Current Sense Input. This pin
DD
Due to circuit tolerance, the I
resistor should not be
SET
has an undervoltage lockout threshold of 2.73V.
less than 2k. In order to match the temperature variation
of the sense resistor, the voltage on this pin increases at
thesamerateasthesenseresistanceincreases. Therefore
the voltage at I
pin is proportional to temperature of
SET
the MOSFET switch.
OUT: Output of Internal MOSFET Switch. Connect this pin
directly to the load.
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For more information www.linear.com/LTC4232
LTC4232
FUNCTIONAL DIAGRAM
SENSE
(EXPOSED PAD)
GATE
6.15V
INTERNAL 7.5mΩ
SENSE RESISTOR
INTERNAL 25mΩ
MOSFET
V
OUT
DD
I
I
MON
SET
CLAMP
CHARGE
PUMP
AND GATE
DRIVER
f = 2MHz
–
+
CS
INRUSH
20k
0.6V POSITIVE
+–
0.3V/ms
TEMPERATURE
COEFFICIENT
REFERENCE
X1
OUT
FB
CM
FOLDBACK
0.6V
+
1.235V
+
–
UV
RST
OV
PG
–
UV
1.235V
LOGIC
PG
0.62V
+
–
0.21V
+
–
FLT
TM1
TM2
INTV
CC
OV
+
–
100µA
1.235V
2µA
+
–
V
DD
V
–
+
DD
1.235V
3.1V
GEN
INTV
UVLO1
CC
2.73V
–
UVLO2
TIMER
+
2.65V
4232 BD
GND
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For more information www.linear.com/LTC4232
LTC4232
OPERATION
The Functional Diagram displays the main circuits of the
device. The LTC4232 is designed to turn a board’s supply
voltageonandoffinacontrolledmannerallowingtheboard
to be safely inserted and removed from a live backplane.
TheLTC4232includesa25mΩMOSFETanda7.5mΩcur-
rent sense resistor. During normal operation, the charge
pump and gate driver turn on the pass MOSFET’s gate to
provide power to the load. The inrush current control is
accomplished by the INRUSH circuit. This circuit limits
the GATE ramp rate to 0.3V/ms and hence controls the
voltage ramp rate of the output capacitor.
ing the 2µA current source until the voltage drops below
0.21V (Comparator TM1) which tells the logic to start an
internal 100ms timer. At this point, the pass transistor
has cooled and it is safe to turn it on again. It is suitable
for many applications to use an internal 2ms overcurrent
timer with a 100ms cooldown period. Tying the TIMER
pin to INTV sets this default timing.
CC
The output voltage is monitored using the FB pin and the
PG comparator to determine if the power is available for
the load. The power good condition is signaled by the PG
pin using an open-drain pull-down transistor.
Thecurrentsense(CS)amplifiermonitorstheloadcurrent
usingthevoltagesensedacrossthecurrentsenseresistor.
The CS amplifier limits the current in the load by reduc-
ing the GATE-to-OUT voltage in an active control loop. It
is simple to adjust the current limit threshold using the
TheFunctionalDiagramalsoshowsthemonitoringblocks
of the LTC4232. The two comparators on the left side
include the UV and OV comparators. These comparators
determineiftheexternalconditionsarevalidpriortoturning
on the MOSFET. But first the undervoltage lockout circuits
UVLO1 and UVLO2 must validate the input supply and
current setting (I ) pin. This allows a different threshold
SET
during other times such as start-up.
the internally generated 3.1V supply (INTV ) and gener-
CC
A short circuit on the output to ground causes significant
power dissipation during active current limiting. To limit
this power, the foldback amplifier reduces the current
limit value from 5.6A to 1.5A in a linear manner as the
FB pin drops below 0.6V (see the Typical Performance
Characteristics section).
ate the power up initialization to the logic circuits. If the
external conditions remain valid for 100ms the MOSFET
is allowed to turn on.
Other features include MOSFET current and temperature
monitoring. The current monitor (CM) outputs a current
proportionaltothesenseresistorcurrent.Thiscurrentcan
drive an external resistor or other circuits for monitoring
purposes. AvoltageproportionaltotheMOSFETtempera-
If an overcurrent condition persists, the TIMER pin ramps
up with a 100µA current source until the pin voltage
exceeds 1.235V (comparator TM2). This indicates to the
logic that it is time to turn off the pass MOSFET to prevent
overheating. At this point the TIMER pin ramps down us-
ture is output to the I
pin. The MOSFET temperature
SET
allows external circuits to predict failure and shutdown
the system.
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For more information www.linear.com/LTC4232
LTC4232
APPLICATIONS INFORMATION
The typical LTC4232 application is in a high availability
system that uses a positive voltage supply to distribute
power to individual cards. A complete application circuit
is shown in Figure 1. External component selection is
discussed in detail in the following sections.
V
DD
+ 6.15
GATE
OUT
SLOPE = 0.3V/ms
V
DD
V
12V
2A
OUT
V
OUT
12V
DD
R5
C
COMP
Z1
4232 F02
LTC4232
t1
t2
150k
+
R3
3.3nF
C
L
FB
140k
330µF
R6
20k
UV
FLT
OV
GATE
Figure 2. Supply Turn-On
R
R1
226k
GATE
100k
C
0.1µF
R7
10k
GATE
R2
20k
R4
20k
This gate slope is designed to charge up a 1000µF capaci-
tor to 12V in 40ms, with an inrush current of 300mA. This
allows the inrush current to stay under the current limit
threshold(1.5A)forcapacitorslessthan1000µF.Included
in the Typical Performance Characteristics section is a
graph of the Safe Operating Area for the MOSFET. It is
evident from this graph that the power dissipation at 12V,
300mA for 40ms is in the safe region.
PG
I
SET
R
SET
20k
TIMER
INTV
CC
I
ADC
MON
C
C1
1µF
T
R
MON
GND
0.1µF
20k
4232 F01
Z1: DIODES INC. SMAJ22A
Figure 1. 2A, 12V Card Resident Application
Adding the R
, C
and C
network on the GATE
COMP
GATE GATE
pin will lower the inrush current below the default value
set by the INRUSH circuit. The GATE is charged with an
24µA current source (when INRUSH circuit is not driving
the GATE). The voltage at the GATE pin rises with a slope
Turn-On Sequence
Several conditions must be present before the internal
pass MOSFET can be turned on. First the supply V must
DD
exceed its undervoltage lockout level. Next the internally
equalto24µA/C
andthesupplyinrushcurrentissetat:
GATE
generated supply INTV must cross its 2.65V undervolt-
CC
CL
CGATE
agethreshold.Thisgeneratesa25µspower-on-resetpulse
IINRUSH
=
• 24µA
whichclearsthefaultregisterandinitializesinternallatches.
After the power-on-reset pulse, the LTC4232 will go
through the following sequence. First, the UV and OV pins
must indicate that the input voltage is within the accept-
able range. All of these conditions must be satisfied for
the duration of 100ms to ensure that any contact bounce
during the insertion has ended.
When the GATE voltage reaches the MOSFET threshold
voltage, the switch begins to turn on and the OUT volt-
age follows the GATE voltage as it increases. Once OUT
reaches V , the GATE will ramp up until clamped by the
DD
6.15V Zener between GATE and OUT.
As the OUT voltage rises, so will the FB pin which is moni-
toring it. Once the FB pin crosses its 1.235V threshold
and the GATE to OUT voltage exceeds 4.2V, the PG pin
will cease to pull low and indicate that the power is good.
The MOSFET is turned on by charging up the GATE with
a charge pump generated current source whose value is
adjusted by shunting a portion of the pull-up current to
ground. The charging current is controlled by the INRUSH
circuit that maintains a constant slope of GATE voltage
versus time (Figure 2). The voltage at the GATE pin rises
with a slope of 0.3V/ms and the supply inrush current is
set at:
Parasitic MOSFET Oscillation
When the N-channel MOSFET ramps up the output during
power-up it operates as a source follower. The source
follower configuration may self-oscillate in the range of
25kHz to 300kHz when the load capacitance is less than
I
= C • (0.3V/ms)
L
INRUSH
4232fb
9
For more information www.linear.com/LTC4232
LTC4232
APPLICATIONS INFORMATION
10µF, especially if the wiring inductance from the supply
Anovercurrentfaultoccurswhenthecurrentlimitcircuitry
has been engaged for longer than the timeout delay set
by the TIMER. Current limiting begins when the MOSFET
current reaches 1.5A to 5.6A (depending on the foldback).
The GATE pin is then brought down with a 140mA GATE-
to-OUT current. The voltage on the GATE is regulated in
order to limit the current to less than 5.6A. At this point,
a circuit breaker time delay starts by charging the external
timing capacitor from the TIMER pin with a 100µA pull-up
current. If the TIMER pin reaches its 1.235V threshold,
the internal switch turns off (with a 250µA current from
GATE to ground). Included in the Typical Performance
Characteristics curves is a graph of the Safe Operating
Area for the MOSFET. From this graph one can determine
the MOSFET’s maximum time in current limit for a given
output power.
to the V pin is greater than 3µH. The possibility of oscil-
DD
lation will increase as the load current (during power-up)
increases. There are two ways to prevent this type of
oscillation. The simplest way is to avoid load capacitances
below 10µF. For wiring inductance larger than 20µH, the
minimumloadcapacitancemayextendto100µF.Asecond
choice is to connect an external gate capacitor C >1.5nF
P
as shown in Figure 3.
LTC4232
GATE
*OPTIONAL
C
P
RC TO LOWER
2.2nF
INRUSH CURRENT
4232 F03
Tying the TIMER pin to INTV will force the part to use
CC
Figure 3. Compensation for Small CLOAD
the internally generated (circuit breaker) delay of 2ms. In
either case the FLT pin is pulled low to indicate an over-
current fault has turned off the pass MOSFET. For a given
the circuit breaker time delay, the equation for setting the
timing capacitor’s value is as follows:
Turn-Off Sequence
The switch can be turned off by a variety of conditions. A
normal turn-off is initiated by the UV pin going below its
1.235V threshold. Additionally, several fault conditions
will turn off the switch. These include an input overvolt-
age (OV pin), overcurrent circuit breaker (SENSE pin) or
overtemperature. Normally the switch is turned off with
a 250µA current pulling down the GATE pin to ground.
With the switch turned off, the OUT voltage drops which
pulls the FB pin below its threshold. PG then pulls low to
indicate output power is no longer good.
C = t • 0.083(µF/ms)
T
CB
After the switch is turned off, the TIMER pin begins
discharging the timing capacitor with a 2µA pull-down
current. When the TIMER pin reaches its 0.21V threshold,
an internal 100ms timer is started. After the 100ms delay,
the switch is allowed to turn on again if the overcurrent
fault has been cleared. Bringing the UV pin below 0.6V
and then high will clear the fault. If the TIMER pin is tied
If V drops below 2.65V for greater than 5µs or INTV
DD
CC
to INTV then the switch is allowed to turn on again (after
CC
drops below 2.5V for greater than 1µs, a fast shutdown
of the switch is initiated. The GATE is pulled down with a
140mA current to the OUT pin.
an internal 100ms delay) if the overcurrent fault is cleared.
Tying the FLT pin to the UV pin allows the part to self-clear
the fault and turn the MOSFET on as soon as TIMER pin
has ramped below 0.21V. In this auto-retry mode the
LTC4232 repeatedly tries to turn on after an overcurrent
at a period determined by the capacitor on the TIMER pin.
The auto-retry mode also functions when the TIMER pin
Overcurrent Fault
The LTC4232 features an adjustable current limit with
foldback that protects against short-circuits or excessive
loadcurrent.To preventexcessivepowerdissipationinthe
switch during active current limit, the available current is
reduced as a function of the output voltage sensed by the
FB pin. A graph in the Typical Performance Characteristics
curves shows the current limit versus FB voltage.
is tied to INTV .
CC
The waveform in Figure 4 shows how the output latches
off following a short-circuit. The current in the MOSFET
is 1.4A as the timer ramps up.
4232fb
10
For more information www.linear.com/LTC4232
LTC4232
APPLICATIONS INFORMATION
There is an overtemperature circuit in the LTC4232 that
V
OUT
10V/DIV
monitorsaninternalvoltagesimilartotheI pinvoltage.
SET
When the die temperature exceeds 145°C the circuit turns
off the MOSFET until the temperature drops to 125°C.
I
OUT
2A/DIV
∆V
GATE
Monitor MOSFET Current
10V/DIV
TIMER
2V/DIV
The current in the MOSFET passes through a sense resis-
tor. The voltage on the sense resistor is converted to a
4232 F04
1ms/DIV
current that is sourced out of the I
pin. The gain of
MON
Figure 4. Short-Circuit Waveform
I
amplifier is 20µA/A referenced from the MOSFET
SENSE
current. This output current can be converted to a voltage
using an external resistor to drive a comparator or ADC.
Current Limit Adjustment
The voltage compliance for the I
pin is from 0V to
MON
The default value of the active current limit is 5.6A. The
current limit threshold can be adjusted lower by placing
INTV – 0.7V.
CC
A microcontroller with a built-in comparator can build a
simple integrating single-slope ADC by resetting a capaci-
tor that is charged with this current. When the capacitor
voltage trips the comparator and the capacitor is reset, a
timer is started. The time between resets will indicate the
MOSFET current.
a resistor between the I
pin and ground. As shown in
SET
the Functional Diagram the voltage at the I
pin (via
SET
the clamp circuit) sets the CS amplifier’s built-in offset
voltage. This offset voltage directly determines the active
current limit value. With the I pin open, the voltage at
SET
the I
pin is determined by a positive temperature co-
SET
efficient reference. This voltage is set to 0.618V at room
temperature which corresponds to a 5.6A current limit at
room temperature.
Monitor OV and UV Faults
Protecting the load from an overvoltage condition is the
main function of the OV pin. In Figure 1 an external resis-
tive divider (driving the OV pin) connects to a comparator
AnexternalresistorplacedbetweentheI pinandground
SET
forms a resistive divider with the internal 20k sourcing
to turn off the MOSFET when the V voltage exceeds
DD
resistor. The divider acts to lower the voltage at the I
SET
15.2V. If the V pin subsequently falls back below 14.9V,
DD
pin and therefore lower the current limit threshold. The
overall current limit threshold precision is reduced to
12% when using a 20k resistor to halve the threshold.
the switch will be allowed to turn on immediately. In the
LTC4232 the OV pin threshold is 1.235V when rising, and
1.215V when falling out of overvoltage.
Using a switch (connected to ground) in series with this
external resistor allows the active current limit to change
only when the switch is closed. This feature can be used
when the start-up current exceeds the typical maximum
load current.
The UV pin functions as an undervoltage protection pin
or as an “ON” pin. In the Figure 1 application the MOSFET
turns off when V falls below 9.23V. If the V pin sub-
DD
DD
sequently rises above 9.88V for 100ms, the switch will
be allowed to turn on again. The LTC4232 UV turn-on/off
thresholds are 1.235V (rising) and 1.155V (falling).
Monitor MOSFET Temperature
InthecasesofanundervoltageorovervoltagetheMOSFET
turnsoffandthereisindicationonthePGstatuspin. When
the overvoltage is removed the MOSFET’s gate ramps up
immediately at the rate determined by the INRUSH block.
The voltage at the I pin increases linearly with increas-
SET
ing temperature. The temperature profile of the I pin is
SET
shownintheTypicalPerformanceCharacteristicssection.
Using a comparator or ADC to measure the I
voltage
SET
provides an indicator of the MOSFET temperature.
4232fb
11
For more information www.linear.com/LTC4232
LTC4232
APPLICATIONS INFORMATION
Power Good Indication
As mentioned previously the charge-up time is the out-
put voltage (12V) divided by the output rate of 0.3V/ms
resulting in 40ms. The peak power dissipation of 12V at
100mA (or 1.2W) is within the SOA of the pass MOSFET
for 40ms (see MOSFET SOA curve in the Typical Perfor-
mance Characteristics section).
In addition to setting the foldback current limit threshold,
the FB pin is used to determine a power good condition.
The Figure 1 application uses an external resistive divider
on the OUT pin to drive the FB pin. The PG comparator
indicateslogichighwhenOUTpinrisesabove10.5V. Ifthe
OUT pin subsequently falls below 10.3V the comparator
toggles low. On the LTC4232 the PG comparator drives
high when the FB pin rises above 1.235V and low when
it falls below 1.215V.
Next the power dissipated in the MOSFET during overcur-
rent must be limited. The active current limit uses a timer
to prevent excessive energy dissipation in the MOSFET.
Theworst-casepowerdissipationoccurswhenthevoltage
versus current profile of the foldback current limit is at
the maximum. This occurs when the current is 6.1A and
the voltage is one half of the 12V or 6V. See the Current
LimitThresholdFoldbackintheTypicalPerformanceChar-
acteristics section to view this profile. In order to survive
36W, the MOSFET SOA dictates a maximum time of 10ms
(see SOA graph). Use the internal 2ms timer invoked by
Once the PG comparator is high the GATE pin voltage is
monitored with respect to the OUT pin. Once the GATE
minus OUT voltage exceeds 4.2V the PG pin goes high.
This indicates to the system that it is safe to load the OUT
pin while the MOSFET is completely turned “on”. The PG
pin goes low when the GATE is commanded off (using
the UV, OV or SENSE pins) or when the PG comparator
drives low.
tying the TIMER pin to INTV . After the 2ms timeout the
CC
FLT pin needs to pull-down on the UV pin to restart the
power-up sequence.
Design Example
The values for overvoltage, undervoltage and power good
thresholds using the resistive dividers on the UV, OV and
FB pins match the requirements of turn-on at 9.88V and
turn-off at 15.2V.
Consider the following design example (Figure 5): V =
IN
12V, I
= 5A. I
= 100mA, C = 330µF, V
=
MAX
INRUSH
=15.2V,V
L
UVON
9.88V,V
=10.5V.Acurrentlimitfault
OVOFF
PWRGD
triggers an automatic restart of the power-up sequence.
The final schematic in Figure 5 results in very few external
components. The pull-up resistor, R1, connects to the
V
12V
5A
OUT
V
OUT
FB
12V
DD
150k
20k
Z1
LTC4232
140k
20k
PG pin while the 20k (R2) converts the I
voltage at a ratio:
current to a
UV
MON
+
C
L
FLT
330µF
226k
20k
OV
R1
10k
V
IMON
= 20[µA/A] • 20k • I
= 0.4[V/A] • I
OUT OUT
GATE
PG
In addition there is a 1µF bypass (C1) on the INTV pin.
CC
I
TIMER
SET
ADC
INTV
I
MON
CC
GND
Layout Considerations
C1
R2
20k
1µF
4232 F05
Z1: DIODES INC. SMAJ22A
In Hot Swap applications where load currents can be 5A,
narrowPCBtracksexhibitmoreresistancethanwidertracks
and operate at elevated temperatures. The minimum trace
width for 1oz copper foil is 0.02" per amp to make sure
the trace stays at a reasonable temperature. Using 0.03"
per amp or wider is recommended. Note that 1oz copper
exhibits a sheet resistance of about 0.5mΩ/square. Small
resistances add up quickly in high current applications.
Figure 5. 5A, 12V Card Resident Application
The inrush current is defined by the current required to
charge the output capacitor using the fixed 0.3V/ms GATE
charge-up rate. The inrush current is defined as:
0.3V
ms
0.3V
ms
IINRUSH= C •
= 330µF •
= 100mA
L
4232fb
12
For more information www.linear.com/LTC4232
LTC4232
APPLICATIONS INFORMATION
There are two V pins on opposite sides of the package
Additional Applications
DD
that connect to the sense resistor and MOSFET. The PCB
TheLTC4232hasawideoperatingrangefrom2.9Vto15V.
The UV, OV and PG thresholds are set with few resistors.
All other functions are independent of supply voltage.
layout should be balanced and symmetrical to each V
DD
pin to balance current in the MOSFET bond wires. Figure 6
shows a recommended layout for the LTC4232.
In addition to Hot Swap applications, the LTC4232 also
functions as a backplane resident switch for removable
load cards (see Figure 7.)
Although the MOSFET is self protected from overtem-
perature, it is recommended to solder the backside of the
packagetoacoppertracetoprovideagoodheatsink.Note
that the backside is connected to the SENSE pin and can-
not be soldered to the ground plane. During normal loads
the power dissipated in the MOSFET is as high as 1.9W.
A 10mm × 10mm area of 1oz copper should be sufficient.
This area of copper can be divided in many layers.
Thelastpageshowsa3.3VapplicationwithaUVthreshold
of 2.87V, an OV threshold of 3.77V and a PG threshold
of 3.05V.
HEAT SINK
V
OUT
DD
It is also important to put C1, the bypass capacitor for
the INTV pin as close as possible between the INTV
CC
CC
VIA TO
SINK
and GND.
C
GND
4232 F06
Figure 6. Recommended Layout
V
12V
5A
OUT
12V
V
OUT
LTC4232DHC
DD
R7
10k
R5
12V
Z1
150k
R3
140k
R1
FB
PG
226k
R6
20k
OV
GATE
R4
20k
R2
20k
LOAD
FLT
UV
TIMER
I
SET
ADC
INTV
I
MON
CC
C1
1µF
R
MON
20k
GND
4232 F07
Z1: DIODES INC. SMAJ22A
Figure 7. 12V, 5A Backplane Resident Application with Insertion Activated Turn-On
4232fb
13
For more information www.linear.com/LTC4232
LTC4232
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
DHC Package
16-Lead Plastic DFN (5mm × 3mm)
(Reference LTC DWG # 05-08-1706)
0.65 0.05
3.50 0.05
1.65 0.05
2.20 0.05 (2 SIDES)
PACKAGE
OUTLINE
0.25 0.05
0.50 BSC
4.40 0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
R = 0.115
TYP
0.40 0.10
5.00 0.10
(2 SIDES)
9
16
R = 0.20
TYP
3.00 0.10
(2 SIDES)
1.65 0.10
(2 SIDES)
PIN 1
TOP MARK
(SEE NOTE 6)
PIN 1
NOTCH
(DHC16) DFN 1103
8
1
0.25 0.05
0.50 BSC
0.75 0.05
0.200 REF
4.40 0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJED-1) IN JEDEC
PACKAGE OUTLINE MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
4232fb
14
For more information www.linear.com/LTC4232
LTC4232
REVISION HISTORY
REV
DATE
12/12 Modifications to application drawings
Updated conditions on I , I , V , V , I
DESCRIPTION
PAGE NUMBER
A
1, 9, 12, 13, 16
2, 3
LIM(TH) IN TH OL OH
Switched MIN / MAX values for I
and I
3
TIMER(UP)
GATE(UP)
Changed formula in Note 5 to use θ 46°C/W
3
JA
Added test condition to Current Limit Threshold Foldback graph, G07
Updated title and axes on G12
4
5
Updated INTV voltage to 3.1V
6
CC
B
04/15 Typical Application, Figure 5 and Figure 7: Added SMAJ22A (Z1); updated C1 value
1, 12, 13, 16
Raised I
maximum from 340µA to 400µA
3
4, 5
6
GATE(DN)
Updated TPCs G08, G11
INTV Pin Function: Raised bypass capacitor value from 0.1µF to 1µF
CC
I
Pin Function: Recommended minimum resistor value to be 2k
6
SET
Figure 1: Added Z1, C
; updated C1, R
9
COMP
GATE
4232fb
15
For more information www.linear.com/LTC4232
LTC4232
TYPICAL APPLICATION
3.3V, 5A Card Resident Application with Auto-Retry
V
3.3V
5A
OUT
V
OUT
LTC4232DHC
3.3V
DD
R4
Z1
+
14.7k
R1
C
L
FB
17.4k
100µF
R5
10k
R7
10k
UV
FLT
OV
R2
3.16k
GATE
PG
R3
10k
I
SET
TIMER
INTV
CC
I
MON
ADC
C1
1µF
R
MON
20k
GND
4232 TA02
Z1: DIODES INC. SMAJ22A
RELATED PARTS
PART NUMBER
LTC1421
DESCRIPTION
Dual Channel Hot Swap Controller
COMMENTS
Operates from 3V to 12V, Supports –12V, SSOP-24
Operates from 2.7V to 12V, SO-8
LTC1422
Single Channel Hot Swap Controller
Single Channel Hot Swap Controller
Dual Channel Hot Swap Controller
Dual Channel Hot Swap Controller
LTC1642A
LTC1645
Operates from 3V to 16.5V, Overvoltage Protection Up to 33V, SSOP-16
Operates from 3V to 12V, Power Sequencing, SO-8 or SO-14
Operates from 2.7V to 16.5V, SO-8 or SSOP-16
LTC1647-1/LTC1647-2/
LTC1647-3
LTC4210
LTC4211
LTC4212
LTC4214
LTC4215
Single Channel Hot Swap Controller
Single Channel Hot Swap Controller
Single Channel Hot Swap Controller
Operates from 2.7V to 16.5V, Active Current Limiting, SOT23-6
Operates from 2.5V to 16.5V, Multifunction Current Control, MSOP-8 or MSOP-10
Operates from 2.5V to 16.5V, Power-Up Timeout, MSOP-10
Operates from 0V to –16V, MSOP-10
Negative Voltage Hot Swap Controller
2
Hot Swap Controller with I C Compatible Operates from 2.9V to 15V, 8-Bit ADC Monitors Current and Voltage
Monitoring
LTC4217
LTC4218
2A Integrated Hot Swap Controller
Operates from 2.9V to 26.5V, Adjustable 5% Accurate Current Limit
Operates from 2.9V to 26.5V, Adjustable Current Limit, SSOP-16, DFN-16
Hot Swap Controller with 5% Accurate
(15mV) Current Limit
LTC4219
LT4220
5A Integrated Hot Swap Controller
12V and 5V Preset Versions, 10% Accurate Current Limit
Operates from 2.7V to 16.5V, SSOP-16
Positive and Negative Voltage Dual
Channel, Hot Swap Controller
LTC4221
LTC4230
LTC4227
Dual Hot Swap Controller/Sequencer
Triple Channel Hot Swap Controller
Operates from 1V to 13.5V, Multifunction Current Control, SSOP-16
Operates from 1.7V to 16.5V, Multifunction Current Control, SSOP-20
Dual Ideal Diode and Single Hot Swap
Controller
Operates from 2.9V to 18V, PowerPath™ and Inrush Current Control for
Redundant Supplies
LTC4228
Dual Ideal Diode and Hot Swap
Controller
Operates from 2.9V to 18V, PowerPath and Inrush Current Control for Two Rails,
MicroTCA, Redundant Power Supplies, and Supply Holdup Applications
4232fb
LT 0415 REV B • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
16
(408)432-1900 FAX: (408) 434-0507 www.linear.com/LTC4232
●
●
LINEAR TECHNOLOGY CORPORATION 2011
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