HFA1105IP [INTERSIL]
330MHz, Low Power, Current Feedback Video Operational Amplifier; 330MHz的低功耗,电流反馈型视频运算放大器型号: | HFA1105IP |
厂家: | Intersil |
描述: | 330MHz, Low Power, Current Feedback Video Operational Amplifier |
文件: | 总11页 (文件大小:122K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
HFA1105
September 1998
File Number 3395.6
330MHz, Low Power, Current Feedback
Video Operational Amplifier
Features
• Low Supply Current . . . . . . . . . . . . . . . . . . . . . . . . 5.8mA
• High Input Impedance . . . . . . . . . . . . . . . . . . . . . . . 1MΩ
• Wide -3dB Bandwidth. . . . . . . . . . . . . . . . . . . . . . 330MHz
• Very Fast Slew Rate. . . . . . . . . . . . . . . . . . . . . . 1000V/µs
• Gain Flatness (to 75MHz) . . . . . . . . . . . . . . . . . . . . 0.1dB
• Differential Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.02%
• Differential Phase . . . . . . . . . . . . . . . . . . . . 0.03 Degrees
• Pin Compatible Upgrade for CLC406
The HFA1105 is a high speed, low power current feedback
amplifier built with Intersil’s proprietary complementary
bipolar UHF-1 process.
This amplifier features an excellent combination of low
power dissipation (58mW) and high performance. The slew
rate, bandwidth, and low output impedance (0.08Ω) make
this amplifier a good choice for driving Flash ADCs.
Component and composite video systems also benefit from
this op amp’s excellent gain flatness, and good differential
gain and phase specifications. The HFA1105 is ideal for
interfacing to Intersil’s line of video crosspoint switches
(HA4201, HA4600, HA4314, HA4404, HA4344), to create
high performance, low power switchers and routers.
Applications
• Flash A/D Drivers
• Video Switching and Routing
• Professional Video Processing
• Video Digitizing Boards/Systems
• Multimedia Systems
The HFA1105 is a low power, high performance upgrade for
the CLC406. For a comparable amplifier with output disable
or output limiting functions, please see the data sheets for
the HFA1145 and HFA1135 respectively.
For Military grade product, please refer to the HFA1145/883
data sheet.
• RGB Preamps
• Medical Imaging
Ordering Information
• Hand Held and Miniaturized RF Equipment
• Battery Powered Communications
PART NUMBER
(BRAND)
TEMP.
RANGE ( C)
o
PACKAGE
8 Ld PDIP
8 Ld SOIC
PKG. NO.
E8.3
HFA1105IP
-40 to 85
Pinout
HFA1105IB
(H1105I)
-40 to 85
M8.15
HFA1105
(PDIP, SOIC)
TOP VIEW
HFA11XXEVAL
DIP Evaluation Board for High Speed
Op Amps
NC
-IN
+IN
V-
1
2
3
4
8
7
6
5
NC
V+
-
+
OUT
NC
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
1
HFA1105
Absolute Maximum Ratings
Thermal Information
o
Supply Voltage (V+ to V-). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11V
DC Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8V
Output Current (Note 1) . . . . . . . . . . . . . . . . .Short Circuit Protected
30mA Continuous
Thermal Resistance (Typical, Note 2)
θJA ( C/W)
SUPPLY
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
130
170
o
Maximum Junction Temperature (Die) . . . . . . . . . . . . . . . . . . . .175 C
Maximum Junction Temperature (Plastic Package) . . . . . . . .150 C
Maximum Storage Temperature Range. . . . . . . . . . -65 C to 150 C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300 C
o
o
o
60mA ≤ 50% Duty Cycle
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >600V
o
(SOIC - Lead Tips Only)
Operating Conditions
o
o
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40 C to 85 C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Output is short circuit protected to ground. Brief short circuits to ground will not degrade reliability, however continuous (100% duty cycle) output
current must not exceed 30mA for maximum reliability.
2. θ is measured with the component mounted on an evaluation PC board in free air.
JA
Electrical Specifications V
= ±5V, A = +1, R = 510Ω, R = 100Ω, Unless Otherwise Specified
V F L
SUPPLY
(NOTE 3)
TEST
LEVEL
TEMP.
( C)
o
PARAMETER
INPUT CHARACTERISTICS
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Input Offset Voltage
A
A
B
A
A
A
A
A
A
A
A
B
A
A
A
A
A
A
A
A
B
A
A
A
A
A
A
25
Full
Full
25
-
-
2
3
5
8
mV
mV
o
Average Input Offset Voltage Drift
-
1
10
-
µV/ C
Input Offset Voltage
Common-Mode Rejection Ratio
∆V
∆V
∆V
= ±1.8V
= ±1.8V
= ±1.2V
47
45
45
50
47
47
-
50
48
48
54
50
50
6
dB
dB
dB
dB
dB
dB
µA
µA
CM
CM
CM
85
-
-40
25
-
Input Offset Voltage
Power Supply Rejection Ratio
∆V = ±1.8V
PS
-
∆V = ±1.8V
PS
85
-
∆V = ±1.2V
PS
-40
25
-
Non-Inverting Input Bias Current
15
25
60
1
Full
Full
25
-
10
5
o
Non-Inverting Input Bias Current Drift
-
nA/ C
Non-Inverting Input Bias Current
Power Supply Sensitivity
∆V = ±1.8V
PS
-
0.5
0.8
0.8
1.2
0.8
0.8
2
µA/V
µA/V
µA/V
MΩ
MΩ
MΩ
µA
∆V = ±1.8V
PS
85
-
3
∆V = ±1.2V
PS
-40
25
-
3
Non-Inverting Input Resistance
∆V
∆V
∆V
= ±1.8V
= ±1.8V
= ±1.2V
0.8
0.5
0.5
-
-
CM
CM
CM
85
-
-40
25
-
Inverting Input Bias Current
7.5
15
200
6
Full
Full
25
-
5
µA
o
Inverting Input Bias Current Drift
-
60
3
nA/ C
Inverting Input Bias Current
Common-Mode Sensitivity
∆V
∆V
∆V
= ±1.8V
= ±1.8V
= ±1.2V
-
µA/V
µA/V
µA/V
µA/V
µA/V
µA/V
CM
CM
CM
85
-
4
8
-40
25
-
4
8
Inverting Input Bias Current
Power Supply Sensitivity
∆V = ±1.8V
PS
-
2
5
∆V = ±1.8V
PS
85
-
4
8
∆V = ±1.2V
PS
-40
-
4
8
2
HFA1105
Electrical Specifications V
= ±5V, A = +1, R = 510Ω, R = 100Ω, Unless Otherwise Specified (Continued)
SUPPLY
V
F
L
(NOTE 3)
TEST
LEVEL
TEMP.
( C)
o
PARAMETER
Inverting Input Resistance
TEST CONDITIONS
MIN
TYP
60
MAX
UNITS
Ω
C
C
A
A
B
B
B
25
25
-
-
-
-
-
-
-
-
Input Capacitance
-
1.6
±2.4
±1.7
3.5
2.5
20
pF
Input Voltage Common Mode Range
(Implied by V CMRR, +R , and -I
IO IN BIAS
25, 85
-40
25
±1.8
V
CMS Tests)
±1.2
V
Input Noise Voltage Density (Note 6)
f = 100kHz
f = 100kHz
f = 100kHz
-
-
-
nV/√Hz
pA/√Hz
pA/√Hz
Non-Inverting Input Noise Current Density (Note 6)
Inverting Input Noise Current Density (Note 6)
TRANSFER CHARACTERISTICS
25
25
Open Loop Transimpedance Gain
A
= -1
C
25
-
500
-
kΩ
V
AC CHARACTERISTICS
R = 510Ω, Unless Otherwise Specified
F
-3dB Bandwidth
A
= +1, +R = 510Ω
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
A
25
Full
25
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
270
240
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
dB
V
S
(V
= 0.2V
, Note 6)
P-P
OUT
A
A
= -1, R = 425Ω
300
V
F
= +2
25
330
V
Full
25
260
A
= +10, R = 180Ω
130
V
F
Full
25
90
Full Power Bandwidth
(V = 5V at A = +2/-1,
A
A
A
= +1, +R = 510Ω
135
V
V
V
S
OUT
4V
P-P
V
= -1
25
140
at A = +1, Note 6)
P-P
V
= +2
25
115
Gain Flatness
(A = +2, V
To 25MHz
25
±0.03
±0.04
±0.11
±0.22
±0.03
±0.09
1
= 0.2V , Note 6)
OUT P-P
V
Full
25
dB
To 75MHz
dB
Full
25
dB
Gain Flatness
(A = +1, +R = 510Ω, V = 0.2V
OUT
To 25MHz
To 75MHz
dB
, Note 6)
P-P
V
S
25
dB
Minimum Stable gain
Full
V/V
OUTPUT CHARACTERISTICS
A = +2, R = 510Ω, Unless Otherwise Specified
V F
Output Voltage Swing (Note 6)
A
= -1, R = 100Ω
A
A
A
A
B
B
B
B
B
B
B
25
Full
25, 85
-40
25
±3
±3.4
±3
-
-
-
-
-
-
-
-
-
-
-
V
V
L
±2.8
V
Output Current (Note 6)
A
= -1, R = 50Ω
50
28
-
60
mA
mA
mA
Ω
V
L
42
Output Short Circuit Current
90
Closed Loop Output Impedance (Note 6)
Second Harmonic Distortion
DC
25
-
0.08
-48
-44
-50
-45
-55
10MHz
20MHz
10MHz
20MHz
30MHz
25
-
dBc
dBc
dBc
dBc
dB
(V
= 2V , Note 6)
P-P
OUT
25
-
Third Harmonic Distortion
(V = 2V , Note 6)
25
-
OUT P-P
25
-
Reverse Isolation (S , Note 6)
12
25
-
TRANSIENT CHARACTERISTICS
A = +2, R = 510Ω, Unless Otherwise Specified
V F
Rise and Fall Times
V
= 0.5V
B
B
25
-
-
1.1
1.4
-
-
ns
ns
OUT
P-P
Full
3
HFA1105
Electrical Specifications V
= ±5V, A = +1, R = 510Ω, R = 100Ω, Unless Otherwise Specified (Continued)
SUPPLY
V
F
L
(NOTE 3)
TEST
LEVEL
TEMP.
( C)
o
PARAMETER
TEST CONDITIONS
+OS
MIN
TYP
3
MAX
UNITS
%
Overshoot (Note 4)
(V = 0 to 0.5V, V
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
25
25
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
t
IN RISE
= 1ns)
= 1ns)
OUT
-OS
+OS
-OS
+SR
5
%
Overshoot (Note 4)
(V = 0.5V , V
25
3
%
t
P-P IN RISE
OUT
25
11
%
Slew Rate
(V = 4V
25
1000
975
650
580
1400
1200
800
700
2100
1900
1000
900
15
V/µs
V/µs
V/µs
V/µs
V/µs
V/µs
V/µs
V/µs
V/µs
V/µs
V/µs
V/µs
ns
, A = +1, +R = 510Ω)
OUT
P-P
V
S
Full
25
-SR (Note 5)
+SR
Full
25
Slew Rate
(V = 5V
, A = +2)
OUT
P-P
V
Full
25
-SR (Note 5)
+SR
Full
25
Slew Rate
(V = 5V
, A = -1)
OUT
P-P
V
Full
25
-SR (Note 5)
Full
25
Settling Time
(V = +2V to 0V step, Note 6)
To 0.1%
To 0.05%
To 0.02%
OUT
25
23
ns
25
30
ns
Overdrive Recovery Time
V
= ±2V
25
8.5
ns
IN
A = +2, R = 510Ω, Unless Otherwise Specified
V
VIDEO CHARACTERISTICS
F
Differential Gain
(f = 3.58MHz)
R
R
R
R
= 150Ω
= 75Ω
B
B
B
B
25
25
25
25
-
-
-
-
0.02
0.03
0.03
0.05
-
-
-
-
%
L
L
L
L
%
Differential Phase
(f = 3.58MHz)
= 150Ω
= 75Ω
Degrees
Degrees
POWER SUPPLY CHARACTERISTICS
Power Supply Range
C
A
A
25
25
±4.5
-
±5.5
6.1
V
Power Supply Current (Note 6)
-
-
5.8
5.9
mA
mA
Full
6.3
NOTES:
3. Test Level: A. Production Tested; B. Typical or Guaranteed Limit Based on Characterization; C. Design Typical for Information Only.
4. Undershoot dominates for output signal swings below GND (e.g., 0.5V ), yielding a higher overshoot limit compared to the V
P-P
= 0 to 0.5V
OUT
condition. See the “Application Information” section for details.
5. Slew rates are asymmetrical if the output swings below GND (e.g. a bipolar signal). Positive unipolar output signals have symmetric positive and
negative slew rates comparable to the +SR specification. See the “Application Information” section, and the pulse response graphs for details.
6. See Typical Performance Curves for more information.
amplifier’s unique relationship between bandwidth and R .
All current feedback amplifiers require a feedback resistor,
Application Information
F
Optimum Feedback Resistor
even for unity gain applications, and R , in conjunction with
F
Although a current feedback amplifier’s bandwidth
the internal compensation capacitor, sets the dominant pole
of the frequency response. Thus, the amplifier’s bandwidth is
dependency on closed loop gain isn’t as severe as that of a
voltage feedback amplifier, there can be an appreciable
decrease in bandwidth at higher gains. This decrease may
be minimized by taking advantage of the current feedback
inversely proportional to R . The HFA1105 design is
F
optimized for R = 510Ω at a gain of +2. Decreasing R
F
F
decreases stability, resulting in excessive peaking and
4
HFA1105
overshoot (Note: Capacitive feedback will cause the same
problems due to the feedback impedance decrease at higher
frequencies). At higher gains, however, the amplifier is more
Terminated microstrip signal lines are recommended at the
device’s input and output connections. Capacitance,
parasitic or planned, connected to the output must be
minimized, or isolated as discussed in the next section.
stable so R can be decreased in a trade-off of stability for
F
bandwidth.
Care must also be taken to minimize the capacitance to
ground at the amplifier’s inverting input (-IN), as this
capacitance causes gain peaking, pulse overshoot, and if
large enough, instability. To reduce this capacitance, the
designer should remove the ground plane under traces
connected to
The table below lists recommended R values for various
F
gains, and the expected bandwidth. For a gain of +1, a
resistor (+R ) in series with +IN is required to reduce gain
peaking and increase stability.
S
-IN, and keep connections to -IN as short as possible.
An example of a good high frequency layout is the
Evaluation Board shown in Figure 2.
GAIN
(A
BANDWIDTH
(MHz)
)
R (Ω)
F
CL
-1
+1
425
300
270
330
300
130
Driving Capacitive Loads
510 (+R = 510Ω)
Capacitive loads, such as an A/D input, or an improperly
terminated transmission line will degrade the amplifier’s
phase margin resulting in frequency response peaking and
possible oscillations. In most cases, the oscillation can be
S
+2
510
200
180
+5
+10
avoided by placing a resistor (R ) in series with the output
S
prior to the capacitance.
Non-Inverting Input Source Impedance
For best operation, the DC source impedance seen by the
non-inverting input should be ≥50Ω. This is especially
important in inverting gain configurations where the non-
inverting input would normally be connected directly to GND.
Figure 1 details starting points for the selection of this
resistor. The points on the curve indicate the R and C
S
L
combinations for the optimum bandwidth, stability, and
settling time, but experimental fine tuning is recommended.
Picking a point above or to the right of the curve yields an
overdamped response, while points below or left of the curve
indicate areas of underdamped performance.
Pulse Undershoot and Asymmetrical Slew Rates
The HFA1105 utilizes a quasi-complementary output stage to
achieve high output current while minimizing quiescent supply
current. In this approach, a composite device replaces the
traditional PNP pulldown transistor. The composite device
switches modes after crossing 0V, resulting in added
distortion for signals swinging below ground, and an
increased undershoot on the negative portion of the output
waveform (See Figures 5, 8, and 11). This undershoot isn’t
present for small bipolar signals, or large positive signals.
Another artifact of the composite device is asymmetrical slew
rates for output signals with a negative voltage component.
The slew rate degrades as the output signal crosses through
0V (See Figures 5, 8, and 11), resulting in a slower overall
negative slew rate. Positive only signals have symmetrical
slew rates as illustrated in the large signal positive pulse
response graphs (See Figures 4, 7, and 10).
R and C form a low pass network at the output, thus limiting
S
L
system bandwidth well below the amplifier bandwidth of
270MHz (for A = +1). By decreasing R as C increases (as
V
S
L
illustrated in the curves), the maximum bandwidth is obtained
without sacrificing stability. In spite of this, the bandwidth
decreases as the load capacitance increases. For example, at
A = +1, R = 62Ω, C = 40pF, the overall bandwidth is limited
V
S
L
to 180MHz, and bandwidth drops to 75MHz at A = +1,
V
R = 8Ω, C = 400pF.
S
L
PC Board Layout
The amplifier’s frequency response depends greatly on the
care taken in designing the PC board. The use of low
inductance components such as chip resistors and chip
capacitors is strongly recommended, while a solid
ground plane is a must!
Attention should be given to decoupling the power supplies.
A large value (10µF) tantalum in parallel with a small value
(0.1µF) chip capacitor works well in most cases.
5
HFA1105
50
40
30
20
10
0
510
510
V
H
R
1
1
2
3
4
8
7
6
5
10µF
+5V
0.1µF
50Ω
50Ω
IN
OUT
V
L
GND
0.1µF
10µF
-5V
GND
A
= +1
V
A
= +2
150
FIGURE 2C. SCHEMATIC
FIGURE 2. EVALUATION BOARD SCHEMATIC AND LAYOUT
V
0
100
200
300
400
50
250
350
LOAD CAPACITANCE (pF)
FIGURE 1. RECOMMENDED SERIES OUTPUT RESISTOR vs
LOAD CAPACITANCE
Evaluation Board
The performance of the HFA1105 may be evaluated using
the HFA11XX Evaluation Board.
The layout and schematic of the board are shown in Figure
2. To order evaluation boards (part number HFA11XXEVAL),
please contact your local sales office.
V
H
1
+IN
OUT
V-
V+
V
L
GND
FIGURE 2A. TOP LAYOUT
FIGURE 2B. BOTTOM LAYOUT
6
HFA1105
o
Typical Performance Curves V
= ±5V, R = 510Ω, T = 25 C, R = 100Ω, Unless Otherwise Specified
F A L
SUPPLY
200
3.0
A
= +1
A
= +1
V
V
+R = 510Ω
+R = 510Ω
S
150
100
50
2.5
2.0
1.5
1.0
0.5
0
S
0
-50
-100
-0.5
-1.0
-150
-200
TIME (5ns/DIV.)
TIME (5ns/DIV.)
FIGURE 3. SMALL SIGNAL PULSE RESPONSE
FIGURE 4. LARGE SIGNAL POSITIVE PULSE RESPONSE
2.0
1.5
1.0
0.5
0
200
A
= +1
A
= +2
V
V
+R = 510Ω
S
150
100
50
0
-0.5
-1.0
-50
-100
-1.5
-2.0
-150
-200
TIME (5ns/DIV.)
TIME (5ns/DIV.)
FIGURE 5. LARGE SIGNAL BIPOLAR PULSE RESPONSE
FIGURE 6. SMALL SIGNAL PULSE RESPONSE
3.0
2.0
1.5
1.0
0.5
0
A
= +2
A = +2
V
V
2.5
2.0
1.5
1.0
0.5
0
-0.5
-1.0
-0.5
-1.0
-1.5
-2.0
TIME (5ns/DIV.)
TIME (5ns/DIV.)
FIGURE 7. LARGE SIGNAL POSITIVE PULSE RESPONSE
FIGURE 8. LARGE SIGNAL BIPOLAR PULSE RESPONSE
7
HFA1105
o
Typical Performance Curves V
= ±5V, R = 510Ω, T = 25 C, R = 100Ω, Unless Otherwise Specified (Continued)
F A L
SUPPLY
200
3.0
A
= +10
V
A
= +10
V
R
= 180Ω
F
R
= 180Ω
150
100
50
2.5
2.0
1.5
1.0
0.5
0
F
0
-50
-100
-0.5
-1.0
-150
-200
TIME (5ns/DIV.)
TIME (5ns/DIV.)
FIGURE 9. SMALL SIGNAL PULSE RESPONSE
FIGURE 10. LARGE SIGNAL POSITIVE PULSE RESPONSE
2.0
1.5
1.0
0.5
0
V
= 200mV
P-P
OUT
+R = 510Ω (+1)
S
A
= +10
V
3
0
S
A
= +1
= -1
V
R
= 180Ω
F
+R = 0Ω (-1)
A
V
-3
0
A
= -1
-0.5
-1.0
V
90
180
270
-1.5
-2.0
A
= +1
V
0.3
1
10
100
500
TIME (5ns/DIV.)
FREQUENCY (MHz)
FIGURE 11. LARGE SIGNAL BIPOLAR PULSE RESPONSE
FIGURE 12. FREQUENCY RESPONSE
A
= +2
V
V
= 200mV
P-P
OUT
3
3
0
A
= +2
V
0
A
= +10
V
= 1.5V
V
-3
-3
OUT
P-P
A
= +5
V
V
= 5V
OUT
P-P
A
= +2
V
= 200mV
P-P
V
OUT
P-P
0
0
90
90
A
= +5
V
= 200mV
P-P
V
OUT
V = 1.5V
OUT
180
270
180
270
R
R
R
= 510Ω (+2)
= 200Ω (+5)
= 180Ω (+10)
F
F
F
A
= +10
100
V
V
= 5V
P-P
OUT
0.3
1
10
FREQUENCY (MHz)
100
500
0.3
1
10
FREQUENCY (MHz)
500
FIGURE 13. FREQUENCY RESPONSE
FIGURE 14. FREQUENCY RESPONSE FOR VARIOUS OUTPUT
VOLTAGES
8
HFA1105
o
Typical Performance Curves V
= ±5V, R = 510Ω, T = 25 C, R = 100Ω, Unless Otherwise Specified (Continued)
F A L
SUPPLY
V
= 200mV
P-P
OUT
= +2
R
= 1kΩ
L
R
= 500Ω
3
L
A
V
3
0
A
= -1
V
0
R
= 50Ω
L
V
= 4V
= 5V
(+1)
(-1, +2)
-3
OUT
P-P
-3
R
= 100Ω
V
A
= +1
L
OUT
P-P
V
+R = 510Ω (+1)
S
A
= +2
V
R
= 50Ω
L
= 100Ω
R
0
L
90
R
= 1kΩ
L
R
= 500Ω
180
270
L
0.3
1
10
FREQUENCY (MHz)
100
500
1
10
100
200
FREQUENCY (MHz)
FIGURE 15. FULL POWER BANDWIDTH
FIGURE 16. FREQUENCY RESPONSE FOR VARIOUS LOAD
RESISTORS
500
400
300
200
100
0
V
= 200mV
P-P
OUT
+R = 510Ω (+1)
A
= +2
V
= 200mV
P-P
V
OUT
= 180Ω (+10)
S
R
F
0.25
0.20
0.15
0.10
0.05
0
+R = 510Ω (+1)
S
A
= +1
V
A
= +2
V
A
= +10
V
A
= +1
V
-0.05
-0.10
-100
-50
0
50
100
150
1
10
75
o
FREQUENCY (MHz)
TEMPERATURE ( C)
FIGURE 18. GAIN FLATNESS
FIGURE 17. -3dB BANDWIDTH vs TEMPERATURE
-40
A = +2
V
V
= 2V
P-P
OUT
A
= +1, +2
-50
-60
-70
-80
-90
V
1K
A
= -1
V
100
10
1
0.1
0.01
0.3
1
10
FREQUENCY (MHz)
100
0.3
1
10
100
1000
FREQUENCY (MHz)
FIGURE 19. REVERSE ISOLATION
FIGURE 20. OUTPUT IMPEDANCE
9
HFA1105
o
Typical Performance Curves V
= ±5V, R = 510Ω, T = 25 C, R = 100Ω, Unless Otherwise Specified (Continued)
SUPPLY
F
A
L
-30
-40
-50
-60
-70
A
= +2
V
A
= +2
V
0.8
0.6
0.4
V
= 2V
OUT
10MHz
0.2
0.1
0
20MHz
-0.2
-0.4
-0.6
-0.8
-5
0
5
10
15
3
8
13
18
23
28
33
38
43
48
OUTPUT POWER (dBm)
TIME (ns)
FIGURE 21. SETTLING RESPONSE
FIGURE 22. SECOND HARMONIC DISTORTION vs P
OUT
-30
-40
-50
-60
-70
3.6
A
= -1
|-V | (R = 100Ω)
OUT L
V
A
= +2
V
3.5
+V
OUT
(R = 100Ω)
L
3.4
3.3
3.2
3.1
+V
OUT
(R = 50Ω)
L
3.0
2.9
2.8
|-V
OUT
| (R = 50Ω)
L
2.7
2.6
-50
-25
0
25
50
75
100
125
-5
0
5
10
15
o
OUTPUT POWER (dBm)
TEMPERATURE ( C)
FIGURE 23. THIRD HARMONIC DISTORTION vs P
OUT
FIGURE 24. OUTPUT VOLTAGE vs TEMPERATURE
100
100
6.1
6.0
5.9
5.8
5.7
5.6
I
NI-
10
10
E
NI
I
NI+
1
0.1
1
100
3.5
4
4.5
5
5.5
6
6.5
7
7.5
1
10
POWER SUPPLY VOLTAGE (±V)
FREQUENCY (kHz)
FIGURE 26. SUPPLY CURRENT vs SUPPLY VOLTAGE
FIGURE 25. INPUT NOISE CHARACTERISTICS
10
HFA1105
Die Characteristics
DIE DIMENSIONS:
PASSIVATION:
59 mils x 59 mils x 19 mils
Type: Nitride
1500µm x 1500µm x 483µm
Thickness: 4kÅ ±0.5kÅ
METALLIZATION:
TRANSISTOR COUNT:
Type: Metal 1: AICu(2%)/TiW
75
Thickness: Metal 1: 8kÅ ±0.4kÅ
SUBSTRATE POTENTIAL (Powered Up):
Type: Metal 2: AICu(2%)
Thickness: Metal 2: 16kÅ ±0.8kÅ
Floating
(Recommend Connection to V-)
Metallization Mask Layout
HFA1105
NC
V+
-IN
OUT
+IN
V-
NC
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Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
11
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