AN1082 [INTERSIL]

Using the ISL6401 RSLIC PWM Controller Evaluation Board; 使用ISL6401 PWM RSLIC控制器评估板


型号：	AN1082
厂家：	Intersil
描述：	Using the ISL6401 RSLIC PWM Controller Evaluation Board 使用ISL6401 PWM RSLIC控制器评估板控制器
文件：	总8页 (文件大小：246K)
中文：	中文翻译
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Using the ISL6401 RSLIC PWM Controller

Evaluation Board

Application Note

October 2003

AN1082

Author: Manisha Pandya, Jason Houston

In a telephone loop, the subscriber is connected to the

network via 2 wires, commonly known as Tip and Ring. The

actual digital telecommunications trunk line however,

operates on 4-wires; two of which are allocated for

transmitting and two for receiving. This 2 to 4-wire interface

consists of the SLIC and CODEC. A SLIC is the primary

interface between the 4-wire (ground referenced) low

voltage switch environment and the 2 wire (floating) high

voltage loop environment. It performs a number of important

functions including Battery feed, Overvoltage protection,

Ringing, Signaling, Coding, Hybrid Balancing and also

Testing.

Functional Description

The ISL6401 pulse width modulating (PWM) current mode

controller is designed for a wide range of DC-DC conversion

applications including boost, flyback, and isolated output

configurations. The device is optimized to provide high

performance, low-cost solution for Ringing SLIC (RSLIC)

Ring (Vbh) and Talk (Vbl) power supplies in VoIP

applications. The IC features an integrated inverter that is

ideal for generating negative output voltage like RSLIC Ring

Vbh (-72V) and Talk Vbl (-24V), -48V for IP Phones, -5V and

-15V for DSL CO line drivers. The output voltages are

adjusted with an external voltage divider.

The Ringing SLIC (RSLIC) typically requires two high

voltage power supply inputs. The first is a tightly regulated

voltage around -24V or -48V for off-hook signal transmission.

The second is a loosely regulated -70 to -100V for ring tone

generation. When the switch hook is released the phone

puts approximately 200Ω of resistance across the phone

terminals. Intersil RSLICs feature internal current limiting so

this load is not presented to the power supply. However, not

all of the SLICs available in the market offer this feature and

the power supply is expected to maintain output during the

remainder of the ring cycle. Once voice transmission begins,

the SLIC, in many cases, requires a lower voltage input to

establish a 20-25mA current loop. The loop feeds the 200Ω,

protection resistors, and line resistances within the phone. In

some cases, the lower supply and higher supply voltage are

combined and the SLIC runs from a compromise voltage of

approximately -53V.

Peak current mode control architecture effectively handles

Ring trip transients and provides inherent over-current

protection. Flyback topology allows the operation close to

50% duty cycle, offering optimum transformer utilization, low

ripple current and less stress on input/output capacitors.

Internal soft start minimizes start-up stress without any

external components. The switching frequency can be

programmed from 50kHz to 600kHz or alternatively the

internal oscillator can be locked to an external clock fed at

SYNC input for noise sensitive applications. A logic level

shutdown input is included, which reduces supply current to

55µA in the shutdown mode. DC-DC conversion efficiency is

optimized by use of a low current sense voltage.

For a detailed functional description, complete specifications

and component selection guidelines, please refer to the

ISL6401 Data Sheet, Intersil Corporation, File No. FN9007,

available on Intersil’s website, http://www.intersil.com/

The specifications below are for a 4-line requirement with

5 REN per line

Application Information

TABLE 1. TYPICAL POWER SUPPLY REQUIREMENT FOR

VoIP RESIDENTIAL GATEWAY

As worldwide demand for inexpensive Voice over Internet

Protocol telephony grows, so will the need for Integrated

Circuits that are specialized to enable compatibility between

new telephony systems and older telephones based on

analog standards. Analog ring signal generation and off

hook loop current supply are two analog functions that are

performed by Subscriber Line Interface Circuits (SLICs).

This application note discusses the special power supply

implementation to generate the high negative voltages

needed by SLICs.

PARAMETER

Input Voltage

REQUIREMENT

5 or 12 volts

Output Power

Efficiency

3 to 10 watts

80 to 90%

Output Voltages

-24V, -72 to -100V and/or

-48V

-24V Requirements (4 lines)

-72V Requirements (4 lines)

Regulation: ±5% Maximum

Output Current: 0.10A Ripple:

Less than 0.25Vpp

Overview of Telephone loop system

Traditionally a telephone network consists of a circuit

between the subscriber and the central office. However, the

advent of new high speed digital technologies have created

the need to control and manage the functions of the phone

locally as opposed to the central office. In both instances the

principals governing the operation of the phone loop are

essentially the same.

Regulation: ±10% Maximum

Output Current: 0.10A Ripple:

Less than 1Vpp

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

Application Note 1082

If a 5V supply is being used for the VCC input, place a

Using the ISL6401 Evaluation Board

jumper connecting the pins to the left (pin 1 and pin 2) of

JP1. Placing a jumper to the right (pin 2 and pin 3) of JP2 will

supply the bias of the ISL6401 from the input voltage at VIN

using a zener diode (D1).

The ISL6401EVAL1E Schematic shows a current mode

power supply using the Intersil ISL6401 in standard flyback

topology. The ISL6401EVAL1 evaluation board is shipped

“ready to use” right from the box. The IC requires +5V Bias.

The evaluation board input voltage can be 10V to 16V with

the specified transformer and external components. The

output voltages are -24V at 120mA and -72V at 120mA. The

board is capable of evaluating device operation with loads

that simulate one, two, three or four line operation. The use

of an electronic load enables evaluation over a wide range of

operating conditions. Simply vary the load on each output

from 0 - 120mA in any combination to match exact

Input Voltage - Adjust the power supplies to provide the 5V

and 12V input voltages. With the power supplies turned off,

connect the positive lead of the 5V supply to the VCC post

(P3). Connect the ground lead of the supply to the GND post

(P4). Connect the positive lead of the 12V supply to the VIN

post (P1). Connect the ground lead to the GND post (P2).

Output Voltage Loading and Monitoring - To exercise and

monitor VOUT1, connect the positive lead of one of the

electronic loads to the GND post (P7). Connect the ground

lead of the electronic load to the VOUT1 post (P8). Connect

the positive end of a digital multimeter to the VOUT1 post

(P8). Connect the digital multimeter ground terminal to the

GND post (P7).

application requirements. The circuit uses off the shelf

inexpensive transformers to generate both outputs using a

single controller. The transformer turns ration is 1:1:1:1

where 24V appear across each secondary winding and the

primary during the switch off time. The remaining secondary

windings are stacked in series to develop -48V. The -48V

section is then stacked on the -24V section to get the -72V.

This technique provides good cross regulation, lowers the

voltage rating required for the output capacitors and lowers

the RMS current, allowing the use of cheaper output

capacitors. Also, the selection of a transformer with multifilar

winding lowers the leakage inductance and cost. The cross

regulation of both output is achieved by using split feedback

for both outputs where the feedback factor can be weighed

based on load condition on both outputs.

To exercise and monitor VOUT2, connect the positive lead of

the other electronic load to the GND post (P10). Connect the

ground lead of the electronic load to the VOUT1 post (P9).

Connect the positive end of a digital multimeter to the

VOUT1 post (P9). Connect the digital multimeter ground

terminal to the GND post (P10).

Each output can be viewed with an oscilloscope using the

two scope probes, SP1 (VOUT1) and SP2 (VOUT2).

Startup

TABLE 2. ISL6401 EVALUATION BOARD

The ISL6401 features an internal digital soft start to reduce

transformer and output capacitor stress and to reduce the

inrush current surge on the input circuits. Figure 1 shows the

startup sequence.

BOARD NAME

PACKAGE

14-Ld SOIC

ISL6401EVAL1E

ISL6401CB

The evaluation board kit also includes 5 samples of

ISL6401CB and ISL6401CR each.

VOUT1

20V/DIV

Recommended Test Equipment

• A 5V power supply to bias the IC.

VOUT2

• A 12V power supply capable of supplying 2A of current

• Two electronic loads

20V/DIV

• Precision digital multimeters

• A 4-channel scope with probes

Power and Load Connections

The ISL6401 evaluation board has three sets of terminal

posts and a jumper that are used to supply the input voltages

and to monitor and load the outputs.

VIN

10ms/DIV

10V/DIV

FIGURE 1. SOFT START WAVEFORMS (2ms/DIV)

Jumper Settings - Jumper JP1 allows the ISL6401 to be

biased from a separate 5V supply or from the input voltage

at VIN using a zener diode.

Application Note 1082

Output Performance

600

Output Ripple - Figure 2 shows the output voltage ripple for

500

400

300

200

100

VOUT1 and VOUT2 both at 100mA load.

VOUT1

20mV/DIV

VOUT2

10us/DIV

20mV/DIV

120 180 250 300 390 510 610 820 1200

CAPACITANCE (pF)

FIGURE 2. OUTPUT 1 AND 2 RIPPLE VOLTAGE

FIGURE 5. OUTPUT SWITCHING FREQUENCY vs CT

Transient Response - Figure 3 and Figure 4 show the

transient performance of the each output for a step load from

0mA to 100mA.

External Synchronization - The internal oscillator can be

synchronized by an external clock connected to the SYNC

pin (P6). Program the free running frequency of the oscillator

to be 10% slower than the desired synchronous frequency.

The external clock signal should have a minimum pulse

width of 20ns.

VOUT1

Shutdown

50mV/DIV

When the SD pin (P5) is pulled low, the PWM is turned off

and the output capacitors discharge. A typical shutdown

waveform using the SD pin is shown in Figure 6.

IOUT1

50mA/DIV

2ms/DIV

VOUT1

20V/DIV

FIGURE 3. VOUT1 TRANSIENT RESPONSE

VOUT2

200mV/DIV

VOUT2

20V/DIV

10ms/DIV

FIGURE 6. OUTPUT SHUTDOWN WAVEFORMS

Conclusion

The ISL6401EVAL1evaluation board is a flyback reference

design optimized to provide a high performance, low-cost

solution for RSLIC Ring and Talk power supplies in VoIP

application. It has the capablility of evaluating device operation

with loads that simulate one, two, three, or four line operation.

IOUT2

2ms/DIV

50mA/DIV

FIGURE 4. VOUT2 TRANSIENT RESPONSE

Oscillator

References

Switching Frequency - The gate driver output switching

frequency can be programmed from 50kHz to 600kHz by

adjusting the capacitor value on the CT pin (C5). Figure 5

can be used as a guideline in selecting the capacitor value

required for a given frequency.

1. ISL6401 Datasheet, Intersil Corporation, File No. FN9007

For Intersil documents available on the web, see

http://www.intersil.com/

ISL6401EVAL1E Schematic

VIN

SP1

VOUT1

C1A-G

2.2µF

GND

340

220pF

100

JP1

VCC +5V

GND

BZT52C5V1

SEC

C10A-B

C13

PRI

C11

270µF

2.2µF

2.4K

2.2µF

10K

VOUT1

MUR5120T3

SHUTDOWN

SYNC

1µF

560pF

MUR5160T3

TP3

VOUT2

GND

Q1-D

IFLY0012

R10

220

C12

C14

0.1µF

180pF

C9A

SYNC PV

COMP PGND

C9B

0.1µF

100µF

39µF

P10

GATE

IRLR2905

330pF

30K

0.027µF

SP2

R13

5.1

GND

NFB OUT CS

100

TP4

VOUT2

C15

0.01µF

NFB IN

ISL6401

499

1.24K

R11

R12

0.025

TP1

47.5K

143K

1000pF

P11

NFB

GND

TP2

NULL

Application Note 1082

ISL6401EVAL1E Bill of Materials

ITEM REFERENCE QTY

PART NUMBER

PART TYPE

IC, Linear

DESCRIPTION

PACKAGE

SO-14

VENDOR

Intersil

ISL6401CB

Current mode PWM

Controller

IRLR2905

MOSFET Single

Diode

N-channel, 55V, 0.027Ω, 42A TO-252AA

International

Diode

BZT52C5V1

MURS120T3

MURS160T3

IFLY0012

Zener, 5.1V, ±5%, 0.5A

Schottky, 200V, 1A

Schottky, 600V, 1A

Custom Built

SOD123

Diode

Case 403A-03 Motorola/ON Semi

Diode

Transformer

IFLY0012

SM_1210

GCI/Falco

C1A to C1G,

C11, C13

GMK325BJ225KN-T Capacitor, Ceramic

2.2µF, 20%, 35V, X7R

Taiyo Yuden

0805YC221KAT2A Capacitor, Ceramic,

NPO

220pF, 10%, 50V

SM_0805

AVX/Panasonic

1812C105MAT2A

Capacitor, Ceramic, X7R 1µF, 20%, 50V

SM_1812

SM_1206

AVX

1206YC331KAT2A Capacitor, Ceramic,

NPO

330pF, 20%, 100V

AVX/Panasonic

08055A561FAT2A

Capacitor, Ceramic,

NPO

560pF, ±1 50V

SM_0805

AVX/Panasonic

0805YC181KAT2A Capacitor, Ceramic,

NPO

180pF, 10%, 50V

0805YC273KAT2A Capacitor, Ceramic, X7R 0.027µF, 10%, 50V

0805YC102KAT2A Capacitor, Ceramic, X7R 1000pF, 5%, 50V

SM_0805

AVX/Panasonic

C9A

C9B

C10A

100MV100AX

100MV39AX

35MV270AX

Capacitor, Aluminum

100µF, 20%,100V

39µF, 20%,100V

270µF, 20%,35V

TANT-200-500 SAYNO

CASE-CC

SAYNO

C10B (Do Not

Populate)

C12, C14

C15

1812C104MAT2A

Capacitor, Ceramic, X7R 0.1µF, 20%, 100V

SM_1812

SM_0805

SM_2010

SM_0805

SM_2512

AVX/Panasonic

Panasonic

0805YC103KAT2A Capacitor, Ceramic, X7R 0.01µF, 5%, 50V

Resistor, Film

340Ω, 5%, 1/2W

10kΩ, 1%, 0.1W

100Ω, 5%, 0.1W

0.025Ω, 1%, 1W

Panasonic

Resistor, Power metal

strip

Vishay / IRC

Resistor, Film

100Ω, 5%, 0.25W

1.24kΩ, 1%, 0.1W

499Ω

SM_1210

SM_0805

SM_01206

Panasonic

30KΩ, 1%, 0.1W

2.43kΩ, 1%, 1/8W

R9 (Do Not

Populate)

R10

R11

R12

Resistor, Film

220Ω, 1%, 0.25W

47.5kΩ, 1%, 0.1W

143kΩ, 1%, 0.1W

SM_1210

SM_0805

Panasonic

Application Note 1082

ISL6401EVAL1E Bill of Materials (Continued)

ITEM REFERENCE QTY

PART NUMBER

PART TYPE

DESCRIPTION

5R1Ω, 5%, 0.25W

1x3 Break Strip GOLD

2 pin jumper

PACKAGE

VENDOR

Panasonic

R13

JP1

Resistor, Film

SM_1210

68000-236-1X3

S9001-ND

5002

Jumper, 3 position

Jumper

JP1

Digikey

TP1 to TP4

TEST POINT

vertical,white

PC test jack

PTH

Keystone

P1 - P11

11 1514-2

Turrett Post

Terminal post,through

hole,1/4 inch tall

Keystone

Tektronix

SP1, SP2

TEK131-4353-00

4-40X1/2 Screw

Terminal, Scope Probe Terminal, Scope Probe

Screw, #4, Panhead 4-40x1/2 Screw

39 Mounting Hole

1-4

40 Mounting Hole

1-4

4-40X3/4 Standoff- Standoff, 1", for #4 screw 4-40x3/4 Standoff-Metal

Metal

PTH = 0.250"

ISL6401EVAL1E Layout

FIGURE 7. TOP SILKSCREEN

Application Note 1082

ISL6401EVAL1E Layout (Continued)

FIGURE 8. TOP LAYER 1

FIGURE 9. TOP LAYER 2

Application Note 1082

ISL6401EVAL1E Layout (Continued)

FIGURE 10. TOP LAYER 3

FIGURE 11. BOTTOM SILKSCREEN

All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.

Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without

notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and

reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result

from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see www.intersil.com

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