IRFZ48ZSTRL [INFINEON]
Power Field-Effect Transistor, 61A I(D), 55V, 0.011ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, PLASTIC, D2PAK-3;
| 型号： | IRFZ48ZSTRL |
| 厂家： | 
Infineon |
| 描述： | Power Field-Effect Transistor, 61A I(D), 55V, 0.011ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, PLASTIC, D2PAK-3 局域网 开关 脉冲 晶体管 |
| 文件： | 总13页 (文件大小：283K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD - 95574
IRFZ48ZPbF
AUTOMOTIVE MOSFET
IRFZ48ZSPbF
Features
IRFZ48ZLPbF
O
O
O
O
O
O
O
Advanced Process Technology
HEXFET® Power MOSFET
Ultra Low On-Resistance
Dynamic dv/dt Rating
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Lead-Free
D
VDSS = 55V
RDS(on) = 11mΩ
G
Description
ID = 61A
Specifically designed for Automotive applica-
tions,thisHEXFET® PowerMOSFETutilizesthe
latestprocessingtechniquestoachieveextremely
low on-resistance per silicon area. Additional
features of this design are a 175°C junction
operatingtemperature, fastswitchingspeedand
improved repetitive avalanche rating . These
features combine to make this design an ex-
tremely efficient and reliable device for use in
Automotive applications and a wide variety of
S
D2Pak
IRFZ48ZS
TO-262
IRFZ48ZL
TO-220AB
IRFZ48Z
other applications.
Absolute Maximum Ratings
Parameter
Max.
61
Units
I
I
I
@ TC = 25°C
@ TC = 100°C
A
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (See Fig. 9)
Pulsed Drain Current
D
D
43
240
91
DM
P
@TC = 25°C
W
Maximum Power Dissipation
D
Linear Derating Factor
0.61
± 20
W/°C
V
V
Gate-to-Source Voltage
GS
EAS
73
120
mJ
Single Pulse Avalanche Energy (Thermally Limited)
Single Pulse Avalanche Energy Tested Value
Avalanche Current
EAS (tested)
IAR
See Fig.12a,12b,15,16
A
EAR
mJ
°C
Repetitive Avalanche Energy
T
J
-55 to + 175
Operating Junction and
T
Storage Temperature Range
STG
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 screw
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
Typ.
–––
Max.
1.64
–––
62
Units
Rθ
°C/W
JC
CS
JA
JA
Junction-to-Case
Rθ
Rθ
Rθ
0.50
–––
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
–––
40
Junction-to-Ambient (PCB Mount, steady state)
HEXFET® is a registered trademark of International Rectifier.
www.irf.com
107/19/04
IRFZ48Z/S/LPbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
Min. Typ. Max. Units
55 ––– –––
Conditions
VGS = 0V, ID = 250µA
V(BR)DSS
∆ΒVDSS/∆TJ
RDS(on)
V
Breakdown Voltage Temp. Coefficient ––– 0.054 –––
V/°C Reference to 25°C, ID = 1mA
GS = 10V, ID = 37A
VDS = VGS, ID = 250µA
Static Drain-to-Source On-Resistance –––
8.6
–––
–––
–––
–––
–––
11
4.0
–––
20
V
Ω
V
m
VGS(th)
Gate Threshold Voltage
2.0
24
gfs
IDSS
Forward Transconductance
Drain-to-Source Leakage Current
S
V
V
V
V
V
DS = 25V, ID = 37A
DS = 55V, VGS = 0V
DS = 55V, VGS = 0V, TJ = 125°C
GS = 20V
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
µA
250
200
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
nA
––– -200
GS = -20V
Qg
Qgs
Qgd
td(on)
tr
43
11
16
15
69
35
39
4.5
64
16
nC ID = 37A
VDS = 44V
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
24
V
GS = 10V
DD = 28V
–––
–––
–––
–––
–––
ns
V
Rise Time
ID = 37A
G = 12Ω
VGS = 10V
td(off)
tf
Turn-Off Delay Time
R
Fall Time
LD
Internal Drain Inductance
nH Between lead,
D
6mm (0.25in.)
from package
G
LS
Internal Source Inductance
–––
7.5
–––
S
and center of die contact
pF VGS = 0V
DS = 25V
ƒ = 1.0MHz, See Fig. 5
Ciss
Input Capacitance
––– 1720 –––
Coss
Output Capacitance
–––
–––
300
160
–––
–––
V
Crss
Reverse Transfer Capacitance
Output Capacitance
Coss
––– 1020 –––
V
GS = 0V, VDS = 1.0V, ƒ = 1.0MHz
GS = 0V, VDS = 44V, ƒ = 1.0MHz
Coss
Output Capacitance
–––
–––
230
380
–––
–––
V
Coss eff.
Effective Output Capacitance
VGS = 0V, VDS = 0V to 44V
Diode Characteristics
Parameter
Min. Typ. Max. Units
Conditions
D
IS
Continuous Source Current
–––
–––
61
MOSFET symbol
(Body Diode)
Pulsed Source Current
A
V
showing the
integral reverse
G
ISM
–––
–––
240
S
(Body Diode)
p-n junction diode.
VSD
T = 25°C, I = 37A, V = 0V
Diode Forward Voltage
–––
–––
1.3
J
S
GS
trr
Qrr
T = 25°C, I = 37A, VDD = 30V
J F
di/dt = 100A/µs
Reverse Recovery Time
Reverse Recovery Charge
–––
–––
20
13
31
20
ns
nC
ton
Forward Turn-On Time
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
ꢀ Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
Limited by TJmax, starting TJ = 25°C, L =0.11mH,
.
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
avalanche performance.
RG = 25Ω, IAS = 37A, VGS =10V. Part not
recommended for use above this value.
This value determined from sample failure population. 100%
tested to this value in production.
This is applied to D2Pak, when mounted on 1" square PCB
( FR-4 or G-10 Material ). For recommended footprint and
soldering techniques refer to application note #AN-994.
ISD ≤ 37A, di/dt ≤ 920A/µs, VDD ≤ V(BR)DSS
TJ ≤ 175°C.
Pulse width ≤ 1.0ms; duty cycle ≤ 2%.
,
2
www.irf.com
IRFZ48Z/S/LPbF
1000
100
10
1000
100
10
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
TOP
TOP
BOTTOM
BOTTOM
4.5V
4.5V
30µs PULSE WIDTH
Tj = 175°C
30µs PULSE WIDTH
Tj = 25°C
1
1
0.1
1
10
100
1000
0.1
1
10
100
1000
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
100
10
60
T
= 25°C
50
40
30
20
10
0
J
T
= 175°C
J
T
= 175°C
J
T
= 25°C
J
V
= 25V
DS
30µs PULSE WIDTH
V
= 10V
DS
1.0
4
5
6
7
8
9
10
0
10
20
30
40
I ,Drain-to-Source Current (A)
D
V
, Gate-to-Source Voltage (V)
GS
Fig 3. Typical Transfer Characteristics
Fig 4. Typical Forward Transconductance
vs. Drain Current
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3
IRFZ48Z/S/LPbF
12.0
10.0
8.0
10000
V
= 0V,
= C
f = 1 MHZ
GS
I = 37A
D
C
C
C
+ C , C
SHORTED
iss
gs
gd
ds
= C
V
V
V
= 44V
= 28V
= 11V
rss
oss
gd
DS
DS
DS
= C + C
ds
gd
C
C
iss
6.0
1000
4.0
oss
2.0
C
rss
0.0
100
1
10
100
0
10
20
30
40
50
Q
Total Gate Charge (nC)
V
, Drain-to-Source Voltage (V)
G
DS
Fig 6. Typical Gate Charge vs.
Fig 5. Typical Capacitance vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
1000
100
10
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R
(on)
DS
T
= 175°C
J
100µsec
T = 25°C
J
1msec
Tc = 25°C
10msec
Tj = 175°C
Single Pulse
V
= 0V
GS
1
1
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
, Source-to-Drain Voltage (V)
1
10
, Drain-to-Source Voltage (V)
100
V
V
SD
DS
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
www.irf.com
IRFZ48Z/S/LPbF
70
60
50
40
30
20
10
0
2.5
2.0
1.5
1.0
0.5
I
= 37A
= 10V
D
V
GS
-60 -40 -20
T
0
20 40 60 80 100 120 140 160 180
25
50
75
100
125
150
175
T
, Case Temperature (°C)
, Junction Temperature (°C)
C
J
Fig 10. Normalized On-Resistance
Fig 9. Maximum Drain Current vs.
vs. Temperature
Case Temperature
10
1
0.1
D = 0.50
0.20
0.10
R1
R1
R2
R2
Ri (°C/W) τi (sec)
0.9848 0.000451
0.05
0.02
0.01
τ
J τJ
τ
τ
Cτ
1 τ1
Ci= τi/Ri
τ
2τ2
0.6546 0.002487
0.01
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t
, Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFZ48Z/S/LPbF
300
250
200
150
100
50
15V
I
D
TOP
3.5A
4.9A
BOTTOM 37A
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
2
V0GVS
Ω
0.01
t
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
0
25
50
75
100
125
150
175
Starting T , Junction Temperature (°C)
J
I
AS
Fig 12c. Maximum Avalanche Energy
Fig 12b. Unclamped Inductive Waveforms
vs. Drain Current
Q
G
10 V
Q
Q
4.0
3.5
3.0
2.5
2.0
1.5
1.0
GS
GD
V
G
Charge
I
= 250µA
D
Fig 13a. Basic Gate Charge Waveform
L
VCC
DUT
0
1K
-75 -50 -25
0
25 50 75 100 125 150 175 200
, Temperature ( °C )
T
J
Fig 14. Threshold Voltage vs. Temperature
Fig 13b. Gate Charge Test Circuit
6
www.irf.com
IRFZ48Z/S/LPbF
1000
100
10
Duty Cycle = Single Pulse
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming ∆Tj = 25°C due to
avalanche losses
0.01
0.05
0.10
1
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current vs.Pulsewidth
80
60
40
20
0
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
TOP
BOTTOM 1% Duty Cycle
= 37A
Single Pulse
I
D
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
25
50
75
100
125
150
175
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
Starting T , Junction Temperature (°C)
J
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Fig 16. Maximum Avalanche Energy
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
vs. Temperature
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7
IRFZ48Z/S/LPbF
Driver Gate Drive
P.W.
P.W.
Period
Period
D =
D.U.T
+
*
=10V
V
GS
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D.U.T. I Waveform
SD
+
-
Reverse
Recovery
Current
Body Diode Forward
Current
-
+
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
VDD
Re-Applied
Voltage
• dv/dt controlled by RG
RG
+
-
Body Diode
Forward Drop
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
RD
VDS
VGS
D.U.T.
RG
+VDD
-
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 18a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
t
r
t
t
f
d(on)
d(off)
Fig 18b. Switching Time Waveforms
8
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IRFZ48Z/S/LPbF
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
10.54 (.415)
3.78 (.149)
- B -
10.29 (.405)
2.87 (.113)
2.62 (.103)
4.69 (.185)
4.20 (.165)
3.54 (.139)
1.32 (.052)
1.22 (.048)
- A -
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
LEAD ASSIGNMENTS
1.15 (.045)
MIN
HEXFET
IGBTs, CoPACK
1
2
3
1- GATE
1- GATE
2- DRAIN
3- SOURCE
2- COLLECTOR
3- EMITTER
4- COLLECTOR
4- DRAIN
14.09 (.555)
13.47 (.530)
4.06 (.160)
3.55 (.140)
0.93 (.037)
0.69 (.027)
0.55 (.022)
0.46 (.018)
3X
3X
1.40 (.055)
3X
1.15 (.045)
0.36 (.014)
M
B A M
2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
2 CONTROLLING DIMENSION : INCH
3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
4
TO-220AB Part Marking Information
EXAMPLE: T HIS IS AN IRF1010
LOT CODE 1789
PART NUMBER
AS S EMBLED ON WW 19, 1997
IN THE ASSEMBLY LINE "C"
INTERNATIONAL
RECTIFIER
LO GO
Note: "P" in assembly line
position indicates "Lead-Free"
DATE CODE
YEAR 7 = 1997
WEEK 19
ASSEMBLY
LOT CODE
LINE C
www.irf.com
9
IRFZ48Z/S/LPbF
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
D2Pak Part Marking Information
THIS IS AN IRF530S WITH
LOT CODE 8024
PART NUMBER
INTERNATIONAL
RECTIFIER
LOGO
ASS EMBLED ON WW 02, 2000
IN THE ASSEMBLY LINE "L"
F530S
DATE CODE
YE AR 0 = 2000
WEEK 02
Note: "P" in a sse mbly line
pos ition indicates "L ead-F ree"
ASSEMBLY
LOT CODE
LINE L
OR
PART NUMBER
INTERNATIONAL
RECT IFIER
F530S
LOGO
DAT E CODE
P = DESIGNATES LEAD-FREE
PRODUCT (OPTIONAL)
YEAR 0 = 2000
AS S E MB L Y
LOT CODE
WEEK 02
A = ASSEMBLYSITE CODE
10
www.irf.com
IRFZ48Z/S/LPbF
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
EXAMPLE: THIS IS AN IRL3103L
LOT CODE 1789
PART NUMBER
INTERNATIONAL
RECTIFIER
LOGO
ASSEMBLED ON WW 19, 1997
IN THE ASSEMBLY LINE "C"
DATE CODE
YEAR 7 = 1997
WEEK 19
Note: "P" in assembly line
pos ition indicates "L ead-F ree"
ASSEMBLY
LOT CODE
LINE C
OR
PART NUMBER
DATE CODE
INTERNATIONAL
RECTIFIER
LOGO
P = DESIGNATES LEAD-FREE
PRODUCT (OPTIONAL)
YEAR 7 = 1997
ASSEMBLY
LOT CODE
WEEK 19
A = AS S E MB LY S IT E CODE
www.irf.com
11
IRFZ48Z/S/LPbF
D2Pak Tape & Reel Information
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063)
1.50 (.059)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
0.368 (.0145)
0.342 (.0135)
FEED DIRECTION
TRL
11.60 (.457)
11.40 (.449)
1.85 (.073)
1.65 (.065)
24.30 (.957)
23.90 (.941)
15.42 (.609)
15.22 (.601)
1.75 (.069)
1.25 (.049)
10.90 (.429)
10.70 (.421)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
60.00 (2.362)
MIN.
30.40 (1.197)
MAX.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039)
24.40 (.961)
4
3
TO-220AB package is not recommended for Surface Mount Application.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Automotive [Q101] market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 07/04
12
www.irf.com
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/
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