IRFP4004PBF [INFINEON]
IRFP4004PBF;型号: | IRFP4004PBF |
厂家: | Infineon |
描述: | IRFP4004PBF |
文件: | 总8页 (文件大小:295K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PD - 97323
IRFP4004PbF
Applications
l High Efficiency Synchronous Rectification in
HEXFET® Power MOSFET
SMPS
l Uninterruptible Power Supply
l High Speed Power Switching
l Hard Switched and High Frequency Circuits
D
S
VDSS
RDS(on) typ.
max.
ID (Silicon Limited)
40V
1.35mΩ
1.70m
Ω
G
350A
c
ID (Package Limited)
195A
Benefits
l Improved Gate, Avalanche and Dynamic
dv/dt Ruggedness
l Fully Characterized Capacitance and
Avalanche SOA
D
l Enhanced body diode dV/dt and dI/dt
Capability
S
D
G
TO-247AC
G
D
S
Gate
Drain
Source
Absolute Maximum Ratings
Symbol
Parameter
Max.
350c
250c
195
Units
ID @ TC = 25°C
Continuous Drain Current, VGS @ 10V (Silicon Limited)
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited)
A
ID @ TC = 25°C
IDM
Continuous Drain Current, VGS @ 10V (Wire Bond Limited)
Pulsed Drain Current d
1390
380
PD @TC = 25°C
W
Maximum Power Dissipation
Linear Derating Factor
2.5
W/°C
V
VGS
20
Gate-to-Source Voltage
2.0
Peak Diode Recovery f
dv/dt
TJ
V/ns
°C
-55 to + 175
Operating Junction and
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case)
300
10lbxin (1.1Nxm)
Mounting torque, 6-32 or M3 screw
Avalanche Characteristics
Single Pulse Avalanche Energy e
EAS (Thermally limited)
290
mJ
A
Avalanche Currentꢀd
IAR
See Fig. 14, 15, 22a, 22b
Repetitive Avalanche Energy g
EAR
mJ
Thermal Resistance
Symbol
Parameter
Junction-to-Case k
Typ.
–––
Max.
0.40
–––
40
Units
RθJC
RθCS
RθJA
0.24
–––
°C/W
Case-to-Sink, Flat Greased Surface
Junction-to-Ambient
jk
www.irf.com
1
06/05/08
IRFP4004PbF
Static @ TJ = 25°C (unless otherwise specified)
Symbol
V(BR)DSS
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Min. Typ. Max. Units
40 ––– –––
––– 0.035 ––– V/°C Reference to 25°C, ID = 5mAd
Conditions
VGS = 0V, ID = 250µA
V
∆V(BR)DSS/∆TJ
RDS(on)
––– 1.35 1.70
VGS = 10V, ID = 195A g
VDS = VGS, ID = 250µA
VDS = 40V, VGS = 0V
VDS = 40V, VGS = 0V, TJ = 125°C
VGS = 20V
V
mΩ
V
VGS(th)
2.0
–––
4.0
20
IDSS
Drain-to-Source Leakage Current
––– –––
µA
––– ––– 250
––– ––– 200
––– ––– -200
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
nA
GS = -20V
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Parameter
Forward Transconductance
Total Gate Charge
Min. Typ. Max. Units
Conditions
VDS = 10V, ID = 195A
290 ––– –––
S
Qg
––– 220 330
nC ID = 195A
VDS = 20V
Qgs
Qgd
Qsync
Gate-to-Source Charge
–––
–––
59
75
–––
–––
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Qg - Qgd)
VGS = 10V g
––– 145 –––
ID = 195A, VDS =0V, VGS = 10V
RG(int)
td(on)
–––
Ω
Internal Gate Resistance
Turn-On Delay Time
Rise Time
6.8
59
–––
–––
–––
ns VDD = 20V
ID = 195A
RG = 2.7Ω
VGS = 10V g
tr
––– 370 –––
––– 160 –––
––– 190 –––
––– 8920 –––
––– 2360 –––
––– 930 –––
––– 2860 –––
––– 3110 –––
td(off)
Turn-Off Delay Time
Fall Time
tf
Ciss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
pF
V
GS = 0V
Coss
VDS = 25V
Crss
ƒ = 1.0MHz
Coss eff. (ER)
Coss eff. (TR)
V
GS = 0V, VDS = 0V to 32V i
GS = 0V, VDS = 0V to 32V h
Effective Output Capacitance (Energy Related)
i
V
Effective Output Capacitance (Time Related)
h
Diode Characteristics
Symbol
Parameter
Min. Typ. Max. Units
Conditions
IS
Continuous Source Current
––– –––
A
MOSFET symbol
D
S
350
c
(Body Diode)
showing the
integral reverse
G
ISM
Pulsed Source Current
(Body Diode)ꢁdi
Diode Forward Voltage
Reverse Recovery Time
––– ––– 1390
p-n junction diode.
TJ = 25°C, IS = 195A, VGS = 0V g
VSD
trr
––– –––
1.3
130
120
V
TJ = 25°C
TJ = 125°C
TJ = 25°C
TJ = 125°C
TJ = 25°C
VR = 20V,
–––
–––
83
78
ns
IF = 195A
di/dt = 100A/µs g
Qrr
Reverse Recovery Charge
––– 190 290
––– 210 320
nC
IRRM
ton
Reverse Recovery Current
Forward Turn-On Time
–––
4.0
–––
A
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Calculated continuous current based on maximum allowable junction
temperature. Bond wire current limit is 195A. Note that current
limitations arising from heating of the device leads may occur with
ISD ≤ 195A, di/dt ≤ 690A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
ꢀ Pulse width ≤ 400µs; duty cycle ≤ 2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time
some lead mounting arrangements. Refer to App Notes (AN-1140).
Repetitive rating; pulse width limited by max. junction
temperature.
as Coss while VDS is rising from 0 to 80% VDSS
Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS
When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
.
.
Limited by TJmax, starting TJ = 25°C, L = 0.015mH
mended footprint and soldering techniques refer to application note #AN-994.
Rθ is measured at TJ approximately 90°C.
RG = 25Ω, IAS = 195A, VGS =10V. Part not recommended for use
above this value.
2
www.irf.com
IRFP4004PbF
1000
100
10
1000
100
10
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
TOP
TOP
BOTTOM
BOTTOM
4.5V
4.5V
60µs PULSE WIDTH
≤
Tj = 175°C
60µs PULSE WIDTH
Tj = 25°C
≤
0.1
1
10
0.1
1
10
V
, Drain-to-Source Voltage (V)
DS
V
, Drain-to-Source Voltage (V)
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
100
10
2.0
1.5
1.0
0.5
I
= 195A
= 10V
D
V
GS
T
= 175°C
J
T
= 25°C
J
V
= 10V
DS
60µs PULSE WIDTH
≤
1.0
3
4
5
6
7
8
-60 -40 -20 0 20 40 60 80 100120140160180
, Junction Temperature (°C)
T
J
V
, Gate-to-Source Voltage (V)
GS
Fig 4. Normalized On-Resistance vs. Temperature
Fig 3. Typical Transfer Characteristics
100000
10000
1000
12.0
V
C
= 0V,
f = 1 MHZ
GS
I = 195A
D
= C + C , C SHORTED
iss
gs gd ds
C
= C
10.0
rss
gd
V
V
= 32V
= 24V
DS
DS
C
= C + C
ds gd
oss
C
8.0
6.0
4.0
2.0
0.0
iss
C
oss
C
rss
100
1
10
, Drain-to-Source Voltage (V)
100
0
50
Q
100
, Total Gate Charge (nC)
G
150
200
250
V
DS
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
www.irf.com
3
IRFP4004PbF
10000
1000
100
10
1000
OPERATION IN THIS AREA
LIMITED BY R (on)
DS
T
= 175°C
J
100
10
1
100µsec
1msec
T
= 25°C
J
10msec
DC
Tc = 25°C
Tj = 175°C
Single Pulse
V
= 0V
GS
1
0.1
1
10
100
0.0
0.4
0.8
1.2
1.6
2.0
V
, Drain-to-Source Voltage (V)
V
, Source-to-Drain Voltage (V)
DS
SD
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode Forward Voltage
350
52
50
48
46
44
42
40
Id = 5.0mA
300
250
200
150
100
50
Limited By Package
0
25
50
75
100
125
150
175
-60 -40 -20
0
T
20 40 60 80 100120140160180
, Temperature ( °C )
J
T
, Case Temperature (°C)
C
Fig 10. Drain-to-Source Breakdown Voltage
Fig 9. Maximum Drain Current vs. Case Temperature
2.5
1200
I
D
TOP
36A
73A
1000
800
600
400
200
0
2.0
1.5
1.0
0.5
0.0
BOTTOM 195A
-5
0
5
10 15 20 25 30 35 40
Drain-to-Source Voltage (V)
25
50
75
100
125
150
175
Starting T , Junction Temperature (°C)
J
V
DS,
Fig 12. Maximum Avalanche Energy vs. DrainCurrent
Fig 11. Typical COSS Stored Energy
4
www.irf.com
IRFP4004PbF
1
D = 0.50
0.1
0.20
0.10
R1
R1
R2
R2
R3
R3
R4
R4
Ri (°C/W) τi (sec)
0.0123
0.0585
0.1693
0.1601
0.000011
0.000055
0.000917
0.008784
τ
0.05
τ
J τJ
Cτ
τ
τ
1τ1
τ
τ
2τ2
3τ3
4τ4
0.02
0.01
0.01
Ci= τi/Ri
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t
, Rectangular Pulse Duration (sec)
1
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
100
10
Duty Cycle = Single Pulse
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming Tj = 150°C and
∆
0.01
Tstart =25°C (Single Pulse)
0.05
0.10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
Tstart = 150°C.
j = 25°C and
∆Τ
1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14. Typical Avalanche Current vs.Pulsewidth
300
250
200
150
100
50
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
TOP
BOTTOM 1.0% Duty Cycle
= 195A
Single Pulse
I
D
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
0
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
25
50
75
100
125
150
175
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
Starting T , Junction Temperature (°C)
J
Fig 15. Maximum Avalanche Energy vs. Temperature
www.irf.com
5
IRFP4004PbF
5.0
4.5
4.0
3.5
3.0
12
10
8
I = 78A
F
V
= 34V
R
T = 25°C
J
T = 125°C
J
I
I
I
= 250µA
= 1.0mA
= 1.0A
D
D
D
6
2.5
2.0
1.5
1.0
4
2
-75 -50 -25
0
25 50 75 100 125 150 175 200
, Temperature ( °C )
0
200
400
600
800
1000
T
di /dt (A/µs)
J
F
Fig. 17 - Typical Recovery Current vs. dif/dt
Fig 16. Threshold Voltage vs. Temperature
14
350
I = 117A
I = 78A
F
F
V
= 34V
V
= 34V
R
12
10
8
R
300
250
200
150
100
50
T = 25°C
T = 25°C
J
J
T = 125°C
J
T = 125°C
J
6
4
2
0
100
200
300
400
500
600
0
200
400
600
800
1000
di /dt (A/µs)
di /dt (A/µs)
F
F
Fig. 18 - Typical Recovery Current vs. dif/dt
Fig. 19 - Typical Stored Charge vs. dif/dt
400
I = 117A
F
V
= 34V
R
350
300
250
200
150
100
T = 25°C
J
T = 125°C
J
0
100
200
300
400
500
600
di /dt (A/µs)
F
Fig. 20 - Typical Stored Charge vs. dif/dt
6
www.irf.com
IRFP4004PbF
Driver Gate Drive
P.W.
P.W.
Period
Period
D =
D.U.T
+
*
=10V
V
GS
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D.U.T. I Waveform
SD
+
-
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
-
+
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
VDD
Re-Applied
Voltage
• dv/dt controlled by RG
RG
+
-
Body Diode
Forward Drop
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Inductor Current
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 20. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V
(BR)DSS
15V
t
p
DRIVER
+
L
V
DS
D.U.T
R
G
V
DD
-
I
A
AS
V
2
GS
0.01Ω
t
p
I
AS
Fig 21b. Unclamped Inductive Waveforms
Fig 21a. Unclamped Inductive Test Circuit
LD
VDS
VDS
90%
+
-
VDD
10%
VGS
D.U.T
VGS
Pulse Width < 1µs
Duty Factor < 0.1%
td(on)
td(off)
tr
tf
Fig 22a. Switching Time Test Circuit
Fig 22b. Switching Time Waveforms
Id
Vds
Vgs
L
VCC
DUT
Vgs(th)
0
1K
Qgs1
Qgs2
Qgd
Qgodr
Fig 23a. Gate Charge Test Circuit
Fig 23b. Gate Charge Waveform
www.irf.com
7
IRFP4004PbF
TO-247AC Package Outline
Dimensions are shown in millimeters (inches)
TO-247AC Part Marking Information
TO-247AC package is not recommended for Surface Mount Application.
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 06/08
www.irf.com
8
相关型号:
IRFP4110
The StrongIRFET™ power MOSFET family is optimized for low RDS(on) and high current capability. The devices are ideal for low frequency applications requiring performance and ruggedness. The comprehensive portfolio addresses a broad range of applications including DC motors, battery management systems, inverters, and DC-DC converters.
INFINEON
IRFP4227
The StrongIRFET™ power MOSFET family is optimized for low RDS(on) and high current capability. The devices are ideal for low frequency applications requiring performance and ruggedness. The comprehensive portfolio addresses a broad range of applications including DC motors, battery management systems, inverters, and DC-DC converters.
INFINEON
©2020 ICPDF网 联系我们和版权申明