IRAM336-025SB3 [INFINEON]
Integrated Power Hybrid IC for Appliance Motor Drive Applications; 集成功率混合IC，适用于家电电机驱动应用
| 型号： | IRAM336-025SB3 |
| 厂家： | 
Infineon |
| 描述： | Integrated Power Hybrid IC for Appliance Motor Drive Applications |
| 文件： | 总16页 (文件大小：395K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD-97277 Rev A
IRAM336-025SB
Series
3 Phase Inverter HIC
2A, 500V
Integrated Power Hybrid IC for
Appliance Motor Drive Applications
Description
International Rectifier’s IRAM336-025SB is a multi-chip Hybrid IC developed for low power appliance motor
control applications such as Fans, Pumps, and refrigerator compressors. The compact Single in line (SIP-S)
package minimizes PCB space.
Several built-in protection features such as temperature feedback, shoot through prevention, under voltage
lockout, and shutdown input makes this a very robust solution. The combination of highly efficient high
voltage MOSFETs and the industry benchmark 3-phase HVIC driver (3.3V/5V input compatible) and
thermally enhanced package makes this a highly competitive solution.
The bootstrapped power supplies for the high side drivers can be generated using internal bootstrap diodes
eliminating the need for isolated power supplies. This feature reduces the component count, board space,
and cost of the system.
Features
• Motor Power up to 250W / 85~253 Vac.
• Integrated Gate Drivers and Bootstrap Diodes.
• Over-current Shut-Down function.
• Under-voltage lockout for all switches.
• Matched propagation delay for all channels.
• Schmitt-triggered input logic.
• Cross-conduction prevention logic.
• Lower di/dt gate driver for better noise immunity.
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to VSS.
VDSS
MOSFET Blocking Voltage
500
400
V
V
Vbus
Positive DC Bus Input Voltage
RMS Phase Current
Io @ TC=25°C
2.0
Io @ TC=100°C
A
W
RMS Phase Current (Note 1)
1.0
Ipk @ TC=25°C
Maximum Peak Current (tp<100µs)
Maximum Power dissipation per Fet @ TC =25°C
Maximum Operating Junction Temperature
Operating Case temperature Range
Storage Temperature Range
6.0
Pd
15
TJ (MOSFET & IC)
+150
-20 to +100
-40 to +125
0.6
TC
°C
TSTG
T
Mounting torque (M3 screw)
Nm
Note 1: Sinusoidal Modulation at V+=360V, TJ=150°C, FPWM=20kHz, FMOD=50Hz, MI=0.8, PF=0.6, See Figure 5.
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1
IRAM336-025SB
Internal Electrical Schematic – IRAM336-025SB
+ (3)
Vbus
M1
M4
M2
M3
M6
M5
(2)
GND
R1
R2
R3
VB1 (9)
(8)
U, VS1
R4
R5
R6
(7)
VB2
V, VS2 (6)
(5)
W, VS3 (4)
VB3
22 21 20 19
18 17
23 VS1
24 HO1
25 VB1
1 VCC
Internal to
Driver IC
LO1 16
VB2 HO2 VS2 VB3 HO3 VS3
RB
LO2 15
LO3 14
Driver IC
HIN1 (11)
HIN2 (12)
HIN3 (13)
2 HIN1
3 HIN2
4 HIN3
LIN2 LIN3
6
F
8
TTRIP EN RCIN VSS COM
10
LIN1 (14)
5 LIN1
7
9
11
12 13
LIN2
(15)
LIN3 (16)
R7
I
(10)
TRIP
Fault/En (17)
TH (1)
C2
RTH
VDD(18)
R9
C1
(19)
VSS
2
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IRAM336-025SB
Absolute Maximum Ratings (Continued)
Absolute Maximum Ratings indicate substained limits beyond which damage to the device may occur. All voltage
paramaters are absolute voltages referenced to VSS.
High side floating supply offset
VS1,2,3
VB1,2,3
VDD
V
B1,2,3 - 20
-0.3
VB1,2,3 +0.3
V
V
V
voltage
High side floating supply
voltage
500
20
Low Side and logic fixed supply
voltage
-0.3
Lower of
(VSS+15V) or
VDD+0.3V
Input voltage LIN, HIN, Fault/EN,
ITrip
VIN, VF/EN, VITRIP
-0.3
V
MOSFET Characteristics
VBIAS (VCC, VB) = 15V and TA = 25°C unless otherwise specified. The VDD parameter is referenced to VSS.
Symbol
V(BR)DSS
IDSS
Parameter
Min
Typ
Max Units Conditions
Drain-to-Source Breakdown
Voltage
VIN=5V, ID=250µA
500
---
---
V
VIN=5V, V+=500V
ID=1.0A, VDD=15V
ID=1.0A, VDD=15V, TJ=150°C
IF=1.0A
Drain-to-Source Leakage Current
µA
---
---
---
---
---
5
100
2.7
---
2.2
RDS(ON)
Drain-to-Source On Resistance
ƻ
5.5
0.87
0.76
1.0
---
VFM
Diode Forward Voltage Drop
V
IF=1.0A, TJ=150°C
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the
recommended conditions. All voltages are absolute referenced to VSS. The VS offset is tested with all supplies biased at
15V differential.
Symbol
Definition
Min
---
Typ
---
Max
360
Units
V+
Positive Bus Input Voltage
High side floating supply voltage
Low side and logic fixed supply voltage
ITRIP input voltage
V
VB1,2,3
VDD
VS+10
10
VS+15
15
VS+20
20
V
VITRIP
VSS
VSS+5
VSS+5
20
---
VIN, VF/EN, VITRIP Logic input voltage LIN, HIN, Fault/EN, ITRIP - Note 2
Fp
VSS
---
V
Maximum PWM Carrier Frequency
---
---
KHz
Note 2: Logic operational for Vs from COM-5V to VSS+500V. Logic state held for Vs from VSS-5V to VSS-VBS.
(please refer to DT97-3 for more details).
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IRAM336-025SB
Static Electrical Characteristics (TJ= 25°C Unless Otherwise Specified)
VBIAS (VDD, VBS1,2,3)=15V, unless otherwise specified. The VIN and IIN parameters are referenced to VSS and are applicable
to all six channels (Static Electrical Characteristics are Based on Driver IC Data Sheet).
Symbol
VEN,th+
VEN,th-
Definition
Min
---
0.8
8
Typ
---
Max
2.5
---
Units
V
Enable Positive going threshold
Enable Negative going threshold
---
V
VDDUV+, VBSUV+ VDD and VBS supply undervoltage, Positive going threshold
8.9
8.2
70
9.8
9
V
VDDUV-, VBSUV-
VDD and VBS supply undervoltage, Negative going threshold
Quiescent VBS supply current
7.4
---
---
---
---
V
IQBS
IQDD
ILK
120
4
µA
mA
µA
ƻ
Quiescent VDD supply current
3
Offset Supply Leakage Current
---
50
RB
Internal BS Diode RON (see Integrated BS Functionality page 10)
200
---
Dynamic Electrical Characteristics (TJ= 25°C Unless Otherwise Specified)
Symbol
Parameter
Min
Typ
Max Units Conditions
Input to Output propagation turn-
on delay time (see fig.13a)
TON
---
750
---
---
ns
ns
ID=1.5A, V+=360V
Input to Output propagation turn-
off delay time (see fig. 13b)
TOFF
---
920
Thermal and Mechanical Characteristics
Symbol
Parameter
Min
Typ
Max
Units Conditions
°C/W Flat, Insulation Material.
Rth(J-C)
5.8
8.0
Thermal resistance, per FET
---
Internal NTC - Thermistor Characteristics
Parameter
Definition
Min
Typ
100
2.52
4250
---
Max Units Conditions
R25
R125
B
TC = 25°C
Resistance
97
103
2.8
kƻ
kƻ
TC = 125°C
Resistance
2.25
4208
-40
B-constant (25-50°C)
4293
125
---
k
R2 = R1e [B(1/T2 - 1/T1)]
Temperature Range
°C
TC = 25°C
Typ. Dissipation constant
---
1
mW/°C
4
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IRAM336-025SB
Figure 1. Input/Output Timing Diagram
Note 3: The shaded area indicates that both high-side and low-side switches are off and therefore the half-
bridge output voltage would be determined by the direction of current flow in the load.
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5
IRAM336-025SB
HIN1,2,3
LIN1,2,3
50%
50%
ITRIP
U,V,W
50%
50%
TITRIP
TFLT-CLR
Figure 2. ITRIP Timing Waveform
Note 4: The shaded area indicates that both high-side and low-side switches are off and therefore the half-
bridge output voltage would be determined by the direction of current flow in the load.
Input-Output Logic Level Table
ITRIP
FLT- EN
HIN1,2,3 LIN1,2,3 U,V,W
V+
1
1
1
1
0
0
0
0
1
X
0
1
1
X
X
1
0
1
X
X
0
Off
Off
Off
6
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IRAM336-025SB
Typical Application Circuit – IRAM336-025SB
Application Circuit Recommendation
1. Electrolytic bus capacitors should be mounted as close to the module bus terminals as possible to reduce
ringing and EMI problems. Additional high frequency ceramic capacitor mounted close to the module pins
will further improve performance.
2. In order to provide good decoupling between VCC-VSS and Vb-Vs terminals, the capacitors shown
connected between these terminals should be located very close to the module pins. Additional high
frequency capacitors, typically 0.1µF, are strongly recommended.
3. Value of the boot-strap capacitors depends upon the switching frequency. Their selection should be made
based on IR design tip DN 98-2a or application note AN-1044 or Figure 12.
4. WARNING! Please note that after approx. 8ms the FAULT is automatically reset (see Dynamic
Characteristics Table on page 5). PWM generator must be disabled within automatic reset time (TFLT-CLR) to
guarantee shutdown of the system, over-current condition must be cleared before resuming operation.
5. The case of the module is connected to the negative DC Bus and is NOT Isolated. It is
recommended to provide isolation material between case and heat sink to avoid electrical
shock.
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IRAM336-025SB
Module Pin-Out Description
Pin
1
Name
Description
TH
Temperature Feedback
V-
V+
2
Negative Bus Input Voltage
3
Positive Bus Input Voltage
W,VS3
VB3
4
Output 3 - High Side Floating Supply Offset Voltage
High Side Floating Supply Voltage 3
Output 2 - High Side Floating Supply Offset Voltage
High Side Floating Supply voltage 2
Output 1 - High Side Floating Supply Offset Voltage
High Side Floating Supply voltage 1
Current Feedback & Shut-down Function
Logic Input High Side Gate Driver - Phase 1
Logic Input High Side Gate Driver - Phase 2
Logic Input High Side Gate Driver - Phase 3
Logic Input Low Side Gate Driver - Phase 1
Logic Input Low Side Gate Driver - Phase 2
Logic Input Low Side Gate Driver - Phase 3
Fault Indicator & Enable Function
+15V Main Supply
5
V,VS2
VB2
6
7
U,VS1
VB1
8
9
ITRIP
HIN1
HIN2
HIN3
LIN1
LIN2
LIN3
10
11
12
13
14
15
16
17
18
19
FAULT/EN
VDD
VSS
Negative Main Supply
1
19
8
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IRAM336-025SB
Integrated Bootstrap Functionality
The internal Driver IC in the IRAM336-025SB embeds an integrated bootstrap FET that allows an alternative
drive of the bootstrap supply for a wide range of applications.
There is one bootstrap FET for each channel and it is connected between each of the floating supply (VB1,
VB2, VB3) and Vcc as shown in Figure 3.
Figure 3. Simplified BootFet Connection
The Bootstrap FET of each channel follows the state of the respective low side output stage (i.e., bootFet is
ON when LO is high, it is OFF when LO is low), unless the VB voltage is higher than approximately 1.1(Vcc).
In that case the bootstrap FET stays off until the Vs voltage returns below that threshold (see Fig. 4).
Figure 4. State Diagram
Bootstrap FET is suitable for most PWM modulation schemes and can be used either in parallel with the
external bootstrap network (diode+resistor) or as a replacement of it. The use of the integrated bootstrap
as a replacement of the external bootstrap network may have some limitations in the following situations:
-
-
When used in non-complementary PWM schemes (typically 6-step modulations).
At a very high PWM duty cycle due to the bootstrap FET equivalent resistance (RBS, see page 5).
In these cases, better performances can be achieved by using an external bootstrap network.
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9
IRAM336-025SB
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
0
TC = 80ºC
TC = 90ºC
TC = 100ºC
TJ = 150ºC
Sinusoidal Modulation
0
2
4
6
8
10
12
14
16
18
20
PWM Switching Frequency - kHz
Figure 5. Maximum Sinusoidal Phase Current vs. PWM Switching Frequency
Sinusoidal Modulation, V+=360V, TJ=150°C, FMOD=50Hz, MI=0.8, PF=0.6
1.4
TJ = 150ºC
1.2
1
Sinusoidal Modulation
0.8
0.6
0.4
0.2
0
FPWM = 12kHz
FPWM = 16kHz
FPWM = 20kHz
1
10
Modulation Frequency - Hz
100
Figure 6. Maximum Sinusoidal Phase Current vs. Modulation Frequency
Sinusoidal Modulation, V+=360V, TJ=150°C, MI=0.8, PF=0.6
10
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IRAM336-025SB
35
30
25
20
15
10
5
IOUT = 1.2A
IOUT = 1.0A
IOUT = 0.8A
TJ = 150ºC
Sinusoidal Modulation
0
0
2
4
6
8
10
12
14
16
18
20
PWM Switching Frequency - kHz
Figure 7. Total Power Losses vs. PWM Switching Frequency
Sinusoidal Modulation, V+=360V, TJ=150°C, MI=0.8, PF=0.6
50
45
40
35
30
25
20
15
10
5
TJ = 150ºC
Sinusoidal Modulation
FPWM = 20kHz
FPWM = 16kHz
FPWM = 12kHz
0
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
Output Phase Current - ARMS
Figure 8. Total Power Losses vs. Output Phase Current
Sinusoidal Modulation, V+=360V, TJ=150°C, MI=0.8, PF=0.6
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IRAM336-025SB
150
125
TC is limited to 100ºC
100
75
FPWM = 12kHz
F
PWM = 16kHz
50
25
0
FPWM = 20kHz
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
Output Phase Current - ARMS
Figure 9. Maximum Allowable Case Temperature vs. Output RMS Current per Phase
Sinusoidal Modulation, V+=360V, TJ=150°C, MI=0.8, PF=0.6
160
TJ avg = 1.181 x TTherm + 9.728
150
140
130
120
110
100
90
80
118.8
70
70
75
80
85
90
95
100
105
110
115
120
Internal Thermistor Temperature Equivalent Read Out - °C
Figure 10. Estimated Maximum MOSFET Junction Temperature vs. Thermistor Temperature
Sinusoidal Modulation, V+=360V, TJ=150°C, FPWM=20KHz, FMOD=50Hz, MI=0.8, PF=0.6
12
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IRAM336-025SB
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
TTHERM RTHERM TTHERM RTHERM TTHERM RTHERM
°C
-40
-35
-30
-25
-20
-15
-10
-5
ƻ
°C
25
30
35
40
45
50
55
60
65
70
75
80
85
ƻ
°C
ƻ
4397119
3088599
2197225
1581881
1151037
846579
628988
471632
357012
272500
209710
162651
127080
100000
79222
63167
50677
40904
33195
27091
22224
18322
15184
12635
10566
8873
90
7481
6337
5384
4594
3934
3380
2916
2522
2190
1907
1665
1459
1282
95
100
105
110
115
120
125
130
135
140
145
150
Min
Avg.
Max
0
5
10
15
20
-40 -30 -20 -10
0
10 20 30 40 50 60 70 80 90 100 110 120 130 140 150
Thermistor Temperature - °C
Figure 11. Thermistor Readout vs. Temperature (12Kohm pull-up resistor, 5V) and
Normal Thermistor Resistance values vs. Temperature Table.
11.0
10µF
10.0
9.0
8.0
7.0
6.0
4.7µF
3.3µF
2.2µF
5.0
4.0
3.0
2.0
1.0
0.0
1.5µF
1µF
0
5
10
PWM Frequency - kHz
15
20
Figure 12. Recommended Bootstrap Capacitor Value vs. Switching Frequency
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13
IRAM336-025SB
Figure 13. Switching Parameter Definitions
V
ID
ID
V
DS
DS
90% ID
50%
IN/LIN
90% ID
H /L
H
50%
V
50%
IN/LIN
IN IN
H
DS
H /L
IN IN
50%
V
CE
10% ID
10% ID
tf
tr
TON
TOFF
Figure 13a. Input to Output propagation turn-on
delay time.
Figure 13b. Input to Output propagation turn-off
delay time.
Figure 13c. Diode Reverse Recovery.
14
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IRAM336-025SB
Figure CT1. Switching Loss Circuit
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15
IRAM336-025SB
Package Outline IRAM336-025SB
note3
IRAM136-025SB
ꢀꢁ
ꢀ
note5
note4
note2
note1: Unit Tolerance is +0.4mm,
ꢂꢂꢂꢂꢂꢂꢂUnless Otherwise Specified.
note2: Mirror Surface Mark indicates Pin1 Identification.
note3: Characters Font in this drawing differs from
Font shown on Module.
note4: Lot Code Marking.
䇭䇭䇭 Characters Font in this drawing differs from
䇭䇭䇭䇭 Font shown on Module.
note5: Non-Isolated Back Side.
Data and Specifications are subject to change without notice.
For mounting instruction see AN-1049.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information
7/2007
16
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