IR1168PBF [INFINEON]
Interface Circuit,;
| 型号： | IR1168PBF |
| 厂家： | 
Infineon |
| 描述： | Interface Circuit, |
| 文件： | 总9页 (文件大小：167K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Datasheet PD-97236 Rev. 1.6
PRELIMINARY
IR1168PbF
Advanced Information April 2008
DUAL SMART RECTIFIER DRIVER IC
Features
• Secondary-side high speed controller for synchronous
rectification in resonant half bridge topologies
• 200V proprietary IC technology
• Max 500kHz switching frequency
• Anti-bounce logic and UVLO protection
• 4A peak turn-off gate drive current
• 50ns turn-off propagation delay
• Wide Vcc operating range
• Direct sensing for both Synchronous Rectifiers
• Minimal component count
• Simple design
• Lead-free
• Micropower start-up & ultra low quiescent current
• 10.7V gate drive clamp
Description
Package
IR1168 is a dual smart secondary-side rectifier driver IC designed to drive two N-Channel
power MOSFETs used as synchronous rectifiers in resonant converter applications. The
IC can control one or more paralleled N MOSFETs to emulate the behavior of Schottky
diode rectifiers. The drain to source for each rectifier MOSFET is voltage is sensed
differentially to determine the level of the current and the power switch is turned ON and
OFF in close proximity of the zero current transition. Ruggedness and noise immunity are
accomplished using an advanced blanking scheme and double-pulse suppression that
allows reliable operation in fixed and variable frequency applications.
8-Lead SOIC
Target Applications
LCD & PDP TV, Telecom SMPS, AC-DC adapters
IR1168 Typical Application Diagram
Vin
SR1
Cdc
C1
M1
Rg1
Lr
1
2
1
2
3
4
8
7
6
5
GATE1 GATE2
VCC
VS1
VD1
GND
VS2
VD2
LOAD
Cout
IR1168
C2
M2
Rg2
Rtn
SR2
*Please note that this datasheet contains advance information that could change before the product is released to production.
PROPRIETARY INFORMATION- This document and the information contained therein are proprietary and are not to be
reproduced, used or disclosed to others for manufacture or any other purpose except as specifically authorized in writing by
INTERNATIONAL RECTIFIER.
IR1168
PRELIMINARY
Absolute Maximum Ratings
Stress beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress
ratings only and functional operation of the device at these conditions are not implied. All voltages are absolute voltages
referenced to COM. Thermal resistance and power dissipation are measured under board mounted and still air conditions.
Parameters
Symbol Min.
Max.
20
Units
V
V
Remarks
Supply Voltage
VCC
VD
-0.3
-3
Cont. Drain Sense Voltage
Pulse Drain Sense Voltage
Source Sense Voltage
Gate Voltage
200
200
20
VD
-5
V
VS
-3
V
VCC=20V, Gate off
VGATE
TJ
-0.3
-40
-55
20
V
Operating Junction Temperature
Storage Temperature
Thermal Resistance
150
150
128
°C
°C
TS
RθJA
°C/W SOIC-8
SOIC-8, TAMB=25°C
Human Body Model*
Package Power Dissipation
ESD Protection
PD
VESD
fsw
970
2
mW
kV
Switching Frequency
500
kHz
* Per EIA/JESD22-A114-B( discharging a 100pF capacitor through a 1.5kW series resistor.
Electrical Characteristics
The electrical characteristics involve the spread of values guaranteed within the specified supply voltage and junction
temperature range TJ from – 25° C to 125°C. Typical values represent the median values, which are related to 25°C.
If not otherwise stated, a supply voltage of VCC =15V is assumed for test condition.
Supply Section
Parameters
Supply Voltage Operating Range
Symbol Min.
Typ.
Max.
18
Units
V
V
Remarks
VCC
8.6
7.5
V
V
CC Turn On Threshold
CC Turn Off Threshold
VCC ON
8.1
7.6
8.5
VCC UVLO
7
8
V
(Under Voltage Lock Out)
CC Turn On/Off Hysteresis
V
VCC HYST
ICC
0.5
14
V
C
LOAD =1nF, fSW = 400kHz
LOAD =4.7nF, fSW = 400kHz
18
60
mA
mA
mA
µA
Operating Current
C
48
Quiescent Current
Start-up Current
IQCC
2.6
3.8
140
ICC START
VCC=VCC ON - 0.1V
IR1168
PRELIMINARY
Comparator Section
Parameters
Turn-off Threshold
Turn-on Threshold
Hysteresis
Symbol
VTH1
Min.
-12
Typ.
-6
Max. Units
Remarks
0
mV
mV
mV
µA
VTH2
-220
-140
141
1
-80
VHYST
IIBIAS1
VD = -20mV
VD = 200V
10
50
Input Bias Current
Input Bias Current
Comparator Input Offset
IIBIAS2
10
µA
VOFFSET
2
mV
Guaranteed by Design (GBD)
One-Shot Section
Parameters
Blanking pulse duration
Symbol
tBLANK
Min.
Typ.
15
Max. Units
Remarks
25
µs
VCC=10V - GBD
VCC=20V - GBD
2.5
5.4
40
V
VTH3
Reset Threshold
Hysteresis
V
V
CC=10V - GBD
mV
VHYST3
Minimum On Time Section
Parameters
Minimum on time
Symbol
TONmin
Min.
500
Typ.
750
Max. Units
1000 ns
Remarks
Gate Driver Section
Parameters
Gate Low Voltage
Gate High Voltage
Rise Time
Symbol
VGLO
VGTH
tr1
Min.
Typ.
0.3
10.7
10
Max. Units
Remarks
IGATE = 200mA
0.5
V
V
VCC=12V-18V (internally clamped)
CLOAD = 1nF
8.5
13.5
ns
ns
ns
tr2
80
CLOAD = 4.7nF
Fall Time
tf1
5
CLOAD = 1nF
tf2
tDon
25
60
70
5
ns
ns
ns
Ω
Ω
A
CLOAD = 4.7nF
VDS to VGATE -100mV overdrive
Turn on Propagation Delay
Turn off Propagation Delay
Pull up Resistance
120
120
V
DS to VGATE -100mV overdrive
tDoff
IGATE = 15mA - GBD
IGATE = -200mA
rup
Pull down Resistance
rdown
IO source
IO sink
1.2
1
CLOAD = 1nF - GBD
Output Peak Current (source)
Output Peak Current (sink)
CLOAD = 1nF - GBD
4
A
IR1168
PRELIMINARY
Lead Assignments & Definitions
Detailed Pin Description
Pins VD1 and VD2: Drain Voltage Sense
Pin VCC:
These are the two high-voltage pins used to sense
the drain voltage of the two SR power MOSFETs.
Routing between the drain of the MOSFET and the
IC pin must be particularly optimized.
This is the supply voltage pin of the IC and sense
node for the undervoltage lock out circuit. It is
possible to turn off the IC by pulling this pin below
the
minimum
turn-off
threshold
voltage,
Additional filtering and or current limiting on this
pin is not recommended as it would limit the
switching performance of the IC.
VCCUVLO without damage to the IC. This pin is
not internally clamped.
To prevent noise problems, a bypass ceramic
capacitor connected between VCC and COM
should be placed as close as possible to the IC.
Pins VS1 and VS2: Source Voltage Sense
These are the two differential sense pins for the
two source pins of the two SR power MOSFETs.
This pin must not be connected directly to the GND
pin (pin 7) but must be used to create a kelvin
contact as close as possible to the power
MOSFET source pin.
Pin COM:
This is ground potential pin of the IC. All internal
devices are referenced to this point.
Pins GATE1 and GATE2: Gate Driver Outputs
These are the two gate drive outputs of the IC.
The gate voltage is internally clamped and has a
+1A/-4A peak drive capability. Although this pin
can be directly connected to the synchronous
rectifier (SR) MOSFET gate, the use of gate
resistor is recommended (specifically when
putting multiple MOSFETs in parallel). Care must
be taken in order to keep the gate loop as short
and as small as possible in order to achieve
optimal switching performance.
IR1168
PRELIMINARY
BLOCK DIAGRAM
STATE AND TRANSITION DIAGRAM
IR1168
PRELIMINARY
GENERAL DESCRIPTION
GENERAL OPERATION
The IRS1168 Dual Smart Rectifier controller IC is the
industry first dedicated high-voltage controller IC for
synchronous rectification in resonant converter
applications. The IC can emulate the operation of the
two secondary rectifier diodes by correctly driving the
synchronous rectifier (SR) MOSFETs in the two
secondary legs.
The SmartRectifier™ control technique is based on
sensing the voltage across the MOSFET and
comparing it with two negative thresholds to
determine the turn on and off transitions for the
device. The rectifier current is sensed by the input
comparators using the power MOSFET RDSON as a
shunt resistance and its GATE is driven depending
on the level of the sensed voltage vs. the 3
thresholds shown below.
The core of this device are two high-voltage, high
speed comparators which sense the drain to source
voltage of the MOSFETs differentially.
The device current is sensed using the RDSON as a
shunt resistance and the GATE pin of the MOSFET is
driven accordingly. Dedicated internal logic then
manages to turn the power device on and off in close
proximity of the zero current transition.
IRS1168 further simplifies synchronous rectifier
control by offering the following power management
features -
Input Comprator Thresholds
-Wide VCC operating range allows the IC to be
directly powered from the converter output
-Shootthrough protection logic that prevents both the
GATE outputs from the IC to be high at the same
time
-Device turn ON and OFF in close proximity of the
zero current transition with low turn-on and turn-off
propagation delays; eliminates reactive power flow
between the output capacitors and power transformer
-Internally clamped gate driver outputs that
significantly reduce gate losses.
Turn ON Phase
When the conduction phase of the SR FET is
initiated, current will start flowing through the
MOSFET body diode, generating a negative VDS
voltage across it. The body diode has generally a
much higher voltage drop than the one caused by the
MOSFET on resistance and therefore will trigger the
turn-on threshold, VTH2.
When VTH2 is triggered, IR1168 will drive the gate of
the MOSFET ON. This will in turn cause the VDS to
drop down to ID*RDSON. This drop is usally
accompained by some amount of ringing, that could
trigger the input comparator to turn-off; hence, a fixed
Minimum On Time (MOT) blanking period is used
that will maintain the power MOSFET ON for a
minimum time duration.The fixed MOT limits the
minimum conduction time of the secondary rectifiers
and hence, the maximum switching frequency of the
converter.
IR1168
PRELIMINARY
GENERAL OPERATION (cont'd)
STATES OF OPERATION
Turn OFF Phase
UVLO Mode:
Once the SR MOSFET has been turned ON, it
remains ON until the rectifier current will decay to the
level where VDS will cross the fixed turn-off threshold
VTH1.
The IC is in the UVLO mode when the VCC pin
voltage is below VCCUVLO. The UVLO mode is
accessible from any other state of operation. In the
UVLO state, most of the internal circuitry is unbiased
and the IC draws a quiescent current of ICCSTART.
Since the device currents are sinusoidal here, the
device VDS will cross the VTH1 threshold with a
relatively low dV/dt. Once the threshold is crossed,
the current will start flowing again through the body
diode, causing the VDS voltage to jump negative.
Depending on the amount of residual current, VDS
may once again trigger the turn-on threshold; hence,
VTH2 is blanked for a time duration tBLANK after VTH1
is triggered. When the device VDS crosses the
positive reset threshold VTH3, tBLANK is terminated
and the IC is ready for next conduction cycle as
shown below.
The IC remains in the UVLO condition until the
voltage on the VCC pin exceeds the VCC turn on
threshold voltage, VCC ON.
Normal Mode:
The IC enters in normal operating mode once the
UVLO voltage has been exceeded. At this point the
gate drivers are operating and the IC will draw a
maximum of ICC from the supply voltage source.
IR1168
PRELIMINARY
TIMING DIAGRAMS
VCC Undervoltage Lockout
VTH1
VDS
VTH2
tDon
tDoff
VGate
90%
50%
10%
tr
tf
Typical waveforms showing tDon, tDoff, tr and tf
IR1168
PRELIMINARY
Case Outline
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