IR1169STRPBF [INFINEON]
ADVANCED SMARTRECTIFIER CONTROL IC; 高级智能整流控制IC
| 型号： | IR1169STRPBF |
| 厂家： | 
Infineon |
| 描述： | ADVANCED SMARTRECTIFIER CONTROL IC |
| 文件： | 总27页 (文件大小：355K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IR1169S
ADVANCED SMARTRECTIFIERTM CONTROL IC
Product Summary
Features
•
•
•
•
•
•
•
•
•
•
•
•
Secondary side high speed SR controller
Flyback, Forward, Half-
Topology
Bridge
Flyback, Forward and Half-bridge topologies
CCM operation with SYNC function
200V proprietary IC technology
Max 500KHz switching frequency
Anti-bounce logic and UVLO protection
4A peak turn off drive current
Micropower start-up & low quiescent current
10.7V gate drive clamp
50ns turn-off propagation delay
Vcc range from 11V to 20V
VD
200V
VOUT
10.7V
Io+ & I o- (typical)
+1A & -4A
Turn on Propagation
Delay
70ns (typical)
50ns (typical)
Turn off Propagation
Delay
Enable function synchronized with MOSFET VDS
transition
•
Cycle by Cycle MOT Check Circuit prevents multiple
false trigger GATE pulses
Package Options
•
•
Lead-free
Compatible with 0.3W Standby, Energy Star, CECP,
etc.
Typical Applications
8-Lead SOIC
•
Telecom SMPS, ATX SMPS, Server SMPS, AC-DC
adapters
Ordering Information
Standard Pack
Base Part Number
Package Type
Complete Part Number
Form
Quantity
Tube/Bulk
95
IR1169SPBF
SOIC8N
IR1169S
Tape and Reel
2500
IR1169STRPBF
1
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© 2012 International Rectifier
December 12, 2012
IR1169S
Typical Connection Diagram
L
Vin
VOUT
RCC
CVCC
vcc
Rg
QFWL
VCC
1
SYNC
2
GATE
8
GND
7
Cin
MOT
3
VS
6
Cout
EN
4
VD
5
IR1169
Rmot
Rtn
Primary
Controller
2
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© 2012 International Rectifier
December 12, 2012
IR1169S
Table of Contents
Ordering Information
Page
1
Description
4
Absolute Maximum Ratings
Electrical Characteristics
Functional Block Diagram
Input/Output Pin Equivalent Circuit Diagram
Lead Definitions
5
6
8
9
10
10
11
12
24
25
26
27
Lead Assignments
Detailed Pin Description
Application Information and Additional Details
Package Details
Tape and Reel Details
Part Marking Information
Qualification Information
3
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© 2012 International Rectifier
December 12, 2012
IR1169S
Description
IR1169 is a smart secondary-side driver IC designed to drive N-Channel power MOSFETs used as synchronous
rectifiers in isolated Flyback, Forward or Half-bridge converters. The IC can control one or more paralleled N-
MOSFETs to emulate the behavior of Schottky diode rectifiers. IR1169 works in both DCM and CCM operation
modes. The SYNC pin should be used in CCM mode to directly turn-off the MOSFET by a signal from secondary
or primary controller. The IC is designed to use simple capacitor coupling interface to communicate with primary
controller. In addition to the SYNC control, the drain to source voltage is sensed differentially to determine the
polarity of the current and turn the power switch on and off in proximity of the zero current transition. Ruggedness
and noise immunity are accomplished using an advanced blanking scheme and double-pulse suppression which
allow reliable operation in all operating modes.
4
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© 2012 International Rectifier
December 12, 2012
IR1169S
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to COM, all currents are defined positive into any lead. The thermal
resistance and power dissipation ratings are measured under board mounted and still air conditions.
Parameters
Supply Voltage
Enable Voltage
Cont. SYNC Voltage
Pulse SYNC Voltage
SYNC Current
Cont. Drain Sense Voltage
Pulse Drain Sense Voltage
Source Sense Voltage
Gate Voltage
Symbol
VCC
VEN
VSYNC
VSYNC
ISYNC
VD
VD
VS
VGATE
TJ
TS
Min.
-0.3
-0.3
-0.3
-0.7
-10
-1
-5
-3
-0.3
-40
-55
Max.
20
20
20
20
Units
V
V
V
V
mA
V
V
V
V
Remarks
①
10
200
200
20
20
VCC=20V, Gate off
Operating Junction Temperature
Storage Temperature
Thermal Resistance
Package Power Dissipation
150
150
128
970
°C
°C
°C/W
mW
RθJA
PD
SOIC-8
SOIC-8, TAMB=25°C
① An input resistor of 2kΩ or above is required to SYNC pin for negative pulse
Recommended Operating Conditions
For proper operation the device should be used within the recommended conditions.
Symbol
Definition
Min.
Max.
Units
VCC
Supply voltage
11
19
V
②
VD
Drain Sense Voltage
Junction Temperature
Switching Frequency
200
125
500
-3
-25
---
TJ
Fsw
°C
kHz
-3V negative spike width 100ns
② VD
≤
Recommended Component Values
Symbol
RMOT
Component
MOT pin resistor value
Min.
5
Max.
75
Units
kΩ
5
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December 12, 2012
IR1169S
Electrical Characteristics
VCC=15V and TA = 25°C unless otherwise specified. The output voltage and current (VO and IO) parameters are
referenced to GND (pin7).
Supply Section
Parameters
Symbol Min.
Typ.
Max.
Units
Remarks
VCC Turn On Threshold
VCC Turn Off Threshold
(Under Voltage Lock Out)
VCC ON
9.4
10.4
11.0
V
VCC UVLO
8.6
9.3
10.0
V
VCC Turn On/Off Hysteresis VCC HYST
1.1
8.5
45
V
CLOAD=1nF,fSW=400kHz
CLOAD=10nF,fSW=400kHz
SYNC=low
10
55
mA
mA
mA
Operating Current
ICC
Quiescent Current
Start-up Current
IQCC
ICC START
I SLEEP
VENHI
1.8
100
150
2.8
1.6
1.5
2.3
200
200
3.3
2.0
µA VCC=VCC ON - 0.1V
Sleep Current
µA VEN=0V, VCC =15V
V
V
Enable Voltage High
Enable Voltage Low
Enable Pull-up Resistance
2.25
1.2
VENLO
REN
MΩ
GBD
Comparator Section
Parameters
Turn-off Threshold
Turn-on Threshold
Hysteresis
Symbol Min.
Typ.
-3.5
-230
230
1
Max.
0
Units
mV
mV
mV
µA
Remarks
VTH1
VTH2
-7
-263
-197
VHYST
IIBIAS1
IIBIAS2
VD = -50mV
VD = 200V
Input Bias Current
Input Bias Current
7.5
10
100
µA
VCM
Input CM Voltage Range
0
2
V
One-Shot Section
Parameters
Blanking pulse duration
Symbol Min.
tBLANK
Typ.
17
Max.
25
Units
µs
Remarks
9
2.5
5.4
40
V
V
VCC=10V – GBD
VCC=20V – GBD
Reset Threshold
Hysteresis
VTH3
mV VCC=10V – GBD
VHYST3
Minimum On Time Section
Parameters
Symbol Min.
Typ.
240
3
Max.
300
3.6
Units
ns
Remarks
180
TOnmin
RMOT =5kΩ, VCC=12V
RMOT =75kΩ, VCC=12V
Minimum on time
2.4
µs
6
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IR1169S
Electrical Characteristics
VCC=15V and TA = 25°C unless otherwise specified. The output voltage and current (VO and IO) parameters are
referenced to GND (pin7).
SYNC Section
Parameters
SYNC Voltage High (disable) VSYHI
SYNC Voltage Low (enable)
SYNC Turn-on Prop. Delay
SYNC Turn-off Prop. Delay
Minimum SYNC pulse width
Symbol Min.
Typ.
2.5
0.8
Max.
3.0
1.0
Units
V
V
Remarks
2.0
0.6
VSYLO
TSyon
TSyoff
TSYPW
SYNC =high to low
65
55
100
90
ns
ns
ns
SYNC=low to high
GBD
50
Gate Driver Section
Parameters
Symbol Min.
Typ.
Max.
Units
Remarks
Gate Low Voltage
VGLO
0.24
0.5
V
IGATE = 200mA
VCC=12V-18V
Gate High Voltage
Rise Time
VGTH
tr1
tr2
tf1
tf2
9.0
10.7
20
180
10
14
V
(internally clamped)
ns
ns
ns
ns
CLOAD = 1nF, VCC=12V
CLOAD = 10nF, VCC=12V
CLOAD = 1nF, VCC=12V
CLOAD =10nF, VCC=12V
VDS to VGATE –VDS goes down
from 6V to -1V
VDS to VGATE –VDS goes up from
-1V to 6V
IGATE = 200mA – GBD
IGATE = -200mA
Fall Time
44
Turn on Propagation Delay
tDon
70
95
75
ns
Turn off Propagation Delay
Pull up Resistance
Pull down Resistance
Output Peak Current(source) IO source
Output Peak Current (sink) IO sink
tDoff
rup
rdown
50
5
1.2
1
ns
Ω
Ω
A
CLOAD = 10nF – GBD
CLOAD = 10nF – GBD
4
A
7
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IR1169S
Functional Block Diagram
MOT
VCC
VCC
UVLO
&
EN
REGULATOR
Cycle by Cycle
MOT Check
Circuit
VCC
VD
Min ON Time
RESET
VTH1
VTH2
RESET
VGATE
GND
VS
DRIVER
Min OFF Time
RESET
RESET
VTH3
SYNC
8
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IR1169S
I/O Pin Equivalent Circuit Diagram
VCC
SYNC
GND
VCC
ESD
Diode
ESD
Diode
MOT/
or EN
RESD
ESD
Diode
ESD
Diode
GND
VCC
VD
RESD
ESD
Diode
ESD
Diode
GATE
ESD
200V
Diode
Diode
GND
GND
9
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IR1169S
Lead Definitions
PIN#
Symbol
VCC
SYNC
MOT
EN
Description
1
2
3
4
5
6
7
8
Supply Voltage
SYNC Input for direct turn off
Minimum On Time
Enable
FET Drain Sensing
FET Source Sensing
Ground
VD
VS
GND
VGATE
Gate Drive Output
Lead Assignments
1
2
3
4
VCC
SYNC
MOT
EN
8
7
6
5
VGATE
GND
VS
VD
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IR1169S
Detailed Pin Description
VCC: Power Supply
This is the supply voltage pin of the IC and it is monitored by the under voltage lockout circuit. It is possible to turn
off the IC by pulling this pin below the minimum turn off threshold voltage, without damage to the IC.
To prevent noise problems, a bypass ceramic capacitor connected to Vcc and COM should be placed as close as
possible to the IR1169. This pin is internally clamped.
SYNC: Direct Turn-off and Reset
SYNC is used to directly turn-off the SR MOSFET by an external signal. The gate output of IR1169 is low when
SYNC voltage is higher than VSYHI threshold. The propagation delay from SYNC goes high to gate turns off is
55ns. The turn-off of SYNC is a direct control and it ignores the MOT time (override).
The SYNC pin will reset MOT and Blanking time when SYNC switches from low to high. It will reset MOT timer
and Blanking timer only at the rising edge of signal. This function is useful for very low output voltage condition
(such as overload or short circuit) where the VD voltage is too low to reach Vth3 threshold to reset the timers.
SYNC pin also can be used to control the turn-on time of SR MOSFET (adding additional delay time at turn-on for
noise immunity).
If not used, SYNC pin should be connected to GND.
MOT: Minimum On Time
The MOT programming pin controls the amount of minimum on time. When VSYNC is low and VTH2 is crossed, the
gate signal will become active and turn on the power FET. Spurious ringings and oscillations can trigger the input
comparator off. The MOT blanks the input comparator keeping the FET on for a minimum time.
The MOT is programmed between 200ns and 3us (typ.) by using a resistor referenced to COM.
EN: Enable
This pin is used to activate the IC “sleep” mode by pulling the voltage level below 1.6V (typ). In sleep mode the IC
will consume a minimum amount of current. All switching functions will be disabled and the gate will be inactive.
VD: Drain Voltage Sense
VD is the voltage sense pin for the power MOSFET Drain. This is a high voltage pin and particular care must be
taken in properly routing the connection to the power MOSFET drain.
VS: Source Voltage Sense
VS is the differential sense pin for the power MOSFET Source. This pin should be connected directly to the power
ground pin (7) but must be used to create a kelvin contact as close as possible to the power MOSFET source pin.
GND: Ground
This is ground potential pin of the integrated control circuit. The internal devices and gate driver are referenced to
this point.
VGATE: Gate Drive Output
This is the gate drive output of the IC. Drive voltage is internally limited and provides 1A peak source and 4A peak
sink capability. Although this pin can be directly connected to the power MOSFET gate, the use of minimal gate
resistor is recommended, especially when putting multiple FETs in parallel.
Care must be taken in order to keep the gate loop as short and as small as possible in order to achieve optimal
switching performance.
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IR1169S
Application Information and Additional Details
State Diagram
POWER ON
Gate Inactive
UVLO MODE
VCC < VCCon
Gate Inactive
ICC max = 200uA
VCC > VCCon,
ENABLE HIGH
VCC < VCCuvlo
or
ENABLE LOW
NORMAL
Gate Active
Gate PW ≥ MOT
Cycle by Cycle MOT Check Enabled
SYNC Enabled
VDS>VTH1 @ MOT
VDS<VTH1 @ MOT
MOT PROTECTION
MODE
Gate Output Disabled
UVLO/Sleep Mode
The IC remains in the UVLO condition until the voltage on the VCC pin exceeds the VCC turn on threshold
voltage, VCC ON. During the time the IC remains in the UVLO state, the gate drive circuit is inactive and the IC
draws a quiescent current of ICC START. The UVLO mode is accessible from any other state of operation
whenever the IC supply voltage condition of VCC < VCC UVLO occurs.
The sleep mode is initiated by pulling the EN pin below 1.6V (typ). In this mode the IC is essentially shut
down and draws a very low quiescent supply current.
Normal Mode and Synchronized Enable Function
The IC enters in normal operating mode once the UVLO voltage has been exceeded and EN voltage is above
VENHI threshold. When the IC enters Normal Mode from UVLO Mode, the GATE output is disabled (stays low)
until VDS exceeds VTH3 to activate the gate. This ensures that the GATE output is not enabled in the middle of
a switching cycle. This logic prevents any reverse currents across the device due to minimum on time function
in the IC. The gate will continuously drive the SR MOSFET after this one-time activation. The Cycle by Cycle
MOT protection circuit is enabled in Normal Mode.
MOT Protection Mode
If the secondary current conduction time is shorter than the MOT (Minimum On Time) setting, the next driver
output is disabled. This function can avoid reverse current that occurs when the system works at very low
duty-cycles or at very light/no load conditions and reduce system standby power consumption by disabling
GATE outputs. The Cycle by Cycle MOT Check circuit is always activated under Normal Mode and MOT
Protection Mode, so that the IC can automatically resume normal operation once the load increases to a level
and the secondary current conduction time is longer than MOT.
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IR1169S
General Description
The IR1169 Smart Rectifier IC can emulate the operation of diode rectifier by properly driving a Synchronous
Rectifier (SR) MOSFET. The direction of the rectified current is sensed by the input comparator using the power
MOSFET RDson as a shunt resistance and the GATE pin of the MOSFET is driven accordingly. Internal blanking
logic is used to prevent spurious transitions. The Synchronous pin (SYNC) can directly take the signal sent from
primary controller to turn off the gate of SR MOSFET prior to the turn-on of primary MOSFET therefore prevent
negative current in SR circuit under CCM condition.
IR1169 is suitable for Flyback, Forward and Resonant Half-Bridge topologies.
VGate
VDS
VTH2
VTH1
VTH3
Figure 1: Input comparator thresholds
Flyback Application
The modes of operation for a Flyback circuit differ mainly for the turn-off phase of the SR switch, while the turn-on
phase of the secondary switch (which corresponds to the turn off of the primary side switch) is identical.
Turn-on phase
When the conduction phase of the SR FET is initiated, current will start flowing through its body diode, generating
a negative VDS voltage across it. The body diode has generally a much higher voltage drop than the one caused by
the MOSFET on resistance and therefore will trigger the turn-on threshold VTH2
.
At that point, if SYNC voltage is low IR1169 will drive the gate of MOSFET on, which will in turn cause the
conduction voltage VDS to drop down. This drop is usually accompanied by some amount of ringing, that can
trigger the input comparator to turn off; hence, a Minimum On Time (MOT) blanking period is used that will
maintain the power MOSFET on for a minimum amount of time.
The programmed MOT will limit also the minimum duty cycle of the SR MOSFET and, as a consequence, the max
duty cycle of the primary side switch.
DCM/CrCM Turn-off phase
Once the SR MOSFET has been turned on, it will remain on until the rectified current will decay to the level where
VDS will cross the turn-off threshold VTH1. This will happen differently depending on the mode of operation.
In DCM the current will cross the threshold with a relatively low dI/dt. Once the threshold is crossed, IR1169 will
turn off gate and the current will start flowing again thru the body diode, causing the VDS voltage to jump negative.
Depending on the amount of residual current, VDS may trigger once again the turn on threshold: for this reason
VTH2 is blanked for a certain amount of time (TBLANK) after VTH1 has been triggered.
The blanking time is internally set. As soon as VDS crosses the positive threshold VTH3 the blanking time is
terminated and the IC is ready for next conduction cycle.
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December 12, 2012
IR1169S
ID_PRIM
VDS_PRIM
time
T3
T1
T2
ID_SEC
VDS_SEC
time
Figure 2: Flyback primary and secondary currents and voltages for DCM mode
ID_PRIM
VDS_PRIM
time
T2
T1
ID_SEC
VDS_SEC
time
Figure 3: Flyback primary and secondary currents and voltages for CrCM mode
Vin
VOUT
RCC
CVCC
VCC
1
GATE
8
GND
7
SYNC
Cin
Cout
2
MOT
3
VS
6
EN
4
VD
5
IR1169
Rmot
Rg
Rtn
Figure 4: IR1169 schematic in DCM/CrCM mode Flyback
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IR1169S
VTH3
ISEC
VDS
T1
T2
time
VTH1
VTH2
TDon
TDoff
Gate Drive
Blanking
time
MOT
17us blanking
Figure 5: IR1169 DCM/CrCM Sync Rect operation (with SYNC connected to COM)
CCM Turn-off phase
In CCM mode the turn on phase is identical to DCM or CrCM and therefore won’t be repeated here.
The turn off transition is much steeper and dI/dt involved is much higher (Figure 6). If the SR controller wait for the
primary switch to turn back on and turn the gate off according to the FET current crossing VTH1, it has high chance
to get reverse current in the SR MOSFET. A predictable turn-off prior to the primary turn-on is necessary. A
decoupling and isolation capacitor can be used to couple the primary gate signal to IR1169 SYNC pin and turn-off
the SR MOSFET prior to the current slope goes to negative. Some turn-on delay to the primary MOSFET can
guarantee no shoot through between the primary and secondary.
ID_PRIM
VDS_PRIM
time
T2
T1
ID_SEC
VDS_SEC
time
Figure 6: Primary and secondary currents and voltages for CCM mode
In CCM application the connection of IR1169 is recommended as shown in Figure 7.
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December 12, 2012
IR1169S
Vin
VOUT
RCC
CVCC
vcc
VCC
1
SYNC
2
GATE
8
GND
7
Cin
Cout
MOT
3
VS
6
EN
4
VD
5
IR1169
Rmot
Rg
Rtn
M1
Primary
Controller
Figure 7: IR1169 schematic in CCM mode Flyback
IR1169 is designed to directly take the control information from primary side with capacitor coupling. A high
voltage, low capacitance capacitor is used to send the primary gate driver signal to the SYNC pin. To have the
circuit work properly, a Y cap is required between primary ground and secondary ground. No pulse transformer is
required for the SYNC function, helps saving cost and PCB area.
The turn-off phase with SYNC control is shown in Figure 8.
In this case a blanking period is not applied; SYNC logic high will reset blanking time.
ISEC
VDS
T1
T2
time
VTH1
VTH2
TDon
TSYoff
Gate Drive
time
time
MOT
MOT
Primary turn-on is been
delayed to avoid shoot-through
Primary Gate
VSYLO
VSYHI
SYNC
SYNC high, turn off the Gate &
Reset blanking time
SYNC low, gate is enabled
Figure 8: Secondary side CCM operation
© 2012 International Rectifier
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IR1169S
Forward Application
The typical forward schematic with IR1169 is shown in Figure 9. The operation waveform of secondary Sync Rect
circuit in Forward is similar to the CCM operation of Flyback.
LOAD
Primary
Controller
GATE
8
VCC
1
VCC
1
GATE
8
SYNC
2
GND
7
SYNC
2
GND
7
MOT
3
VS
6
MOT
3
VS
6
EN
4
VD
5
EN
4
VD
5
Coupling Cap
Y Cap
Synchronous signal
Figure 9: Forward application circuit
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IR1169S
Resonant Half-Bridge Application
The typical application circuit of IR1169 in LLC half-bridge is shown in Figure 10.
M3
Rg1
RCC1
CVCC1
Vin
VCC
1
SYNC
2
GATE
8
GND
7
M1
MOT
3
VS
6
EN
4
VD
5
Lr
T1
IR1169
Rmot1
Lm
M2
VOUT
RCC2
CVCC2
Cr
Rtn
VCC
1
GATE
8
SYNC
GND
Cout
2
7
MOT
3
VS
6
EN
4
VD
5
IR1169
Rmot2
Rg2
M4
Figure 10: Resonant half-bridge application circuit
The SYNC pin can be tied to COM in LLC converter. The turn-on phase and turn-off phase is similar to Flyback
converter except the current shape is sinusoid. The typical operation waveform can be found below.
VTH3
IDS
VDS
T1
T2
VTH1
VTH2
Gate Drive
Blanking
MOT
tBLANK
time
Figure 11: Resonant half-bridge operation waveform (with SYNC connected to GND)
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December 12, 2012
IR1169S
The SYNC pin also can be connected to a control signal for special turn-on and/or turn-off control. Figure 12 is an
example where the SYNC function is used to put some delay to the turn-on phase.
VTH3
IDS
VDS
T1
T2
VTH1
VTH2
TDoff
TSYon
Gate Drive
Blanking
SYNC
MOT
tBLANK
time
SYNC rising edge, reset MOT and Tblank
Figure 12: Resonant half-bridge with SYNC control
MOT Protection Mode
The MOT protection prevents reverse current in SR MOSFET. This function works in all three topologies. Figure
13 is an example in Flyback converter.
VDS
ISEC
Gate Drive
time
MOT
Sensed VD>VTH1 at
Disable the next gate output
the end of MOT
Figure 13: MOT Protection Mode
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IR1169S
SYNC Reset Function
The SYNC pin resets MOT and Blanking time when SYNC switches from low to high. This function is useful for
very low output voltage condition (such as overload or short circuit) where the VD voltage is too low to reach Vth3
threshold to reset the timers.
VDS<Vth3
IDS
VTH3
VDS
VTH1
VTH2
T1
T2
TDoff
TSYon
Gate Drive
tBLANK
MOT
MOT
tBLANK
SYNC
time
SYNC rising edge, reset MOT and Tblank
Figure 14: Reset by SYNC when VD<Vth3
General Timing Waveform
SYNC
VSYHI
VSYLO
VTH1
VDS
VTH2
tDon
tDoff
tSYoff
tSYon
VGATE
90%
50%
10%
tr
tf
tr
tf
Figure 15: Timing waveform
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December 12, 2012
IR1169S
11 V
10 V
9 V
IQCC
2.5
2.0
1.5
VCC ON
VCC UVLO
8 V
-50 °C
-50 °C
0 °C
50 °C
Temperature
100 °C
150 °C
0 °C
50 °C
100 °C
150 °C
Temperature
Figure 17: Icc Quiescent Currrent vs. Temperature
Figure 16: Undervoltage Lockout vs. Temperature
Icc @400KHz, CLOAD=1nF
9.0
-2.0
-3.0
-4.0
-5.0
-6.0
8.5
8.0
-50 °C
0 °C
50 °C
100 °C
150 °C
-50 °C
0 °C
50 °C
100 °C
150 °C
Temperature
Temperature
Figure 18: Icc Supply Currrent @1nF Load vs.
Temperature
Figure 19: VTH1 vs. Temperature
21 www.irf.com
© 2012 International Rectifier
December 12, 2012
IR1169S
75 ns
70 ns
65 ns
60 ns
55 ns
50 ns
45 ns
40 ns
35 ns
-150.0
-200.0
-250.0
-300.0
Turn-on Propagation Delay
Turn-off Propagation Delay
-50 °C
0 °C
50 °C
100 °C
150 °C
-50 °C
0 °C
50 °C
100 °C
150 °C
Temperature
Temperature
Figure 21: Turn-on and Turn-off Propagation Delay
vs. Temperature
Figure 20: VTH2 vs. Temperature
4 us
3 us
2 us
1 us
0 us
3.0 V
2.5 V
VEN HI
VEN LO
2.0 V
RMOT=75k
RMOT=25k
RMOT=5k
1.5 V
1.0 V
-50 °C
0 °C
50 °C
100 °C
150 °C
-50 °C
0 °C
50 °C
100 °C
150 °C
Temperature
Temperature
Figure 22: MOT vs Temperature
Figure 23: Enable Threshold vs. Temperature
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© 2012 International Rectifier
December 12, 2012
IR1169S
3.0 V
2.5 V
2.0 V
1.5 V
1.0 V
0.5 V
80 ns
75 ns
70 ns
65 ns
60 ns
55 ns
50 ns
45 ns
40 ns
35 ns
SYNC HI
SYNC LO
SYNC Turn-on Delay
SYNC Turn-off Delay
-50 °C
0 °C
50 °C
100 °C
150 °C
-50 °C
0 °C
50 °C
100 °C
150 °C
Temperature
Temperature
Figure 25: SYNC Turn-on and Turn-off
Propagation Delay vs. Temperature
Figure 24: SYNC Thresholds vs. Temperature
11.5 V
11.0 V
10.5 V
25 ns
20 ns
15 ns
10 ns
Tr
Tf
5 ns
0 ns
VGH@Vcc=18V
VGH@Vcc=12V
10.0 V
-50 °C
-50 °C
0 °C
50 °C
Temperature
100 °C
150 °C
0 °C
50 °C
Temperature
100 °C
150 °C
Figure 26: Gate Clamping Voltage vs. Temperature
Figure 27: Rise and Fall time vs. Temperature
23 www.irf.com
© 2012 International Rectifier
December 12, 2012
IR1169S
Package Details: SOIC8N
24 www.irf.com
© 2012 International Rectifier
December 12, 2012
IR1169S
Tape and Reel Details: SOIC8N
LOADED TAPE FEED DIRECTION
A
B
H
D
F
C
NOTE : CONTROLLING
DIMENSION IN MM
E
G
CARRIER TAPE DIMENSION FOR 8SOICN
Metric
Imperial
Min
0.311
0.153
0.46
Code
A
B
C
D
E
F
G
H
Min
7.90
3.90
11.70
5.45
6.30
5.10
1.50
1.50
Max
8.10
4.10
12.30
5.55
6.50
5.30
n/a
Max
0.318
0.161
0.484
0.218
0.255
0.208
n/a
0.214
0.248
0.200
0.059
0.059
1.60
0.062
F
D
B
C
A
E
G
H
REEL DIMENSIONS FOR 8SOICN
Metric
Imperial
Code
A
B
C
D
E
F
G
H
Min
329.60
20.95
12.80
1.95
98.00
n/a
14.50
12.40
Max
330.25
21.45
13.20
2.45
102.00
18.40
17.10
14.40
Min
12.976
0.824
0.503
0.767
3.858
n/a
Max
13.001
0.844
0.519
0.096
4.015
0.724
0.673
0.566
0.570
0.488
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© 2012 International Rectifier
December 12, 2012
IR1169S
Part Marking Information
Part number
Date code
IR1169S
YWW ?
IR logo
Pin 1
Identifier
C XXXX
Lot Code
(Prod mode –
4 digit SPN code)
?
MARKING CODE
P
Lead Free Released
Assembly site code
Per SCOP 200-002
Non-Lead Free Released
26 www.irf.com
© 2012 International Rectifier
December 12, 2012
IR1169S
Qualification Information†
Industrial††
Comments: This family of ICs has passed JEDEC’s
Industrial qualification. IR’s Consumer qualification level is
granted by extension of the higher Industrial level.
Qualification Level
MSL2††† 260°C
SOIC8N
Moisture Sensitivity Level
(per IPC/JEDEC J-STD-020)
Class A
Machine Model
Human Body Model
(per JEDEC standard JESD22-A115)
ESD
Class 1C
(per EIA/JEDEC standard EIA/JESD22-A114)
Class I, Level A
(per JESD78)
Yes
IC Latch-Up Test
RoHS Compliant
†
Qualification standards can be found at International Rectifier’s web site http://www.irf.com/
†† Higher qualification ratings may be available should the user have such requirements. Please contact your
International Rectifier sales representative for further information.
††† Higher MSL ratings may be available for the specific package types listed here. Please contact your
International Rectifier sales representative for further information.
The information provided in this document is believed to be accurate and reliable. However, International Rectifier assumes no responsibility
for the consequences of the use of this information. International Rectifier assumes no responsibility for any infringement of patents or of
other rights of third parties which may result from the use of this information. No license is granted by implication or otherwise under any
patent or patent rights of International Rectifier. The specifications mentioned in this document are subject to change without notice. This
document supersedes and replaces all information previously supplied.
For technical support, please contact IR’s Technical Assistance Center
http://www.irf.com/technical-info/
WORLD HEADQUARTERS:
233 Kansas St., El Segundo, California 90245
Tel: (310) 252-7105
27 www.irf.com
© 2012 International Rectifier
December 12, 2012
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