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IPD15N06S2L-64

更新时间：2024-09-18 12:12:47
品牌：INFINEON
描述：OptiMOS Power-Transistor

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PCB计价

IPD15N06S2L-64 概述

OptiMOS Power-Transistor 的OptiMOS功率三极管 MOS管 功率场效应晶体管

IPD15N06S2L-64 规格参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：TO-252
包装说明：GREEN, PLASTIC PACKAGE-3针数：4
Reach Compliance Code：not_compliantECCN代码：EAR99
风险等级：1.58其他特性：LOGIC LEVEL COMPATIBLE
雪崩能效等级（Eas）：43 mJ外壳连接：DRAIN
配置：SINGLE WITH BUILT-IN DIODE最小漏源击穿电压：55 V
最大漏极电流 (Abs) (ID)：19 A最大漏极电流 (ID)：19 A
最大漏源导通电阻：0.085 ΩFET 技术：METAL-OXIDE SEMICONDUCTOR
JEDEC-95代码：TO-252JESD-30 代码：R-PSSO-G2
JESD-609代码：e3湿度敏感等级：1
元件数量：1端子数量：2
工作模式：ENHANCEMENT MODE最高工作温度：175 °C
封装主体材料：PLASTIC/EPOXY封装形状：RECTANGULAR
封装形式：SMALL OUTLINE峰值回流温度（摄氏度）：NOT SPECIFIED
极性/信道类型：N-CHANNEL最大功率耗散 (Abs)：47 W
最大脉冲漏极电流 (IDM)：76 A认证状态：Not Qualified
参考标准：AEC-Q101子类别：FET General Purpose Power
表面贴装：YES端子面层：Tin (Sn)
端子形式：GULL WING端子位置：SINGLE
处于峰值回流温度下的最长时间：NOT SPECIFIED晶体管应用：SWITCHING
晶体管元件材料：SILICON

IPD15N06S2L-64 数据手册

通过下载IPD15N06S2L-64数据手册来全面了解它。这个PDF文档包含了所有必要的细节，如产品概述、功能特性、引脚定义、引脚排列图等信息。

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IPD15N06S2L-64  
OptiMOS® Power-Transistor  
Product Summary  
Features  
VDS  
55  
64  
19  
V
• N-channel Logic Level - Enhancement mode  
R
DS(on),max (SMD version)  
mΩ  
A
• Automotive AEC Q101 qualified  
• MSL1 up to 260°C peak reflow  
• 175°C operating temperature  
• Green package (lead free)  
• Ultra low Rds(on)  
I D  
PG-TO252-3-11  
• 100% Avalanche tested  
Type  
Package  
Marking  
IPD15N06S2L-64  
PG-TO252-3-11 2N06L64  
Maximum ratings, at T j=25 °C, unless otherwise specified  
Value  
Parameter  
Symbol  
Conditions  
Unit  
I D  
T C=25 °C, VGS=10 V  
T C=100 °C,  
Continuous drain current  
19  
A
13  
V
GS=10 V1)  
Pulsed drain current1)  
I D,pulse  
EAS  
T C=25 °C  
I D=15A  
76  
43  
Avalanche energy, single pulse  
Gate source voltage  
mJ  
V
VGS  
±20  
Ptot  
T C=25 °C  
Power dissipation  
47  
W
°C  
T j, T stg  
Operating and storage temperature  
IEC climatic category; DIN IEC 68-1  
-55 ... +175  
55/175/56  
Rev. 1.0  
page 1  
2006-07-18  
IPD15N06S2L-64  
Values  
Parameter  
Symbol  
Conditions  
Unit  
min.  
typ.  
max.  
Thermal characteristics  
R thJC  
R thJA  
R thJA  
Thermal resistance, junction - case  
-
-
-
-
3.2  
K/W  
Thermal resistance, junction -  
ambient, leaded  
100  
SMD version, device on PCB  
minimal footprint  
-
-
-
-
75  
50  
6 cm2 cooling area2)  
Electrical characteristics, at T j=25 °C, unless otherwise specified  
Static characteristics  
V(BR)DSS  
VGS(th)  
V
V
GS=0 V, I D= 1 mA  
DS=VGS, I D=14 µA  
Drain-source breakdown voltage  
Gate threshold voltage  
55  
-
-
V
1.2  
1.6  
2.0  
V
DS=55 V, VGS=0 V,  
I DSS  
Zero gate voltage drain current  
-
-
0.01  
1
1
µA  
T j=25 °C  
V
DS=55 V, VGS=0 V,  
100  
T j=125 °C1)  
I GSS  
V
V
V
GS=20 V, VDS=0 V  
GS=4.5 V, I D=13 A  
GS=10 V, I D=13 A  
Gate-source leakage current  
Drain-source on-state resistance  
Drain-source on-state resistance  
-
-
-
1
100 nA  
R DS(on)  
RDS(on)  
61  
47  
85  
64  
mΩ  
mΩ  
Rev. 1.0  
page 2  
2006-07-18  
IPD15N06S2L-64  
Values  
Parameter  
Symbol  
Conditions  
Unit  
min.  
typ.  
max.  
Dynamic characteristics1)  
Input capacitance  
Output capacitance  
Reverse transfer capacitance  
Turn-on delay time  
Rise time  
C iss  
C oss  
Crss  
t d(on)  
t r  
-
-
-
-
-
-
-
354  
103  
38  
4
-
-
-
-
-
-
-
pF  
ns  
V
GS=0 V, VDS=25 V,  
f =1 MHz  
14  
21  
12  
V
DD=30 V, VGS=10 V,  
I D=15 A, R G=20 Ω  
t d(off)  
t f  
Turn-off delay time  
Fall time  
Gate Charge Characteristics1)  
Gate to source charge  
Gate to drain charge  
Gate charge total  
Q gs  
-
-
-
-
1
4
1.5  
5
nC  
Q gd  
V
V
DD=44 V, I D=19 A,  
GS=0 to 10 V  
Q g  
11  
3.8  
13  
-
Vplateau  
Gate plateau voltage  
V
A
Reverse Diode  
Diode continous forward current1)  
Diode pulse current1)  
I S  
-
-
-
-
19  
76  
T C=25 °C  
I S,pulse  
V
GS=0 V, I F=15 A,  
VSD  
Diode forward voltage  
Reverse recovery time1)  
Reverse recovery charge1)  
-
-
-
0.93  
34  
1.3  
V
T j=25 °C  
VR=30 V, I F=I S,  
diF/dt =100 A/µs  
t rr  
-
-
ns  
nC  
VR=30 V, I F=I S,  
diF/dt =100 A/µs  
Q rr  
32  
1) Defined by design. Not subject to production test.  
2) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain  
connection. PCB is vertical in still air.  
Rev. 1.0  
page 3  
2006-07-18  
IPD15N06S2L-64  
1 Power dissipation  
2 Drain current  
P
tot = f(T C); VGS ≥ 4 V  
I D = f(T C); VGS ≥ 10 V  
50  
20  
15  
10  
5
40  
30  
20  
10  
0
0
0
50  
100  
150  
200  
0
50  
100  
150  
200  
T
C [°C]  
T
C [°C]  
3 Safe operating area  
4 Max. transient thermal impedance  
thJC = f(t p)  
I D = f(VDS); T C = 25 °C; D = 0  
parameter: t p  
Z
parameter: D =t p/T  
100  
10  
1
1 µs  
100  
10 µs  
0.1  
100 µs  
0.05  
1 ms  
10-1  
10-2  
10-3  
0.02  
0.01  
single pulse  
10-7  
10-6  
10-5  
10-4  
10-3  
10-2  
10-1  
100  
0.1  
1
10  
100  
t p [s]  
V
DS [V]  
Rev. 1.0  
page 4  
2006-07-18  
IPD15N06S2L-64  
5 Typ. output characteristics  
I D = f(VDS); T j = 25 °C  
parameter: VGS  
6 Typ. drain-source on-state resistance  
DS(on) = (I D); T j = 25 °C  
R
parameter: VGS  
50  
180  
170  
10 V  
5 V  
4 V  
3 V  
3.5 V  
160  
40  
30  
20  
10  
0
150  
140  
130  
120  
110  
100  
90  
4.5 V  
4 V  
80  
3.5 V  
70  
4.5 V  
5 V  
60  
3 V  
50  
10 V  
2.5 V  
40  
0
0
1
2
3
4
5
10  
20  
V
DS [V]  
I
D [A]  
7 Typ. transfer characteristics  
I D = f(VGS); VDS = 5V  
parameter: T j  
8 Typ. Forward transconductance  
g fs = f(I D); T j = 25°C  
parameter: g fs  
30  
25  
20  
15  
10  
5
30  
25  
20  
15  
10  
5
-55 °C  
25 °C  
175 °C  
0
0
1
2
3
4
5
0
10  
20  
30  
I
D [A]  
V
GS [V]  
Rev. 1.0  
page 5  
2006-07-18  
IPD15N06S2L-64  
9 Typ. Drain-source on-state resistance  
DS(ON) = f(T j)  
10 Typ. gate threshold voltage  
GS(th) = f(T j); VGS = VDS  
R
V
parameter: I D = 8 A; VGS = 10 V  
parameter: I D  
100  
2.5  
90  
80  
70  
60  
50  
40  
30  
20  
2
1.5  
1
70 µA  
14 µA  
0.5  
0
-60  
-20  
20  
60  
100  
140  
180  
-60  
-20  
20  
60  
T j [°C]  
100  
140  
180  
T j [°C]  
11 Typ. capacitances  
12 Typical forward diode characteristicis  
C = f(VDS); VGS = 0 V; f = 1 MHz  
IF = f(VSD)  
parameter: T j  
103  
102  
Ciss  
Coss  
Crss  
102  
101  
25 °C  
175 °C  
100  
0
5
10  
15  
20  
25  
30  
0
0.4  
0.8  
1.2  
1.6  
V
DS [V]  
V SD [V]  
Rev. 1.0  
page 6  
2006-07-18  
IPD15N06S2L-64  
13 Typical avalanche energy  
AS = f(T j)  
14 Typ. gate charge  
E
V
GS = f(Q gate); I D = 19 A pulsed  
parameter: I D  
200  
12  
10  
8
150  
100  
50  
11 V  
44 V  
3.75 A  
6
7.5 A  
15 A  
4
2
0
0
25  
50  
75  
100  
125  
150  
175  
0
2
4
6
8
10  
12  
T j [°C]  
Q
gate [nC]  
15 Typ. drain-source breakdown voltage  
16 Gate charge waveforms  
V
BR(DSS) = f(T j); I D = 1 mA  
66  
64  
62  
60  
58  
56  
54  
52  
50  
VGS  
Qg  
Qgate  
Qgd  
Qgs  
-60  
-20  
20  
60  
100  
140  
180  
T j [°C]  
Rev. 1.0  
page 7  
2006-07-18  
IPD15N06S2L-64  
Published by  
Infineon Technologies AG  
Am Campeon 1-12  
D-85579 Neubiberg  
© Infineon Technologies AG 1999  
All Rights Reserved.  
Attention please!  
The information herein is given to describe certain components and shall not be considered as  
a guarantee of characteristics.  
Terms of delivery and rights to technical change reserved.  
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement,  
regarding circuits, descriptions and charts stated herein.  
Information  
For further information on technology, delivery terms and conditions and prices, please contact your  
nearest Infineon Technologies Office (www.infineon.com)  
Warnings  
Due to technical requirements, components may contain dangerous substances.  
For information on the types in question, please contact your nearest Infineon Technologies Office.  
Infineon Technologies' components may only be used in life-support devices or systems with the  
expressed written approval of Infineon Technologies, if a failure of such components can reasonably  
be expected to cause the failure of that life-support device or system, or to affect the safety or  
effectiveness of that device or system. Life support devices or systems are intended to be implanted  
in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail,  
it is reasonable to assume that the health of the user or other persons may be endangered.  
Rev. 1.0  
page 8  
2006-07-18  

IPD15N06S2L-64 替代型号

型号 制造商 描述 替代类型 文档
SPD15N06S2L-64 INFINEON OptiMOS Power-Transistor 类似代替

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