首页 |元器件品牌

IPD160N04LG [INFINEON]

OptiMOS3 Power-Transistor; OptiMOS3功率三极管
IPD160N04LG
型号： IPD160N04LG
厂家： Infineon    Infineon
描述：

OptiMOS3 Power-Transistor
OptiMOS3功率三极管
文件： 总9页 (文件大小：230K)
中文：  中文翻译
下载：  下载PDF数据表文档文件
 查看货源
IPD160N04L G  
OptiMOS®3 Power-Transistor  
Product Summary  
Features  
V DS  
40  
16  
30  
V
• Fast switching MOSFET for SMPS  
• Optimized technology for DC/DC converters  
• Qualified according to JEDEC1) for target applications  
R DS(on),max  
I D  
mΩ  
A
• N-channel, logic level  
• Excellent gate charge x R DS(on) product (FOM)  
• Very low on-resistance R DS(on)  
• 100% Avalanche tested  
• Pb-free plating; RoHS compliant  
Type  
IPD160N04L G  
Package  
Marking  
PG-TO252-3  
160N04L  
Maximum ratings, at T j=25 °C, unless otherwise specified  
Value  
Parameter  
Symbol Conditions  
Unit  
I D  
V GS=10 V, T C=25 °C  
Continuous drain current  
30  
23  
28  
A
V
V
GS=10 V, T C=100 °C  
GS=4.5 V, T C=25 °C  
V
GS=4.5 V,  
20  
T C=100 °C  
Pulsed drain current2)  
I D,pulse  
I AS  
T C=25 °C  
210  
30  
Avalanche current, single pulse3)  
Avalanche energy, single pulse  
Gate source voltage  
T C=25 °C  
E AS  
V GS  
I D=30 A, R GS=25 Ω  
5
mJ  
V
±20  
1) J-STD20 and JESD22  
Rev. 1.0  
page 1  
2007-12-06  
IPD160N04L G  
Maximum ratings, at T j=25 °C, unless otherwise specified  
Value  
Parameter  
Symbol Conditions  
Unit  
P tot  
T C=25 °C  
Power dissipation  
31  
W
T j, T stg  
Operating and storage temperature  
IEC climatic category; DIN IEC 68-1  
-55 ... 175  
55/175/56  
°C  
Values  
typ.  
Parameter  
Symbol Conditions  
Unit  
min.  
max.  
Thermal characteristics  
R thJC  
Thermal resistance, junction - case  
SMD version, device on PCB  
-
-
-
-
-
-
4.9  
75  
50  
K/W  
R thJA  
minimal footprint  
6 cm² cooling area4)  
Electrical characteristics, at T j=25 °C, unless otherwise specified  
Static characteristics  
V (BR)DSS V GS=0 V, I D=1 mA  
Drain-source breakdown voltage  
Gate threshold voltage  
40  
-
-
-
V
V GS(th)  
V DS=V GS, I D=10 µA  
1.2  
2
V DS=40 V, V GS=0 V,  
T j=25 °C  
I DSS  
Zero gate voltage drain current  
-
-
0.1  
10  
1
µA  
V
DS=40 V, V GS=0 V,  
100  
T j=125 °C  
I GSS  
V GS=20 V, V DS=0 V  
Gate-source leakage current  
-
-
-
-
10  
100 nA  
Drain-source on-state resistance  
R DS(on) V GS=4.5 V, I D=20 A  
V GS=10 V, I D=30 A  
R G  
18.4  
13.3  
1.2  
23  
16  
-
mΩ  
Gate resistance  
Ω
|V DS|>2|I D|R DS(on)max  
,
g fs  
Transconductance  
22  
43  
-
S
I D=30 A  
2) See figure 3 for more detailed information  
3) See figure 13 for more detailed information  
2
4) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm (one layer, 70 µm thick) copper area for drain  
connection. PCB is vertical in still air.  
Rev. 1.0  
page 2  
2007-12-06  
IPD160N04L G  
Values  
typ.  
Parameter  
Symbol Conditions  
Unit  
min.  
max.  
Dynamic characteristics  
C iss  
Input capacitance  
Output capacitance  
Reverse transfer capacitance  
Turn-on delay time  
Rise time  
-
-
-
-
-
-
-
900  
230  
11  
1200 pF  
V GS=0 V, V DS=20 V,  
C oss  
Crss  
t d(on)  
t r  
310  
-
f =1 MHz  
3.0  
1.8  
12  
-
-
-
-
ns  
V DD=20 V, V GS=10 V,  
I D=30 A, R G=1.6 Ω  
t d(off)  
t f  
Turn-off delay time  
Fall time  
2.4  
Gate Charge Characteristics5)  
Gate to source charge  
Gate charge at threshold  
Gate to drain charge  
Switching charge  
Q gs  
-
-
-
-
-
-
3.2  
1.4  
1.3  
3.0  
11  
-
-
nC  
Q g(th)  
Q gd  
-
V DD=20 V, I D=30 A,  
V
GS=0 to 10 V  
Q sw  
-
Q g  
Gate charge total  
15  
-
V plateau  
Gate plateau voltage  
3.6  
V
V DD=20 V, I D=30 A,  
GS=0 to 4.5 V  
Q g  
Gate charge total  
-
5.5  
7.3  
nC  
V
V DS=0.1 V,  
GS=0 to 10 V  
Q g(sync)  
Gate charge total, sync. FET  
Output charge  
-
-
11  
-
-
V
Q oss  
V DD=20 V, V GS=0 V  
8.6  
Reverse Diode  
I S  
Diode continuous forward current  
Diode pulse current  
-
-
-
-
26  
A
T C=25 °C  
I S,pulse  
210  
V GS=0 V, I F=30 A,  
T j=25 °C  
V SD  
Diode forward voltage  
-
-
0.96  
25  
1.2  
-
V
V R=20 V, I F=I S,  
di F/dt =400 A/µs  
Q rr  
Reverse recovery charge  
nC  
5) See figure 16 for gate charge parameter definition  
Rev. 1.0  
page 3  
2007-12-06  
IPD160N04L G  
1 Power dissipation  
2 Drain current  
P
tot=f(T C)  
I D=f(T C); V GS≥10 V  
35  
30  
25  
20  
15  
10  
5
35  
30  
25  
20  
15  
10  
5
0
0
0
50  
100  
150  
200  
0
50  
100  
150  
200  
T C [°C]  
T C [°C]  
3 Safe operating area  
I D=f(V DS); T C=25 °C; D =0  
parameter: t p  
4 Max. transient thermal impedance  
Z thJC=f(t p)  
parameter: D =t p/T  
103  
10  
limited by on-state  
resistance  
0.5  
1 µs  
102  
0.2  
1
10 µs  
0.1  
0.05  
0.02  
0.01  
100 µs  
DC  
101  
1 ms  
0.1  
single pulse  
100  
10 ms  
10-1  
0
0
0
0
0
0
1
0.01  
10-1  
100  
101  
102  
10-6  
10-5  
10-4  
10-3  
10-2  
10-1  
100  
V DS [V]  
t p [s]  
Rev. 1.0  
page 4  
2007-12-06  
IPD160N04L G  
5 Typ. output characteristics  
I D=f(V DS); T j=25 °C  
6 Typ. drain-source on resistance  
R DS(on)=f(I D); T j=25 °C  
parameter: V GS  
parameter: V GS  
100  
35  
10 V  
5 V  
3.5 V  
30  
80  
60  
40  
20  
0
4 V  
4.5 V  
25  
4.5 V  
20  
15  
10  
5
5 V  
4 V  
10 V  
3.5 V  
3.2 V  
3 V  
2.8 V  
0
0
1
2
3
0
20  
40  
60  
80  
100  
V DS [V]  
ID [A]  
7 Typ. transfer characteristics  
I D=f(V GS); |V DS|>2|I D|R DS(on)max  
parameter: T j  
8 Typ. forward transconductance  
g fs=f(I D); T j=25 °C  
100  
80  
60  
40  
20  
0
80  
60  
40  
20  
175 °C  
25 °C  
0
0
1
2
3
4
5
6
0
20  
40  
60  
80  
100  
V GS [V]  
ID [A]  
Rev. 1.0  
page 5  
2007-12-06  
IPD160N04L G  
9 Drain-source on-state resistance  
10 Typ. gate threshold voltage  
R
DS(on)=f(T j); I D=30 A; V GS=10 V  
V GS(th)=f(T j); V GS=V DS; I D=250 µA  
28  
24  
2.5  
2
20  
98 %  
1.5  
1
16  
12  
8
typ  
0.5  
0
4
0
-60  
-20  
20  
60  
100  
140  
180  
-60  
-20  
20  
60  
100  
140  
180  
T j [°C]  
T j [°C]  
11 Typ. capacitances  
12 Forward characteristics of reverse diode  
I F=f(V SD  
C =f(V DS); V GS=0 V; f =1 MHz  
)
parameter: T j  
104  
1000  
25 °C  
103  
102  
101  
100  
Ciss  
Coss  
25 °C, 98%  
100  
175 °C, 98%  
175 °C  
10  
Crss  
1
0
10  
20  
V DS [V]  
30  
40  
0.0  
0.5  
1.0  
1.5  
2.0  
V SD [V]  
Rev. 1.0  
page 6  
2007-12-06  
IPD160N04L G  
13 Avalanche characteristics  
AS=f(t AV); R GS=25 Ω  
14 Typ. gate charge  
GS=f(Q gate); I D=30 A pulsed  
V
I
parameter: T j(start)  
parameter: V DD  
100  
12  
20 V  
10  
8
8 V  
32 V  
25 °C  
10  
6
100 °C  
4
150 °C  
2
1
10-1  
0
0
100  
101  
102  
103  
4
8
12  
t AV [µs]  
Q gate [nC]  
15 Drain-source breakdown voltage  
16 Gate charge waveforms  
V
BR(DSS)=f(T j); I D=1 mA  
45  
V GS  
Q g  
40  
35  
30  
25  
20  
V gs(th)  
Q g(th)  
Q sw  
Q gd  
Q gate  
Q gs  
-60  
-20  
20  
60  
100  
140  
180  
T j [°C]  
Rev. 1.0  
page 7  
2007-12-06  
IPD160N04L G  
Package Outline  
PG-TO252-3  
Rev. 1.0  
page 8  
2007-12-06  
IPD160N04L G  
Published by  
Infineon Technologies AG  
81726 Munich, Germany  
© 2007 Infineon Technologies AG  
All Rights Reserved.  
Legal Disclaimer  
The information given in this document shall in no event be regarded as a guarantee of  
conditions or characteristics. With respect to any examples or hints given herein, any typical  
values stated herein and/or any information regarding the application of the device,  
Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind,  
including without limitation, warranties of non-infringement of intellectual property rights  
of any third party.  
Information  
For further information on technology, delivery terms and conditions and prices, please  
contact the nearest Infineon Technologies Office  
(www.infineon.com).  
Warnings  
Due to technical requirements, components may contain dangerous substances. For information  
on the types in question, please contact the nearest Infineon Technologies Office.  
Infineon Technologies components may be used in life-support devices or systems only with  
the express written approval of Infineon Technologies, if a failure of such components can  
reasonably be expected to cause the failure of that life-support device or system or to affect  
the safety or effectiveness of that device or system. Life support devices or systems are  
intended to be implanted in the human body or to support and/or maintain and sustain  
and/or protect human life. If they fail, it is reasonable to assume that the health of the user  
or other persons may be endangered.  
Rev. 1.0  
page 9  
2007-12-06  

相关型号：

IPD160N04LGBTMA1

 Power Field-Effect Transistor, 30A I(D), 40V, 0.016ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252AA, GREEN, PLASTIC, TO-252, 3 PIN
INFINEON

IPD16CN10NG

 OptiMOS㈢2 Power-Transistor
INFINEON

IPD16CNE8NG

 OptiMOS㈢2 Power-Transistor
INFINEON

IPD170N04NG

 OptiMOS3 Power-Transistor
INFINEON

IPD170N04NGBTMA1

 Power Field-Effect Transistor, 30A I(D), 40V, 0.017ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252AA, GREEN, PLASTIC, TO-252, 3 PIN
INFINEON

IPD180N10N3 G

 英飞凌的 100V OptiMOS™ 功率 MOSFET 可以为高效率、高功率密度的 SMPS 提供卓越的解决方案。与下一代出色技术相比，该系列在 R Ds（on）和 FOM（品质因数）方面均降低了30％。
INFINEON

IPD180N10N3G

 OptiMOSTM3 Power-Transistor
INFINEON

IPD180N10N3GATMA1

 Power Field-Effect Transistor, 43A I(D), 100V, 0.018ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252AA, GREEN, PLASTIC, TO-252, 3 PIN
INFINEON

IPD180N10N3GBTMA1

 Power Field-Effect Transistor, 43A I(D), 100V, 0.018ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252AA, GREEN, PLASTIC, TO-252, 3 PIN
INFINEON

IPD18DP10LM

 DPAK 封装型 100 V OptiMOS™ P 沟道 MOSFET 是面向电池管理、负载开关和反极性保护应用的全新技术。P 沟道器件的主要优势在于降低中低功率应用的设计复杂度。此类产品可轻松连接 MCU，开关速度快且雪崩能力强，尤其适合质量要求高的应用。器件支持逻辑电平，具备较宽的 RDS(on) 范围和低 Qg，低负载下效率较高。
INFINEON

IPD19DP10NM

 DPAK 封装型 100 V OptiMOS™ P 沟道 MOSFET 是面向电池管理、负载开关和反极性保护应用的全新技术。P 沟道器件的主要优势在于降低中低功率应用的设计复杂度。此类产品可轻松连接 MCU，开关速度快且雪崩能力强，尤其适合质量要求高的应用。器件支持正常电平，具备较宽的 RDS(on) 范围和低 Qg，低负载下效率较高。
INFINEON

IPD200N15N3G

 OptiMOS?3 Power-Transistor Features Excellent gate charge x R DS(on) product (FOM)
INFINEON
©2020 ICPDF网 联系我们和版权申明