ICE3DS01LG_技术文档

Datasheet, V2.0, 15 May 2003

PWM-FF IC

ICE3DS01L

ICE3DS01LG

Off-Line SMPS Current Mode

Controller with integrated 500V

Startup Cell

Power Management & Supply

N e v e r s t o p t h i n k i n g .

ICE3DSO1L(G)

Revision History:

2003-05-15

Datasheet

Previous Version:

Page

Subjects (major changes since last revision)

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Edition 2003-05-15

Published by Infineon Technologies AG,

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F3

ICE3DS01L

ICE3DS01LG

Off-Line SMPS Current Mode Controller

with integrated 500V Startup Cell

Product Highlights

P-DIP-8-6

test

• Active Burst Mode to reach the lowest

Standby Power Requirements < 100mW

• Latched Off Mode to increase Robustness

and Safety of the System

• Adjustable Blanking Window for High Load

Jumps to increase Reliability

P-DSO-8-8

Features

Description

The F3 Controller provides Active Burst Mode to reach the

lowest Standby Power Requirements <100mW at no load.

•

Active Burst Mode for lowest Standby Power

@ light load controlled by Feedback Signal

•

Fast Load Jump Response in Active Burst Mode As during Active Burst Mode the controller is always active

500V Startup Cell switched off after Start Up

110kHz internally fixed Switching Frequency

there is an immediate response on load jumps possible

without any black out in the SMPS. In Active Burst Mode

Latched Off Mode for Overtemperature Detection the ripple of the output voltage can be reduced <1%.

Latched Off Mode for Overvoltage Detection

Latched Off Mode for Short Winding Detection

Furthermore Latched Off Mode is entered in case of

Overtemperature, Overvoltage or Short Winding. If

Auto Restart Mode for Overload and Open Loop Latched Off Mode is entered only the disconnection from

Auto Restart Mode for VCC Undervoltage

User defined Soft Start

Minimum of external Components required

Max Duty Cycle 72%

Overall Tolerance of Current Limiting < ±5%

Internal Leading Edge Blanking

Soft Switching for Low EMI

the main line can reset the Controller. Auto Restart Mode

is entered in case of failure modes like open loop or

overload. By means of the internal precise peak current

limitation the dimension of the transformer and the

secondary diode can be lower which leads to more cost

efficiency. An adjustable blanking window prevents the IC

from entering Auto Restart Mode or Active Burst Mode in

case of high Load Jumps.

Typical Application

+

Converter

Snubber

C_Bulk

DC Output

85 ... 270 VAC

-

C_VCC

HV

Startup Cell

VCC

PWM Controller

Current Mode

Gate

CS

Precise Low

Tolerance Peak

Current Limitation

Power

Management

R_Sense

Control Unit

Active Burst Mode

Latched Off Mode

Auto Restart Mode

FB

GND

SoftS

C_SoftS

ICE3DS01/G

Type

Ordering Code

F_OSC

Package

ICE3DS01L

ES Samples available

Q67040-S4549-A102

110kHz

P-DIP-8-6

P-DSO-8-8

ICE3DS01LG

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ICE3DS01L/LG

Table of Contents

Page

1

Pin Configuration and Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5

Pin Configuration with P-DIP-8-6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5

Pin Configuration with P-DSO-8-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5

Pin Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6

1.1

1.2

1.3

2

Representative Blockdiagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7

3

3.1

3.2

3.3

Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8

Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8

Startup Phase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9

PWM Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10

Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10

PWM-Latch FF1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10

Gate Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10

Current Limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11

Leading Edge Blanking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11

Propagation Delay Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11

Control Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12

Adjustable Blanking Window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12

Active Burst Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13

Entering Active Burst Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13

Working in Active Burst Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13

Leaving Active Burst Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13

Protection Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14

Latched Off Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14

Auto Restart Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15

3.4

3.4.1

3.4.2

3.4.3

3.5

3.5.1

3.5.2

3.6

3.6.1

3.6.2

3.6.2.1

3.6.2.2

3.6.2.3

3.6.3

3.6.3.1

3.6.3.2

4

4.1

4.2

4.3

4.3.1

4.3.2

4.3.3

4.3.4

4.3.5

4.3.6

Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16

Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16

Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16

Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17

Supply Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17

Internal Voltage Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17

PWM Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18

Control Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18

Current Limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19

Driver Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19

5

6

Typical Performance Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .20

Outline Dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26

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Pin Configuration and Functionality

1

Pin Configuration and Functionality

1.1 Pin Configuration with P-DIP-8-6

1.2 Pin Configuration with P-DSO-8-8

Symbol Function

1

2

3

4

5

6

7

8

SoftS

FB

Soft-Start

1

2

3

4

5

6

7

8

SoftS

FB

Soft-Start

Feedback

CS

Current Sense

CS

Current Sense

HV

High Voltage Input

Driver Stage Output

Controller Supply Voltage

Controller Ground

Gate

HV

Driver Stage Output

High Voltage Input

Not connected

HV

Gate

VCC

GND

N.C.

VCC

GND

Controller Supply Voltage

Controller Ground

Package P-DIP-8-6

Package P-DSO-8-8

SoftS

1

8

7

6

5

GND

VCC

Gate

HV

SoftS

1

8

7

6

5

GND

VCC

N.C.

HV

FB

CS

HV

2

FB

CS

2

3

4

3

4

Gate

Figure 1

Note: Pin

package.

Pin Configuration P-DIP-8-6(top view)

Figure 2

Pin Configuration P-DSO-8-8(top view)

4

and are shorted within the DIP

5

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Pin Configuration and Functionality

1.3

Pin Functionality

SoftS (Soft Start & Auto Restart Control)

The SoftS pin combines the function of Soft Start in

case of Start Up and Auto Restart Mode and the

controlling of the Auto Restart Mode in case of error

detection. Furthermore the blanking window for high

load jumps is adjusted by means of the external

capacitor connected to SoftS.

FB (Feedback)

The information about the regulation is provided by the

FB Pin to the internal Protection Unit and to the internal

PWM-Comparator to control the duty cycle. The FB-

Signal controls in case of light load the Active Burst

Mode of the controller.

CS (Current Sense)

The Current Sense pin senses the voltage developed

on the series resistor inserted in the source of the

external PowerMOS. If CS reaches the internal

threshold of the Current Limit Comparator, the Driver

output is immediately switched off. Furthermore the

current information is provided for the PWM-

Comparator to realize the Current Mode.

Gate

The Gate pin is the output of the internal driver stage

connected to the Gate of an external PowerMOS.

HV (High Voltage)

The HV pin is connected to the rectified DC input

voltage. It is the input for the integrated 500V Startup

Cell.

VCC (Power supply)

The VCC pin is the positive supply of the IC. The

operating range is between 8.5V and 21V.

GND (Ground)

The GND pin is the ground of the controller.

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ICE3DS01L/LG

Representative Blockdiagram

2

Representative Blockdiagram

Figure 3

Representative Blockdiagram

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ICE3DS01L/LG

Functional Description

3

Functional Description

All values which are used in the functional description SMPS. There is no need for an extra over sizing of the

are typical values. For calculating the worst cases the SMPS, e.g. the transformer or PowerMOS.

min/max values which can be found in section 4

Electrical Characteristics have to be considered.

3.2

Power Management

3.1

Introduction

Startup Cell

HV

VCC

The F3 is the further development of the F2 to meet the

requirements for the lowest Standby Power at

minimum load and no load conditions. A new fully

integrated Standby Power concept is implemented into

the IC in order to keep the application design easy.

Compared to F2 no further external parts are needed to

achieve the lowest Standby Power. An intelligent

Active Burst Mode is used for this Standby Mode. After

entering this mode there is still a full control of the

power conversion by the secondary side via the same

optocoupler that is used for the normal PWM control.

The response on load jumps is optimized. The voltage

ripple on V_outis minimized. V_outis further on well

controlled in this mode.

Power Management

Undervoltage Lockout

15V

Internal Bias

8.5V

Latched Off Mode

Reset

The usually external connected RC-filter in the

feedback line after the optocoupler is integrated in the

IC to reduce the external part count.

V_VCC< 6V

6.5V

Voltage

Power-Down Reset

Furthermore a high voltage startup cell is integrated

into the IC which is switched off once the Undervoltage

Lockout on-threshold of 15V is exceeded. The external

startup resistor is no longer necessary. Power losses

are therefore reduced. This increases the efficiency

under light load conditions dramatically.

Reference

Auto Restart Mode

The Soft-Start capacitor is also used for providing an

adjustable blanking window for high load jumps. During

this time window the overload detection is disabled.

With this concept no further external components are

necessary to adjust the blanking window.

Active Burst Mode

Latched Off Mode

T1

A new Latched Off Mode is implemented into the IC in

order to increase the robustness and safety of the

system. Latched Off Mode is only entered if very

dangerous conditions occur that damage the SMPS if

not switched off immediately. A restart of the system

can then only be done by disconnecting the AC line.

SoftS

Figure 4

Power Management

The Undervoltage Lockout monitors the external

supply voltage V_VCC. When the SMPS is plugged to the

main line the internal Startup Cell is biased and starts

to charge the external capacitor C_VCCwhich is

connected to the VCC pin. The VCC charge current

that is provided by the Startup Cell from the HV pin is

1.05mA. When V_VCCexceeds the on-threshold

Auto Restart Mode reduces the average power

conversion to a minimum. In this mode malfunctions

are covered that could lead to a destruction of the

SMPS if no dramatically reduced power limitation is

provided over time. Once the malfunction is removed

normal operation is immediately started after the next

Start Up Phase.

V

_CCon=15V the internal voltage reference and bias

The internal precise peak current limitation reduces the

costs for the transformer and the secondary diode. The

influence of the change in the input voltage on the

power limitation can be avoided together with the

circuit are switched on. Then the Startup Cell is

switched off by the Undervoltage Lockout and therefore

also the power losses are switched off caused by the

Startup Cell which is connected to the bus voltage

(HV). To avoid uncontrolled ringing at switch-on a

hysteresis is implemented. The switch-off of the

integrated

Propagation

Delay

Compensation.

Therefore the maximum power is nearly independent

on the input voltage that is required for wide range

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ICE3DS01L/LG

Functional Description

controller can only take place after Active Mode was capacitor C_Softsin combination with the internal pull up

entered and V_VCCfalls below 8.5V.

resistor R_SoftSdetermines the duty cycle until V_SoftS

exceeds 4V.

The maximum current consumption before the

controller is activated is about 170µA.

In the beginning C_SoftSis immediately charged up to

approx. 1V by T2. Therefore the Soft Start Phase takes

place between 1V and 4V. Above V_SoftsS= 4V there is

no longer duty cycle limitation DC_maxis controlled by

comparator C7 as comparator C2 blocks the gate G7

(see Figure 6).The maximum charge current in the very

first phase when V_SoftSis below 1V is limited to 1.9mA.

When V_VCCfalls below the off-threshold V_CCoff=8.5V the

internal reference is switched off and the Power Down

reset let T1 discharging the soft-start capacitor C_SoftSat

pin SoftS. Thus it is ensured that at every startup cycle

the voltage ramp at pin SoftS starts at zero.

The internal Voltage Reference is switched off if

Latched Off Mode or Auto Restart Mode is entered.

The current consumption is then reduced to 300µA.

V_SoftS

When Active Burst Mode is entered the internal Bias is

switched off in order to reduce the current consumption

below 1.1mA while keeping the Voltage Reference still

active as this is necessary in this mode.

max. Startup Phase

5.4V

4V

In case Latched Off Mode is entered VCC needs to be

lowered below 6V to reset the Latched Off Mode. This

is done usually by disconnecting the SMPS from the

AC line.

1V

max. Soft Start Phase

3.3

Startup Phase

DC_max

t

6.5V

DC

1

3.25k

DC

2

R

T2

SoftS

T3

1V

t1

t2 t

SoftS

Figure 6

Startup Phase

C

SoftS

By means of this extra charge stage there is no delay

in the beginning of the Startup Phase when there is still

no switching. Furthermore Soft Start is finished at 4V to

have faster the maximum power capability. The duty

cycles DC₁and DC₂are depending on the mains and

the primary inductance of the transformer. The

limitation of the primary current by DC₂is related to

V_SoftS= 4V. But DC₁is related to a maximum primary

current which is limited by the internal Current Limiting

with CS = 1V. Therefore the maximum Startup Phase

is divided into a Soft Start Phase until t1 and a phase

from t1 until t2 where maximum power is provided if

demanded by the FB signal.

Soft Start

Soft-Start

Comparator

Gate Driver

C7

&

G7

C2

4V

0.85V

CS

x3.7

PWM OP

Figure 5

Soft Start

During the Startup Phase a Soft Start is provided. A

signal V_SoftSwhich is generated by the external

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ICE3DS01L/LG

Functional Description

3.4

PWM Section

VCC

0.72

PWM Section

Oscillator

PWM-Latch

Duty Cycle

max

1

Gate

Z1

Clock

Soft Start

FF1

Comparator

Gate Driver

&

S

R

1

PWM

Comparator

Q

G8

Figure 8

Gate Driver

G9

The driver-stage is optimized to minimize EMI and to

provide high circuit efficiency. This is done by reducing

the switch on slope when exceeding the external

Power Switch threshold. This is achieved by a slope

control of the rising edge at the driver’s output (see

Figure 9).

Current

Limiting

Comparator

C3

Gate

ca. t = 130ns

V_Gate

Figure 7

3.4.1

PWM Section

Oscillator

C_Load= 1nF

The oscillator generates a frequency f_switch= 110kHz. A

resistor, a capacitor and a current source and current

sink which determine the frequency are integrated. The

charging and discharging current of the implemented

oscillator capacitor are internally trimmed, in order to

achieve a very accurate switching frequency. The ratio

of controlled charge to discharge current is adjusted to

reach a maximum duty cycle limitation of D_max=0.72.

5V

t

Figure 9

Gate Rising Slope

Thus the leading switch on spike is minimized. When

the external Power Switch is switched off, the falling

shape of the driver is slowed down when reaching 2V

to prevent an overshoot below ground. Furthermore the

driver circuit is designed to eliminate cross conduction

of the output stage.

3.4.2

PWM-Latch FF1

The oscillator clock output provides a set pulse to the

PWM-Latch when initiating the external Power Switch

conduction. After setting the PWM-Latch can be reset

by the PWM comparator, the Soft Start comparator, the

Current-Limit comparator or comparator C3. In case of

resetting the driver is shut down immediately.

3.4.3

Gate Driver

The Gate Driver is a fast totem pole gate drive which is

designed to avoid cross conduction currents and which

is equipped with a zener diode Z1 (see Figure 8) in

order to improve the control of the Gate attached power

transistors as well as to protect them against

undesirable gate overvoltages.

The Gate Driver is active low at voltages below the

undervoltage lockout threshold V_VCCoff

.

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ICE3DS01L/LG

Functional Description

The output of comparator C12 is activated by the Gate

G10 if Active Burst Mode is entered. Once activated the

current limiting is thereby reduced to 0.257V. This

voltage level determines the power level when the

Active Burst Mode is left if there is a higher power

demand.

3.5

Current Limiting

PWM Latch Latched Off

FF1 Mode

Current Limiting

Spike

Blanking

190ns

1.66V

C11

3.5.1

Leading Edge Blanking

V_Sense

Propagation-Delay

Compensation

V_csth

t_LEB= 220ns

V

csth

Leading

Edge

C10

C12

Blanking

220ns

PWM-OP

&

t

G10

Figure 11

Leading Edge Blanking

0.257V

Each time when the external Power Switch is switched

on a leading edge spike is generated due to the

primary-side capacitances and secondary-side rectifier

1pF

10k

Active Burst

Mode

reverse recovery time. To avoid

a

premature

D1

termination of the switching pulse this spike is blanked

out with a time constant of t_LEB= 220ns. During that

time there can’t be an accidentally switch off of the gate

drive.

CS

Figure 10

Current Limiting

3.5.2

Propagation Delay Compensation

There is a cycle by cycle Current Limiting realized by

the Current-Limit comparator C10 to provide an

overcurrent detection. The source current of the

external Power Switch is sensed via an external sense

resistor R_Sense. By means of R_Sensethe source current

is transformed to a sense voltage V_Sensewhich is fed

into the pin CS. If the voltage V_Senseexceeds the

internal threshold voltage V_csththe comparator C10

immediately turns off the gate drive by resetting the

PWM Latch FF1. A Propagation Delay Compensation

is added to support the immediate shut down without

delay of the Power Switch in case of Current Limiting.

The influence of the AC input voltage on the maximum

output power can thereby be avoided.

In case of overcurrent detection the shut down of the

external Power Switch is delayed due to the

propagation delay of the circuit. This delay causes an

overshoot of the peak current I_peakwhich depends on

the ratio of dI/dt of the peak current (see Figure 12).

Signal2

I_{O vershoot2}

Signal1

t_Propagation

I_Sense

I_peak2

I_peak1

I_{Lim it}

Delay

To prevent the Current Limiting from distortions caused

by leading edge spikes a Leading Edge Blanking is

integrated in the current sense path for the

comparators C10, C12 and the PWM-OP.

I_{O vershoot1}

A further comparator C11 is implemented to detect

dangerous current levels which could occur if there is a

short winding in the transformer or the secondary diode

is shorten. To ensure that there is no accidentally

entering of the Latched Mode by the comparator C11 a

spike blanking with 190ns is integrated in the output

path of comparator C11.

t

Figure 12

Current Limiting

The overshoot of Signal2 is bigger than of Signal1 due

to the steeper rising waveform. This change in the

slope is depending on the AC input voltage.

Propagation Delay Compensation is integrated to limit

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ICE3DS01L/LG

Functional Description

the overshoot dependency on dI/dt of the rising primary

current. That means the propagation delay time

between exceeding the current sense threshold V_csth

and the switch off of the external Power Switch is

compensated over temperature within a wide range.

Current Limiting is now possible in a very accurate way

(see Figure 13).

3.6

Control Unit

The Control Unit contains the functions for Active Burst

Mode, Auto Restart Mode and Latched Off Mode. The

Active Burst Mode and the Auto Restart Mode are

combined with an Adjustable Blanking Window which is

depending on the external Soft Start capacitor. By

means of this Adjustable Blanking Window an

accidentally entering of the Active Burst Mode is

avoided. Furthermore the overload detection can be

deactivated for a certain time.

E.g. I_peak= 0.5A with R_Sense= 2. Without Propagation

Delay Compensation the current sense threshold is set

to a static voltage level V_csth=1V. A current ramp of

dI/dt = 0.4A/µs, that means dV_Sense/dt = 0.8V/µs, and a

propagation delay time of i.e. t_Propagation

=180ns

Delay

3.6.1

Adjustable Blanking Window

leads then to an I_peakovershoot of 12%. By means of

propagation delay compensation the overshoot is only

about 2% (see Figure 13).

SoftS

with compensation

without compensation

6.5V

V

1,3

R

SoftS

5k

1,25

1,2

4.4V

1,15

1,1

1

&

1,05

1

S1

G2

G4

0,95

0,9

0

0,2

0,4

0,6

0,8

1

1,2

1,4

1,6

1,8

2

V

dV_Sense

dt

µs

C3

C4

5.4V

Figure 13

Overcurrent Shutdown

Auto

Restart

Mode

The Propagation Delay Compensation is realized by

means of a dynamic threshold voltage V_csth(see Figure

14). In case of a steeper slope the switch off of the

driver is earlier to compensate the delay.

&

4.8V

G5

V_{O SC}

Active

Burst

Mode

m ax. Duty Cycle

&

off tim e

FB

G6

C6

V_Sense

t

Propagation Delay

1.32V

V_csth

Control Unit

Adjustable Blanking Window

Figure 15

V_SoftSis clamped at 4.4V by the closed switch S1 after

the SMPS is settled. If overload occurs V_FBis

exceeding 4.8V. Auto Restart Mode can’t be entered as

the gate G5 is still blocked by the comparator C3. But

after V_FBhas exceeded 4.8V the switch S1 is opened

via the gate G2. The external Soft Start capacitor can

now be charged further by the integrated pull up

resistor R_SoftS. The comparator C3 releases the gates

Signal1

Signal2

t

Figure 14

Dynamic Voltage Threshold V_csth

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F3

ICE3DS01L/LG

Functional Description

G5 and G6 once V_Softshas exceeded 5.4V. Therefore The Active Burst Mode is located in the Control Unit.

there is no entering of Auto Restart Mode possible Figure 16 shows the related components.

during this charging time of the external capacitor

C_SoftS. The same procedure happens to the external 3.6.2.1

Entering Active Burst Mode

Soft Start capacitor if a low load condition is detected

The FB signal is always observed by the comparator

C6 if the voltage level falls below 1.32V. In that case the

switch S1 is released which allows the capacitor C_SoftS

to be charged starting from the clamped voltage level

at 4.4V in normal operating mode. The gate G11 is

blocked before entering Active Burst Mode. If V_SoftS

exceeds 5.4V the comparator C3 releases the gate G6

to enter the Active Burst Mode. The time window that is

generated by combining the FB and SoftS signals with

gate G6 avoids a sudden entering of the Active Burst

Mode due to large load jumps. This time window can be

by comparator C6 when V_FBis falling below 1.32V.

Only after V_SoftShas exceeded 5.4V and V_FBis still

below 1.32V Active Burst Mode is entered. Once Active

Burst Mode is entered gate G4 is blocked to ensure

that the blanking window is only active before entering

the Active Burst Mode.

3.6.2

The controller provides Active Burst Mode for low load

conditions at V_OUTActive Burst Mode increases

Active Burst Mode

.

adjusted by the external capacitor C_SoftS

.

significantly the efficiency at light load conditions while

supporting a low ripple on V_OUTand fast response on

load jumps. During Active Burst Mode which is

controlled only by the FB signal the IC is always active

and can therefore immediately response on fast

changes at the FB signal. The Startup Cell is kept

switched off to avoid increased power losses for the

self supply.

After entering Active Burst Mode a burst flag is set

which blocks the gate G4 and the internal bias is

switched off in order to reduce the current consumption

of the IC down to ca. 1.1mA. In this Off State Phase the

IC is no longer self supplied so that therefore C_VCChas

to provide the VCC current (see Figure 17).

Furthermore gate G11 is then released to start the next

burst cycle once 1.32V is again exceeded.

SoftS

It has to be ensured by the application that the VCC

remains above the Undervoltage Lockout Level of 8.5V

to avoid that the Startup Cell is accidentally switched

on. Otherwise power losses are significantly increased.

The minimum VCC level during Active Burst Mode is

depending on the load conditions and the application.

The lowest VCC level is reached at no load conditions

6.5V

R

SoftS

5k

Internal Bias

4.4V

&

at V_OUT

.

G4

S1

3.6.2.2

Working in Active Burst Mode

Current

Limiting

After entering the Active Burst Mode the FB voltage

rises as V_OUTstarts to decrease due to the inactive

PWM section. Comparator C5 observes the FB signal

if the voltage level 4V is exceeded. In that case the

internal circuit is again activated by the internal Bias to

start with switching. As now in Active Burst Mode the

gate G10 is released the current limit is only 0.257V to

reduce the conduction losses and to avoid audible

noise. If the load at V_OUTis still below the starting level

for the Active Burst Mode the FB signal decreases

down to 1.32V. At this level C6 deactivates again the

internal circuit by switching off the internal Bias. The

gate G11 is released as after entering Active Burst

Mode the burst flag is set. If working in Active Burst

Mode the FB voltage is changing like a saw tooth

between 1.32V and 4V (see figure 17).

&

C3

G10

5.4V

4.8V

C4

Active

Burst

Mode

C5

FB

4.0V

&

G6

C6

3.6.2.3

Leaving Active Burst Mode

1.32V

&

The FB voltage immediately increases if there is a high

load jump. This is observed by comparator C4. As the

current limit is ca. 26% during Active Burst Mode a

certain load jump is needed that FB can exceed 4.8V.

At this time C4 resets the Active Burst Mode which also

G11

Control Unit

Figure 16

Active Burst Mode

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F3

ICE3DS01L/LG

Functional Description

blocks C12 by the gate G10. Maximum current can now 3.6.3

Protection Modes

be provided to stabilize V_OUT

.

The IC provides several protection features which are

separated into two categories. Some enter Latched Off

Mode, the others enter Auto Restart Mode. The

Latched Off Mode can only be reset if VCC is falling

below 6V. Both modes prevent the SMPS from

destructive states. The following table shows the

relationship between possible system failures and the

chosen protection modes.

V

FB

Entering Active

Leaving Active

Burst Mode

4.80V

4.00V

1.32V

VCC Overvoltage

Overtemperature

Latched Off Mode

V

t

SoftS

Blanking Window

Short Winding/Short Diode Latched Off Mode

5.40V

Overload

Auto Restart Mode

Open Loop

4.40V

VCC Undervoltage

Short Optocoupler

V_CS

t

3.6.3.1

Latched Off Mode

Current limit level during

ActiveBurst Mode

1.00V

CS

Latched Off

Mode Reset

0.257V

V_VCC< 6V

V

VCC

Spike

Blanking

190ns

1

Latched

Off Mode

C11

G3

1.66V

8.5V

VCC

Spike

Blanking

8.0us

&

I_VCC

C1

C4

21V

G1

7.2mA

4.8V

1.1mA

Voltage

Reference

Thermal Shutdown

V_OUT

T >140°C

j

Max. Ripple < 1%

Control Unit

FB

Figure 18

Latched Off Mode

The VCC voltage is observed by comparator C1 if 21V

is exceeded. The output of C1 is combined with the

output of C4 which observes FB signal if 4.8V is

t

Figure 17

Signals in Active Burst Mode

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F3

ICE3DS01L/LG

Functional Description

exceeded. Therefore the overvoltage detection is only short winding or short diode C10 is no longer able to

activated if the FB signal is outside the operating range limit the CS signal at 1V. C11 detects then the over

> 4.8V, e.g. when Open Loop happens. Therewith current and enters immediately the Latched Off Mode

small voltage overshoots of V_VCCduring normal to keep the SMPS in a safe stage.

operating can not start the Latched Off Mode.

3.6.3.2

Auto Restart Mode

The internal Voltage Reference is switched off once

Latched Off Mode is entered in order to reduce the

current consumption of the IC as much as possible.

Latched Off Mode can only be reset by decreasing

V_VCC< 6V. In this stage only the UVLO is working which

SoftS

6.5V

R

SoftS

controls the Startup Cell by switching on/off at V_VCCon

/

5k

V_VCCoff. In this phase the average current consumption

is only 300µA. As there is no longer a self supply by the

auxiliary winding VCC drops. The Undervoltage

Lockout switches on the integrated Startup Cell when

VCC falls below 8.5V. The Startup Cell is switched off

again when VCC has exceeded 15V. As the Latched

Off Mode was entered there is no Start Up Phase after

VCC has exceeded the switch-on level of the

Undervoltage Lockout. Therefore VCC changes

between the switch-on and switch-off levels of the

Undervoltage Lockout with a saw tooth shape (see

Figure 19).

4.4V

1

S1

G2

Voltage

Reference

C3

5.4V

V

VCC

Auto

Restart

Mode

&

G5

4.8V

FB

C4

15V

Control Unit

8.5V

Figure 20

Auto Restart Mode

I_VCCStart

t

In case of Overload or Open Loop FB exceeds 4.8V

which will be observed by C4. At this time S1 is

released that V_SoftScan increase. If V_SoftSexceeds 5.4V

which is observed by C3 Auto Restart Mode is entered

as both inputs of the gate G5 are high. In combining the

FB and SoftS signals there is a blanking window

generated which prevents the system to enter Auto

Restart Mode due to large load jumps. This time

window is the same as for the Active Burst Mode and

1.05mA

V_OUT

t

can therefore be adjusted by the external C_SoftS

.

In case of VCC undervoltage the UVLO starts a new

startup cycle.

Figure 19

Signals in Latched Off Mode

After detecting a junction temperature higher than

140°C Latched Off Mode is entered.

Short Optocoupler leads to VCC undervoltage as there

is now self supply after activating the internal reference

and bias.

The signals coming from the temperature detection and

VCC overvoltage detection are fed into

blanking with a time constant of 8.0µs to ensure system

reliability.

a spike

In contrast to the Latched Off Mode there is always a

Startup Phase with switching cycles in Auto Restart

Mode. After this Start Up Phase the conditions are

again checked whether the failure is still present.

Normal operation is proceeded once the failure mode

is removed that leads to Auto Restart Mode.

Furthermore short winding and short diode on the

secondary side can be detected by the comparator C11

which is in parallel to the propagation delay

compensated current limit comparator C10. In normal

operating mode comparator C10 keeps the maximum

level of the CS signal at 1V. If there is a failure such as

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F3

ICE3DS01L/LG

Electrical Characteristics

4

Electrical Characteristics

Note: All voltages are measured with respect to ground (Pin 8). The voltage levels are valid if other ratings are

not violated.

4.1

Absolute Maximum Ratings

Note: Absolute maximum ratings are defined as ratings, which when being exceeded may lead to destruction

of the integrated circuit. For the same reason make sure, that any capacitor that will be connected to pin 7

(VCC) is discharged before assembling the application circuit.

Parameter

Symbol

Limit Values

Unit

Remarks

min.

max.

500V

22

HV Voltage

V_HV

-

V

VCC Supply Voltage

FB Voltage

V_VCC

V_FB

-0.3

-40

-55

-

V

6.5

V

SoftS Voltage

V_SoftS

V_Gate

V_CS

6.5

V

Gate Voltage

22

V

Internally clamped at 11.5V

CS Voltage

6.5

V

Junction Temperature

Storage Temperature

Total Power Dissipation

T_j

150

0.45

0.90

185

90

°C

W

K/W

kV

T_S

P_totDSO8

P_totDIP8

R_thJADSO8

R_thJADIP8

V_ESD

P-DSO-8-8, T_amb< 50°C

P-DIP-8-6, T_amb< 50°C

P-DSO-8-8

-

Thermal Resistance

Junction-Ambient

-

P-DIP-8-6

ESD Capability (incl. Pin HV)

-

3

Human body model¹⁾

1)

According to EIA/JESD22-A114-B (discharging a 100pF capacitor through a 1.5kΩ series resistor)

4.2

Operating Range

Note: Within the operating range the IC operates as described in the functional description.

Parameter

Symbol

Limit Values

Unit

Remarks

min.

max.

20

VCC Supply Voltage

V_VCC

T_jCon

V_VCCoff

-25

V

Junction Temperature of

Controller

130

°C

Max value limited due to thermal

shut down of controller

Version 2.0

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F3

ICE3DS01L/LG

Electrical Characteristics

4.3

Characteristics

4.3.1

Supply Section

Note: The electrical characteristics involve the spread of values guaranteed within the specified supply voltage

and junction temperature range T_Jfrom – 25 °C to 130 °C. Typical values represent the median values,

which are related to 25°C. If not otherwise stated, a supply voltage of V_CC= 15 V is assumed.

Parameter

Symbol

Limit Values

Unit

Test Condition

min.

typ.

170

-1.05

-0.88

2

max.

Start Up Current

I_VCCstart

-

220

-0.55

-

µA

V_VCC=14V

V_VCC= 0V

V_VCC=14V

V_VCC>16V

VCC Charge Current

I_VCCcharge1

I_VCCcharge2

I_StartLeak

-1.60

mA

µA

-

Start Up Cell Leakage Current

20

Supply Current with Inactive

Gate

I_VCCsup1

6.0

7.5

mA

Supply Current with Active Gate I_VCCsup2

(C_Load=1nF)

-

7.2

8.7

mA

µA

V_SoftS= 4.4V

I_FB= 0

Supply Current in

Latched Off Mode

I_VCClatch

300

-

I_FB= 0

I_Softs= 0

Supply Current in

Auto Restart Mode

with Inactive Gate

I_VCCrestart

I_FB= 0

I_Softs= 0

Supply Current in

Active Burst Mode

with Inactive Gate

I_VCCburst1

I_VCCburst2

-

1.1

1.0

1.3

1.2

mA

V_FB= 2.5V

V_SoftS= 4.4V

V_VCC= 9V

V_FB= 2.5V

V_SoftS= 4.4V

VCC Turn-On Threshold

VCC Turn-Off Threshold

VCC Turn-On/Off Hysteresis

V_VCCon

V_VCCoff

V_VCChys

14.2

8.0

-

15.0

8.5

6.5

15.8

9.0

-

V

4.3.2

Internal Voltage Reference

Symbol

Parameter

Limit Values

Unit

Test Condition

min.

typ.

max.

6.63

Trimmed Reference Voltage

V_REF

6.37

6.50

V

measured at pin FB

I_FB= 0

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F3

ICE3DS01L/LG

Electrical Characteristics

4.3.3

PWM Section

Parameter

Symbol

Limit Values

Unit

Test Condition

min.

98

102

0.67

0

typ.

110

0.72

-

max.

Fixed Oscillator Frequency

f_OSC1

f_OSC2

D_max

D_min

119

117

0.77

-

kHz

T_j= 25°C

Max. Duty Cycle

Min. Duty Cycle

V_FB< 0.3V

PWM-OP Gain

A_V

3.5

-

3.7

0.85

0.7

-

3.9

-

Max. Level of Voltage Ramp

V_Max-Ramp

V

V_FBOperating Range Min Level V_FBmin

V_FBOperating Range Max level V_FBmax

0.3

-

4.75

CS=1V limited by

Comparator C4¹⁾

Feedback Pull-Up Resistor

R_FB

16

39

20

50

27

62

kΩ

Soft-Start Pull-Up Resistor

R_SoftS

1)

Design characteristic (not meant for production testing)

4.3.4

Parameter

Control Unit

Symbol

Limit Values

Unit

Test Condition

min.

typ.

max.

Deactivation Level for SoftS

Comparator C7 by C2

V_SoftSC2

V_SoftSclmp

V_SoftSC3

3.85

4.00

4.15

V

V_FB> 5V

V_FB< 4.5V

V_FB> 5V

Clamped V_SoftSVoltage during

Normal Operating Mode

4.23

5.20

4.40

5.40

4.57

5.60

Activation Limit of

Comparator C3

SoftS Startup Current

I_SoftSstart

V_FBC6

-

1.9

-

mA

V

V_SoftS= 0V

Active Burst Mode Level for

Comparator C6

1.23

1.32

1.40

V_SoftS> 5.6V

Active Burst Mode Level for

Comparator C5

V_FBC5

V_FBC4

3.85

4.62

4.00

4.80

4.15

4.98

V

After Active Burst

Mode is entered

Over Load & Open Loop

Detection Limit for

Comparator C4

V_SoftS> 5.6V

Overvoltage Detection Limit

Latched Thermal Shutdown

Spike Blanking

V_VCCOVP

T_jSD

20

130

-

21

22

150

-

V

V_FB> 5V

140

8.0

6.0

°C

µs

V

guaranteed by design

t_Spike

Power Down Reset for Latched V_VCCPD

Mode

4.0

7.5

After Latched Off Mode

is entered

Note: The trend of all the voltage levels in the Control Unit is the same regarding the deviation except V_VCCOVP

and V_VCCPD

Version 2.0

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F3

ICE3DS01L/LG

Electrical Characteristics

4.3.5

Current Limiting

Parameter

Symbol

Limit Values

Unit

Test Condition

min.

typ.

max.

Peak Current Limitation (incl.

Propagation Delay Time)

(see Figure 7)

V_csth

0.950

1.000

1.050

V

dV_sense/ dt = 0.6V/µs

Over Current Detection for

Latched Off Mode

V_CS1

1.570

0.232

1.66

1.764

0.282

V

Peak Current Limitation during V_CS2

Active Burst Mode

0.257

V_FB< 1.2V

Leading Edge Blanking

t_LEB

-

220

190

-

ns

V_SoftS= 4.4V

CS Spike Blanking for

Comparator C11

t_CSspike

CS Input Bias Current

I_CSbias

-1.0

-0.2

0

µA

V_CS=0V

4.3.6

Driver Section

Parameter

Symbol

Limit Values

Unit

Test Condition

min.

typ.

max.

GATE Low Voltage

V_GATElow

-

1.2

V

V_VCC= 5 V

I_Gate= 5 mA

-

1.5

V_VCC= 5 V

I_Gate= 20 mA

-

0.8

-

V

I_Gate= 0 A

-

1.6

2.0

I_Gate= 20 mA

I_Gate= -20 mA

-0.2

-

0.2

-

GATE High Voltage

V_GATEhigh

11.5

V_VCC= 20V

C_L= 4.7nF

-

10.5

7.5

150

55

-

V

V_VCC= 11V

C_L= 4.7nF

-

V

V_VCC= V_VCCoff+ 0.2V

C_L= 4.7nF

GATE Rise Time

t_rise

-

ns

A

V_Gate= 2V ...9V¹⁾

C_L= 4.7nF

(incl. Gate Rising Slope)

GATE Fall Time

t_fall

-

V_Gate= 9V ...2V¹⁾

C_L= 4.7nF

GATE Current, Peak,

Rising Edge

I_GATE

-0.5

-

C_L= 4.7nF²⁾

GATE Current, Peak,

Falling Edge

-

0.7

A

C_L= 4.7nF²⁾

1)

Transient reference value

2)

Design characteristic (not meant for production testing)

Version 2.0

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F3

ICE3DS01L/LG

Typical Performance Characteristics

5

Typical Performance Characteristics

190

186

182

178

174

170

166

162

158

154

150

8,0

7,5

7,0

6,5

6,0

5,5

5,0

4,5

4,0

3,5

3,0

-25 -15 -5

5

15 25 35 45 55 65 75 85 95 105 115 125

-25 -15 -5

5

15 25 35 45 55 65 75 85 95 105 115 125

Junction Temperature [°C]

Figure 21

Start Up Current I_VCCstart

Figure 24

VCC Supply Current I_VCCsup1

1,5

1,4

1,3

1,2

1,1

1,0

0,9

0,8

0,7

0,6

0,5

9,0

8,5

8,0

7,5

7,0

6,5

6,0

5,5

5,0

4,5

4,0

-25 -15 -5

5

15 25 35 45 55 65 75 85 95 105 115 125

-25 -15 -5

5

15 25 35 45 55 65 75 85 95 105 115 125

Junction Temperature [°C]

Figure 22

VCC Charge Current I_VCCcharge1

Figure 25

VCC Supply Current I_VCCsup2

1,5

1,4

1,3

1,2

1,1

1,0

0,9

0,8

0,7

0,6

0,5

400

380

360

340

320

300

280

260

240

220

200

-25 -15 -5

5

15 25 35 45 55 65 75 85 95 105 115 125

-25 -15 -5

5

15 25 35 45 55 65 75 85 95 105 115 125

Junction Temperature [°C]

Figure 23

VCC Charge Current I_VCCcharge2

Figure 26

VCC Supply Current I_VCClatch

Version 2.0

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F3

ICE3DS01L/LG

Typical Performance Characteristics

400

380

360

340

320

300

280

260

240

220

200

16,0

15,8

15,6

15,4

15,2

15,0

14,8

14,6

14,4

14,2

14,0

-25 -15 -5

5

15 25 35 45 55 65 75 85 95 105 115 125

-25 -15 -5

5

15 25 35 45 55 65 75 85 95 105 115 125

Junction Temperature [°C]

Figure 27

VCC Supply Current I_VCCrestart

Figure 30

VCC Turn-On Threshold V_VCCon

1,20

1,17

1,14

1,11

1,08

1,05

1,02

0,99

0,96

0,93

0,90

9,0

8,9

8,8

8,7

8,6

8,5

8,4

8,3

8,2

8,1

8,0

-25 -15 -5

5

15 25 35 45 55 65 75 85 95 105 115 125

-25 -15 -5

5

15 25 35 45 55 65 75 85 95 105 115 125

Junction Temperature [°C]

Figure 28

VCC Supply Current I_VCCburst1

Figure 31

VCC Turn-Off Threshold V_VCCoff

1,20

1,17

1,14

1,11

1,08

1,05

1,02

0,99

0,96

0,93

0,90

7,0

6,9

6,8

6,7

6,6

6,5

6,4

6,3

6,2

6,1

6,0

-25 -15 -5

5

15 25 35 45 55 65 75 85 95 105 115 125

-25 -15 -5

5

15 25 35 45 55 65 75 85 95 105 115 125

Junction Temperature [°C]

Figure 29

VCC Supply Current I_VCCburst2

Figure 32

VCC Turn-On/Off Hysteresis V_VCChys

Version 2.0

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F3

ICE3DS01L/LG

Typical Performance Characteristics

6,60

6,58

6,56

6,54

6,52

6,50

6,48

6,46

6,44

6,42

6,40

3,90

3,86

3,82

3,78

3,74

3,70

3,66

3,62

3,58

3,54

3,50

-25 -15 -5

5

15 25 35 45 55 65 75 85 95 105 115 125

-25 -15 -5

5

15 25 35 45 55 65 75 85 95 105 115 125

Junction Temperature [°C]

Figure 33

Reference Voltage V_REF

Figure 36

PWM-OP Gain A_V

120

118

116

114

112

110

108

106

104

102

100

1,10

1,05

1,00

0,95

0,90

0,85

0,80

0,75

0,70

0,65

0,60

-25 -15 -5

5

15 25 35 45 55 65 75 85 95 105 115 125

-25 -15 -5

5

15 25 35 45 55 65 75 85 95 105 115 125

Junction Temperature [°C]

Figure 34

Oscillator Frequency f_OSC1

Figure 37

Max. Level Voltage Ramp V_Max-Ramp

0,750

0,745

0,740

0,735

0,730

0,725

0,720

0,715

0,710

0,705

0,700

26

25

24

23

22

21

20

19

18

17

16

-25 -15 -5

5

15 25 35 45 55 65 75 85 95 105 115 125

-25 -15 -5

5

15 25 35 45 55 65 75 85 95 105 115 125

Junction Temperature [°C]

Figure 35

Max. Duty Cycle D_max

Figure 38

Feedback Pull-Up Resistor R_FB

Version 2.0

22

15 May 2003

F3

ICE3DS01L/LG

Typical Performance Characteristics

60

58

56

54

52

50

48

46

44

42

40

5,65

5,60

5,55

5,50

5,45

5,40

5,35

5,30

5,25

5,20

5,15

-25 -15 -5

5

15 25 35 45 55 65 75 85 95 105 115 125

-25 -15 -5

5

15 25 35 45 55 65 75 85 95 105 115 125

Junction Temperature [°C]

Figure 39

Soft-Start Pull-Up Resistor R_SoftS

Figure 42

Threshold Comparator C3 V_SoftSC3

4,20

4,16

4,12

4,08

4,04

4,00

3,96

3,92

3,88

3,84

3,80

1,360

1,352

1,344

1,336

1,328

1,320

1,312

1,304

1,296

1,288

1,280

-25 -15 -5

5

15 25 35 45 55 65 75 85 95 105 115 125

-25 -15 -5

5

15 25 35 45 55 65 75 85 95 105 115 125

Junction Temperature [°C]

Figure 40

Threshold Comparator C2 V_SoftSC2

Figure 43

Threshold Comparator C6 V_FBC6

4,60

4,56

4,52

4,48

4,44

4,40

4,36

4,32

4,28

4,24

4,20

4,16

4,12

4,08

4,04

4,00

3,96

3,92

3,88

3,84

3,80

-25 -15 -5

5

15 25 35 45 55 65 75 85 95 105 115 125

-25 -15 -5

5

15 25 35 45 55 65 75 85 95 105 115 125

Junction Temperature [°C]

Figure 41

Clamped SoftS Voltage V_SoftSclmp

Figure 44

Threshold Comparator C5 V_FBC5

Version 2.0

23

15 May 2003

F3

ICE3DS01L/LG

Typical Performance Characteristics

5,00

4,96

4,92

4,88

4,84

4,80

4,76

4,72

4,68

4,64

4,60

1,05

1,04

1,03

1,02

1,01

1,00

0,99

0,98

0,97

0,96

0,95

-25 -15 -5

5

15 25 35 45 55 65 75 85 95 105 115 125

-25 -15 -5

5

15 25 35 45 55 65 75 85 95 105 115 125

Junction Temperature [°C]

Peak Current Limitation V_csth

Junction Temperature [°C]

Figure 45

Threshold Comparator C4 V_FBC4

Figure 48

22,0

21,8

21,6

21,4

21,2

21,0

20,8

20,6

20,4

20,2

20,0

1,700

1,688

1,676

1,664

1,652

1,640

1,628

1,616

1,604

1,592

1,580

-25 -15 -5

5

15 25 35 45 55 65 75 85 95 105 115 125

-25 -15 -5

5

15 25 35 45 55 65 75 85 95 105 115 125

Junction Temperature [°C]

Figure 46

Overvoltage Detection Limit V_VCCOVP

Figure 49

Over Current Detection V_CS1

8,0

7,6

7,2

6,8

6,4

6,0

5,6

5,2

4,8

4,4

4,0

0,270

0,267

0,264

0,261

0,258

0,255

0,252

0,249

0,246

0,243

0,240

-25 -15 -5

5

15 25 35 45 55 65 75 85 95 105 115 125

-25 -15 -5

5

15 25 35 45 55 65 75 85 95 105 115 125

Junction Temperature [°C]

Figure 47

Threshold Power Down Reset V_VCCPD

Figure 50

Peak Current Limitation V_CS2

Version 2.0

24

15 May 2003

F3

ICE3DS01L/LG

Typical Performance Characteristics

400

370

340

310

280

250

220

190

160

130

100

12,0

11,7

11,4

11,1

10,8

10,5

10,2

9,9

9,6

9,3

9,0

-25 -15 -5

5

15 25 35 45 55 65 75 85 95 105 115 125

-25 -15 -5

5

15 25 35 45 55 65 75 85 95 105 115 125

Junction Temperature [°C]

Figure 51

Leading Edge Blanking t_LEB

Figure 54

GATE High Voltage V_GATEhigh

300

280

260

240

220

200

180

160

140

120

100

300

280

260

240

220

200

180

160

140

120

100

-25 -15 -5

5

15 25 35 45 55 65 75 85 95 105 115 125

-25 -15 -5

5

15 25 35 45 55 65 75 85 95 105 115 125

Junction Temperature [°C]

Figure 52

CS Spike Blanking for C11 t_CSspike

Figure 55

GATE Rise Time t_rise

1,3

1,2

1,1

1,0

0,9

0,8

0,7

0,6

0,5

0,4

0,3

80

76

72

68

64

60

56

52

48

44

40

-25 -15 -5

5

15 25 35 45 55 65 75 85 95 105 115 125

-25 -15 -5

5

15 25 35 45 55 65 75 85 95 105 115 125

Junction Temperature [°C]

Figure 53

GATE Low Voltage V_GATElow

Figure 56

GATE Fall Time t_fall

Version 2.0

25

15 May 2003

F3

ICE3DS01L/LG

Outline Dimension

6

Outline Dimension

P-DIP-8-6

(Plastic Dual In-Line Outline)

Figure 57

P-DSO-8-8

(Plastic Dual Small Outline)

Figure 58

Dimensions in mm

Version 2.0

26

15 May 2003

Total Quality Management

Qualität hat für uns eine umfassende

Bedeutung. Wir wollen allen Ihren

Ansprüchen in der bestmöglichen

Weise gerecht werden. Es geht uns also

nicht nur um die Produktqualität –

unsere Anstrengungen gelten

gleichermaßen der Lieferqualität und

Logistik, dem Service und Support

sowie allen sonstigen Beratungs- und

Betreuungsleistungen.

Quality takes on an allencompassing

significance at Semiconductor Group.

For us it means living up to each and

every one of your demands in the best

possible way. So we are not only

concerned with product quality. We

direct our efforts equally at quality of

supply and logistics, service and

support, as well as all the other ways in

which we advise and attend to you.

Dazu gehört eine bestimmte

Part of this is the very special attitude of

our staff. Total Quality in thought and

deed, towards co-workers, suppliers

and you, our customer. Our guideline is

“do everything with zero defects”, in an

open manner that is demonstrated

beyond your immediate workplace, and

to constantly improve.

Geisteshaltung unserer Mitarbeiter.

Total Quality im Denken und Handeln

gegenüber Kollegen, Lieferanten und

Ihnen, unserem Kunden. Unsere

Leitlinie ist jede Aufgabe mit „Null

Fehlern“ zu lösen – in offener

Sichtweise auch über den eigenen

Arbeitsplatz hinaus – und uns ständig

zu verbessern.

Throughout the corporation we also

think in terms of Time Optimized

Processes (top), greater speed on our

part to give you that decisive

competitive edge.

Unternehmensweit orientieren wir uns

dabei auch an „top“ (Time Optimized

Processes), um Ihnen durch größere

Schnelligkeit den entscheidenden

Wettbewerbsvorsprung zu verschaffen.

Give us the chance to prove the best of

performance through the best of quality

– you will be convinced.

Geben Sie uns die Chance, hohe

Leistung durch umfassende Qualität zu

beweisen.

Wir werden Sie überzeugen.

h t t p : / / w w w . i n f i n e o n . c o m

Published by Infineon Technologies AG


型号：	ICE3DS01LG
厂家：	Infineon
描述：	Off-Line SMPS Current Mode Controller with integrated 500V Startup Cell 离线式开关电源电流模式控制器，集成500V启动电池稳压器开关式稳压器或控制器电源电路电池开关式控制器光电二极管
文件：	总27页 (文件大小：614K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

ICE3DS01LG [INFINEON]

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