AUIRFU3607 [INFINEON]
Advanced Process Technology; 先进的工艺技术
| 型号： | AUIRFU3607 |
| 厂家： | 
Infineon |
| 描述： | Advanced Process Technology |
| 文件： | 总13页 (文件大小：248K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD - 96376
AUIRFR3607
AUIRFU3607
AUTOMOTIVE GRADE
Features
l
l
l
l
l
l
l
Advanced Process Technology
HEXFET® Power MOSFET
UltraLowOn-Resistance
175°COperatingTemperature
Fast Switching
D
VDSS
RDS(on) typ.
max.
ID (Silicon Limited)
ID (Package Limited)
75V
7.34m
Ω
Repetitive Avalanche Allowed up to Tjmax
Lead-Free,RoHSCompliant
Automotive Qualified *
9.0m
Ω
G
80A
S
56A
Description
Specifically designed for Automotive applications, this
HEXFET® Power MOSFET utilizes the latest processing
techniquestoachieveextremelylowon-resistancepersilicon
area. Additional features of this design are a 175°C junction
operating temperature, fast switching speed and improved
repetitive avalanche rating . These features combine to make
thisdesignanextremelyefficientandreliabledeviceforusein
Automotiveapplicationsandawidevarietyofotherapplications.
D
S
S
D
G
G
I-Pak
AUIRFU3607
D-Pak
AUIRFR3607
G
D
S
Gate
Drain
Source
Absolute Maximum Ratings
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are
stress ratings only; and functional operation of the device at these or any other condition beyond those indicated in the
specificationsisnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability.
The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Ambient
temperature (TA) is 25°C, unless otherwise specified.
Parameter
Max.
Units
ID @ TC = 25°C
80
56
Continuous Drain Current, VGS @ 10V (Silicon Limited)
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited)
A
ID @ TC = 25°C
IDM
Continuous Drain Current, VGS @ 10V (Package Limited)
Pulsed Drain Current
56
310
PD @TC = 25°C
W
140
Maximum Power Dissipation
0.96
± 20
120
Linear Derating Factor
W/°C
V
VGS
Gate-to-Source Voltage
Single Pulse Avalanche Energy
EAS (Thermally limited)
mJ
A
Avalanche Current
IAR
46
Repetitive Avalanche Energy
EAR
mJ
14
27
Peak Diode Recovery
dv/dt
TJ
V/ns
-55 to + 175
Operating Junction and
TSTG
°C
Storage Temperature Range
Soldering Temperature, for 10 seconds
300(1.6mm from case)
Thermal Resistance
Parameter
Typ.
Max.
1.045
50
Units
Rθ
–––
–––
–––
Junction-to-Case
Junction-to-Ambient
Junction-to-Ambient (PCB Mount)
JC
Rθ
°C/W
JA
RθJA
110
HEXFET® is a registered trademark of International Rectifier.
*Qualification standards can be found at http://www.irf.com/
www.irf.com
1
06/22/11
AUIRFR/U3607
Static Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Min. Typ. Max. Units
75 ––– –––
––– 0.096 ––– V/°C Reference to 25°C, ID = 5mA
Conditions
VGS = 0V, ID = 250μA
V(BR)DSS
V
V
/ T
(BR)DSS Δ
Δ
J
RDS(on)
––– 7.34 9.0
2.0 ––– 4.0
115 ––– –––
––– ––– 20
VGS = 10V, ID = 46A
VDS = VGS, ID = 100μA
VDS = 50V, ID = 46A
m
V
Ω
VGS(th)
gfs
IDSS
Forward Transconductance
S
Drain-to-Source Leakage Current
μA
V
V
V
V
DS = 75V, VGS = 0V
DS = 60V, VGS = 0V, TJ = 125°C
GS = 20V
––– ––– 250
––– ––– 100
––– ––– -100
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
nA
GS = -20V
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units
Total Gate Charge
Conditions
Qg
–––
–––
–––
–––
56
13
16
40
84
nC ID = 46A
DS = 38V
Qgs
Qgd
Qsync
Gate-to-Source Charge
–––
–––
–––
V
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Qg - Qgd)
VGS = 10V
ID = 46A, VDS =0V, VGS = 10V
RG(int)
td(on)
Internal Gate Resistance
Turn-On Delay Time
Rise Time
––– 0.55 –––
––– 16 –––
––– 110 –––
Ω
ns VDD = 49V
tr
ID = 46A
td(off)
tf
Turn-Off Delay Time
Fall Time
–––
–––
43
96
–––
–––
R = 6.8
Ω
G
VGS = 10V
Ciss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
––– 3070 –––
––– 280 –––
––– 130 –––
––– 380 –––
––– 610 –––
pF VGS = 0V
Coss
V
DS = 50V
ƒ = 1.0MHz
GS = 0V, VDS = 0V to 60V
Crss
Coss eff. (ER)
Coss eff. (TR)
V
Effective Output Capacitance (Energy Related)
Effective Output Capacitance (Time Related)
VGS = 0V, VDS = 0V to 60V
Diode Characteristics
Parameter
Min. Typ. Max. Units
Conditions
D
S
IS
Continuous Source Current
––– –––
A
MOSFET symbol
80
(Body Diode)
Pulsed Source Current
(Body Diode)
showing the
integral reverse
G
ISM
––– ––– 310
p-n junction diode.
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
––– –––
1.3
50
V
TJ = 25°C, IS = 46A, VGS = 0V
TJ = 25°C
TJ = 125°C
TJ = 25°C
TJ = 125°C
TJ = 25°C
VR = 64V,
IF = 46A
di/dt = 100A/μs
–––
–––
–––
–––
–––
33
39
32
47
1.9
ns
59
Qrr
Reverse Recovery Charge
48
nC
71
IRRM
ton
Reverse Recovery Current
Forward Turn-On Time
–––
A
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
ISD ≤ 46A, di/dt ≤ 1920A/μs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
ꢀ Pulse width ≤ 400μs; duty cycle ≤ 2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time
Calculated continuous current based on maximum allowable junction
temperature. Bond wire current limit is 56A. Note that current
limitations arising from heating of the device leads may occur with
as Coss while VDS is rising from 0 to 80% VDSS
Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS
.
some lead mounting arrangements.
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.12mH
RG = 25Ω, IAS = 46A, VGS =10V. Part not recommended for use
above this value.
.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recom-
mended footprint and soldering techniques refer to application note #AN-994.
Rθ is measured at TJ approximately 90°C.
2
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AUIRFR/U3607
Qualification Information†
Automotive
††
(per AEC-Q101)
Qualification Level
Comments: This part number(s) passed Automotive
qualification. IR’s Industrial and Consumer qualification
level is granted by extension of the higher Automotive level.
Moisture Sensitivity Level
MSL1
N/A
3L-D PAK
3L-I-PAK
Class M4(+/- 600V )†††
Machine Model
(per AEC-Q101-002)
Class H1C(+/- 2000V )†††
(per AEC-Q101-001)
Human Body Model
ESD
Class C4(+/- 1000V )†††
(per AEC-Q101-005)
Charged Device
Model
Yes
RoHS Compliant
†
Qualification standards can be found at International Rectifier’s web site: http//www.irf.com/
Exceptions to AEC-Q101 requirements are noted in the qualification report.
††
††† Highest passing voltage
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3
AUIRFR/U3607
1000
100
10
1000
VGS
15V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
4.5V
VGS
15V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
4.5V
TOP
TOP
100
10
1
BOTTOM
BOTTOM
4.5V
4.5V
60μs PULSE WIDTH
≤
60μs PULSE WIDTH
Tj = 25°C
≤
Tj = 175°C
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
DS
V
, Drain-to-Source Voltage (V)
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
100
10
3.0
2.5
2.0
1.5
1.0
0.5
I
= 80A
D
V
= 10V
GS
T
= 175°C
J
T
= 25°C
J
1
V
= 25V
DS
60μs PULSE WIDTH
≤
0.1
2
3
4
5
6
7
8
-60 -40 -20 0 20 40 60 80 100120140160180
, Junction Temperature (°C)
T
J
V
, Gate-to-Source Voltage (V)
GS
Fig 4. Normalized On-Resistance vs. Temperature
Fig 3. Typical Transfer Characteristics
12.0
100000
10000
1000
V
C
= 0V,
f = 1 MHZ
GS
I = 46A
D
= C + C , C SHORTED
iss
gs gd ds
C
= C
10.0
rss
gd
V
V
= 24V
= 15V
DS
DS
C
= C + C
ds gd
oss
8.0
6.0
4.0
2.0
0.0
C
C
iss
oss
C
rss
100
0
10
20
30
40
50
60
1
10
, Drain-to-Source Voltage (V)
100
Q
, Total Gate Charge (nC)
V
DS
G
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
4
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AUIRFR/U3607
1000
100
10
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R
(on)
DS
100μsec
T
= 175°C
J
1msec
T
= 25°C
J
10msec
1
Tc = 25°C
Tj = 175°C
Single Pulse
V
= 0V
DC
GS
1
0.1
1
10
100
0.0
0.5
1.0
1.5
2.0
V
, Drain-to-Source Voltage (V)
V
, Source-to-Drain Voltage (V)
DS
SD
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode Forward Voltage
100
95
90
85
80
75
70
80
Id = 5mA
70
60
50
40
30
20
10
0
Limited By Package
-60 -40 -20 0 20 40 60 80 100120140160180
25
50
75
100
125
150
175
T
, Temperature ( °C )
T
, Case Temperature (°C)
J
C
Fig 10. Drain-to-Source Breakdown Voltage
Fig 9. Maximum Drain Current vs. Case Temperature
1.20
500
I
D
450
400
350
300
250
200
150
100
50
TOP
5.6A
11A
BOTTOM 46A
1.00
0.80
0.60
0.40
0.20
0.00
0
-10
0
10 20 30 40 50 60 70 80
Drain-to-Source Voltage (V)
25
50
75
100
125
150
175
Starting T , Junction Temperature (°C)
J
V
DS,
Fig 12. Maximum Avalanche Energy vs. DrainCurrent
Fig 11. Typical COSS Stored Energy
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5
AUIRFR/U3607
10.00
1.00
D = 0.50
0.20
0.10
0.05
R1
R1
R2
R2
R3
R3
R4
R4
Ri (°C/W) τi (sec)
0.10
0.01
0.00
0.01109
0.26925
0.49731
0.26766
0.000003
0.000130
0.001301
0.008693
τ
τ
J τJ
τ
Cτ
1τ1
Ci= τi/Ri
τ
0.02
0.01
τ
τ
2 τ2
3τ3
4τ4
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
1E-006
1E-005
0.0001
0.001
0.01
0.1
t
, Rectangular Pulse Duration (sec)
1
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
Duty Cycle = Single Pulse
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming Tj = 150°C and
Tstart =25°C (Single Pulse)
Δ
100
10
1
0.01
0.05
0.10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
Tstart = 150°C.
j = 25°C and
ΔΤ
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14. Typical Avalanche Current vs.Pulsewidth
150
125
100
75
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 22a, 22b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
TOP
BOTTOM 1.0% Duty Cycle
= 46A
Single Pulse
I
D
6. Iav = Allowable avalanche current.
7. ΔT = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
50
tav = Average time in avalanche.
25
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
0
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
25
50
75
100
125
150
175
Iav = 2DT/ [1.3·BV·Zth]
Starting T , Junction Temperature (°C)
EAS (AR) = PD (ave)·tav
J
Fig 15. Maximum Avalanche Energy vs. Temperature
6
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AUIRFR/U3607
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
20
15
10
5
I = 31A
F
V
= 64V
R
T = 25°C
J
T = 125°C
J
I
I
I
I
= 100μA
= 250μA
= 1.0mA
= 1.0A
D
D
D
D
0
-75 -50 -25
0
25 50 75 100125 150175 200
, Temperature ( °C )
0
200
400
600
800
1000
T
di /dt (A/μs)
J
F
Fig. 17 - Typical Recovery Current vs. dif/dt
Fig 16. Threshold Voltage vs. Temperature
560
20
I = 46A
I = 31A
F
F
480
400
320
240
160
80
V
= 64V
V
= 64V
R
R
T = 25°C
T = 25°C
J
J
15
10
5
T = 125°C
J
T = 125°C
J
0
0
0
200
400
600
800
1000
0
200
400
600
800
1000
di /dt (A/μs)
di /dt (A/μs)
F
F
Fig. 18 - Typical Recovery Current vs. dif/dt
Fig. 19 - Typical Stored Charge vs. dif/dt
560
I = 46A
F
V
480
400
320
240
160
80
= 64V
R
T = 25°C
J
T = 125°C
J
0
0
200
400
600
800
1000
di /dt (A/μs)
F
Fig. 20 - Typical Stored Charge vs. dif/dt
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7
AUIRFR/U3607
Driver Gate Drive
P.W.
P.W.
Period
D.U.T
Period
D =
+
*
=10V
V
GS
CircuitLayoutConsiderations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D.U.T. I Waveform
SD
+
-
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
-
+
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
VDD
Re-Applied
Voltage
• dv/dtcontrolledbyRG
RG
+
-
Body Diode
Forward Drop
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
InductorCurrent
I
SD
Ripple
≤ 5%
* VGS = 5V for Logic Level Devices
Fig 20. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V
(BR)DSS
15V
t
p
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
V
2
GS
Ω
0.01
t
p
I
AS
Fig 21b. Unclamped Inductive Waveforms
Fig 21a. Unclamped Inductive Test Circuit
LD
VDS
VDS
90%
+
-
VDD
10%
VGS
D.U.T
VGS
Pulse Width < 1μs
Duty Factor < 0.1%
td(on)
td(off)
tr
tf
Fig 22a. Switching Time Test Circuit
Fig 22b. Switching Time Waveforms
Id
Vds
Vgs
L
VCC
DUT
Vgs(th)
0
1K
Qgs1
Qgs2
Qgd
Qgodr
Fig 23a. Gate Charge Test Circuit
Fig 23b. Gate Charge Waveform
8
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AUIRFR/U3607
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
D-Pak (TO-252AA) Part Marking Information
PartNumber
AUFR3607
DateCode
Y= Year
WW= Work Week
A= Automotive, Lead Free
IRLogo
YWWA
XX or XX
LotCode
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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9
AUIRFR/U3607
I-Pak (TO-251AA) Package Outline ( Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA) Part Marking Information
PartNumber
AUFU3607
DateCode
Y= Year
WW= Work Week
A= Automotive, Lead Free
IRLogo
YWWA
XX or XX
LotCode
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
10
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AUIRFR/U3607
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRL
TRR
16.3 ( .641 )
15.7 ( .619 )
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
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11
AUIRFR/U3607
Ordering Information
Base part
Package Type
Standard Pack
Complete Part Number
Form
Quantity
AUIRFR3607
DPak
IPak
Tube
Tape and Reel
Tape and Reel Left
Tape and Reel Right
Tube
75
AUIRFR3607
AUIRFR3607TR
AUIRFR3607TRL
AUIRFR3607TRR
AUIRFU3607
2000
3000
3000
75
AUIRFU3607
12
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AUIRFR/U3607
IMPORTANTNOTICE
Unless specifically designated for the automotive market, International Rectifier Corporation and its subsidiaries (IR)
reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products
and services at any time and to discontinue any product or services without notice. Part numbers designated with the
“AU” prefix follow automotive industry and / or customer specific requirements with regards to product discontinuance
and process change notification. All products are sold subject to IR’s terms and conditions of sale supplied at the time
oforderacknowledgment.
IR warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with
IR’sstandardwarranty. TestingandotherqualitycontroltechniquesareusedtotheextentIRdeemsnecessarytosupport
this warranty. Except where mandated by government requirements, testing of all parameters of each product is not
necessarilyperformed.
IR assumes no liability for applications assistance or customer product design. Customers are responsible for their
products and applications using IR components. To minimize the risks with customer products and applications,
customers should provide adequate design and operating safeguards.
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applications, IR will not be responsible for any failure to meet such requirements.
For technical support, please contact IR’s Technical Assistance Center
http://www.irf.com/technical-info/
WORLDHEADQUARTERS:
101 N. Sepulveda Blvd., El Segundo, California 90245
Tel:(310)252-7105
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13
相关型号：
AUIRFU5505
Power Field-Effect Transistor, 18A I(D), 55V, 0.11ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, TO-251AA, ROHS COMPLIANT, PLASTIC, IPAK-3
INFINEON
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