2SK3154 [HITACHI]
Silicon N Channel MOS FET High Speed Power Switching; 硅N沟道MOS FET高速电源开关
| 型号： | 2SK3154 |
| 厂家： | 
HITACHI SEMICONDUCTOR |
| 描述： | Silicon N Channel MOS FET High Speed Power Switching |
| 文件： | 总9页 (文件大小：55K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
2SK3154
Silicon N Channel MOS FET
High Speed Power Switching
ADE-208-682A (Z)
2nd. Edition
February 1999
Features
•
Low on-resistance
RDS = 100 mΩ typ.
•
•
High speed switching
4 V gate drive device can be driven from 5 V source
Outline
TO–220AB
D
G
1. Gate
2. Drain(Flange)
3. Source
1
2
3
S
2SK3154
Absolute Maximum Ratings (Ta = 25°C)
Item
Symbol
VDSS
Ratings
Unit
V
Drain to source voltage
Gate to source voltage
Drain current
150
VGSS
ID
±20
V
15
A
Note1
Drain peak current
ID(pulse)
60
A
Body-drain diode reverse drain current IDR
15
A
Note3
Note3
Avalanche current
Avalanche energy
Channel dissipation
Channel temperature
Storage temperature
IAP
15
A
EAR
16
mJ
W
°C
°C
Pch Note2
50
Tch
150
Tstg
–55 to +150
Note: 1. PW ≤ 10 µs, duty cycle ≤ 1%
2. Value at Tc = 25°C
3. Value at Tch = 25°C, Rg ≥ 50 Ω
Electrical Characteristics (Ta = 25°C)
Item
Symbol Min
Typ
—
Max
—
Unit
V
Test Conditions
ID = 10 mA, VGS = 0
IG = ±100 µA, VDS = 0
VGS = ±16 V, VDS = 0
VDS = 150 V, VGS = 0
ID = 1mA, VDS = 10 V
ID = 8 A, VGS = 10 VNote4
ID = 8 A, VGS = 4 VNote4
ID = 8 A, VDS = 10 V Note4
VDS = 10 V
Drain to source breakdown voltage V(BR)DSS 150
Gate to source breakdown voltage V(BR)GSS ±20
—
—
V
Gate to source leak current
Zero gate voltege drain current
Gate to source cutoff voltage
Static drain to source on state
resistance
IGSS
—
—
1.0
—
—
8.5
—
—
—
—
—
—
—
—
—
—
±10
10
2.5
0.13
0.15
—
µA
µA
V
IDSS
—
VGS(off)
RDS(on)
RDS(on)
|yfs|
—
0.10
0.12
14
Ω
Ω
Forward transfer admittance
Input capacitance
S
Ciss
Coss
Crss
td(on)
tr
850
300
160
13
—
pF
pF
pF
ns
ns
ns
ns
V
Output capacitance
Reverse transfer capacitance
Turn-on delay time
—
VGS = 0
—
f = 1 MHz
—
ID = 8 A, VGS = 10 V
RL = 3.75 Ω
Rise time
100
195
110
0.9
140
—
Turn-off delay time
td(off)
tf
—
Fall time
—
Body–drain diode forward voltage VDF
—
IF = 15 A, VGS = 0
Body–drain diode reverse
recovery time
trr
—
ns
IF = 15 A, VGS = 0
diF/ dt = 50 A/ µs
Note: 4. Pulse test
2
2SK3154
Main Characteristics
Power vs. Temperature Derating
Maximum Safe Operation Area
500
80
60
40
20
200
100
50
20
10
5
2
1
Operation in
this area is
limited by R
0.5
DS(on)
0.2
0.1
Ta = 25°C
0.05
1000
100 300
0
10 30
0.1
1
3
50
100
150
200
0.3
Drain to Source Voltage
V
(V)
DS
Case Temperature Tc (°C)
Typical Output Characteristics
Typical Transfer Characteristics
20
16
12
8
20
16
12
8
5 V
4 V
10 V
V
= 10 V
DS
Pulse Test
Pulse Test
3.5 V
3 V
75°C
25°C
4
4
Tc = –25°C
V
= 2.5 V
8
GS
0
0
1
2
3
4
5
2
4
6
10
Gate to Source Voltage
V
(V)
GS
Drain to Source Voltage
V
(V)
DS
3
2SK3154
Drain to Source Saturation Voltage vs.
Gate to Source Voltage
Static Drain to Source on State Resistance
vs. Drain Current
1.0
5
Pulse Test
Pulse Test
0.5
4
3
2
1
0.2
0.1
V
GS
= 4 V
10 V
I
= 15 A
D
0.05
10 A
5 A
0.02
0.01
12
Gate to Source Voltage
0
4
8
16
20
1
3
10
30 100
(A)
0.1 0.3
V
(V)
Drain Current
I
D
GS
Forward Transfer Admittance vs.
Drain Current
Static Drain to Source on State Resistance
vs. Temperature
1000
0.5
Pulse Test
300
100
0.4
0.3
0.2
0.1
Tc = –25 °C
5 A
25 °C
I
= 10 A
D
30
1
75 °C
V
= 4 V
GS
10 A 5 A
0.3
0.1
V
= 10 V
DS
Pulse Test
10 V
0
–40
10 50 100
5
20
2
0.1
0.5
1
0.2
0
40
80
120
160
Case Temperature Tc (°C)
Drain Current
I
(A)
D
4
2SK3154
Body–Drain Diode Reverse
Recovery Time
Typical Capacitance vs.
Drain to Source Voltage
500
10000
di / dt = 50 A / µs
V
= 0, Ta = 25 °C
GS
3000
1000
200
100
50
Ciss
300
100
Coss
20
Crss
30
10
10
5
V
= 0
GS
f = 1 MHz
0.1 0.2
0.5
1
2
5
10 20
(A)
0
10
20
30
40
50
Reverse Drain Current
I
DR
Drain to Source Voltage
V
(V)
DS
Dynamic Input Characteristics
= 15A
Switching Characteristics
= 10 V, V = 30 V
1000
500
200
160
120
80
20
16
12
8
I
V
GS
DD
D
PW = 5 µs, duty < 1 %
V
GS
t
V
= 100 V
50 V
DD
d(off)
200
100
50
25 V
t
f
V
DS
t
r
20
10
5
t
d(on)
5
V
= 100 V
50 V
40
4
0
DD
25 V
0
20
2
0.5
1
10
20
40
60
80
100
0.1 0.2
Gate Charge Qg (nc)
Drain Current
I
(A)
D
5
2SK3154
Maximun Avalanche Energy vs.
Channel Temperature Derating
Reverse Drain Current vs.
Source to Drain Voltage
20
16
12
8
20
16
12
8
I
= 15 A
AP
V
= 50 V
DD
duty < 0.1 %
Ω
Rg > 50
10 V
5 V
V
= 0, –5 V
GS
4
4
0
Pulse Test
1.6 2.0
0
0.4
0.8
1.2
25
50
75
100
125
150
Source to Drain Voltage
V
(V)
Channel Temperature Tch (°C)
SD
Avalanche Test Circuit
Avalanche Waveform
V
DSS
– V
1
2
2
E
=
• L • I
•
AP
AR
V
DSS
DD
L
V
DS
Monitor
I
AP
Monitor
V
(BR)DSS
I
AP
Rg
V
V
DD
D. U. T
DS
I
D
Vin
15 V
50Ω
V
DD
0
6
2SK3154
Normalized Transient Thermal Impedance vs. Pulse Width
3
1
Tc = 25°C
D = 1
0.5
0.3
0.1
θ
θ
γ
θ
ch – c(t) = s (t) • ch – c
ch – c = 2.5 °C/W, Tc = 25 °C
PW
T
P
DM
D =
0.03
0.01
PW
T
10 µ
100 µ
1 m
10 m
100 m
1
10
Pulse Width PW (S)
Switching Time Test Circuit
Waveform
Vout
Monitor
Vin Monitor
D.U.T.
90%
R
L
10%
10%
90%
Vin
V
DD
Vin
10 V
Vout
10%
50Ω
= 30 V
90%
td(off)
td(on)
t
f
tr
7
2SK3154
Package Dimensions
Unit: mm
10.16±0.2
9.5
+ 0.1
– 0.08
4.44±0.2
f 3.6
8.0
1.26±0.15
1.2±0.1
1.27±0.1
1.5 max
0.5±0.1
0.76 ±0.1
2.54 ±0.5
2.7 max
2.54 ±0.5
TO–220AB
SC–46
—
Hitachi Code
EIAJ
JEDEC
8
Cautions
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received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,
contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as fail-
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Copyright ' Hitachi, Ltd., 1999. All rights reserved. Printed in Japan.
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