MB3778PFV-XXX [FUJITSU]
Dual Switching Controller, 0.075A, 500kHz Switching Freq-Max, BIPolar, PDSO16, 4.40 X 5 MM, 1.45 MM HEIGHT, 0.65 MM PITCH, PLASTIC, SSOP-16;型号: | MB3778PFV-XXX |
厂家: | FUJITSU |
描述: | Dual Switching Controller, 0.075A, 500kHz Switching Freq-Max, BIPolar, PDSO16, 4.40 X 5 MM, 1.45 MM HEIGHT, 0.65 MM PITCH, PLASTIC, SSOP-16 稳压器 开关 控制器 |
文件: | 总29页 (文件大小:267K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
FUJITSU SEMICONDUCTOR
DATA SHEET
DS04-27203-6E
ASSP
Switching Regulator Controller
MB3778
■ DESCRIPTION
The MB3778 is a dual switching regulator control IC. It has a two-channel basic circuit that controls PWM system
switching regulator power. Complete synchronization is achieved by using the same oscillator output wave.
This IC can accept any two of the following types of output voltage: step-down, step-up, or voltage inversion
(inverting voltage can be output to only one circuit). The MB3778’s low power consumption makes it ideal for use
in portable equipment.
■ FEATURES
• Wide input voltage range : 3.6 V to 18 V
• Low current consumption : 1.7 mA typ. operation, 10 µA max. stand-by
• Wide oscillation frequency range:1 kHz to 500 kHz
• Built-in timer latch short-circuit protection circuit
• Built-in under-voltage lockout circuit
• Built-in 2.46 V reference voltage circuit : 1.23 V output can be obtained from RT terminal
• Variable dead-time provides control over total range
• Built-in stand-by function: power on/off function
■ PACKAGES
16-pin, Plastic DIP
16-pin, Plastic SSOP
16-pin, Plastic SOP
v
(DIP-16P-M04)
(FPT-16P-M05)
(FPT-16P-M06)
MB3778
■ PIN ASSIGNMENT
(TOP VIEW)
CT
RT
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VREF
SCP
CTL
+IN1
−IN1
−IN2
FB2
FB1
DTC1
OUT1
E/GND
DTC2
OUT2
VCC
(DIP-16P-M04)
(FPT-16P-M05)
(FPT-16P-M06)
2
MB3778
■ PIN DESCRIPTION
No.
Pin
Function
Oscillator timing capacitor terminal (150 pF to 15,000 pF) .
Oscillator timing resistor terminal (5.1 kΩ to 100 kΩ) .
1
CT
2
RT
VREF × 1/2 voltage is also available at this pin for error amplifier reference input.
3
4
+IN1 Error amplifier 1 non-inverted input terminal.
−IN1 Error amplifier 1 inverted input terminal.
Error amplifier 1 output terminal.
5
6
7
FB1
A resistor and a capacitor are connected between this terminal and the −IN1 terminal to ad-
just gain and frequency.
OUT1 dead-time control terminal.
DTC1 Dead-time control is adjusted by an external resistive divider connected to the VREF pin.
A capacitor connected between this terminal and GND enables soft-start operation.
Open collector output terminal.
OUT1 Output transistor has common ground independent of signal ground.
This output can source or sink up to 50 mA.
8
9
E/GND Ground terminal.
VCC
Power supply terminal (3.6 to 18 V)
Open collector output terminal.
10
11
OUT2 Output transistor has common ground independent of signal ground.
This output can source or sink up to 50 mA.
Sets the dead-time of OUT2.
DTC2
The use of this terminal is the same as that of DTC1.
Error amplifier 2 output terminal.
Sets the gain and adjusts the frequency when a resistor and a capacitor are connected be-
12
FB2
tween this terminal and the −IN2 terminal.
Voltage of VREF × 1/2 voltage is internally connected to the non-inverted input of error amplifier
2. Uses error amplifier 2 for positive voltage output.
13
14
−IN2 Error amplifier 2 inverted input terminal.
Power control terminal.
The IC is set in the stand-by state when this terminal is set “Low.”
Current consumption is 10 µA or lower in the stand-by state.
CTL
The input can be driven by TTL or CMOS.
The time constant setting capacitor connection terminal of the timer latch short-circuit protec-
tion circuit.
15
16
SCP
Connects a capacitor between this pin and GND.
For details, see “How to set time constant for timer latch short-circuit protection circuit”.
2.46 V reference voltage output terminal which can be obtained up to 1 mA.
This pin is used to set the reference input and idle period of the error amplifiers.
VREF
3
MB3778
■ BLOCK DIAGRAM
9
14
1
2
1.23 V
2.46 V
1.9 V
1.3 V
Reference
16
Power
Supply
Control
Triangular
Oscillator
Voltage
OUT1
OUT2
7
−
+
+
2.46 V
Error Amp 1
PWM Comp1
PWM Comp2
S.C.P. Comp
+
−
−
+
+
3
4
−
−
10
+
5
2.1 V
12
Error Amp 2
−
13
15
2.46 V
+
1 µA
1.23 V
R S
R
Latch
U. V. L. O.
−
−
+
8
D.T.C. Comp.
1.1 V
6
11
4
MB3778
■ OPERATION DESCRIPTION
1. Reference voltage circuit
The reference voltage circuit generates a temperature-compensated reference voltage (=: 2.46 V) from VCC (pin
9) . The reference voltage is used as an operation power supply for internal circuit.
The reference is obtained from the VREF terminal (pin 16).
2. Triangular wave oscillator
Triangular waveforms can be generated at any frequency by connecting a timing capacitor and resistor to the
CT terminal (pin 1) and to the RT terminal (pin 2) .
The amplitude of this waveform is from 1.3 V to 1.9 V. These waveforms are connected to the non-inverting
inputs of the PWM comparator and can be output through the CT terminal.
3. Error amplifiers (Error Amp.)
The error amplifier detects the output voltage of the switching regulator and outputs PWM control signals.The
in-phase input voltage range is from 1.05 V to 1.45 V.The reference voltage obtained by dividing the reference
voltage output (recommended value : VREF/2) or the RT terminal voltage (1.23 V) is supplied to the non-inverting
input. The VREF/2 voltage is internally connected to non-inverting input of the other error amplifier.
Any loop gain can be chosen by connecting the feedback resistor and capacitor to the inverting input terminal
from the output terminal of the error amplifier.Stable phase compensation is possible.
4. Timer latch short circuit protection circuit
This circuit detects the output levels of each error amplifier. If the output level of one or both of the error amplifiers
is 2.1 V or higher, the timer circuit begins charging the externally connected protection enable-capacitor.
If the output level of the error amplifier does not drop below the normal voltage range before the capacitor voltage
reaches the transistor base-emitter voltage, VBE(=: 0.65 V), the latch circuit turns the output drive transistor off
and sets the idle period to 100%.
5. Under voltage lock-out circuit
The transition state at power-on or a momentary drops in supply voltage may cause the control IC to malfunction,
which may adversely affect or even destroy the system. The under voltage lockout circuit monitors VCC with
reference to the internal reference voltage and resets the latch circuit to turn the output drive transistor off. The
idle period is set to 100%. It also pulls the SCP terminal (pin 15) “Low”.
6. PWM comparator unit
Each PWM comparator has one inverting input and two non-inverting inputs. This voltage-to-pulse-width con-
verter controls the turning on time of the output pulse according to the input voltage.
The PWM comparator turns the output drive transistor on while triangular waveforms from the oscillator are
lower than the error amplifier output and the DTC terminal voltage.
7. Output drive transistor
The output drive transistors have open collector outputs with common source supply and common grounds
independent of VCC and signal ground. The output drive transistors for switching can sink or source up to 50 mA.
8. Power control unit
The power control terminal (pin 14) controls power on/off modes(the power supply current in stand-by mode is
10 µA or lower).
5
MB3778
■ ABSOLUTE MAXIMUM RATINGS (See NOTE)
(Ta = 25 °C)
Rating
Parameter
Symbol
Condition
Unit
Min.
Max.
20
Power Supply Voltage
Error Amp. Input Voltage
Control Input Voltage
VCC
VIN
V
V
−0.3
−0.3
+10
+20
20
VCTL
VOUT
IOUT
V
Collector Output Voltage
Collector Output Current
V
75
mA
mW
mW
mW
°C
°C
Ta ≤ +25 °C (SOP)
Ta ≤ +25 °C (SSOP)
Ta ≤ +25 °C (DIP)
620*1
444*2
1000
+85
+125
Power Dissipation
PD
Operating Temperature
Storage Temperature
Top
−30
−55
Tstg
*1: The packages are mounted on the epoxy board (4 cm × 4 cm)
*2: The packages are mounted on the epoxy board (10 cm × 10 cm)
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
■ RECOMMENDED OPERATING CONDITIONS
Value
Parameter
Symbol
Unit
Min.
3.6
1.05
0
Typ.
Max.
18
Power Supply Voltage
Error Amp. Input Voltage
Control Input Voltage
Collector Output Voltage
Collector Output Current
Timing Capacitor
VCC
VIN
6.0
V
V
1.45
18
VCTL
VOUT
IOUT
CT
V
18
V
0.3
150
5.1
1
50
mA
pF
kΩ
kHz
°C
15000
100
500
85
Timing Resistor
RT
Oscillator Frequency
Operating Temperature
fOSC
Top
−30
25
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
FUJITSU representatives beforehand.
6
MB3778
■ ELECTRICAL CHARACTERISTICS
(Ta = 25 °C, VCC = 6 V)
Value
Parameter
Reference Block
Symbol
Condition
Unit
Min.
Typ.
Max.
Output Voltage
VREF
VRTC
Line
Load
IOS
IOR = −1 mA
2.41
2.46
±0.2
2
2.51
2
V
Output Temp. Stability
Input Stability
Ta = −30 °C to +85 °C
VCC = 3.6 V to 18 V
IOR = −0.1 mA to −1 mA
VREF = 2 V
−2
%
10
7.5
−3
mV
mV
mA
Load Stability
1
Short Circuit Output Current
−30
−10
Under Voltage Lockout Protection Block
VtH
IOR = −0.1 mA
IOR = −0.1 mA
IOR = −0.1 mA
2.72
2.60
120
1.9
V
V
Threshold Voltage
VtL
Hysteresis Width
VHYS
VR
80
mV
V
Reset Voltage (VCC)
1.5
Protection Circuit Block (S.C.P.)
Input Thresold Voltage
Input Stand by Voltage
Input Latch Voltage
VtPC
VSTB
VIN
0.60
−1.4
160
−4
0.65
50
0.70
100
100
−0.6
V
No pull up
No pull up
mV
mV
µA
V
50
Input Source Current
Ibpc
−1.0
2.1
Comparator Threshold Voltage
Triangular Waveform Oscillator Block
Oscillator Frequency
VtC
Pin 5, Pin 12
fOSC
fdev
fdV
CT = 330 pF, RT = 15 kΩ
CT = 330 pF, RT = 15 kΩ
VCC = 3.6 V to 18 V
200
±5
240
kHz
%
Frequency Deviation
Frequency Stability (VCC)
Frequency Stability (Ta)
Dead-Time Control Block (D.T.C.)
Input Bias Current
±1
%
fdT
Ta = −30 °C to +85 °C
+4
1
%
Ibdt
Idt
0.2
µA
µA
V
Latch Mode Sink Current
Latch Input Voltage
Vdt = 2.5 V
150
500
Vdt
Idt = 100 µA
0.3
7
MB3778
■ ELECTRICAL CHARACTERISTICS (Continued)
(Ta = 25 °C, VCC = 6 V)
Value
Parameter
Error Amp. Block
Symbol
Condition
Unit
Min.
Typ.
Max.
Input Offset Voltage
Input Offset Current
Input Bias Current
VIO
IIO
IB
VO = 1.6 V
−6
6
mV
nA
nA
VO = 1.6 V
VO = 1.6 V
−100
−500
100
−100
Common Mode Input Voltage
Range
VICR
VCC = 3.6 V to 18 V
1.05
70
1.45
V
Voltage Gain
AV
BW
RNF = 200 kΩ
AV = 0 dB
80
1.0
80
dB
MHz
dB
Frequency Band Width
Common Mode Rejection Ratio
CMRR
60
VREF
− 0.3
VOM+
V
Max. Output Voltage Width
VOM−
IOM+
IOM−
0.7
1.0
−60
0.9
V
Output Sink Current
VO = 1.6
VO = 1.6
mA
µA
Output Source Current
PWM Comparator Block
Vt100
Vt0
Duty Cycle = 100%
Duty Cycle = 0%
1.9
1.3
65
2.25
75
V
V
Input Threshold Voltage
(fOSC = 10 kHz)
1.05
55
On duty Cycle
Dtr
Vdt = VREF/1.45
%
Input Sink Current
Input Source Current
Control Block
IIN+
IIN−
Pin 5, Pin 12 = 1.6 V
Pin 5, Pin 12 = 1.6 V
1.0
−60
mA
µA
Input Off Condition
Input On Condition
Control Terminal Current
Output Block
VOFF
VON
ICTL
0.7
V
V
2.1
VCTL = 10 V
200
1.1
400
µA
Output Leak Current
Output Saturation Voltage
All Device Block
Stand-by Current
Leak
VO = 18 V
10
µA
VSAT
IO = 50 mA
1.4
V
ICCS
VCTL = 0 V
10
µA
VCTL = VCC, No Output
Load
Average Supply Current
ICCa
1.7
2.4
mA
8
MB3778
■ TEST CIRCUIT
VCC = 6 V
CTL
INPUT
TEST
SW
4.7 kΩ
CPE
OUTPUT 1
OUTPUT 2
4.7 kΩ
16 15 14 13 12 11 10
MB3778
9
8
1
2
3
4
5
6
7
330 pF
15 kΩ
TEST
INPUT
■ TIMING CHART (Internal Waveform)
Triangular waveform oscillator output
Short circuit protection
comparator Reference
input
Dead Time, PWM input
voltage
2.1 V
1.9 V
1.6 V
1.3 V
Error Amp. output
"High"
"Low"
"High"
"Low"
0.65 V
0.05 V
"High"
"Low"
PWM comparator
output
DEAD TIME 100%
Output Transistor
collector waveform
S.C.P. Terminal
waveform
tPE
Short circuit protection
comparator output
Power “ON”
Power “OFF”
2.1 V
Control Terminal
voltage
(VCTL : Min. Value)
0 V
Power supply voltage
3.6 V
(VCC : Min. Value)
Protection Enable Time tPE 0.6 × 106 × CPE (µs)
0 V
9
MB3778
■ APPLICATION CIRCUIT
• Chopper Type Step Down/inverting
VIN (10 V)
CTL
820 pF
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
8.2 kΩ
0.1 µF
56 µH
1.8 kΩ
4.7 kΩ
1.8 kΩ
150
kΩ
4.7 kΩ
MB3778
150
kΩ
0.033
0.033
µF
µF
220 µF
10 kΩ
4.7 kΩ
−
+
10 kΩ
−
+
+
−
1 µF
1 µF
5.6 kΩ
2.4 kΩ
330 Ω
330 Ω
330 Ω
330 Ω
120 µH
120 µH
−
+
−
+
9.1 kΩ
220 µF
220 µF
−
+
VO
( 5 V)
VO
−5 V)
GND
(
10
MB3778
• Chopper Type Step Up/Inverting
VIN (5 V)
CTL
820 pF
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
8.2 kΩ
0.1 µF
56 µH
1.8 kΩ
4.7 kΩ
1.8 kΩ
150
kΩ
4.7 kΩ
MB3778
150
kΩ
0.033
0.033
µF
µF
220 µF
10 kΩ
4.7 kΩ
−
+
10 kΩ
−
+
+
−
1 µF
1 µF
16 kΩ
4.7 kΩ
330 Ω
3.9 kΩ
100 Ω
330 Ω
120 µH
120 µH
220 µF
220 µF
−
+
+
−
9.1 kΩ
+
−
VO
VO
GND
(
5 V)
(
−5 V)
11
MB3778
• Multi Output Type (Apply Transformer)
VIN (10 V)
CTL
820 pF
1
2
3
4
5
6
7
8
16
0.1 µF
8.2 kΩ
15
14
13
12
11
10
9
56 µH
1.8 kΩ
MB3778
220 µF
150
kΩ
0.033
µF
−
+
10 kΩ
1.8 kΩ
220 Ω
4.7 kΩ
1000 pF
5.6 kΩ
−
+
− +
−
+
− +
220 µF
220 µF
220 µF
220 µF
+
+
−
−
VO1
( −5 V)
VO1
VO2
VO2
GND
(
12 V)
(
5 V)
(
−12 V)
12
MB3778
■ HOW TO SET THE OUTPUT VOLTAGE
The output voltage is set using the connections shown in “Connection of error Amp. Output Voltage V0 ≥ 0” and
“Connection of Error Amp. Output Voltage V0 < 0”.
The error amplifier power is supplied by the reference voltage circuit as is that of the other internal circuits. The
common mode input voltage range is from 1.05 V to 1.45 V.
Set 1.23 V (VREF/2) as the reference input voltage that is connected to either inverting or non-inverting input
terminals.
• Connection of Error Amp. Output Voltage V0 ≥ 0
VREF
+
VO
VREF
R
R
R1
+
VO
(R1 + R2)
=
2 × R2
+
−
PIN 5 or PIN 12
R2
RNF
• Connection of Error Amp. Output Voltage V0 < 0
VREF
VREF
−
VO
(R1 + R2) + VREF
= −
2 × R1
R
R
R1
+
−
PIN 5
R2
RNF
−
VO
13
MB3778
■ HOW TO SET TIME CONSTANT FOR TIMER LATCH SHORT-CIRCUIT
PROTECTION CIRCUIT
Below Figure shows the configuration of the protection latch circuit.
Each error amplifier output is connected to the inverting inputs of the short-circuit protection comparator and is
always compared with the reference voltage (2.1 V) connected to the non-inverting input.
When the load condition of the switching regulator is stable, the error amplifier has no output fluctuation. Thus,
short-circuitprotectioncontrolisalsokeptinbalance, andtheSCPterminal(pin15)voltageisheldatabout50mV.
If the load changes drastically due to a load short-circuit and if the inverting inputs of the short-circuit protection
comparator go above 2.1 V, the short-circuit protection comparator output goes “Low” to turn off transistor Q1.
The SCP terminal voltage is discharged, and then the short-circuit protection comparator charges the protection
enable capacitor CPE according to the following formula :
VPE = 50 mV + tPE × 10 − 6 / CPE
0.65 = 50 mV + tPE × 10− 6 / CPE
CPE = tPE / 0.6 (µF)
When the protection enable capacitor is charged to about 0.65 V, the protection latch is set to enable the under
voltage lockout circuit and the output drive transistor is turned off. The idle period is also set to 100% at the
same time.
Once the under voltage lockout circuit is enabled, the protection enable is released; however, the protection
latch is not reset if the power is not turned off.
The inverting inputs (pin 6 or 11) of the D.T.C. comparator are compared to the reference voltage (about 1.1 V)
connected to the non-inverting input.
To prevent malfunction of the short-circuit protection-circuit when the soft-start operation is done by using the
DTC terminal, the D.T.C. comparator outputs a “High” level while the DTC terminal goes up to about 1.1 V, and
then closes the SCP terminal by turning transistor Q2 on.
• Protection Latch Circuit
2.46 V
1 µA
S.C.P. Comp.
15
R1
Error Amp. 1
Error Amp. 2
−
−
+
S
Latch
R
CPE
U.V.L.O.
Q1
Q2
Q3
2.1 V
−
−
+
6
DTC1
DTC2
11
1.1 V
D.T.C. Comp.
14
MB3778
■ SETTING THE IDLE PERIOD
When voltage step-up, fly-back step-up or inverted output are set, the voltage at the FB terminal may go higher
than the triangular wave voltage due to load fluctuation, etc. In this case the output transistor will be in full-on
state(ON duty 100%). This can be prevented by setting the maximum duty for the output transistor. This is done
by setting the DTC1 terminal (pin 6) voltage using resistance division of the VREF voltage as illustrated below.
When the DTC1 terminal voltage is higher than the triangular waveform voltage, the output transistor is turned
on. If the triangular waveform amplitude specified by the maximum duty calculation formula is 0.6 V, and the
lower voltage limit of the triangular waveform is 1.3 V, the formula would be as follows (other channels are similar) :
Duty (ON) max (%) =: (Vdt − 1.3 V) / 0.6 V × 100, Vdt (V) = Rb / (Ra + Rb) × VREF
Also, if no output duty setting is required, the voltage should be set greater than the upper limit voltage of the
triangular waveform, which is 1.9 V.
• Setting the idle time at DTC1 (DTC2 is similar)
16
6
VREF
Ra
Rb
DTC1
Vdt
15
MB3778
■ SETTING THE SOFT START TIME
When power is switched on, the current begins charging the capacitor (CDTC1) connected the DTC1 terminal (pin
6). The soft start process operates by comparing the soft start setting voltage, which is proportional to the DTC1
terminal voltage, with the triangular waveform, and varying the ON-duty of the OUT terminal (pin 7).
The soft start time until the ON duty reaches 50% is determined by the following equation:
Soft start time (time until output ON duty = 50%) .
ts (s) =: − CDTC1 × Ra × Rb / (Ra + Rb) × ln (1 − 1.6 (Ra + Rb) / (2.46 Rb) )
For example, if Ra = 4.7 kΩ and Rb = 10 kΩ, the result is:
ts (s) =: 0.1 × CDTC1 (µF)
• Soft Start on DCT1 terminal (DTC2 is similar)
16
6
VREF
Ra
Rb
DTC1
CDTC1
16
MB3778
■ USING THE RT TERMINAL
The triangular waves, as shown in Figure “No VREF/2 connection to external circuits from RT terminal”, act to set
the oscillator frequency by charging and discharging the capacitor connected to the CT terminal using the current
value of the resistor connected to the RT terminal.
In addition, when voltage level VREF/2 is output to external circuits from the RT terminal, care must be taken in
making the external circuit connections to adjust for the fact that I1 is increased by the value of the current I2 to
the external circuits in determining the oscillator frequency (see Figure “VREF/2 connection to external circuits
from RT terminal”).
• No VREF/2 connection to external circuits from RT terminal
Triangular wave
ICT = IRT
oscillator
VREF
=
2RT
VREF
2
(
)
2
1
IRT
RT
ICT
CT
• VREF/2 connection to external circuits from RT terminal
Triangular wave
oscillator
ICT = IRT
= I1 + I2
VREF
2RT
=
+ I2
VREF
2
(
)
2
1
IRT
I1
ICT
To external circuits
I2
RT
CT
17
MB3778
■ SYNCHRONIZATION OF ICs
A fixed condenser and resistor are inserted in the CT and RT terminals of IC which becomes a master when
synchronizing by using plurality of MB3778. As a result, the slave ICs oscillate automatically. The RT terminals
(pin 2) of the slave ICs are connected to the VREF terminal (pin 16) to disable the charge/discharge circuit for
triangular wave oscillation. The CT terminals of the master and slave ICs are connected together.
• Connection of Master, Slave
VCC
MB3778
(MASTER)
CT
RT
MB3778
(SLAVE)
MB3778
(SLAVE)
18
MB3778
■ TYPICAL CHARACTERISTICS
Power supply voltage vs.
Reference voltage
Power supply voltage vs.
Average supply current
Ta = +25 °C
Ta = +25 °C
2.0
1.0
0
5.0
2.5
0
0
4
8
12
16
20
0
4
8
12
16
20
Power supply voltage VCC (V)
Power supply voltage VCC (V)
Reference voltage vs. Temperature
2.47
Timing capacitor vs.
Triangular waveform Upper/Lower Limit voltage
VCC = VCTL = 6 V
IOR = −1 mA
2.46
2.45
2.44
2.43
2.42
2.41
2.40
2.2
2.0
Upper limit
1.8
1.6
1.4
1.2
VCC = 6 V
RT = 15 kΩ
Lower limit
1.0
Ta = +25 °C
0.8
102
103
104
−40 −20
0
20
40
60
80
100
Timing capacitor CT (pF)
Temperature Ta (°C)
Collector saturation voltage vs.
Sink Current
Error Amp. Max. output voltage vs.
Frequency
5.0
4.0
3.0
2.0
1.0
0
3.0
2.0
VCC = 6 V
Ta = +25 °C
VCC = 6 V
Ta = +25 °C
1.0
0
100
500 1 k
5 k 10 k
50 k 100 k
500 k
Frequency (Hz)
0
100
200
300
400
500
Sink current (mA)
19
MB3778
(Continued)
Timing resistor vs. Oscillation
Triangular waveform cycle vs. Timing ca-
pacitor
frequency
VCC = 6 V
Ta = +25 °C
100
10
VCC = 6 V
RT = 15 kΩ
Ta = +25 °C
1 M
100 k
10 k
1 k
CT = 150 pF
1
CT = 1500 pF
102
103
104
105
Timing capacitor CT (pF)
CT = 15000 pF
1 k
5 k 10 k
50 k100 k
500 k
Timing resistor RT (Ω)
Temperature vs. Frequency stability
Oscillation frequency vs. Duty
10
100
80
60
40
20
0
VCC = 6 V
CT = 330 pF
RT = 15 kΩ
VCC = 6 V
CT = 330 pF
RT = 15 kΩ
Ta = +25 °C
0
−10
−40 −20
0
20
40
60
80 100 120
5 k 10 k
50 k 100 k
Oscillation frequency (Hz)
500 k 1 M
Temperature Ta (°C)
Control voltage vs. Reference voltage
Control input current
VCC = 6 V
Ta = +25 °C
VCC = 6 V
Ta = +25 °C
5.0
500
2.5
250
0
0
0
1
2
3
4
5
0
4
8
12
16
20
Control voltage VCTL (V)
Control voltage ICTL (V)
20
MB3778
(Continued)
Frequency vs. Gain/Phase
Frequency vs. Gain/Phase
(Actual Data)
CNF = OPEN
AV
CNF = 0.047 µF
40
20
180
90
40
20
180
90
AV
0
0
0
0
φ
φ
−20
−90
−180
−20
−40
−90
−180
−40
10
100
1 k
10 k
100 k
1 M
10
100
1 k
10 k
100 k
1 M
Frequency f (Hz)
Frequency f (Hz)
Frequency vs. Gain/Phase
(Actual Data)
Frequency vs. Gain/Phase
(Actual Data)
CNF = 4700 pF
CNF = 470 pF
40
180
90
40
20
180
AV
20
0
90
AV
0
0
0
φ
−20
−40
−90
−180
−20
−90
−180
φ
−40
10
100
1 k
10 k
100 k
1 M
10
100
1 k
10 k
100 k
1 M
Frequency f (Hz)
Frequency f (Hz)
Actual Circuit
VREF
VREF
CNF
4.7 kΩ
240 kΩ
4.7 kΩ
−
+
OUT
10 µF
−
+
IN
Error Amp.
4.7 kΩ
4.7 kΩ
21
MB3778
(Continued)
Power Dissipation vs. Ambient Tem-
perature (SOP)
Power Dissipation vs. Ambient Tem-
perature (SSOP)
500
700
620
600
444
400
500
400
300
200
100
0
300
200
100
0
−40
−20
0
20
40
60
80
100
−40
−20
0
20
40
60
80
100
Ambient temperature Ta (°C)
Ambient temperature Ta (°C)
Power Dissipation vs. Ambient Tem-
perature (DIP)
1100
1000
900
800
700
600
500
400
300
200
100
0
−40
−20
0
20
40
60
80
100
Ambient temperature Ta (°C)
22
MB3778
■ APPLICATION
1. Equivalent series resistor and stability of smoothing capacitor
The equivalent series resistor (ESR) of the smoothing capacitor in the DC/DC converter greatly affects the loop
phase characteristic.
The stability of the system is improved so that the phase characteristic may advance the phase to the ideal
capacitor by ESR in the high frequency region (see “Gain vs. Frequency” and “Phase vs. Frequency”).
A smoothing capacitor with a low ESR reduces system stability. Use care when using low ESR electrolytic
capacitors (OS CONTM) and tantalum capacitors.
Note: OS CON is the trademark of Sanyo Electnic Co., Ltd.
DC/DC Converter Basic Circuit
L
Tr
RC
VIN
D
RL
C
Gain vs. Frequency
Phase vs. Frequency
0
20
0
(2)
(1)
−90
−20
−40
−60
(2)
(1) : RC = 0 Ω
(2) : RC = 31 mΩ
(1) : RC = 0 Ω
(2) : RC = 31 mΩ
(1)
−180
10
100
1 k
Frequency f (Hz)
10 k
100 k
10
100
1 k
Frequency f (Hz)
10 k
100 k
23
MB3778
Reference data
If an aluminum electrolytic smoothing capacitor (RC 1.0 Ω) is replaced with a low ESR electrolytic capacitor(OS
CONTM : RC 0.2 Ω), the phase margin is reduced by half(see Fig. 37 and 38).
DC/DC Converter AV vs. φ characteristic Test Circuit
VOUT
+
VO
CNF
AV vs. φ characteristic
Between these points
−IN
+IN
−
+
VIN
FB
R2
R1
VREF/2
Error Amp.
DC/DC Converter +5 V output Gain vs. Phase
60
40
VCC = 10 V
RL = 25 Ω
CP = 0.1 µF
180
AV
+
VO
φ
20
90
AI Capacitor
220 µF (16 V)
RC 1.0 Ω : fOSC = 1 kHz
+
−
62 °
0
0
−20
−40
−90
GND
−180
100 k
10
100
1 k
10 k
Figure 38 DC/DC Converter +5 V output Gain vs. Phase
60
40
VCC = 10 V
RL = 25 Ω
CP = 0.1 µF
AV
180
90
+
VO
20
OS CONTM
22 µF (16 V)
RC 0.2 Ω : fOSC = 1 kHz
+
−
φ
0
0
27 °
−20
−40
−90
−180
GND
10
100
1 k
10 k
100 k
Frequency f (Hz)
24
MB3778
■ ORDERING INFORMATION
Part number
Package
Remarks
16-pin Plastic DIP
(DIP-16P-M04)
MB3778P
16-pin Plastic SSOP
(FPT-16P-M05)
MB3778PFV
MB3778PF
16-pin Plastic SOP
(FPT-16P-M06)
25
MB3778
■ PACKAGES DIMENSION
16-pin, Plastic DIP
(DIP-16P-M04)
+0.20
–0.30
.770–+..001028
19.55
INDEX-1
INDEX-2
6.20±0.25
(.244±.010)
0.51(.020)MIN
4.36(.172)MAX
0.25±0.05
(.010±.002)
3.00(.118)MIN
0.46±0.08
(.018±.003)
+0.30
–0
.039+–0.012
+0.30
1.52
–0
.060+–0.012
15°MAX
0.99
7.62(.300)
TYP
1.27(.050)
MAX
2.54(.100)
TYP
C
1994 FUJITSU LIMITED D16033S-2C-3
Dimensions in mm (inches) .
(Continued)
26
MB3778
(Continued)
16-pin, Plastic SSOP
(FPT-16P-M05)
*
5.00±0.10(.197±.004)
0.17±0.03
(.007±.001)
16
9
*
4.40±0.10 6.40±0.20
(.173±.004) (.252±.008)
INDEX
Details of "A" part
1.25 –+00..1200
.049 –+..000048
(Mounting height)
1
8
LEAD No.
"A"
0.65(.026)
0.24±0.08
(.009±.003)
M
0.13(.005)
0~8°
0.10±0.10
(.004±.004)
(Stand off)
0.50±0.20
(.020±.008)
0.25(.010)
0.45/0.75
(.018/.030)
0.10(.004)
C
1999 FUJITSU LIMITED F16013S-3C-5
Dimensions in mm (inches) .
(Continued)
27
MB3778
(Continued)
16-pin, Plastic SOP
(FPT-16P-M06)
2.25(.089)MAX
10.15+–00..2205 .400–.008
+.010
0.05(.002)MIN
(STAND OFF)
+0.40
INDEX
6.80–0.20
5.30±0.30
7.80±0.40
+.016
(.209±.012) (.307±.016)
.268–.008
"B"
+0.05
1.27(.050)
TYP
0.45±0.10
(.018±.004)
0.15–0.02
0.50±0.20
(.020±.008)
M
Ø0.13(.005)
+.002
.006–.001
Details of "A" part
Details of "B" part
0.40(.016)
0.20(.008)
0.15(.006)
0.20(.008)
"A"
0.10(.004)
0.18(.007)MAX
0.68(.027)MAX
0.18(.007)MAX
0.68(.027)MAX
8.89(.350)REF
C
1994 FUJITSU LIMITED F16015S-2C-4
Dimensions in mm (inches) .
28
MB3778
FUJITSU LIMITED
For further information please contact:
Japan
All Rights Reserved.
FUJITSU LIMITED
Corporate Global Business Support Division
Electronic Devices
The contents of this document are subject to change without notice.
Customers are advised to consult with FUJITSU sales
representatives before ordering.
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Nishishinjuku 2-chome, Shinjuku-ku,
Tokyo 163-0721, Japan
Tel: +81-3-5322-3347
Fax: +81-3-5322-3386
The information and circuit diagrams in this document are
presented as examples of semiconductor device applications, and
are not intended to be incorporated in devices for actual use. Also,
FUJITSU is unable to assume responsibility for infringement of
any patent rights or other rights of third parties arising from the use
of this information or circuit diagrams.
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Customers considering the use of our products in special
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are requested to consult with FUJITSU sales representatives before
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FUJITSU MICROELECTRONICS ASIA PTE. LTD.
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New Tech Park,
Any semiconductor devices have inherently a certain rate of failure.
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by incorporating safety design measures into your facility and
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over-current levels and other abnormal operating conditions.
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If any products described in this document represent goods or
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prior authorization by Japanese government should be required for
export of those products from Japan.
Korea
FUJITSU MICROELECTRONICS KOREA LTD.
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F0012
FUJITSU LIMITED Printed in Japan
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