MB3778PFV-XXXE1 [FUJITSU]

Dual Switching Controller, 0.075A, 500kHz Switching Freq-Max, BIPolar, PDSO16, 4.40 X 5 MM, 1.45 MM HEIGHT, 0.65 MM PITCH, ROHS COMPLIANT, PLASTIC, SSOP-16;

MB3778PFV-XXXE1


型号：	MB3778PFV-XXXE1
厂家：	FUJITSU
描述：	Dual Switching Controller, 0.075A, 500kHz Switching Freq-Max, BIPolar, PDSO16, 4.40 X 5 MM, 1.45 MM HEIGHT, 0.65 MM PITCH, ROHS COMPLIANT, PLASTIC, SSOP-16 光电二极管
文件：	总32页 (文件大小：350K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

FUJITSU MICROELECTRONICS

DATA SHEET

DS04-27203-8Ea

ASSP

BIPOLAR

Switching Regulator Controller

MB3778

■ DESCRIPTION

The MB3778 is a dual switching regulator control IC. It has a two-channel basic circuit that controls PWM system

switching regulator power. Complete synchronization is achieved by using the same oscillator output wave.

This IC can accept any two of the following types of output voltage: step-down, step-up, or voltage inversion

(inverting voltage can be output to only one circuit). The MB3778’s low power consumption makes it ideal for use

in portable equipment.

■ FEATURES

• Wide input voltage range : 3.6 V to 18 V

• Low current consumption : 1.7 mA Typ operation, 10 µA Max stand-by

• Wide oscillation frequency range:1 kHz to 500 kHz

• Built-in timer latch short-circuit protection circuit

• Built-in under-voltage lockout circuit

• Built-in 2.46 V reference voltage circuit : 1.23 V output can be obtained from R^Tterminal

• Variable dead-time provides control over total range

• Built-in stand-by function: power on/off function

• Two types of packages (SOP-16pin :1 type, SSOP-16pin :1 type)

■ APPLICATIONS

• LCD monitor/panel

• Surveillance camera etc.

Copyright©1994-2008 FUJITSU MICROELECTRONICS LIMITED All rights reserved

2006.5

MB3778

■ PIN ASSIGNMENT

(TOP VIEW)

C^T

RT

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

V^REF

SCP

CTL

+IN1

−IN1

−IN2

FB2

FB1

DTC1

OUT1

E/GND

DTC2

OUT2

V^CC

(FPT-16P-M05)

(FPT-16P-M06)

2

MB3778

■ PIN DESCRIPTION

No.

Pin

Function

Oscillator timing capacitor terminal (150 pF to 15,000 pF) .

Oscillator timing resistor terminal (5.1 kΩ to 100 kΩ) .

1

C^T

2

R^T

V^REF× 1/2 voltage is also available at this pin for error amplifier reference input.

3

4

+IN1 Error amplifier 1 non-inverted input terminal.

−IN1 Error amplifier 1 inverted input terminal.

Error amplifier 1 output terminal.

5

6

7

FB1

A resistor and a capacitor are connected between this terminal and the −IN1 terminal to adjust

gain and frequency.

OUT1 dead-time control terminal.

DTC1 Dead-time control is adjusted by an external resistive divider connected to the V^REFpin.

A capacitor connected between this terminal and GND enables soft-start operation.

Open collector output terminal.

OUT1 Output transistor has common ground independent of signal ground.

This output can source or sink up to 50 mA.

8

9

E/GND Ground terminal.

V^CC

Power supply terminal (3.6 V to 18 V)

Open collector output terminal.

10

11

OUT2 Output transistor has common ground independent of signal ground.

This output can source or sink up to 50 mA.

Sets the dead-time of OUT2.

DTC2

The use of this terminal is the same as that of DTC1.

Error amplifier 2 output terminal.

Sets the gain and adjusts the frequency when a resistor and a capacitor are connected

12

FB2

between this terminal and the −IN2 terminal.

Voltage of V^REF× 1/2 voltage is internally connected to the non-inverted input of error amplifier

2. Uses error amplifier 2 for positive voltage output.

13

14

−IN2 Error amplifier 2 inverted input terminal.

Power control terminal.

The IC is set in the stand-by state when this terminal is set “Low.”

Current consumption is 10 µA or lower in the stand-by state.

CTL

The input can be driven by TTL or CMOS.

The time constant setting capacitor connection terminal of the timer latch short-circuit

protection circuit.

15

16

SCP Connects a capacitor between this pin and GND.

For details, see “■ HOW TO SET TIME CONSTANT FOR TIMER LATCH SHORT-CIRCUIT

PROTECTION CIRCUIT”.

2.46 V reference voltage output terminal which can be obtained up to 1 mA.

V^REF

This pin is used to set the reference input and idle period of the error amplifiers.

3

MB3778

■ BLOCK DIAGRAM

9

14

1

2

1.23 V

2.46 V

1.9 V

1.3 V

Reference

16

Power

Supply

Control

Triangular

Oscillator

Voltage

OUT1

OUT2

7

−

+

+

2.46 V

Error Amp 1

PWM Comp.1

PWM Comp.2

S.C.P. Comp.

+

−

−

+

+

3

4

−

−

10

+

5

2.1 V

12

Error Amp 2

−

13

15

2.46 V

+

1 µA

1.23 V

R S

R

Latch

U. V. L. O.

−

−

+

8

D.T.C. Comp.

1.1 V

6

11

4

MB3778

■ OPERATION DESCRIPTION

1. Reference voltage circuit

The reference voltage circuit generates a temperature-compensated reference voltage ( =: 2.46 V) from VCC

terminal (pin 9) . The reference voltage is used as an operation power supply for internal circuit.

The reference is obtained from the V^REFterminal (pin 16).

2. Triangular wave oscillator

Triangular waveforms can be generated at any frequency by connecting a timing capacitor and resistor to the

C^Tterminal (pin 1) and to the RT terminal (pin 2) .

The amplitude of this waveform is from 1.3 V to 1.9 V. These waveforms are connected to the non-inverting

inputs of the PWM comparator and can be output through the C^Tterminal (pin 1) .

3. Error amplifiers (Error Amp)

The error amplifier detects the output voltage of the switching regulator and outputs PWM control signals.The

in-phase input voltage range is from 1.05 V to 1.45 V.The reference voltage obtained by dividing the reference

voltage output (recommended value : V^REF/2) or the RT terminal (pin 2) voltage (1.23 V) is supplied to the non-

inverting input. The V^REF/2 voltage is internally connected to non-inverting input of the other error amplifier.

Any loop gain can be chosen by connecting the feedback resistor and capacitor to the inverting input terminal

from the output terminal of the error amplifier.Stable phase compensation is possible.

4. Timer latch short circuit protection circuit

This circuit detects the output levels of each error amplifier. If the output level of one or both of the error amplifiers

is 2.1 V or higher, the timer circuit begins charging the externally connected protection enable-capacitor.

If the output level of the error amplifier does not drop below the normal voltage range before the capacitor voltage

reaches the transistor base-emitter voltage, V^BE(=: 0.65 V), the latch circuit turns the output drive transistor off

and sets the idle period to 100%.

5. Under voltage lock-out circuit

The transition state at power-on or a momentary drops in supply voltage may cause the control IC to malfunction,

which may adversely affect or even destroy the system. The under voltage lockout circuit monitors V^CCwith

reference to the internal reference voltage and resets the latch circuit to turn the output drive transistor off. The

idle period is set to 100%. It also pulls the SCP terminal (pin 15) “Low”.

6. PWM comparator unit

Each PWM comparator has one inverting input and two non-inverting inputs. This voltage-to-pulse-width con-

verter controls the turning on time of the output pulse according to the input voltage.

The PWM comparator turns the output drive transistor on while triangular waveforms from the oscillator are

lower than the error amplifier output and the DTC terminal voltage.

7. Output drive transistor

The output drive transistors have open collector outputs with common source supply and common grounds

independent of V^CCand signal ground. The output drive transistors for switching can sink or source up to 50 mA.

8. Power control unit

The CTL terminal (pin 14) controls power on/off modes(the power supply current in stand-by mode is 10 µA or

lower).

5

MB3778

■ ABSOLUTE MAXIMUM RATINGS

Rating

Parameter

Symbol

Condition

Unit

Min



Max

20

Power Supply Voltage

Error Amp Input Voltage

Control Input Voltage

V^CC

V^IN



V

V



−0.3

−0.3



+10

+20

20

V^CTL

V^OUT

I^OUT



V

Collector Output Voltage

Collector Output Current



V





75

mA

mW

mW

°C

°C

Ta ≤ +25 °C (SOP)



620*¹

444*²

+85

+125

Power Dissipation

P^D

Ta ≤ +25 °C (SSOP)



Operating Ambient Temperature

Storage Temperature

Ta





−30

−55

Tstg

*1: The packages are mounted on the epoxy board (4 cm × 4 cm)

*2: The packages are mounted on the epoxy board (10 cm × 10 cm)

WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,

temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.

■ RECOMMENDED OPERATING CONDITIONS

Value

Parameter

Symbol

Unit

Min

3.6

1.05

0

Typ

6.0



Max

18

Power Supply Voltage

Error Amp Input Voltage

Control Input Voltage

Collector Output Voltage

Collector Output Current

Timing Capacitor

V^CC

V^IN

V

V

1.45

18

V^CTL

V^OUT

I^OUT

C^T



V





18

V

0.3

150

5.1

1



50

mA

pF

kΩ

kHz

°C



15000

100

500

+85

Timing Resistor

R^T



Oscillator Frequency

Operating Ambient Temperature

f^OSC

Ta



−30

+25

WARNING: The recommended operating conditions are required in order to ensure the normal operation of the

semiconductor device. All of the device’s electrical characteristics are warranted when the device is

operated within these ranges.

Always use semiconductor devices within their recommended operating condition ranges. Operation

outside these ranges may adversely affect reliability and could result in device failure.

No warranty is made with respect to uses, operating conditions, or combinations not represented on

the data sheet. Users considering application outside the listed conditions are advised to contact their

representatives beforehand.

6

MB3778

■ ELECTRICAL CHARACTERISTICS

(Ta = +25 °C, VCC = 6 V)

Value

Parameter

Reference Block

Symbol

Condition

Unit

Min

Typ

Max

Output Voltage

V^REF

V^RTC

Line

Load

I^OS

IOR = −1 mA

2.41

−2

2.46

±0.2

2

2.51

+2

V

Output Temp. Stability

Input Stability

Ta = −30 °C to +85 °C

V^CC= 3.6 V to 18 V

I^OR= −0.1 mA to −1 mA

VREF = 2 V

%



10

mV

mV

mA

Load Stability



1

7.5

−3

Short Circuit Output Current

−30

−10

Under Voltage Lockout Protection Block

V^tH

IOR = −0.1 mA

IOR = −0.1 mA

IOR = −0.1 mA







2.72

2.60

120

1.9









V

V

Threshold Voltage

V^tL

Hysteresis Width

V^HYS

80

1.5

mV

V

Reset Voltage (V^CC)

VR

Protection Circuit Block (S.C.P.)

Input Threshold Voltage

Input Stand by Voltage

Input Latch Voltage

V^tPC

V^STB

V^IN



No pull up

No pull up



0.60



0.65

50

0.70

100

100

−0.6



V

mV

mV

µA

V



50

Input Source Current

I^bpc

−1.4



−1.0

2.1

Comparator Threshold Voltage

Triangular Waveform Oscillator Block

Oscillator Frequency

V^tC

Pin 5, Pin 12

f^OSC

f^dev

fdV

CT = 330 pF, RT = 15 kΩ

CT = 330 pF, RT = 15 kΩ

VCC = 3.6 V to 18 V

160



200

±5

240



kHz

%

Frequency Deviation

Frequency Stability (V^CC)

Frequency Stability (Ta)

Dead-Time Control Block (D.T.C.)

Input Bias Current



±1



%

f^dT

Ta = −30 °C to +85 °C

−4



+4

%

I^bdt

I^dt



Vdt = 2.5 V



150



0.2

500



1

µA

µA

V

Latch Mode Sink Current

Latch Input Voltage



V^dt

Idt = 100 µA

0.3

(Continued)

7

MB3778

(Continued)

(Ta = +25 °C, V^CC= 6 V)

Value

Parameter

Symbol

Condition

Unit

Min

Typ

Max

Error Amp Block

Input Offset Voltage

Input Offset Current

Input Bias Current

V^IO

I^IO

I^B

VO = 1.6 V

−6





+6

+100



mV

nA

nA

VO = 1.6 V

VO = 1.6 V

−100

−500

−100

Common Mode Input Voltage

Range

V^ICR

VCC = 3.6 V to 18 V

1.05



1.45

V

Voltage Gain

A^V

BW

RNF = 200 kΩ

A^V= 0 dB



70



60

80

1.0

80







dB

MHz

dB

Frequency Band Width

Common Mode Rejection Ratio

CMRR

V^REF

− 0.3

V^OM+







V

Max Output Voltage Width

V^OM−

I^OM+

I^OM−



VO = 1.6







0.7

1.0

0.9



V

Output Sink Current

mA

µA

Output Source Current

PWM Comparator Block

VO = 1.6

−60



V^t100

V^t0

Duty Cycle = 100%

Duty Cycle = 0%



1.05

55

1.9

1.3

65

2.25



V

V

Input Threshold Voltage

(f^OSC= 10 kHz)

On duty Cycle

D^tr

Vdt = VREF/1.45

75



%

Input Sink Current

Input Source Current

Control Block

I^IN+

I^IN−

Pin 5, Pin 12 = 1.6 V

Pin 5, Pin 12 = 1.6 V



1.0

−60

mA

µA





Input Off Condition

Input On Condition

Control Terminal Current

Output Block

V^OFF

V^ON

I^CTL







2.1







0.7



V

V

VCTL = 10 V

200

400

µA

Output Leak Current

Output Saturation Voltage

All Device Block

Stand-by Current

Leak

V^SAT

V^O= 18 V

IO = 50 mA







10

µA

1.1

1.4

V

I^CCS

I^CCa

VCTL = 0 V







10

µA

VCTL = VCC, No Output

Load

Average Supply Current

1.7

2.4

mA

8

MB3778

■ TEST CIRCUIT

VCC = 6 V

CTL

INPUT

TEST

SW

4.7 kΩ

C^PE

OUTPUT 1

OUTPUT 2

4.7 kΩ

16 15 14 13 12 11 10

9

8

MB3778

1

2

3

4

5

6

7

330 pF

15 kΩ

TEST

INPUT

■ TIMING CHART (Internal Waveform)

Triangular waveform oscillator output

Short circuit protection

comparator Reference

input

Dead Time, PWM input

voltage

2.1 V

1.9 V

1.6 V

1.3 V

Error Amp output

"High"

"Low"

"High"

"Low"

0.65 V

0.05 V

"High"

"Low"

PWM comparator

output

DEAD TIME 100%

Output Transistor

collector waveform

S.C.P. Terminal

waveform

t^PE

Short circuit protection

comparator output

Power “ON”

Power “OFF”

2.1 V

Control Input

voltage

(VCTL : Min Value)

0 V

Power supply voltage

3.6 V

(V^CC: Min Value)

Protection Enable Time t^PE0.6 × 10⁶× CPE (µs)

0 V

9

MB3778

■ APPLICATION CIRCUIT

• Chopper Type Step Down/inverting

V^IN(10 V)

CTL

820 pF

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

8.2 kΩ

0.1 µF

56 µH

1.8 kΩ

4.7 kΩ

1.8 kΩ

150

kΩ

4.7 kΩ

MB3778

150

kΩ

0.033

0.033

µF

µF

220 µF

10 kΩ

4.7 kΩ

−

+

10 kΩ

−

+

+

−

1 µF

1 µF

5.6 kΩ

2.4 kΩ

330 Ω

330 Ω

330 Ω

330 Ω

120 µH

120 µH

− +

−

+

9.1 kΩ

220 µF

220 µF

−

+

VO

( 5 V)

V^O

−5 V)

GND

(

10

MB3778

• Chopper Type Step Up/Inverting

V^IN(5 V)

CTL

820 pF

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

8.2 kΩ

0.1 µF

56 µH

1.8 kΩ

4.7 kΩ

1.8 kΩ

150

kΩ

4.7 kΩ

MB3778

150

kΩ

0.033

0.033

µF

µF

220 µF

10 kΩ

4.7 kΩ

−

+

10 kΩ

−

+

+

−

1 µF

1 µF

16 kΩ

4.7 kΩ

330 Ω

3.9 kΩ

100 Ω

330 Ω

120 µH

120 µH

220 µF

220 µF

−

+

+

−

9.1 kΩ

+

−

VO

VO

GND

(

5 V)

(

−5 V)

11

MB3778

• Multi Output Type (Apply Transformer)

V^IN(10 V)

CTL

820 pF

1

2

3

4

5

6

7

8

16

0.1 µF

8.2 kΩ

15

14

13

12

11

10

9

56 µH

1.8 kΩ

MB3778

4.7 kΩ

−

220 µF

150

kΩ

0.033

µF

−

+

10 kΩ

1.8 kΩ

220 Ω

1000 pF

5.6 kΩ

+

− +

−

+

− +

220 µF

220 µF

220 µF

220 µF

+

+

−

−

VO1

( −5 V)

V^O1

VO2

VO2

GND

(

12 V)

(

5 V)

(

−12 V)

12

MB3778

■ HOW TO SET THE OUTPUT VOLTAGE

The output voltage is set using the connections shown in “Connection of error Amp Output Voltage V0 ≥ 0” and

“Connection of Error Amp Output Voltage V⁰< 0”.

The error amplifier power is supplied by the reference voltage circuit as is that of the other internal circuits. The

common mode input voltage range is from 1.05 V to 1.45 V.

Set 1.23 V (V^REF/2) as the reference input voltage that is connected to either inverting or non-inverting input

terminals.

• Connection of Error Amp Output Voltage V⁰≥ 0

VREF

+

VO

VREF

R

R

R¹

+

VO

(R1 + R2)

=

2 × R2

+

−

PIN 5 or PIN 12

R2

RNF

• Connection of Error Amp Output Voltage V⁰< 0

VREF

V

REF

−

O

= −

V

(R1 + R2) + VREF

2 × R

1

R

R

R1

+

−

PIN 5

R2

RNF

−

O

V

13

MB3778

■ HOW TO SET TIME CONSTANT FOR TIMER LATCH SHORT-CIRCUIT

PROTECTION CIRCUIT

Below Figure shows the configuration of the protection latch circuit.

Each error amplifier output is connected to the inverting inputs of the short-circuit protection comparator and is

always compared with the reference voltage (2.1 V) connected to the non-inverting input.

When the load condition of the switching regulator is stable, the error amplifier has no output fluctuation. Thus,

short-circuitprotectioncontrolisalso kept in balance, and the SCPterminal (pin 15)voltage isheld atabout50 mV.

If the load changes drastically due to a load short-circuit and if the inverting inputs of the short-circuit protection

comparator go above 2.1 V, the short-circuit protection comparator output goes “Low” to turn off transistor Q¹.

The SCP terminal voltage is discharged, and then the short-circuit protection comparator charges the protection

enable capacitor C^PEaccording to the following formula :

V^PE= 50 mV + tPE × 10 − ⁶/ CPE

0.65 = 50 mV + tPE × 10 − ⁶/ CPE

CPE = tPE / 0.6 (µF)

When the protection enable capacitor is charged to about 0.65 V, the protection latch is set to enable the under

voltage lockout circuit and the output drive transistor is turned off. The idle period is also set to 100% at the

same time.

Once the under voltage lockout circuit is enabled, the protection enable is released; however, the protection

latch is not reset if the power is not turned off.

The inverting inputs (pin 6 or 11) of the D.T.C. comparator are compared to the reference voltage (about 1.1 V)

connected to the non-inverting input.

To prevent malfunction of the short-circuit protection-circuit when the soft-start operation is done by using the

DTC terminal (pin 6 or 11) , the D.T.C. comparator outputs a “High” level while the DTC terminal (pin 6 or 11)

goes up to about 1.1 V, and then closes the SCP terminal (pin 15) by turning transistor Q²on.

• Protection Latch Circuit

2.46 V

1 µA

S.C.P. Comp.

SCP

15

R1

Error Amp1

Error Amp2

−

−

+

S

Latch

R

CPE

U.V.L.O.

Q1

Q2

Q

3

2.1 V

−

−

+

6

DTC1

DTC2

11

1.1 V

D.T.C. Comp.

14

MB3778

■ SETTING THE IDLE PERIOD

When voltage step-up, fly-back step-up or inverted output are set, the voltage at the FB terminal may go higher

than the triangular wave voltage due to load fluctuation, etc. In this case the output transistor will be in full-on

state(ON duty 100%). This can be prevented by setting the maximum duty for the output transistor. This is done

by setting the DTC1 terminal (pin 6) voltage using resistance division of the V^REFvoltage as illustrated below.

When the DTC1 terminal voltage is higher than the triangular waveform voltage, the output transistor is turned

on. If the triangular waveform amplitude specified by the maximum duty calculation formula is 0.6 V, and the

lower voltage limit of the triangular waveform is 1.3 V, the formula would be asfollows (other channels are similar):

Duty (ON) max (%) =: (V^dt− 1.3 V) / 0.6 V × 100, Vdt (V) = Rb / (Ra + Rb) × VREF

Also, if no output duty setting is required, the voltage should be set greater than the upper limit voltage of the

triangular waveform, which is 1.9 V.

• Setting the idle time at DTC1 (DTC2 is similar)

16

6

VREF

Ra

Rb

DTC1

V^dt

15

MB3778

■ SETTING THE SOFT START TIME

When power is switched on, the current begins charging the capacitor (CDTC1) connected the DTC1 terminal (pin

6). The soft start process operates by comparing the soft start setting voltage, which is proportional to the DTC1

terminal voltage, with the triangular waveform, and varying the ON-duty of the OUT terminal (pin 7).

The soft start time until the ON duty reaches 50% is determined by the following equation:

Soft start time (time until output ON duty = 50%) .

ts (s) =: − C^DTC1× Ra × Rb / (Ra + Rb) × ln (1 − 1.6 (Ra + Rb) / (2.46 Rb) )

For example, if Ra = 4.7 kΩ and Rb = 10 kΩ, the result is:

ts (s) =: 0.01 × C^DTC1(µF)

• Soft Start on DCT1 terminal (DTC2 is similar)

16

6

VREF

Ra

Rb

DTC1

C^DTC1

16

MB3778

■ USING THE RT TERMINAL

The triangular waves, as shown in Figure “No VREF/2 connection to external circuits from RT terminal”, act to set

the oscillator frequency by charging and discharging the capacitor connected to the C^Tterminal using the current

value of the resistor connected to the R^Tterminal.

In addition, when voltage level V^REF/2 is output to external circuits from the RT terminal (pin 2) , care must be

taken in making the external circuit connections to adjust for the fact that I¹is increased by the value of the

current I²to the external circuits in determining the oscillator frequency (see Figure “VREF/2 connection to external

circuits from R^Tterminal”).

• No V^REF/2 connection to external circuits from RT terminal

Triangular wave

ICT = IRT

oscillator

VREF

=

2RT

V^REF

2

(

)

2

1

IRT

RT

I^CT

CT

• V^REF/2 connection to external circuits from RT terminal

Triangular wave

oscillator

ICT = IRT

= I1 + I2

VREF

2RT

=

+ I2

VREF

2

(

)

2

1

IRT

I1

I^CT

To external circuits

I2

RT

CT

17

MB3778

■ SYNCHRONIZATION OF ICs

A fixed condenser and resistor are inserted in the CT and RT terminals of IC which becomes a master when

synchronizing by using plurality of MB3778. As a result, the slave ICs oscillate automatically. The R^Tterminals

(pin 2) of the slave ICs are connected to the V^REFterminal (pin 16) to disable the charge/discharge circuit for

triangular wave oscillation. The C^Tterminals of the master and slave ICs are connected together.

• Connection of Master, Slave

VCC

MB3778

(MASTER)

CT

RT

MB3778

(SLAVE)

MB3778

(SLAVE)

18

MB3778

■ TYPICAL CHARACTERISTICS

Reference voltage vs. Power supply voltage

Average supply current vs. Power supply voltage

Ta = +25 °C

Ta = +25 °C

2.0

1.0

0

5.0

2.5

0

0

4

8

12

16

20

0

4

8

12

16

20

Power supply voltage VCC (V)

Power supply voltage VCC (V)

Reference voltage vs.

Triangular waveform Upper/Lower Limit voltage vs.

Timing capacitor

Operating ambient temperature

2.47

2.46

2.45

2.44

2.43

2.42

2.41

2.40

VCC = VCTL = 6 V

I^OR= −1 mA

2.2

2.0

Upper limit

1.8

1.6

1.4

1.2

VCC = 6 V

R^T= 15 kΩ

Ta = +25 °C

Lower limit

1.0

0.8

10²

10³

10⁴

−40 −20

0

+20 +40 +60 +80 +100

Timing capacitor CT (pF)

Operating ambient temperature Ta (°C)

Collector saturation voltage vs.

Sink Current

Error Amp Max output voltage vs.

Frequency

5.0

4.0

3.0

2.0

1.0

0

3.0

2.0

VCC = 6 V

Ta = +25 °C

VCC = 6 V

Ta = +25 °C

1.0

0

100

500 1 k

5 k 10 k

50 k 100 k

500 k

Frequency (Hz)

0

100

200

300

400

500

Sink current (mA)

(Continued)

19

MB3778

Oscillation frequency vs.Timing resistor

Triangular waveform cycle vs.

Timing capacitor

VCC = 6 V

Ta = +25 °C

100

10

VCC = 6 V

R^T= 15 kΩ

Ta = +25 °C

1 M

100 k

10 k

1 k

CT = 150 pF

CT = 1500 pF

1

10²

10³

10⁴

10⁵

Timing capacitor CT (pF)

CT = 15000 pF

1 k

5 k 10 k

50 k100 k

500 k

Timing resistor RT (Ω)

Frequency stability vs.

Operating ambient temperature

ON duty cycle vs. Oscillation frequency

10

0

100

80

60

40

20

0

V

C

R

CC = 6 V

VCC = 6 V

T

= 330 pF

= 15 kΩ

C^T= 330 pF

R^T= 15 kΩ

Ta = +25 °C

T

−10

−40 −20

0

+20 +40 +60 +80 +100 +120

5 k 10 k

50 k 100 k

500 k 1 M

Operating ambient temperature Ta (°C)

Oscillation frequency fOSC (Hz)

Reference voltage vs. Control voltage

Control terminal current vs. Control input voltage

VCC = 6 V

Ta = +25 °C

VCC = 6 V

Ta = +25 °C

5.0

500

2.5

250

0

0

0

1

2

3

4

5

0

4

8

12

16

20

Control voltage VCTL (V)

Control input voltage VCTL (V)

(Continued)

20

MB3778

Voltage gain/Phase vs. Frequency

Voltage gain/Phase vs. Frequency

(Actual Data)

CNF = OPEN

AV

CNF = 0.047 µF

40

180

90

40

20

180

90

AV

20

0

0

0

0

φ

φ

−20

−40

−90

−180

−20

−40

−90

−180

10

100

1 k

10 k

100 k

1 M

10

100

1 k

10 k

100 k

1 M

Frequency f (Hz)

Frequency f (Hz)

Voltage gain/Phase vs. Frequency

(Actual Data)

Voltage gain/Phase vs. Frequency

(Actual Data)

CNF = 4700 pF

CNF = 470 pF

40

180

90

40

20

180

AV

20

0

90

AV

0

0

0

φ

−20

−40

−90

−180

−20

−40

−90

−180

φ

10

100

1 k

10 k

100 k

1 M

10

100

1 k

10 k

100 k

1 M

Frequency f (Hz)

Frequency f (Hz)

Actual Circuit

VREF

VREF

CNF

4.7 kΩ

240 kΩ

4.7 kΩ

−

+

OUT

10 µF

−

+

IN

Error Amp

4.7 kΩ

4.7 kΩ

(Continued)

21

MB3778

(Continued)

Power Dissipation vs.

Operating ambient temperature (SOP)

Power Dissipation vs.

Operating ambient temperature (SSOP)

500

700

620

600

444

400

500

400

300

200

100

0

300

200

100

0

−40

−20

0

+20

+40

+60

+80 +100

−40

−20

0

+20

+40

+60

+80 +100

Operating ambient temperature Ta (°C)

Operating ambient temperature Ta (°C)

22

MB3778

■ EQUIVALENT SERIES RESISTOR AND STABILITY OF SMOOTHING CAPACITOR

The equivalent series resistor (ESR) of the smoothing capacitor in the DC/DC converter greatly affects the loop

phase characteristic.

The stability of the system is improved so that the phase characteristic may advance the phase to the ideal

capacitor by ESR in the high frequency region (see “Voltage gain vs. Frequency” and “Phase vs. Frequency”).

A smoothing capacitor with a low ESR reduces system stability. Use care when using low ESR electrolytic

capacitors (OS-CON^TM) and tantalum capacitors.

Note: OS-CON is a trademark of Sanyo Electric Co., Ltd.

DC/DC Converter Basic Circuit

L

Tr

RC

VIN

D

RL

C

Voltage gain vs. Frequency

Phase vs. Frequency

0

20

0

(2)

(1)

−90

−20

−40

−60

(2)

(1) : RC = 0 Ω

(2) : R^C= 31 mΩ

(1) : RC = 0 Ω

(2) : R^C= 31 mΩ

(1)

−180

10

100

1 k

Frequency f (Hz)

10 k

100 k

10

100

1 k

Frequency f (Hz)

10 k

100 k

23

MB3778

• Reference data

If an aluminum electrolytic smoothing capacitor (RC ≅ 1.0 Ω) is replaced with a low ESR electrolytic capacitor

(OS-CON^TM: RC ≅ 0.2 Ω), the phase margin is reduced by half(see Fig.1 and Fig.2).

DC/DC Converter AV vs. φ characteristic Test Circuit

VOUT

+

V^O

CNF

AV vs. φ characteristic

Between these points

−IN

+IN

−

+

VIN

FB

R2

R1

V^REF/2

Error Amp

Figure 1 DC/DC Converter +5 V output Voltage gain/Phase vs. Frequency

60

40

VCC = 10 V

R^L= 25 Ω

C^P= 0.1 µF

180

A^V

+

VO

φ

20

90

AI Capacitor

220 µF (16 V)

R^C1.0 Ω : fOSC = 1 kHz

+

−

62 °

0

0

−20

−40

−90

−180

GND

10

100

1 k

Frequency f (Hz)

10 k

100 k

Figure 2 DC/DC Converter +5 V output Voltage gain/Phase vs. Frequency

60

40

V

R

C

CC = 10 V

AV

L

= 25 Ω

180

90

P

= 0.1 µF

+

O

V

20

OS-CON^TM

22 µF (16 V)

0.2 Ω : fOSC = 1 kHz

+

−

φ

0

0

RC

27 °

−20

−40

−90

−180

GND

10

100

1 k

10 k

100 k

Frequency f (Hz)

24

MB3778

■ NOTES ON USE

• Take account of common impedance when designing the earth line on a printed wiring board.

• Take measures against static electricity.

- For semiconductors, use antistatic or conductive containers.

- When storing or carrying a printed circuit board after chip mounting, put it in a conductive bag or container.

- The work table, tools and measuring instruments must be grounded.

- The worker must put on a grounding device containing 250 kΩ to 1 MΩ resistors in series.

• Do not apply a negative voltage

- Applying a negative voltage of −0.3 V or less to an LSI may generate a parasitic transistor, resulting in

malfunction.

■ ORDERING INFORMATION

Part number

MB3778PFV-■■■

Package

Remarks

16-pin plastic SSOP

(FPT-16P-M05)

Conventional version

16-pin plastic SOP

(FPT-16P-M06)

MB3778PF-■■■

Conventional version

Lead Free version

Lead Free version

16-pin plastic SSOP

(FPT-16P-M05)

MB3778PFV-■■■E1

MB3778PF-■■■E1

16-pin plastic SOP

(FPT-16P-M06)

■ RoHS Compliance Information of Lead (Pb) Free version

The LSI products of Fujitsu Microelectronics with “E1” are compliant with RoHS Directive , and has observed

the standard of lead, cadmium, mercury, Hexavalent chromium, polybrominated biphenyls (PBB) , and polybro-

minated diphenyl ethers (PBDE) .

The product that conforms to this standard is added “E1” at the end of the part number.

25

MB3778

■ MARKING FORMAT (Lead Free version)

MB3778

XXXX XXX

SOP-16

(FPT-16P-M06)

E1

INDEX

Lead Free version

Lead Free version

3778

E1XXXX

XXX

SSOP-16

(FPT-16P-M05)

INDEX

26

MB3778

■ LABELING SAMPLE (Lead free version)

lead-free mark

JEITA logo JEDEC logo

MB123456P - 789 - GE1

(3N) 1MB123456P-789-GE1 1000

G

Pb

(3N)2 1561190005 107210

QC PASS

PCS

1,000

MB123456P - 789 - GE1

ASSEMBLED IN JAPAN

2006/03/01

MB123456P - 789 - GE1

1/1

1561190005

0605 - Z01A 1000

Lead Free version

27

MB3778

■ MB3778PF-■■■E1, MB3778PFV-■■■E1

RECOMMENDED CONDITIONS OF MOISTURE SENSITIVITY LEVEL

Item

Condition

IR (infrared reflow) , Manual soldering (partial heating method)

2 times

Mounting Method

Mounting times

Please use it within two years after

Before opening

Manufacture.

From opening to the 2nd

Less than 8 days

reflow

Storage period

When the storage period after

opening was exceeded

Please processes within 8 days

after baking (125 °C, 24H)

Storage conditions

5 °C to 30 °C, 70%RH or less (the lowest possible humidity)

[Temperature Profile for FJ Standard IR Reflow]

(1) IR (infrared reflow)

H rank : 260 °C Max

260 °C

255 °C

170 °C

to

190 °C

(b)

(c)

(d)

(e)

RT

(a)

(d')

(a) Temperature Increase gradient : Average 1 °C/s to 4 °C/s

(b) Preliminary heating : Temperature 170 °C to 190 °C, 60s to 180s

(c) Temperature Increase gradient : Average 1 °C/s to 4 °C/s

(d) Actual heating

(d’)

: Temperature 260 °C Max; 255 °C or more, 10s or less

: Temperature 230 °C or more, 40s or less

or

Temperature 225 °C or more, 60s or less

or

Temperature 220 °C or more, 80s or less

(e) Cooling

: Natural cooling or forced cooling

Note : Temperature : the top of the package body

(2) Manual soldering (partial heating method)

Conditions : Temperature 400 °C Max

Times

: 5 s max/pin

28

MB3778

■ PACKAGE DIMENSIONS

16-pin plastic SOP

Lead pitch

1.27 mm

Package width

package length

×

5.3 × 10.15 mm

Gullwing

Lead shape

Sealing method

Mounting height

Weight

Plastic mold

2.25 mm MAX

0.20 g

Code

(Reference)

P-SOP16-5.3×10.15-1.27

(FPT-16P-M06)

16-pin plastic SOP

(FPT-16P-M06)

Note 1) *1 : These dimensions include resin protrusion.

Note 2) *2 : These dimensions do not include resin protrusion.

Note 3) Pins width and pins thickness include plating thickness.

Note 4) Pins width do not include tie bar cutting remainder.

0.17 ⁺^–0⁰^.^.⁰⁰⁴³

*¹10.15 ⁺^–0⁰^.^.²²⁰⁵.400 ^–⁺^.^.⁰⁰⁰¹⁸⁰

.007 ⁺^–.^.⁰⁰⁰⁰²¹

16

9

²5.30±0.30 7.80±0.40

(.209±.012) (.307±.016)

*

INDEX

Details of "A" part

2.00 ⁺^–0⁰^.^.¹²⁵⁵

(Mounting height)

.079 –⁺.^.0⁰0¹6⁰

0.25(.010)

"A"

1

8

1.27(.050)

0~8˚

0.47±0.08

(.019±.003)

M

0.13(.005)

0.50±0.20

(.020±.008)

0.10 ⁺^–0⁰^.^.⁰¹⁵⁰

.004 ⁺^–.^.⁰⁰⁰⁰²⁴

0.60±0.15

(Stand off)

(.024±.006)

0.10(.004)

Dimensions in mm (inches).

Note: The values in parentheses are reference values.

C

2002 FUJITSU LIMITED F16015S-c-4-7

(Continued)

29

MB3778

(Continued)

16-pin plastic SSOP

Lead pitch

0.65 mm

4.40 × 5.00 mm

Gullwing

Package width

package length

×

Lead shape

Sealing method

Mounting height

Weight

Plastic mold

1.45mm MAX

0.07g

Code

(Reference)

(FPT-16P-M05)

P-SSOP16-4.4×5.0-0.65

16-pin plastic SSOP

Note 1) *1 : Resin protrusion. (Each side : +0.15 (.006) Max).

Note 2) *2 : These dimensions do not include resin protrusion.

Note 3) Pins width and pins thickness include plating thickness.

Note 4) Pins width do not include tie bar cutting remainder.

(FPT-16P-M05)

¹5.00±0.10(.197±.004)

*

0.17±0.03

(.007±.001)

16

9

²4.40±0.10 6.40±0.20

(.173±.004) (.252±.008)

*

INDEX

Details of "A" part

1.25 ⁺^–0⁰^.^.¹²⁰⁰

(Mounting height)

.049 ⁺^–.^.⁰⁰⁰⁰⁴⁸

1

8

LEAD No.

"A"

0.65(.026)

0.24±0.08

(.009±.003)

M

0.13(.005)

0~8˚

0.10±0.10

(Stand off)

0.50±0.20

(.004±.004)

(.020±.008)

0.25(.010)

0.60±0.15

(.024±.006)

0.10(.004)

Dimensions in mm (inches).

Note: The values in parentheses are reference values.

C

2003 FUJITSU LIMITED F16013S-c-4-6

30

MB3778

MEMO

31

FUJITSU MICROELECTRONICS LIMITED

Shinjuku Dai-Ichi Seimei Bldg. 7-1, Nishishinjuku 2-chome, Shinjuku-ku,

Tokyo 163-0722, Japan

Tel: +81-3-5322-3347 Fax: +81-3-5322-3387

http://jp.fujitsu.com/fml/en/

For further information please contact:

North and South America

Asia Pacific

FUJITSU MICROELECTRONICS AMERICA, INC.

1250 E. Arques Avenue, M/S 333

Sunnyvale, CA 94085-5401, U.S.A.

Tel: +1-408-737-5600 Fax: +1-408-737-5999

http://www.fma.fujitsu.com/

FUJITSU MICROELECTRONICS ASIA PTE LTD.

151 Lorong Chuan, #05-08 New Tech Park,

Singapore 556741

Tel: +65-6281-0770 Fax: +65-6281-0220

http://www.fujitsu.com/sg/services/micro/semiconductor/

Europe

FUJITSU MICROELECTRONICS SHANGHAI CO., LTD.

Rm.3102, Bund Center, No.222 Yan An Road(E),

Shanghai 200002, China

FUJITSU MICROELECTRONICS EUROPE GmbH

Pittlerstrasse 47, 63225 Langen,

Germany

Tel: +86-21-6335-1560 Fax: +86-21-6335-1605

http://cn.fujitsu.com/fmc/

Tel: +49-6103-690-0 Fax: +49-6103-690-122

http://emea.fujitsu.com/microelectronics/

FUJITSU MICROELECTRONICS PACIFIC ASIA LTD.

10/F., World Commerce Centre, 11 Canton Road

Tsimshatsui, Kowloon

Korea

FUJITSU MICROELECTRONICS KOREA LTD.

206 KOSMO TOWER, 1002 Daechi-Dong,

Kangnam-Gu,Seoul 135-280

Korea

Hong Kong

Tel: +852-2377-0226 Fax: +852-2376-3269

http://cn.fujitsu.com/fmc/tw

Tel: +82-2-3484-7100 Fax: +82-2-3484-7111

http://www.fmk.fujitsu.com/

All Rights Reserved.

The contents of this document are subject to change without notice.

Customers are advised to consult with sales representatives before ordering.

The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose

of reference to show examples of operations and uses of FUJITSU MICROELECTRONICS device; FUJITSU MICROELECTRONICS

does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporat-

ing the device based on such information, you must assume any responsibility arising out of such use of the information.

FUJITSU MICROELECTRONICS assumes no liability for any damages whatsoever arising out of the use of the information.

Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use

or exercise of any intellectual property right, such as patent right or copyright, or any other right of FUJITSU MICROELECTRONICS

or any third party or does FUJITSU MICROELECTRONICS warrant non-infringement of any third-party's intellectual property right or

other right by using such information. FUJITSU MICROELECTRONICS assumes no liability for any infringement of the intellectual

property rights or other rights of third parties which would result from the use of information contained herein.

The products described in this document are designed, developed and manufactured as contemplated for general use, including without

limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured

as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect

to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in

nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in

weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite).

Please note that FUJITSU MICROELECTRONICS will not be liable against you and/or any third party for any claims or damages arising

in connection with above-mentioned uses of the products.

Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by

incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current

levels and other abnormal operating conditions.

Exportation/release of any products described in this document may require necessary procedures in accordance with the regulations of

the Foreign Exchange and Foreign Trade Control Law of Japan and/or US export control laws.

The company names and brand names herein are the trademarks or registered trademarks of their respective owners.

Edited Strategic Business Development Dept.

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