FSCM0465RJX [FAIRCHILD]
Green Mode Fairchild Power Switch; 绿色模式飞兆功率开关
| 型号： | FSCM0465RJX |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Green Mode Fairchild Power Switch |
| 文件： | 总20页 (文件大小：445K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
June 2006
FSCM0465R
Green Mode Fairchild Power Switch (FPS™)
Features
Description
Internal Avalanche Rugged SenseFET
The FSCM0465R is an integrated Pulse-Width
Modulator (PWM) and SenseFET specifically designed
for high-performance offline Switch Mode Power
Supplies (SMPS) with minimal external components.
This device is an integrated high-voltage power-
switching regulator that combines an avalanche rugged
SenseFET with a current mode PWM control block. The
PWM controller includes an integrated fixed-frequency
oscillator, under-voltage lockout, leading edge blanking
(LEB), optimized gate driver, internal soft-start,
temperature-compensated precise current sources for a
loop compensation, and self-protection circuitry.
Compared with a discrete MOSFET and PWM controller
solution, it can reduce total cost, component count, size,
and weight while simultaneously increasing efficiency,
productivity, and system reliability. This device is a basic
platform well suited for cost-effective designs of flyback
converters.
Low Start-up Current (max. 40µA)
Low Power Consumption; under 1W at 240VAC and
0.4W Load
Precise Fixed Operating Frequency (66kHz)
Frequency Modulation for Low EMI
Pulse-by-Pulse Current Limiting (Adjustable)
Over-Voltage Protection (OVP)
Overload Protection (OLP)
Thermal Shutdown Function (TSD)
Auto-Restart Mode
Under-Voltage Lock Out (UVLO) with Hysteresis
Built-in Soft-Start (15ms)
Applications
SMPS for VCR, SVR, STB, DVD, and DVCD
Adaptor
SMPS for LCD Monitor
Related Application Notes
AN-4137: Design Guidelines for Off-line Flyback
Converters Using Fairchild Power Switch (FPS)
AN-4140: Transformer Design Consideration for
Off-line Flyback Converters using Fairchild Power
Switch
AN-4141: Troubleshooting and Design Tips for
Fairchild Power Switch Flyback Applications
AN-4148: Audible Noise Reduction Techniques for
FPS Applications
Ordering Information
Packing
Method
Product Number
Package Pb-Free Marking Code
BV
R
Max.
DS(ON)
DSS
FSCM0465RJ
D2-PAK-6L
D2-PAK-6L
I2-PAK-6L
Yes
Yes
Yes
Yes
Tube
FSCM0465RJX
FSCM0465RIWDTU(1)
FSCM0465RGWDTU(1) TO-220-6L
Tape & Reel
Tube
CM0465R
650V
2.6 Ω
Tube
Note:
1. WDTU: Forming Type
FPSTM is a trademark of Fairchild Semiconductor Corporation.
© 2006 Fairchild Semiconductor Corporation
FSCM0465R Rev. 1.0.1
www.fairchildsemi.com
1
Typical Circuit
DC
OUT
AC
IN
Drain
PWM
Ilimit
Vfb
Vcc GND
FSCM0465R Rev. 00
Figure 1. Typical Flyback Application
Output Power Table
(3)
230VAC ±15%
85–265VAC
Product
(1)
(2)
(1)
(2)
Adapter
40W
Open Frame
55W
Adapter
30W
Open Frame
FSCM0465RJ
FSCM0565RJ
FSCM0765RJ
FSCM0465RI
FSCM0465RG
FSCM0565RG
FSCM0765RG
40W
50W
60W
50W
50W
70W
85W
50W
65W
40W
65W
70W
50W
60W
70W
40W
60W
70W
40W
70W
85W
60W
85W
95W
70W
Notes:
1. Typical continuous power in a non-ventilated enclosed adapter measured at 50°C ambient
2. Maximum practical continuous power in an open-frame design at 50°C ambient
3. 230 VAC or 100/115 VAC with doubler
© 2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSCM0465R Rev. 1.0.1
2
Internal Block Diagram
VCC
3
N.C.
5
Drain
1
VCC Good
Internal
Bias
Vref
8V/12V
+
0.3/0.5V
Freq.
Modulation
-
VCC
IDELAY
VCC
OSC
IFB
PWM
S
R
Q
Q
2.5R
FB
4
6
Gate
Driver
R
Soft start
0.3K
LEB
I_limit
VSD
VCC
Vovp
TSD
2
GND
S
R
Q
Q
Vcc Good
VCC UV Reset
FSCM0465R Rev. 00
Figure 2. Functional Block Diagram of FSCM0465R
© 2006 Fairchild Semiconductor Corporation
FSCM0465R Rev. 1.0.1
www.fairchildsemi.com
3
Pin Configuration
FSCM0465RJ
FSCM0465RI
I2-PAK-6L
D2-PAK-6L
6 : I_limit
5 : N.C.
4 : FB
6 : I_limit
5 : N.C.
4 : FB
3 : VCC
3 : VCC
2 : GND
2 : GND
1 : Drain
1 : Drain
FSCM0465RG
TO-220-6L
6. I_limit
5. N.C.
4. FB
3. VCC
2. GND
1. Drain
Figure 3. Pin Configuration (Top View)
Pin Definitions
Pin Number
Pin Name
Drain
Pin Function Description
SenseFET Drain. This pin is the high-voltage power SenseFET drain. It is
designed to drive the transformer directly.
1
2
GND
Ground. This pin is the control ground and the SenseFET source.
Power Supply. This pin is the positive supply voltage input. During startup,
the power is supplied through the startup resistor from DC link. When VCC
reaches 12V, the power is supplied from the auxiliary transformer winding.
3
VCC
Feedback. This pin is internally connected to the inverting input of the PWM
comparator. The collector of an opto-coupler is typically tied to this pin. For
stable operation, a capacitor should be placed between this pin and GND. If
the voltage of this pin reaches 6.0V, the overload protection is activated, re-
sulting in shutdown of the FPS.
4
Feedback (FB)
5
6
N.C.
This pin is not connected.
Current Limit. This pin is for the pulse-by-pulse current limit level program-
ming. By using a resistor to GND on this pin, the current limit level can be
changed. If this pin is left floating, the typical current limit is 2.0A.
I_limit
© 2006 Fairchild Semiconductor Corporation
FSCM0465R Rev. 1.0.1
www.fairchildsemi.com
4
Absolute Maximum Ratings
The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The
device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables
are not guaranteed at the absolute maximum ratings.
TA = 25°C unless otherwise specified.
Symbol
BVDSS
VDGR
VGS
Parameter
Drain-Source Breakdown Voltage(1)
Drain-Gate Voltage (RGS=1MΩ)
Gate-Source (GND) Voltage
Drain Current Pulsed(2)
Value
Unit
V
650
650
V
±30
V
IDM
16
ADC
ADC
ADC
ADC
ADC
V
TC = 25°C
TC = 100°C
TC = 25°C
TC = 100°C
4.0
Continuous Drain Current
(TO-220-6L, I2-PAK-6L)
2.5
ID
2.3
Continuous Drain Current
(D2-PAK-6L)
1.4
20
VCC
VFB
Supply Voltage
Feedback Voltage Range
-0.3 to VCC
140
V
PD
W
Total Power Dissipation (TO-220-6L)
Total Power Dissipation (I2-PAK-6L)
Total Power Dissipation (D2-PAK-6L)
Derating
PD
-1.1
W/°C
W
75
Derating
PD
-1.5
W/°C
W
80
Derating
TJ
-0.64
W/°C
°C
Operating Junction Temperature
Operating Ambient Temperature
Storage Temperature
Internally limited
-25 to +85
-55 to +150
TA
°C
TSTG
°C
2.0
ESD Capability, HBM Model
(All pins except Vfb)
(GND-Vfb = 1.5kV)
(VCC-Vfb = 1.0kV)
kV
V
300
ESD Capability, Machine Model
(All pins except Vfb)
(GND-Vfb = 250V)
(VCC-Vfb = 100V)
Notes:
1. Tj = 25°C to 150°C
2. Repetitive rating: Pulse-width limited by maximum junction temperature
3. TC: Case back surface temperature with infinite heat sink
© 2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSCM0465R Rev. 1.0.1
5
Electrical Characteristics
TA = 25°C unless otherwise specified.
Symbol
Parameter
Condition
Min. Typ. Max. Unit
SenseFET SECTION
IDSS
Zero Gate Voltage Current
VDS = Max, Rating VGS = 0V
VGS = 10V, ID = 2.3A
-
-
-
-
-
-
-
-
250
µA
Ω
RDS(ON) Static Drain Source on Resistance(1)
2.2
60
23
20
65
27
2.6
COSS
td(on)
tr
Output Capacitance
Turn-on Delay Time
Rise Time
VGS = 0V, VDS = 25V, f = 1MHz
-
-
-
-
-
pF
VDD = 325V, ID = 3.2A(4)
ns
td(off)
tf
Turn-off Delay Time
Fall Time
CONTROL SECTION
fOSC
ΔfMOD
tMOD
Switching Frequency
VCC = 14V, VFB = 5V
60
-
66
±3
4
72
-
kHz
kHz
ms
%
Switching Frequency Modulation Range
Switching Frequency Modulation Cycle
Switching Frequency Stability
Switching Frequency Variation(2)
Maximum Duty Cycle
-
-
fSTABLE
ΔfOSC
DMAX
DMIN
10V ≤ VCC ≤ 17V
0
1
3
−25°C ≤ TA ≤ +85°C
-
±5
80
-
±10
85
0
%
75
-
%
Minimum Duty Cycle
%
VSTART
VSTOP
IFB
11
7
12
8
13
9
V
UVLO Threshold Voltage
VFB = GND
VFB = GND
V
Feedback Source Current
Internal Soft-Start Time
0.7
10
0.9
15
1.1
20
mA
ms
tS/S
BURST MODE SECTION
VBURH
VCC = 14V
VCC = 14V
0.4
0.5
0.3
0.6
V
V
Burst Mode Voltages
VBURL
0.24
0.36
PROTECTION SECTION
ILIMIT
VOVP
TSD
Peak Current Limit(3)
VCC = 14V, VFB = 5V
2.2
18
2.5
19
2.8
20
A
V
Over-Voltage Protection
Thermal Shutdown Temperature(2)
130
3.5
5.5
145
5.3
6
160
7
°C
µA
V
IDELAY
VSD
Shutdown Delay Current
VFB = 4V
Shutdown Feedback Voltage
VFB ≥ 5.5V
6.5
TOTAL DEVICE SECTION
Istart
Startup Current
-
-
20
40
5
µA
IOP(MIN)
IOP(MAX)
Notes:
1. Pulse Test: Pulse width ≤ 300µS, duty ≤ 2%
2. These parameters, although guaranteed at the design, are not tested in mass production.
VCC = 10V, VFB = 0V
Operating Supply Current
2.5
mA
VCC = 20V, VFB = 0V
3. These parameters indicate the inductor current. Where packages are I2PAK or D2PAK, this should be decreased to
2.0A by external resistor.
4. MOSFET switching time is essentially independent of operating temperature.
© 2006 Fairchild Semiconductor Corporation
FSCM0465R Rev. 1.0.1
www.fairchildsemi.com
6
Comparison Between FSDM0465RB and FSCM0465R
Function
FSDM0465RB
FSCM0465R
Available
Frequency Modulation
N/A
- Frequency modulation range (ΔfMOD) = ±3kHz
- Frequency modulation cycle (tMOD) = 4ms
Pulse-by-pulse Current Limit Internally fixed (2.0A max.) Programmable using external resistor (2.8A max.)
N/A (Requires a startup resistor)
Internal Startup Circuit
Available
Startup current: 40µA (max.)
TO-220-6L
I2-PAK-6L
D2-PAK-6L
Packages
TO-220F-6L
© 2006 Fairchild Semiconductor Corporation
FSCM0465R Rev. 1.0.1
www.fairchildsemi.com
7
Typical Performance Characteristics
These characteristic graphs are normalized at TA= 25°C.
1.60
1.40
1.20
1.00
0.80
0.60
1.20
1.12
1.04
0.96
0.88
0.80
-50
-25
0
25
50
75
100 125
-50
-25
0
25
50
75
100 125
Junction Temperature [°C]
Junction Temperature [°C]
Figure 4. Startup Current vs. Temp.
Figure 5. Stop Threshold voltage vs. Temp.
1.20
1.12
1.04
0.96
0.88
0.80
1.20
1.12
1.04
0.96
0.88
0.80
-50
-25
0
25
50
75
100 125
-50
-25
0
25
50
75
100 125
Junction Temperature [°C]
Junction Temperature [°C]
Figure 6. Maximum Duty Cycle vs. Temp.
Figure 7. Start Threshold Voltage vs. Temp.
1.20
1.12
1.04
0.96
0.88
0.80
1.20
1.12
1.04
0.96
0.88
0.80
-50
-25
0
25
50
75
100 125
-50
-25
0
25
50
75
100 125
Junction Temperature [°C]
Junction Temperature [°C]
Figure 8. Initial Frequency vs. Temp.
Figure 9. Feedback Source Current vs. Temp.
© 2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSCM0465R Rev. 1.0.1
8
Typical Performance Characteristics (Continued)
These characteristic graphs are normalized at TA= 25°C.
1.20
1.12
1.04
0.96
0.88
0.80
1.20
1.12
1.04
0.96
0.88
0.80
-50
-25
0
25
50
75
100 125
-50
-25
0
25
50
75
100 125
Junction Temperature [°C]
Junction Temperature [°C]
Figure 10. Shutdown Feedback voltage vs. Temp.
Figure 11. Burst Mode Enable Voltage vs. Temp.
1.20
1.12
1.04
0.96
0.88
0.80
1.20
1.12
1.04
0.96
0.88
0.80
-50
-25
0
25
50
75
100 125
-50
-25
0
25
50
75
100 125
Junction Temperature [°C]
Junction Temperature [°C]
Figure 12. Maximum Drain Current vs. Temp.
Figure 13. Shutdown Delay Current vs. Temp.
1.20
1.12
1.04
0.96
0.88
0.80
1.20
1.12
1.04
0.96
0.88
0.80
-50
-25
0
25
50
75
100 125
-50
-25
0
25
50
75
100 125
Junction Temperature [°C]
Junction Temperature [°C]
Figure 14. Burst Mode Disable Voltage vs. Temp.
Figure 15. Operating Supply Current vs. Temp.
© 2006 Fairchild Semiconductor Corporation
FSCM0465R Rev. 1.0.1
www.fairchildsemi.com
9
The minimum current supplied through the startup
resistor is given by:
Functional Description
1. Startup: Figure 16 shows the typical startup circuit
and transformer auxiliary winding for the FSCM0465R
application. Before the FSCM0465R begins switching, it
consumes only startup current (typically 20µA) and the
current supplied from the DC link supply current
consumed by the FPS (ICC) and charges the external
1
min
min
(1)
Isup
=
2 ⋅Vline
−Vstar t
⋅
(
)
Rstr
where Vlinemin is the minimum input voltage, Vstart is the
start voltage (12V) and Rstr is the startup resistor. The
startup resistor should be chosen so that Isupmin is larger
than the maximum startup current (40µA). If not, VCC can
not be charged to the start voltage and FPS fails to start.
capacitor (Ca) connected to the VCC pin. When VCC
reaches start voltage of 12V (VSTART), the FSCM0465R
begins switching and the current consumed by the
FSCM0465R increases to 2.5mA. Then the FSCM0465R
continues its normal switching operation and the power
required for this device is supplied from the transformer
auxiliary winding, unless VCC drops below the stop
2. Feedback Control: The FSCM0465R employs
current mode control, as shown in Figure 18. An opto-
coupler (such as the H11A817A) and a shunt regulator
(such as the KA431) are typically used to implement the
feedback network. Comparing the feedback voltage with
the voltage across the Rsense resistor makes it possible
to control the switching duty cycle. When the reference
pin voltage of the KA431 exceeds the internal reference
voltage of 2.5V, the H11A817A LED current increases,
pulling down the feedback voltage and reducing the duty
cycle. This event typically happens when the input
voltage is increased or the output load is decreased.
voltage of 8V (VSTOP). To guarantee the stable operation
of the control IC, VCC has under-voltage lockout (UVLO)
with 4V hysteresis. Figure 17 shows the relationship
between the current consumed by the FPS (ICC) and the
supply voltage (VCC).
CDC
2.1 Pulse-by-pulse Current Limit: Because current
mode control is employed, the peak current through the
SenseFET is determined by the inverting input of the
PWM comparator (Vfb*) as shown in Figure 18. When
the current through the opto-transistor is zero and the
current limit pin (#5) is left floating, the feedback current
source (IFB) of 0.9mA flows only through the internal
AC line
min
max
(Vline
- Vline
)
ISUP
Rstr
resistor (R+2.5R=2.8k). In this case, the cathode voltage
of diode D2 and the peak drain current have maximum
values of 2.5V and 2.5A, respectively. The pulse-by-
pulse current limit can be adjusted using a resistor to
GND on the current limit pin (#5). The current limit level
using an external resistor (RLIM) is given by:
Da
VCC
ICC
FSCM0465R
Ca
FSCM0465R Rev. 00
RLIM ⋅ 2.5A
2.8KΩ + RLIM
Figure 16. Startup Circuit
(2)
ILIM =
ICC
Vcc Vref
Idelay
IFB 0.9mA
Vfb
Vo
3mA
SenseFET
OSC
4
6
H11A817A
D1
D2
CB
2.5R
0.3k
+
Gate
driver
Power Up
Vfb*
Power Down
R
KA431
-
25μA
VCC
RLI M
Vstop=8V
Vstart=12V
Vz
FSCM0465R Rev. 00
OLP
Rsense
VSD
FSCM0465R Rev. 00
Figure 17. Relation Between Operating Supply
Current and VCC Voltage
Figure 18. Pulse Width Modulation (PWM) Circuit
© 2006 Fairchild Semiconductor Corporation
FSCM0465R Rev. 1.0.1
www.fairchildsemi.com
10
2.2 Constant Power Limit Circuit: Due to the circuit
delay of FPS, the pulse-by-pulse limit current increases
a little bit when the input voltage increases. This means
unwanted excessive power is delivered to the secondary
side. To compensate, the auxiliary power compensation
network in Figure 19 can be used. RLIM can adjust pulse-
2.3 Leading Edge Blanking (LEB): At the instant the
internal SenseFET is turned on, a high-current spike
through the SenseFET usually occurs, caused by
primary-side capacitance and secondary-side rectifier
reverse recovery. Excessive voltage across the Rsense
resistor can lead to incorrect feedback operation in the
current mode PWM control. To counter this effect, the
FSCM0465R employs a leading edge blanking (LEB)
circuit. This circuit inhibits the PWM comparator for a
short time after the SenseFET is turned on.
by-pulse current by absorbing internal current source
(IFB: typical value is 0.9mA), depending on the ratio
between resistors. With the suggested compensation
circuit, additional current from IFB is absorbed more
proportionally to the input voltage (VDC) and achieves
constant power in wide input range. Choose RLIM for
3. Protection Circuit: The FSCM0465R has several
self-protective functions, such as overload protection
(OLP), over-voltage protection (OVP) and thermal
shutdown (TSD). Because these protection circuits are
fully integrated into the IC without external components,
the reliability is improved without increasing cost. Once
the fault condition occurs, switching is terminated and
the SenseFET remains off. This causes VCC to fall.
proper current to the application, then check the pulse-
by-pulse current difference between minimum and
maximum input voltage. To eliminate the difference (to
gain constant power), Ry can be calculated by:
Na
Ilim_spec ×Vdc
×
When VCC reaches the UVLO stop voltage of 8V, the
Np
Ifb × ΔIlim_comp
(3)
Ry
≅
current consumed by the FSCM0465R decreases to the
startup current (typically 20µA) and the current supplied
from the DC link charges the external capacitor (Ca)
where, Ilim_spec is the limit current stated on the
specification; Na and Np are the number of turns for VCC
and primary side, respectively; Ifb is the internal current
connected to the VCC pin. When VCC reaches the start
voltage of 12V, the FSCM0465R resumes normal
operation. In this manner, the auto-restart can alternately
enable and disable the switching of the power SenseFET
until the fault condition is eliminated (see Figure 20).
source at feedback pin with a typical value of 0.9mA; and
ΔIlim_comp is the current difference which must be
eliminated. In case of capacitor in the circuit 1µF, 100V is
good choice for all applications.
Fault
occurs
Fault
removed
Power
On
Vds
VDC
Np
L
Vcc
12V
8V
Vfb Drain
Vcc
t
Na
Normal
Operation
Fault
Situation
Normal
Operation
FSCM0465R Rev. 00
I_lim
GND
RLIM
Figure 20. Auto Restart Operation
compensation
network
-
Na
Np
3.1 Overload Protection (OLP): Overload is defined as
the load current exceeding a preset level due to an
unexpected event. In this situation, the protection circuit
should be activated to protect the SMPS. However, even
when the SMPS is in the normal operation, the overload
protection circuit can be activated during the load
RY
CY
Vy = VDC ×
+
FSCM0465R Rev. 00
Figure 19. Constant power limit circuit
© 2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSCM0465R Rev. 1.0.1
11
transition. To avoid this undesired operation, the
overload protection circuit is designed to be activated
after a specified time to determine whether it is a
transient situation or an overload situation. Because of
the pulse-by-pulse current limit capability, the maximum
peak current through the SenseFET is limited and the
maximum input power is restricted with a given input
voltage. If the output consumes beyond this maximum
power, the output voltage (VO) decreases below the set
3.3 Thermal Shutdown (TSD): The SenseFET and the
control IC are built in one package. This makes it easy
for the control IC to detect the heat generation from the
SenseFET.
When
the
temperature
exceeds
approximately 145°C, the thermal protection is triggered,
resulting in shutdown of the FPS.
4. Frequency Modulation: EMI reduction can be
accomplished by modulating the switching frequency of
a switched power supply. Frequency modulation can
reduce EMI by spreading the energy over a wider
frequency range than the bandwidth measured by the
EMI test equipment. The amount of EMI reduction is
directly related to the depth of the reference frequency.
As can be seen in Figure 22, the frequency changes
from 63KHz to 69KHz in 4ms.
voltage. This reduces the current through the opto-
coupler LED, which also reduces the opto-coupler
transistor current, increasing the feedback voltage (Vfb).
If Vfb exceeds 2.5V, D1 is blocked and the 5.3µA current
source (Idelay) starts to charge CB slowly up to VCC. In
this condition, Vfb continues increasing until it reaches
6V, when the switching operation is terminated as shown
in Figure 21. The delay time for shutdown is the time
required to charge CB from 2.5V to 6.0V with 5.3µA
(Idelay). A 10 ~ 50ms delay time is typical for most
applications.
Drain Current
FSCM0465R Rev. 00
VFB
Overload Protection
Ts
Ts
6.0V
2.5V
Ts
T12= CB*(6.0-2.5)/Idelay
fs
69kHz
66kHz
63kHz
T1
T2
t
Figure 21. Overload Protection
3.2 Over-Voltage Protection (OVP): If the secondary-
side feedback circuit were to malfunction or a solder
defect causes an opening in the feedback path, the
current through the opto-coupler transistor becomes
almost zero. In this case, Vfb climbs up in a similar
manner to the overload situation, forcing the preset
maximum current to be supplied to the SMPS until the
overload protection is activated. Because more energy
than required is provided to the output, the output
voltage may exceed the rated voltage before the
overload protection is activated, resulting in the
breakdown of the devices in the secondary side. To
prevent this situation, an over- voltage protection (OVP)
circuit is employed. In general, VCC is proportional to the
4ms
FSCM0465R Rev. 00
t
Figure 22. Frequency Modulation
5. Soft-Start: The FSCM0465R has an internal soft-start
circuit that increases PWM comparator inverting input
voltage, together with the SenseFET current, slowly after
it starts up. The typical soft-start time is15ms. The pulse
width to the power switching device is progressively
increased to establish the correct working conditions for
transformers, rectifier diodes, and capacitors. The
voltage on the output capacitors is progressively
increased with the intention of smoothly establishing the
required output voltage. Preventing transformer
saturation and reducing stress on the secondary diode
during startup is also helpful.
output voltage and the FSCM0465R uses VCC instead of
directly monitoring the output voltage. If VCC exceeds
19V, an OVP circuit is activated, resulting in the
termination of the switching operation. To avoid
undesired activation of OVP during normal operation,
VCC should be designed to be below 19V.
© 2006 Fairchild Semiconductor Corporation
FSCM0465R Rev. 1.0.1
www.fairchildsemi.com
12
6. Burst Operation: To minimize power dissipation in
standby mode, the FSCM0465R enters into burst-mode
operation at light load condition. As the load decreases,
the feedback voltage decreases. As shown in Figure 23,
the device automatically enters burst mode when the
feedback voltage drops below VBURL (300mV). At this
point, switching stops and the output voltages start to
drop at a rate dependent on standby current load. This
causes the feedback voltage to rise. Once it passes
VBURH (500mV), switching resumes. The feedback
voltage then falls and the process repeats. Burst mode
operation alternately enables and disables switching of
the power SenseFET, thereby reducing switching loss in
standby mode.
Vo
Voset
VFB
0.5V
0.3V
Ids
Vds
time
Switching
disabled
Switching
disabled
T4
T2 T3
FSCM0465R Rev. 00
T1
Figure 23. Waveforms of Burst Operation
© 2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSCM0465R Rev. 1.0.1
13
Typical Application Circuit
Application
Output Power
40W
Input Voltage
Output Voltage (Max. Current)
Universal Input
(85-265Vac)
5V (2.0A)
12V (2.5A)
LCD Monitor
Features
High efficiency (>81% at 85Vac input)
Low standby mode power consumption (<1W at 240Vac input and 0.4W load)
Low component count
Enhanced system reliability through various protection functions
Low EMI through frequency modulation
Internal soft-start (15ms)
Key Design Notes
Resistors R107 and R108 are employed to prevent startup at low input voltage
The delay time for overload protection is designed to be about 50ms with C106 of 100nF. If a faster triggering of OLP
is required, C106 can be reduced to 22nF.
1. Schematic
D202
MBRF10H100
T101
EER3016
L201
12V / 3.0A
10
1
2
C202
1000μF
25V
C201
1000μF
25V
C104
3.3nF
630V
R103
56kΩ
2W
8
L101
Ferrite Bead
D101
UF 4007
C103
100μF
400V
3
BD101
2
IC101
FSCM0465R
2KBP06M
Ilimit
1
6
4
1
3
3
Drain
D102
UF4004
D201
MBRF1060
L202
VCC
5V / 2.8A
FB
4
7
4
GND
R104
C204
1000μF
10V
C105
C203
1000μF
10V
C106
100nF
50V
C102
220nF
275VAC
20Ω
22μF
2
50V
6
5
C301
4.7nF
LF101
23mH
R108
330kΩ
R107
330kΩ
R201
1kΩ
R101
560kΩ
0.5W
R204
5.6kΩ
R202
1.2kΩ
R203
10kΩ
C205
47nF
IC301
H11A817A
IC201
KA431
F101
FUSE
250V
2A
C101
220nF
275VAC
RT101
5D-9
R205
5.6kΩ
FSCM0465R Rev. 01
Figure 24. Demo Circuit
© 2006 Fairchild Semiconductor Corporation
FSCM0465R Rev. 1.0.1
www.fairchildsemi.com
14
2. Transformer
EER3016
1
10
9
Np/2
Np/2
N12V
2
3
4
5
8
7
N5V
6
Na
Figure 25. Transformer Schematic Diagram
3. Winding Specification
No
Pin (s→f)
4 → 5
Wire
0.2φ × 1
Turns
Winding Method
Na
8
Center Winding
Insulation: Polyester Tape t = 0.050mm, 2 Layers
Np/2 2 → 1
0.4φ × 1
Insulation: Polyester Tape t = 0.050mm, 2 Layers
N12V 10 → 8
0.3φ × 3
Insulation: Polyester Tape t = 0.050mm, 2 Layers
N5V 7 → 6
0.3φ × 3
Insulation: Polyester Tape t = 0.050mm, 2 Layers
Np/2 3 → 2
0.4φ × 1
18
7
Solenoid Winding
Center Winding
Center Winding
Solenoid Winding
3
18
Outer Insulation: Polyester Tape t = 0.050mm, 2 Layers
4. Electrical Characteristics
Pin
Specification
520µH ± 10%
10µH Max
Remarks
Inductance
1 - 3
1 - 3
100kHz, 1V
2
nd all Short
Leakage Inductance
5. Core & Bobbin
Core: EER 3016
Bobbin: EER3016
Ae(mm2): 96
© 2006 Fairchild Semiconductor Corporation
FSCM0465R Rev. 1.0.1
www.fairchildsemi.com
15
6. Demo Circuit Part List
Part
F101
Value
2A/250V
5D-9
Note
Part
Value
Note
C301
4.7nF
Polyester Film Cap.
Fuse
NTC
Inductor
Diode
RT101
L201
L202
5µH
5µH
Wire 1.2mm
Wire 1.2mm
Resistor
R101
R103
R104
R107
R108
R201
R202
R203
R204
R205
560kΩ
56kΩ
20Ω
0.5W
2W
1/4W
1/4W
1/4W
1/4W
1/4W
1/4W
1/4W
1/4W
330kΩ
330kΩ
1kΩ
D101
D102
D201
D202
UF4007
UF4004
MBRF1060
1.2kΩ
10kΩ
5.6kΩ
5.6kΩ
MBRF10H100
Bridge Diode
BD101 2KBP06M 3N257
Bridge Diode
Wire 0.4mm
Capacitor
220nF/275VAC
C101
C102
C103
C104
C105
C106
C201
C202
C203
C204
C205
Box Capacitor
Line Filter
IC
220nF/275VAC
100µF/400V
3.3nF/630V
22µF/50V
Box Capacitor
LF101
23mH
Electrolytic Capacitor
Ceramic Capacitor
Electrolytic Capacitor
Ceramic Capacitor
Electrolytic Capacitor
Electrolytic Capacitor
Electrolytic Capacitor
Electrolytic Capacitor
Ceramic Capacitor
IC101
IC201
IC301
FSCM0465R
KA431(TL431)
H11A817A
FPS™ (2.5A, 650V)
Voltage Reference
Opto-coupler
100nF/50V
1000µF/25V
1000µF/25V
1000µF/10V
1000µF/10V
47nF/50V
© 2006 Fairchild Semiconductor Corporation
FSCM0465R Rev. 1.0.1
www.fairchildsemi.com
16
Package Dimensions
D2-PAK-6L
Dimensions are in millimeters unless otherwise specified.
A
10.10
9.70
1.40
1.00
MIN 9.50
9.40
9.00
MIN 9.00
(0.75)
MAX1.10
10.00
MAX0.80
5.10
4.70
MIN 4.00
0.70
0.50
MIN 0.85
2.19
2.19
1.75
1.27
3.81
1.27
1.75
10.20
9.80
B
4.70
4.30
(8.58)
(4.40)
1.40
1.25
R0.45
(1.75)
(0.90)
(7.20)
15.60
15.00
NOTES: UNLESS OTHERWISE SPECIFIED
A) THIS PACKAGE DOES NOT COMPLY
TO ANY CURRENT PACKAGING STANDARD.
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH, AND TIE BAR EXTRUSIONS.
D) DIMENSIONS AND TOLERANCES PER
ASME Y14.5M-1994
MKT-TO263A6
© 2006 Fairchild Semiconductor Corporation
FSCM0465R Rev. 1.0.1
www.fairchildsemi.com
17
Package Dimensions (Continued)
I2-PAK-6L (Forming)
Dimensions are in millimeters unless otherwise specified.
MKT-TO262A6
© 2006 Fairchild Semiconductor Corporation
FSCM0465R Rev. 1.0.1
www.fairchildsemi.com
18
Package Dimensions (Continued)
TO-220-6L (Forming)
Dimensions are in millimeters unless otherwise specified.
© 2006 Fairchild Semiconductor Corporation
FSCM0465R Rev. 1.0.1
www.fairchildsemi.com
19
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an
exhaustive list of all such trademarks.
ACEx™
FAST®
FASTr™
FPS™
ISOPLANAR™
LittleFET™
PowerEdge™
PowerSaver™
SuperFET™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
ActiveArray™
Bottomless™
Build it Now™
CoolFET™
MICROCOUPLER™ PowerTrench®
FRFET™
GlobalOptoisolator™ MicroPak™
MicroFET™
QFET®
QS™
CROSSVOLT™ GTO™
MICROWIRE™
MSX™
MSXPro™
OCX™
QT Optoelectronics™ TCM™
DOME™
HiSeC™
Quiet Series™
RapidConfigure™
RapidConnect™
µSerDes™
TinyLogic®
EcoSPARK™
E2CMOS™
EnSigna™
FACT™
I2C™
TINYOPTO™
TruTranslation™
UHC™
i-Lo™
ImpliedDisconnect™ OCXPro™
IntelliMAX™
OPTOLOGIC®
OPTOPLANAR™
ScalarPump™
UniFET™
FACT Quiet Series™
SILENT SWITCHER® UltraFET®
Across the board. Around the world.™ PACMAN™
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HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE
APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER
ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S
WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR
SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
2. A critical component is any component of a life support device
As used herein:
or system whose failure to perform can be reasonably
expected to cause the failure of the life support device or sys-
tem, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body, or
(b) support or sustain life, or (c) whose failure to perform when
properly used in accordance with instructions for use provided
in the labeling, can be reasonably expected to result in signifi-
cant injury to the user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or In Design
This datasheet contains the design specifications for product
development. Specifications may change in any manner with-
out notice.
Preliminary
First Production
This datasheet contains preliminary data, and supplementary
data will be published at a later date. Fairchild Semiconductor
reserves the right to make changes at any time without notice
to improve design.
No Identification Needed
Obsolete
Full Production
This datasheet contains final specifications. Fairchild Semicon-
ductor reserves the right to make changes at any time without
notice to improve design.
Not In Production
This datasheet contains specifications on a product that has
been discontinued by Fairchild semiconductor. The datasheet
is printed for reference information only.
Rev. I19
© 2006 Fairchild Semiconductor Corporation
FSCM0465R Rev. 1.0.1
www.fairchildsemi.com
20
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