FSCM0565RIWDTU [FAIRCHILD]
Green Mode Fairchild Power Switch (FPS); 绿色模式飞兆功率开关( FPS )型号: | FSCM0565RIWDTU |
厂家: | FAIRCHILD SEMICONDUCTOR |
描述: | Green Mode Fairchild Power Switch (FPS) |
文件: | 总20页 (文件大小:468K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
www.fairchildsemi.com
FSCM0565R
TM
Green Mode Fairchild Power Switch (FPS )
Features
• Internal Avalanche Rugged SenseFET
• Low Start-up Current (max 40uA)
• Low Power Consumption under 1 W at 240VAC and
0.4W Load
OUTPUT POWER TABLE
(3)
230VAC ±15%
85-265VAC
PRODUCT
Adapt-
er
Open
Frame
Adapt- Open
er
(1)
(2)
(1)
(2)
Frame
• Precise Fixed Operating Frequency (66kHz)
• Frequency Modulation for low EMI
• Pulse by Pulse Current Limiting (Adjustable)
• Over Voltage Protection (OVP)
• Over Load Protection (OLP)
• Thermal Shutdown Function (TSD)
• Auto-Restart Mode
• Under Voltage Lock Out (UVLO) with Hysteresis
• Built-in Soft Start (15ms)
FSCM0565RJ
FSCM0765RJ
FSCM0565RI
FSCM0765RI
FSCM0565RG
FSCM0765RG
50W
65W
50W
65W
70W
85W
65W
70W
65W
70W
85W
95W
40W
50W
40W
50W
60W
70W
50W
60W
50W
60W
70W
85W
Table 1. Maximum Output Power
Notes:
1. Typical continuous power in a non-ventilated enclosed
adapter measured at 50°C ambient.
2. Maximum practical continuous power in an open-frame
Application
• SMPS for VCR, SVR, STB, DVD and DVCD
• Adaptor
design at 50°C ambient.
• SMPS for LCD Monitor
3. 230 VAC or 100/115 VAC with doubler.
Related Application Notes
• AN-4137: Design Guidelines for Off-line Flyback
Converters Using Fairchild Power Switch (FPS)
• AN-4140: Transformer Design Consideration for off-line
Flyback Converters using Fairchild Power Switch
• AN-4141: Troubleshooting and Design Tips for Fairchild
Power Switch Flyback Applications
Typical Circuit
DC
OUT
• AN-4148: Audible Noise Reduction Techniques for FPS
Applications
AC
IN
Drain
Description
PWM
The FSCM0565R is an integrated Pulse Width Modulator
(PWM) and SenseFET specifically designed for high
performance offline Switch Mode Power Supplies (SMPS)
with minimal external components. This device is an
integrated high voltage power switching regulator which
combines an avalanche rugged SenseFET with a current
mode PWM control block. The PWM controller includes
integrated fixed frequency oscillator, under voltage lockout,
leading edge blanking (LEB), optimized gate driver, internal
soft start, temperature compensated precise current sources
for a loop compensation, and self protection circuitry.
Compared with a discrete MOSFET and PWM controller
solution, it can reduce total cost, component count, size, and
weight while simultaneously increasing efficiency, productivity,
and system reliability. This device is a basic platform well
suited for cost effective designs of flyback converters.
Ilimit
Vfb
Vcc GND
Figure 1. Typical Flyback Application
TM
FPS is a trademark of Fairchild Semiconductor Corporation
Rev.1.1.0
©2005 Fairchild Semiconductor Corporation
FSCM0565R
Internal Block Diagram
VCC
3
N.C.
5
Drain
1
VCC Good
Internal
Bias
Vref
8V/12V
+
0.3/0.5V
Freq.
Modulation
-
VCC
IDELAY
VCC
OSC
IFB
PWM
S
Q
Q
2.5R
FB
4
6
Gate
Driver
R
R
Soft start
0.3K
LEB
I_limit
VSD
VCC
Vovp
TSD
2
GND
S
Q
Q
R
Vcc Good
VCC UV Reset
Figure 2. Functional Block Diagram of FSCM0565R
2
FSCM0565R
Pin Definitions
Pin Number
Pin Name
Pin Function Description
This pin is the high voltage power SenseFET drain. It is designed to drive the
transformer directly.
1
2
Drain
GND
This pin is the control ground and the SenseFET source.
This pin is the positive supply voltage input. Initially, During start up, the power is
supplied through the startup resistor from DC link. When Vcc reaches 12V, the
power is supplied from the auxiliary transformer winding.
3
V
CC
This pin is internally connected to the inverting input of the PWM comparator.
The collector of an optocoupler is typically tied to this pin. For stable operation, a
4
Feedback (FB) capacitor should be placed between this pin and GND. If the voltage of this pin
reaches 6.0V, the over load protection is activated resulting in shutdown of the
FPS.
This pin is not connected.
5
6
N.C.
This pin is for the pulse by pulse current limit level programming. By using a
resistor to GND on this pin, the current limit level can be changed. If this pin is
left floating, the typical current limit will be 2.5A.
I
limit
Pin Configuration
FSCM0565RI
I2-PAK-6L
FSCM0565RJ
D2-PAK-6L
6 : I_limit
5 : N.C.
4 : FB
3 : Vcc
2 : GND
6 : I_limit
5 : N.C.
4 : FB
3 : Vcc
2 : GND
1 : Drain
1 : Drain
FSCM0565RG
TO-220-6L
6. I_limit
5. N.C.
4. FB
3. Vcc
2. GND
1. Drain
Figure 3. Pin Configuration (Top View)
3
FSCM0565R
Absolute Maximum Ratings
(Ta=25°C, unless otherwise specified.)
Parameter
Drain-Source (GND) Voltage (1)
Symbol
Value
650
650
±30
20
Unit
V
V
DSS
Drain-Gate Voltage (R =1MΩ)
V
DGR
V
GS
Gate-Source (GND) Voltage
Drain Current Pulsed (2)
V
V
GS
I
A
DM
DC
Continuous Drain Current (D2-PAK, I2-PAK)
@ Tc = 25°C
I
I
3.9
2.5
A
A
D
D
DC
DC
@ Tc =100°C
Continuous Drain Current (TO-220)
@ Tc = 25°C
I
I
5
A
DC
A
DC
V
D
@ Tc =100°C
3.2
20
D
Supply Voltage
V
CC
Analog Input Voltage Range
Total Power Dissipation (D2-PAK,I2-PAK)
Total Power Dissipation (TO-220)
Operating Junction Temperature
Operating Ambient Temperature
Storage Temperature Range
V
-0.3 to V
75
V
FB
CC
P
W
W
D
D
P
120
T
Internally limited
-25 to +85
°C
°C
°C
J
T
A
T
-55 to +150
STG
2.0
ESD Capability, HBM Model
(All pins except Vfb)
(GND-Vfb = 1.5kV)
(Vcc-Vfb = 1.0kV)
kV
V
-
-
300
ESD Capability, Machine Model
(All pins except Vfb)
(GND-Vfb = 250V)
(Vcc-Vfb = 100V)
Notes:
1. T = 25°C to 150°C
j
2. Repetitive rating: Pulse width limited by maximum junction temperature.
Thermal Impedance
Parameter
Symbol
Value
-
Unit
°C/W
°C/W
°C/W
(1)
Junction-to-Ambient Thermal
Junction-to-Case Thermal (D2-PAK, I2-PAK)
Junction-to-Case Thermal (TO-220)
θJA
(2)
θJC
1.7
1.0
(2)
θJC
Note:
1. Free standing with no heat-sink under natural convection
2. Infinite cooling condition - Refer to the SEMI G30-88.
4
FSCM0565R
Electrical Characteristics
(Ta = 25°C unless otherwise specified.)
Parameter
SenseFET SECTION
Symbol
Condition
Min. Typ. Max. Unit
Drain Source Breakdown Voltage
BV
DSS
V
= 0V, I = 250μA
650
-
-
-
V
μA
Ω
GS
D
V
V
= Max, Rating
= 0V
DS
GS
Zero-Gate-Voltage Current
I
-
-
500
2.2
DSS
Static Drain Source on Resistance (1)
R
V
= 10V, I = 2.3A
D
1.76
DS(ON)
GS
V
= 0V, V
= 25V,
DS
GS
f = 1MHz
Output Capacitance
C
-
78
-
pF
OSS
Turn on Delay Time
Rise Time
T
V
= 325V, I = 5A
-
-
-
-
22
52
95
50
-
-
-
-
D(ON)
DD
D
(MOSFET switching
time is essentially
independent of
T
R
ns
Turn off Delay Time
Fall Time
T
D(OFF)
operating temperature)
T
F
CONTROL SECTION
Initial Frequency
F
V
= 14V, V = 5V
CC FB
60
-
66
±3
4
72
-
kHz
kHz
ms
%
OSC
Modulated Frequency Range
Frequency Modulation Cycle
Voltage Stability
ΔF
-
-
mod
T
-
-
mod
F
10V ≤ V
≤ 17V
CC
0
1
3
STABLE
Temperature Stability (2)
Maximum Duty Cycle
Minimum Duty Cycle
Start Threshold Voltage
Stop Threshold Voltage
Feedback Source Current
Soft-start Time
ΔF
−25°C ≤ Ta ≤ +85°C
-
±5
80
-
±10
85
0
%
OSC
DMAX
DMIN
-
-
75
-
%
%
V
V
V
V
= GND
= GND
= GND
11
7
12
8
13
9
V
START
FB
FB
FB
V
V
STOP
I
0.7
10
0.9
15
1.1
20
mA
ms
FB
T
-
SS
BURST MODE SECTION
V
V
V
=14V
0.4
0.5
0.3
0.6
V
V
BH
CC
CC
Burst Mode Voltages (2)
VB
= 14V
0.24
0.36
L
Notes:
1. Pulse Test: Pulse width ≤ 300μS, duty ≤ 2%
2. These parameters, although guaranteed at the design, are not tested in mass production.
5
FSCM0565R
PROTECTION SECTION
Peak Current Limit(2)
I
V
= 14V, V = 5V
FB
2.2
18
2.5
19
2.8
20
A
V
LIM
CC
Over Voltage Protection
Thermal Shutdown Temperature(1)
ShutdownDelay Current
Shutdown Feedback Voltage
V
-
OVP
T
130
3.5
5.5
145
5.3
6
160
7
°C
μA
V
SD
DELAY
I
V
V
= 4V
FB
FB
V
> 5.5V
6.5
SD
TOTAL DEVICE SECTION
Startup Current
I
-
-
20
40
5
μA
start
I
V
V
= 10V, V = 0V
FB
OP(MIN)
CC
CC
Operating Supply Current(3)
2.5
mA
I
= 20V, V = 0V
FB
OP(MAX)
Notes:
1. These parameters, although guaranteed at the design, are not tested in mass production.
2. These parameters indicate the inductor current.
3. This parameter is the current flowing into the control IC.
6
FSCM0565R
Comparison Between FSDM0565RB and FSCM0565R
Function
FSDM0565RB
FSCM0565R
Frequency Modulation
N/A
Available
• Modulated frequency range (DF
) = ±3kHz
mod
• Frequency modulation cycle (T
mod
) = 4ms
Pulse-by-pulse Current Limit • Internally fixed (2.25A)
Internal Startup Circuit • Available
• Programmable using external resistor (2.5A max)
• N/A (Requires a startup resistor)
• Startup current: 40uA (max)
7
FSCM0565R
Typical Performance Characteristics
(These Characteristic Graphs are Normalized at Ta= 25°C.)
1.60
1.40
1.20
1.00
0.80
0.60
1.20
1.12
1.04
0.96
0.88
0.80
-50 -25
0
25 50 75 100 125
-50 -25
0
25 50 75 100 125
Junction Temperature (
)
℃
Junction Temperature (
)
℃
Figure 4. Startup Current vs. Temp
Figure 7. Start Threshold Voltage vs. Temp
1.20
1.12
1.04
0.96
0.88
0.80
1.20
1.12
1.04
0.96
0.88
0.80
-50 -25
0
25 50 75 100 125
-50 -25
0
25 50 75 100 125
Junction Temperature (
)
Junction Temperature (
)
℃
℃
Figure 5 Stop Threshold Voltage vs. Temp
Figure 8. Initial Freqency vs. Temp
1.20
1.12
1.04
0.96
0.88
0.80
1.20
1.12
1.04
0.96
0.88
0.80
-50 -25
0
25 50 75 100 125
-50 -25
0
25 50 75 100 125
Junction Temperature (
)
Junction Temperature (
)
℃
℃
Figure 6. Maximum Duty Cycle vs. Temp
Figure 9. Feedback Source Current vs. Temp
8
FSCM0565R
Typical Performance Characteristics (Continued)
(These Characteristic Graphs are Normalized at Ta= 25°C.)
1.20
1.12
1.04
0.96
0.88
0.80
1.20
1.12
1.04
0.96
0.88
0.80
-50 -25
0
25 50 75 100 125
-50 -25
0
25 50 75 100 125
Junction Temperature (
)
℃
Junction Temperature (
)
℃
Figure 10. Shutdown Feedback Voltage vs. Temp
Figure 13. Shutdown Delay Current vs. Temp
1.20
1.12
1.04
0.96
0.88
0.80
1.20
1.12
1.04
0.96
0.88
0.80
-50 -25
0
25 50 75 100 125
-50 -25
0
25 50 75 100 125
Junction Temperature (
)
Junction Temperature (
)
℃
℃
Figure 11. Burst Mode Enable Voltage vs. Temp
Figure 14. Burst Mode Disable Voltage vs. Temp
1.20
1.12
1.04
0.96
0.88
0.80
1.20
1.12
1.04
0.96
0.88
0.80
-50 -25
0
25 50 75 100 125
-50 -25
0
25 50 75 100 125
Junction Temperature (
)
Junction Temperature (
)
℃
℃
Figure 12. Macimum Drain Current vs. Temp
Figure 15. Operating Supply Current vs. Temp
9
FSCM0565R
Functional Description
1. Startup: Figure 16 shows the typical startup circuit and
transformer auxiliary winding for the FSCM0565R
application. Before the FSCM0565R begins switching, it
consumes only startup current (typically 25uA) and the
current supplied from the DC link supply current consumed
= ( 2 ⋅ Vlinemin – Vstart) ⋅
min
1
-----------
I
sup
R
str
min
where V
is the minimum input voltage, V
is the
start
line
start voltage (12V) and R is the startup resistor. The startup
str
resistor should be chosen so that I
sup
maximum startup current (40uA). If not, V
CC
min
is larger than the
can not be
by the FPS (Icc), and charges the external capacitor (C ) that
a
is connected to the Vcc pin. When Vcc reaches start voltage
of 12V (VSTART), the FSCM0565R begins switching, and the
current consumed by the FSCM0565R increases to 3mA.
Then, the FSCM0565R continues its normal switching
operation and the power required for this device is supplied
from the transformer auxiliary winding, unless Vcc drops
below the stop voltage of 8V (VSTOP). To guarantee the
stable operation of the control IC, Vcc has under voltage
lockout (UVLO) with 4V hysteresis. Figure 17 shows the
charged to the start voltage and FPS will fail to start up.
2. Feedback Control: The FSCM0565R employs current
mode control, as shown in Figure 18. An opto-coupler (such
as the H11A817A) and a shunt regulator (such as the
KA431) are typically used to implement the feedback
network. Comparing the feedback voltage with the voltage
across the Rsense resistor makes it possible to control the
switching duty cycle. When the reference pin voltage of the
KA431 exceeds the internal reference voltage of 2.5V, the
H11A817A LED current increases, thus pulling down the
feedback voltage and reducing the duty cycle. This event
typically happens when the input voltage is increased or the
output load is decreased.
relation between the current consumed by the FPS (I
CC)
and
the supply voltage (V
)
CC
CDC
2.1 Pulse-by-pulse Current Limit: Because current mode
control is employed, the peak current through the SenseFET
is determined by the inverting input of the PWM comparator
(Vfb*) as shown in Figure 18. When the current through the
opto transistor is zero and the current limit pin (#5) is left
AC line
min
max
(Vline
- Vline
)
I
SUP
Rstr
floating, the feedback current source (I ) of 0.9mA flows
FB
Da
only through the internal resistor (R+2.5R=2.8k). In this
case, the cathode voltage of diode D2 and the peak drain
current have maximum values of 2.5V and 2.5A, respec-
tively. The pulse-by-pulse current limit can be adjusted using
a resistor to GND on the current limit pin (#5). The current
VC C
IC C
FSCM0565R
Ca
limit level using an external resistor (R
) is given by
LIM
RLIM ⋅ 2.5A
------------------------------------
ILIM
=
2.8kΩ + RLIM
Figure 16. Startup Circuit
ICC
Vcc
Vref
IFB 0.9mA
Idelay
Vfb
Vo
SenseFET
OSC
4
H11A817A
D1
D2
CB
2.5R
R
3mA
0.3k
+
Vfb*
Gate
driver
KA431
Power Up
6
-
Power Down
RLI M
25uA
OLP
Rsense
VCC
VSD
Vstop=8V
Vstart=12V
Vz
Figure 17. Relation Between Operating Supply Current
and Vcc Voltage
Figure 18. Pulse Width Modulation (PWM) Circuit
The minimum current supplied through the startup resistor is
given by
2.2 Leading Edge Blanking (LEB): At the instant the
internal SenseFET is turned on, there usually exists a high
10
FSCM0565R
current spike through the SenseFET, caused by primary-side
capacitance and secondary-side rectifier reverse recovery.
Excessive voltage across the Rsense resistor can lead to
incorrect feedback operation in the current mode PWM
control. To counter this effect, the FSCM0565R employs a
leading edge blanking (LEB) circuit. This circuit inhibits the
determine whether it is a transient situation or an overload
situation. Because of the pulse-by-pulse current limit
capability, the maximum peak current through the SenseFET
is limited, and therefore the maximum input power is
restricted with a given input voltage. If the output consumes
beyond this maximum power, the output voltage (Vo)
decreases below the set voltage. This reduces the current
through the opto-coupler LED, which also reduces the opto-
coupler transistor current, thus increasing the feedback
voltage (Vfb). If Vfb exceeds 2.5V, D1 is blocked and the
PWM comparator for a short time (T
is turned on.
) after the SenseFET
LEB
3. Protection Circuit: The FSCM0565R has several self
protective functions such as over load protection (OLP), over
voltage protection (OVP) and thermal shutdown (TSD).
Because these protection circuits are fully integrated into the
IC without external components, the reliability can be
improved without increasing cost. Once the fault condition
occurs, switching is terminated and the SenseFET remains
off. This causes Vcc to fall. When Vcc reaches the UVLO
stop voltage of 8V, the current consumed by the
FSCM0565R decreases to the startup current (typically
25uA) and the current supplied from the DC link charges the
5.3uA current source (I
) starts to charge C slowly up to
B
delay
Vcc. In this condition, Vfb continues increasing until it
reaches 6V, when the switching operation is terminated as
shown in Figure 20. The delay time for shutdown is the time
required to charge C from 2.5V to 6.0V with 5.3uA (I
delay
).
B
In general, a 10 ~ 50 ms delay time is typical for most
applications.
VFB
external capacitor (C ) that is connected to the Vcc pin.
a
Over Load Protection
When Vcc reaches the start voltage of 12V, the FSCM0565R
resumes its normal operation. In this manner, the auto-restart
can alternately enable and disable the switching of the power
SenseFET until the fault condition is eliminated (see Figure
19).
6.0V
2.5V
Fault
occurs
Fault
removed
T12= Cfb*(6.0-2.5)/Idelay
Power
On
Vds
T1
T2
t
Figure 20. Over Load Protection
3.2 Over Voltage Protection (OVP): If the secondary side
feedback circuit were to malfunction or a solder defect
caused an open in the feedback path, the current through the
opto-coupler transistor becomes almost zero. Then, Vfb
climbs up in a similar manner to the over load situation,
forcing the preset maximum current to be supplied to the
SMPS until the over load protection is activated. Because
more energy than required is provided to the output, the
output voltage may exceed the rated voltage before the over
load protection is activated, resulting in the breakdown of the
devices in the secondary side. To prevent this situation, an
over voltage protection (OVP) circuit is employed. In
general, Vcc is proportional to the output voltage and the
FSCM0565R uses Vcc instead of directly monitoring the
Vcc
12V
8V
t
Normal
Operation
Fault
Situation
Normal
Operation
Figure 19. Auto Restart Operation
output voltage. If V
exceeds 19V, an OVP circuit is
CC
activated resulting in the termination of the switching
operation. To avoid undesired activation of OVP during
normal operation, Vcc should be designed to be below 19V.
3.1 Over Load Protection (OLP): Overload is defined as
the load current exceeding a pre-set level due to an
unexpected event. In this situation, the protection circuit
should be activated to protect the SMPS. However, even
when the SMPS is in the normal operation, the over load
protection circuit can be activated during the load transition.
To avoid this undesired operation, the over load protection
circuit is designed to be activated after a specified time to
3.3 Thermal Shutdown (TSD): The SenseFET and the
11
FSCM0565R
control IC are built in one package. This makes it easy for
the control IC to detect the heat generation from the
SenseFET. When the temperature exceeds approximately
145°C, the thermal protection is triggered resulting in
shutdown of the FPS.
voltage to rise. Once it passes VBH (500mV), switching
resumes. The feedback voltage then falls, and the process
repeats. Burst mode operation alternately enables and
disables switching of the power SenseFET, thereby reducing
switching loss in standby mode.
4. Frequency Modulation: EMI reduction can be
accomplished by modulating the switching frequency of a
switched power supply. Frequency modulation can reduce
EMI by spreading the energy over a wider frequency range
than the band width measured by the EMI test equipment.
The amount of EMI reduction is directly related to the depth
of the reference frequency. As can be seen in Figure 21, the
frequency changes from 63KHz to 69KHz in 4ms.
Vo
Voset
VFB
0.5V
0.3V
Drain Current
Ids
Ts
Ts
Vds
Ts
time
fs
Switching
Switching
disabled
disabled
69kHz
66kHz
63kHz
T4
T2 T3
T1
Figure 22. Waveforms of Burst Operation
4ms
t
Figure 21. Frequency Modulation
5. Soft Start: The FSCM0565R has an internal soft start
circuit that increases PWM comparator inverting input
voltage together with the SenseFET current slowly after it
starts up. The typical soft start time is15ms. The pulse width
to the power switching device is progressively increased to
establish the correct working conditions for transformers,
rectifier diodes and capacitors. The voltage on the output
capacitors is progressively increased with the intention of
smoothly establishing the required output voltage.
Preventing transformer saturation and reducing stress on the
secondary diode during start up is also helpful.
6. Burst Operation: To minimize power dissipation in
standby mode, the FSCM0565R enters into burst mode
operation at light load condition. As the load decreases, the
feedback voltage decreases. As shown in Figure 22, the
device automatically enters into burst mode when the
feedback voltage drops below VBL (300mV). At this point
switching stops and the output voltages start to drop at a rate
dependent on standby current load. This causes the feedback
12
FSCM0565R
Typical application circuit
Application
Output Power
40W
Input Voltage
Universal Input
(85-265Vac)
Output Voltage (Max Current)
5V (2.0A)
LCD Monitor
12V (2.5A)
Features
• High efficiency (>81% at 85Vac input)
• Low standby mode power consumption (<1W at 240Vac input and 0.4W load)
• Low component count
• Enhanced system reliability through various protection functions
• Low EMI through frequency modulation
• Internal soft-start (15ms)
Key Design Notes
• Resistors R102 and R105 are employed to prevent start-up at low input voltage
• The delay time for over load protection is designed to be about 50ms with C106 of 47nF. If a faster triggering of OLP is
required, C106 can be reduced to 22nF.
1. Schematic
L20
1
D202
T1
EER3016
MBRF10100
12V,
2.5A
10
8
C202
1000u
F
1
2
C201
1000uF
25V
R102
500kΩ
C104
2.2nF
1kV
25V
R103
56kΩ
2W
R105
D101 500kΩ
UF 4007
C103
100uF
400V
3
BD101
2
2KBP06M3N257
FSCM0565R
1
1
3
6
3
Drain
Vcc
Ilimit
L20
2
R106
5kΩ
1/4W
5
4
D201
MBRF1045
N.C
5V, 2A
Vf
b
4
7
4
C204
1000u
F
D102
TVR10G
R104
5Ω
GND
2
C105
22uF
50V
C203
1000uF
10V
C102
220nF
275VA
C
C106
47nF
50V
ZD10
1
22V
10V
6
5
C301
4.7n
F
LF101
23mH
R201
1kΩ
R101
560kΩ
1W
R204
5.6kΩ
R202
1.2kΩ
R203
10kΩ
C205
47nF
IC301
H11A817A
IC201
KA431
C101
220nF
275VA
C
F1
RT1
5D-9
FUSE
250V
2A
R205
5.6kΩ
Figure 23. Demo Circuit
13
FSCM0565R
2. Transformer
EER3016
1
2
3
10
9
Np/2
Np/2
N12V
8
4
5
7
N5V
6
Na
Figure 24. Transformer Schematic Diagram
3.Winding Specification
No
Pin (s→f)
4 → 5
Wire
0.2φ × 1
Turns
Winding Method
Na
8
Center Winding
Insulation: Polyester Tape t = 0.050mm, 2Layers
Np/2 2 → 1
0.4φ × 1
Insulation: Polyester Tape t = 0.050mm, 2Layers
10 → 8
0.3φ × 3
Insulation: Polyester Tape t = 0.050mm, 2Layers
N5V 7 → 6
0.3φ × 3
Insulation: Polyester Tape t = 0.050mm, 2Layers
Np/2 3 → 2
0.4φ × 1
18
7
Solenoid Winding
Center Winding
Center Winding
Solenoid Winding
N
12V
3
18
Outer Insulation: Polyester Tape t = 0.050mm, 2Layers
4.Electrical Characteristics
Pin
Specification
520uH ± 10%
10uH Max
Remarks
Inductance
1 - 3
1 - 3
100kHz, 1V
2
nd all Short
Leakage Inductance
5. Core & Bobbin
Core: EER 3016
Bobbin: EER3016
Ae(mm2): 96
14
FSCM0565R
6. Demo Circuit Part List
Part
F101
Value
2A/250V
5D-9
Note
Part
Value
Note
Fuse
NTC
C301
4.7nF
Polyester Film Cap.
Inductor
RT101
L201
L202
5uH
5uH
Wire 1.2mm
Wire 1.2mm
Resistor
R101
R102
R103
R104
R105
R106
R201
R202
R203
R204
R205
560K
500K
56K
5
1W
1/4W
2W
1/4W
1/4W
1/4W
1/4W
1/4W
1/4W
1/4W
1/4W
Diode
500K
5K
D101
D102
D201
D202
UF4007
TVR10G
1K
MBRF1045
10K
1.2K
5.6K
5.6K
MBRF10100
Bridge Diode
BD101 2KBP06M 3N257
Bridge Diode
Wire 0.4mm
Capacitor
C101
C102
C103
C104
C105
C106
C201
C202
C203
C204
C205
220nF/275VAC
220nF/275VAC
100uF/400V
10nF/1kV
Box Capacitor
Line Filter
IC
Box Capacitor
LF101
23mH
Electrolytic Capacitor
Ceramic Capacitor
Electrolytic Capacitor
Ceramic Capacitor
Electrolytic Capacitor
Electrolytic Capacitor
Electrolytic Capacitor
Electrolytic Capacitor
Ceramic Capacitor
IC101
IC201
IC301
FSCM0565R
KA431(TL431)
H11A817A
FPSTM
22uF/50V
Voltage Reference
Opto-coupler
47nF/50V
1000uF/25V
1000uF/25V
1000uF/10V
1000uF/10V
47nF/50V
15
FSCM0565R
Package Dimensions
D2-PAK-6L
A
10.10
9.70
1.40
1.00
MIN 9.50
9.40
9.00
MIN 9.00
(0.75)
5.10
10.00
MAX0.80
MIN 4.00
4.70
0.70
0.50
MAX1.10
MIN 0.85
2.19
2.19
1.75
1.27
3.81
1.27
1.75
10.20
9.80
B
4.70
4.30
(8.58)
(4.40)
1.40
1.25
R0.45
(1.75)
(0.90)
(7.20)
15.60
15.00
SEE
DETAIL A
NOTES: UNLESS OTHERWISE SPECIFIED
A) THIS PACKAGE DOES NOT COMPLY
TO ANY CURRENT PACKAGING STANDARD.
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH, AND TIE BAR EXTRUSIONS.
D) DIMENSIONS AND TOLERANCES PER
ASME Y14.5M-1994
16
FSCM0565R
Package Dimensions (Continued)
I2-PAK-6L (Forming)
17
FSCM0565R
Package Dimensions (Continued)
Dimensions in Millimeters
TO-220-6L (Forming)
4.70
4.30
10.10
9.70
1.40
1.25
2.90
2.70
15.90
15.50
20.00
19.00
(13.55)
9.40
9.00
23.80
23.20
(0.65)
R0.55
R0.55
(0.75)
2.60
2.20
8.30
7.30
MAX0.80
MAX1.10
(7.15)
0.70
0.50
0.60
0.45
2.19
1.75
3.48
2.88
1.27
3.81
10.20
9.80
18
FSCM0565R
Ordering Information
Product Number
FSCM0565RJ
Package
D2-PAK-6L
I2-PAK-6L
TO-220-6L
Marking Code
BVdss
Rds(on) Max.
FSCM0565RIWDTU
FSCM0565RGWDTU
CM0565R
650V
2.2 Ω
19
FSCM0565R
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER
DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
12/15/05 0.0m 001
© 2005 Fairchild Semiconductor Corporation
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FAIRCHILD
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