FSCM0565RCYDTU [FAIRCHILD]
Green Mode Fairchild Power Switch (FPS); 绿色模式飞兆功率开关（ FPS ）
| 型号： | FSCM0565RCYDTU |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Green Mode Fairchild Power Switch (FPS) |
| 文件： | 总20页 (文件大小：347K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
www.fairchildsemi.com
FSCM0565R
TM
Green Mode Fairchild Power Switch (FPS )
Table 1. Maximum Output Power
Features
• Internal Avalanche Rugged Sense FET
OUTPUT POWER TABLE
(3)
230VAC ±15%
85-265VAC
• Low startup current (max 40uA)
• Low power consumption under 1 W at 240VAC & 0.4W
load
• Precise Fixed Operating Frequency (66kHz)
• Frequency Modulation for low EMI
• Pulse by Pulse Current Limiting (Adjustable)
• Over Voltage Protection (OVP)
• Over Load Protection (OLP)
PRODUCT
Adapt-
er
Open
Frame
Adapt-
er
Open
(1)
(2)
(1)
(2)
Frame
50W
60W
70W
85W
FSCM0565RD
FSCM0765RD
FSCM0565RC
FSCM0765RC
50W
65W
70W
85W
65W
70W
85W
95W
40W
50W
60W
70W
• Thermal Shutdown Function (TSD)
• Auto-Restart Mode
• Under Voltage Lock Out (UVLO) with hysteresis
• Built-in Soft Start (15ms)
Notes:
1. Typical continuous power in a non-ventilated enclosed
adapter measured at 50°C ambient.
2. Maximum practical continuous power in an open frame
design at 50°C ambient.
3. 230 VAC or 100/115 VAC with doubler.
Application
• SMPS for VCR, SVR, STB, DVD & DVCD
• Adaptor
• SMPS for LCD Monitor
Typical Circuit
Description
The FSCM0565R is an integrated Pulse Width Modulator
(PWM) and Sense FET specifically designed for high
performance offline Switch Mode Power Supplies (SMPS)
with minimal external components. This device is an
integrated high voltage power switching regulator which
combine an avalanche rugged Sense FET with a current
mode PWM control block. The PWM controller includes
integrated fixed frequency oscillator, under voltage lockout,
leading edge blanking (LEB), optimized gate driver, internal
soft start, temperature compensated precise current sources
for a loop compensation and self protection circuitry.
Compared with discrete MOSFET and PWM controller
solution, it can reduce total cost, component count, size and
weight simultaneously increasing efficiency, productivity, and
system reliability. This device is a basic platform well suited
for cost effective designs of flyback converters.
DC
OUT
AC
IN
Drain
PWM
Ilimit
Vfb
Vcc GND
Figure 1. Typical Flyback Application
Rev.1.0.0
©2005 Fairchild Semiconductor Corporation
FSCM0565R
Internal Block Diagram
Vcc
3
Drain
1
Vcc good
Internal
Bias
Vref
8V/12V
+
0.3/0.5V
Freq.
Modulation
-
Vcc
Idelay
Vcc
OSC
IFB
PWM
S
Q
Q
2.5R
FB
4
5
Gate
driver
R
R
Ilimit
Soft start
0.3K
LEB
VSD
Vcc
Vovp
TSD
2
GND
S
Q
Q
R
Vcc good
Vcc UV reset
Figure 2. Functional Block Diagram of FSCM0565R
2
FSCM0565R
Pin Definitions
Pin Number
Pin Name
Pin Function Description
This pin is the high voltage power SenseFET drain. It is designed to drive the
transformer directly.
1
2
Drain
GND
This pin is the control ground and the SenseFET source.
This pin is the positive supply voltage input. Initially, During start up, the power is
supplied through the startup resistor from DC link. When Vcc reaches 12V, the
power is supplied from auxiliary transformer winding.
3
4
5
Vcc
This pin is internally connected to the inverting input of the PWM comparator.
The collector of an optocoupler is typically tied to this pin. For stable operation, a
Feedback (FB) capacitor should be placed between this pin and GND. If the voltage of this pin
reaches 6.0V, the over load protection is activated resulting in shutdown of the
FPS.
This pin is for the pulse by pulse current limit level programming. By using a
resistor to GND on this pin, the current limit level can be changed. If this pin is
left floating, the typical current limit will be 2.5A.
I_limit
Pin Configuration
FSCM0565RC
TO-220-5L
FSCM0565RD
D2-PAK-5L
5. I_limit
4. FB
5 : I_limit
4 : FB
3 : Vcc
3. Vcc
2. GND
2 : GND
1. Drain
1 : Drain
Figure 3. Pin Configuration (Top View)
3
FSCM0565R
Absolute Maximum Ratings
(Ta=25°C, unless otherwise specified)
Parameter
Drain-Source (GND) Voltage (1)
Symbol
Value
650
650
±30
20
Unit
V
V
DSS
Drain-Gate Voltage (R =1MΩ)
V
DGR
V
GS
Gate-Source (GND) Voltage
Drain Current Pulsed (2)
Continuous Drain Current (TO-220)
@ Tc = 25°C
V
V
GS
DM
I
A
DC
I
I
5
A
A
D
D
DC
@ T =100°C
C
3.2
DC
Continuous Drain Current (D2-PAK)
@ Tc = 25°C
I
I
2.9
1.9
A
DC
A
DC
V
D
@ T =100°C
C
D
Supply Voltage
V
20
CC
Analog Input Voltage Range
V
-0.3 to V
75
V
FB
CC
P
W
W/°C
W
D
Total Power Dissipation (D2-PAK)
Total Power Dissipation (TO-220)
Derating
0.6
P
120
D
Derating
0.96
W/°C
°C
Operating Junction Temperature
Operating Ambient Temperature
Storage Temperature Range
T
Internally limited
-25 to +85
J
T
°C
A
STG
-
T
-55 to +150
°C
ESD Capability, HBM Model (All pins
excepts for Vstr and Vfb)
2.0
kV
(Vcc-Vfb=1.0kV)
ESD Capability, Machine Model (All pins
excepts for Vstr and Vfb)
300
V
-
(Vcc-Vfb=100V)
Notes:
1. T = 25°C to 150°C
j
2. Repetitive rating: Pulse width limited by maximum junction temperature
3. L = 30mH, V = 50V, R = 25Ω, starting T = 25°C
DD
G
j
4. L = 13uH, starting T = 25°C
j
4
FSCM0565R
Electrical Characteristics
(Ta = 25°C unless otherwise specified)
Parameter
Sense FET SECTION
Symbol
Condition
Min. Typ. Max. Unit
Drain source breakdown voltage
BV
DSS
V
= 0V, I = 250µA
650
-
-
-
V
µA
Ω
GS
D
V
V
= Max, Rating
= 0V
DS
GS
Zero gate voltage drain current
Static drain source on resistance
I
-
-
500
2.2
DSS
R
V
GS
= 10V, I = 2.3A
1.76
DS(ON)
D
V
= 0V, V = 25V,
DS
GS
f = 1MHz
Output capacitance
C
-
78
-
pF
OSS
Turn on delay time
Rise time
T
V
= 325V, I = 5A
-
-
-
-
22
52
95
50
-
-
-
-
D(ON)
DD
D
(MOSFET switching
time is essentially
independent of
T
R
ns
Turn off delay time
Fall time
T
D(OFF)
operating temperature)
T
F
CONTROL SECTION
Initial frequency
F
V
=14V, V =5V
60
-
66
±3
4
72
-
kHz
kHz
ms
%
OSC
CC FB
Modulated frequency range
Frequency modulation cycle
Voltage stability
∆F
-
-
mod
T
-
-
mod
F
10V≤V ≤17V
0
1
3
STABLE
CC
Temperature stability
Maximum duty cycle
Minimum duty cycle
Start threshold voltage
Stop threshold voltage
Feedback source current
Soft-start time
∆F
−25°C≤Ta≤+85°C
-
±5
80
-
±10
85
0
%
OSC
D
MAX
MIN
-
-
75
-
%
D
%
V
V
FB
V
FB
V
FB
=GND
=GND
=GND
11
7
12
8
13
9
V
START
V
V
STOP
I
0.7
10
0.9
15
1.1
20
mA
ms
FB
T
-
SS
BURST MODE SECTION
V
Vcc=14V
Vcc=14V
0.4
0.5
0.3
0.6
V
V
BH
Burst Mode Voltages
VB
0.24
0.36
L
5
FSCM0565R
PROTECTION SECTION
Peak current limit
I
V
=14V, V =5V
2.2
18
2.5
19
2.8
20
A
V
LIM
CC FB
Over voltage protection
Thermal shutdown temperature
Shutdown delay current
Shutdown feedback voltage
TOTAL DEVICE SECTION
Startup current
V
-
OVP
T
130
3.5
5.5
145
5.3
6
160
7
°C
µA
V
SD
DELAY
I
V
V
=4V
FB
V
>5.5V
6.5
SD
FB
I
-
-
20
40
5
µA
start
I
V
V
=10V, V =0V
FB
OP(MIN)
CC
Operating supply current
2.5
mA
I
=20V, V =0V
FB
OP(MAX)
CC
Notes:
1. Pulse test : Pulse width ≤ 300µS, duty ≤ 2%
2. These parameters, although guaranteed at the design, are not tested in mass production.
3. These parameters, although guaranteed, are tested in EDS (wafer test) process.
4. These parameters indicate the inductor current.
5. This parameter is the current flowing into the control IC.
6
FSCM0565R
Comparison Between FSDM0565RB and FSCM0565R
Function
FSDM0565RB
FSCM0565R
Frequency modulation
N.A.
Available
• Modulated frequency range (DF
• Frequency modulation cycle (T
mod
) = ±3kHz
mod
) = 4ms
Pulse-by-pulse current limit • Internally fixed (2.25A)
Internal Startup Circuit • Available
• Programmable using external resistor (2.5A max)
• N.A. (Requires startup resistor)
• Startup current : 40uA (max)
7
FSCM0565R
Typical Performance Characteristics
(These Characteristic Graphs are Normalized at Ta= 25°C)
1.60
1.40
1.20
1.00
0.80
0.60
1.20
1.12
1.04
0.96
0.88
0.80
-50 -25
0
25
50
75 100 125
-50 -25
0
25
50
75 100 125
Junction Temperature(
)
℃
Junction Temperature(
)
℃
Startup Current vs. Temp
Start Threshold Voltage vs. Temp
1.20
1.12
1.04
0.96
0.88
0.80
1.20
1.12
1.04
0.96
0.88
0.80
-50 -25
0
25
50
75 100 125
-50 -25
0
25
50
75 100 125
Junction Temperature(
)
℃
Junction Temperature(
)
℃
Stop Threshold Voltage vs. Temp
Initial Freqency vs. Temp
1.20
1.12
1.04
0.96
0.88
0.80
1.20
1.12
1.04
0.96
0.88
0.80
-50 -25
0
25
50
75 100 125
-50 -25
0
25
50
75 100 125
Junction Temperature(
)
℃
Junction Temperature(
)
℃
Maximum Duty Cycle vs. Temp
Feedback Source Current vs. Temp
8
FSCM0565R
Typical Performance Characteristics (Continued)
(These Characteristic Graphs are Normalized at Ta= 25°C)
1.20
1.12
1.04
0.96
0.88
0.80
1.20
1.12
1.04
0.96
0.88
0.80
-50 -25
0
25
50
75 100 125
-50 -25
0
25
50
75 100 125
Junction Temperature(
)
℃
Junction Temperature(
)
℃
ShutDown Feedback Voltage vs. Temp
ShutDown Delay Current vs. Temp
1.20
1.12
1.04
0.96
0.88
0.80
1.20
1.12
1.04
0.96
0.88
0.80
-50 -25
0
25
50
75 100 125
-50 -25
0
25
50
75 100 125
Junction Temperature(
)
℃
Junction Temperature(
)
℃
Bust Mode Enable Volage vs. Temp
Burst Mode Disable Voltage vs. Temp
1.20
1.12
1.04
0.96
0.88
0.80
1.20
1.12
1.04
0.96
0.88
0.80
-50 -25
0
25
50
75 100 125
-50 -25
0
25
50
75 100 125
Junction Temperature(
)
℃
Junction Temperature(
)
℃
Mavimum Drain Current vs. Temp
Operating Supply Current vs. Temp
9
FSCM0565R
The minimum current supplied through the startup resistor is
given by
Functional Description
1. Startup : Figure 4 shows the typical startup circuit and
transformer auxiliary winding for FSCM0565R application.
Before FSCM0565R begins switching, FSCM0565R
consumes only startup current (typically 25uA) and the
current supplied from the DC link supply ccurrent consumed
min
1
-----------
I
= (
2
Vlinemin – Vstart
)
sup
R
str
min
where V
is the minimum input voltage, V is the
start
line
by FPS (Icc) and charges the external capacitor (C ) that is
a
start voltage (12V) and R is the startup resistor. The startup
str
connected to the Vcc pin. When Vcc reaches start voltage of
12V (VSTART), FSCM0565R begins switching, and the
current consumed by FSCM0565R increases to 3mA. Then,
FSCM0565R continues its normal switching operation and
the power required for this device is supplied from the
transformer auxiliary winding, unless Vcc drops below the
stop voltage of 8V (VSTOP). To guarantee the stable operation
of the control IC, Vcc has under voltage lockout (UVLO)
with 4V hysteresis. Figure 5 shows the relation between the
current consumed by FPS (Icc) and the supply voltage (Vcc).
min
resistor should be chosen so that I
sup
is larger than the
maximum startup current (40uA). If not, Vcc can not be
charged to the start voltage and FPS will fail to start up.
2. Feedback Control : FSCM0565R employs current mode
control, as shown in Figure 6. An opto-coupler (such as the
H11A817A) and shunt regulator (such as the KA431) are
typically used to implement the feedback network.
Comparing the feedback voltage with the voltage across the
Rsense resistor makes it possible to control the switching
duty cycle. When the reference pin voltage of the KA431
exceeds the internal reference voltage of 2.5V, the
H11A817A LED current increases, thus pulling down the
feedback voltage and reducing the duty cycle. This event
typically happens when the input voltage is increased or the
output load is decreased.
CDC
AC line
2.1 Pulse-by-pulse current limit: Because current mode
control is employed, the peak current through the Sense FET
is determined by the inverting input of PWM comparator
(Vfb*) as shown in Figure 6. When the current through the
opto transistor is zero and the current limit pin (#5) is left
min
max
(Vline
- Vline
)
Isup
Rstr
Da
Vcc
Icc
floating, the feedback current source (I ) of 0.9mA flows
FB
FSCM0565R
only through the internal resistor (R+2.5R=2.8k). In this
case, the cathode voltage of diode D2 and the peak drain
current have maximum values of 2.5V and 2.5A, respec-
tively. The pulse-by-pulse current limit can be adjusted using
a resistor to GND on current limit pin (#5). The current limit
Ca
level using an external resistor (R
) is given by
LIM
Figure 4. Startup circuit
RLIM 2.5A
ILIM = ------------------------------------
2.8kΩ + RLIM
Icc
Vcc
Idelay
Vref
IFB 0.9mA
Vfb
Vo
SenseFET
3mA
OSC
4
5
H11A817A
D1
D2
+
CB
2.5R
R
0.3k
Gate
driver
Power Up
Vfb*
Power Down
KA431
-
25uA
Vcc
RLI M
OLP
Vstop=8V
Vstart=12V
Vz
Rsense
VSD
Figure 5. Relation between operating supply current and
Vcc voltage
Figure 6. Pulse width modulation (PWM) circuit
10
FSCM0565R
even when the SMPS is in the normal operation, the over
load protection circuit can be activated during the load
transition. In order to avoid this undesired operation, the over
load protection circuit is designed to be activated after a
specified time to determine whether it is a transient situation
or an overload situation. Because of the pulse-by-pulse
current limit capability, the maximum peak current through
the Sense FET is limited, and therefore the maximum input
power is restricted with a given input voltage. If the output
consumes beyond this maximum power, the output voltage
(Vo) decreases below the set voltage. This reduces the
current through the opto-coupler LED, which also reduces
the opto-coupler transistor current, thus increasing the
feedback voltage (Vfb). If Vfb exceeds 2.5V, D1 is blocked
2.2 Leading edge blanking (LEB) : At the instant the
internal Sense FET is turned on, there usually exists a high
current spike through the Sense FET, caused by primary-side
capacitance and secondary-side rectifier reverse recovery.
Excessive voltage across the Rsense resistor would lead to
incorrect feedback operation in the current mode PWM
control. To counter this effect, the FSCM0565R employs a
leading edge blanking (LEB) circuit. This circuit inhibits the
PWM comparator for a short time (T
is turned on.
) after the Sense FET
LEB
3. Protection Circuit : The FSCM0565R has several self
protective functions such as over load protection (OLP), over
voltage protection (OVP) and thermal shutdown (TSD).
Because these protection circuits are fully integrated into the
IC without external components, the reliability can be
improved without increasing cost. Once the fault condition
occurs, switching is terminated and the Sense FET remains
off. This causes Vcc to fall. When Vcc reaches the UVLO
stop voltage of 8V, the current consumed by FSCM0565R
reduces to the startup current (typically 25uA) and the
current supplied from the DC link charges the external
and the 5.3uA current source (I
delay
) starts to charge C
B
slowly up to Vcc. In this condition, Vfb continues increasing
until it reaches 6V, when the switching operation is
terminated as shown in Figure 8. The delay time for
shutdown is the time required to charge C from 2.5V to
B
6.0V with 5.3uA (I
). In general, a 10 ~ 50 ms delay time
delay
is typical for most applications.
capacitor (C ) that is connected to the Vcc pin. When Vcc
a
VFB
reaches the start voltage of 12V, FSCM0565R resumes its
normal operation. In this manner, the auto-restart can
alternately enable and disable the switching of the power
Sense FET until the fault condition is eliminated (see Figure
7).
Over load protection
6.0V
2.5V
Fault
occurs
Fault
removed
Power
on
Vds
T12= Cfb*(6.0-2.5)/Idelay
T1
Figure 8. Over load protection
T2
t
3.2 Over voltage Protection (OVP) : If the secondary side
feedback circuit were to malfunction or a solder defect
caused an open in the feedback path, the current through the
opto-coupler transistor becomes almost zero. Then, Vfb
climbs up in a similar manner to the over load situation,
forcing the preset maximum current to be supplied to the
SMPS until the over load protection is activated. Because
more energy than required is provided to the output, the
output voltage may exceed the rated voltage before the over
load protection is activated, resulting in the breakdown of the
devices in the secondary side. In order to prevent this
situation, an over voltage protection (OVP) circuit is
employed. In general, Vcc is proportional to the output
voltage and the FSCM0565R uses Vcc instead of directly
Vcc
12V
8V
t
Normal
operation
Fault
situation
Normal
operation
Figure 7. Auto restart operation
monitoring the output voltage. If V exceeds 19V, an OVP
CC
3.1 Over Load Protection (OLP) : Overload is defined as
the load current exceeding a pre-set level due to an
unexpected event. In this situation, the protection circuit
should be activated in order to protect the SMPS. However,
circuit is activated resulting in the termination of the
switching operation. In order to avoid undesired activation of
OVP during normal operation, Vcc should be designed to be
below 19V.
11
FSCM0565R
3.3 Thermal Shutdown (TSD) : The Sense FET and the
control IC are built in one package. This makes it easy for
the control IC to detect the heat generation from the Sense
FET. When the temperature exceeds approximately 145°C,
the thermal protection is triggered resulting in shutdown of
FPS.
device automatically enters into burst mode when the
feedback voltage drops below V (300mV). At this point
BL
switching stops and the output voltages start to drop at a rate
dependent on standby current load. This causes the feedback
voltage to rise. Once it passes V
(500mV) switching
BH
resumes. The feedback voltage then falls and the process
repeats. Burst mode operation alternately enables and
disables switching of the power Sense FET thereby reducing
switching loss in standby mode.
4. Frequency Modulation : EMI reduction can be
accomplished by modulating the switching frequency of a
switched power supply. Frequency modulation can reduce
EMI by spreading the energy over a wider frequency range
than the band width measured by the EMI test equipment.
The amount of EMI reduction is directly related to the depth
of the reference frequency. As can be seen in Figure 9, the
frequency changes from 63KHz to 69KHz in 4ms.
Vo
Voset
VFB
0.5V
0.3V
Drain current
Ids
Ts
Ts
Vds
Ts
fs
69kHz
66kHz
63kHz
time
Switching
Switching
disabled
disabled
T4
T2 T3
T1
Figure 10. Waveforms of burst operation
4ms
t
Figure 9. Frequency Modulation
5. Soft Start : The FSCM0565R has an internal soft start
circuit that increases PWM comparator inverting input
voltage together with the Sense FET current slowly after it
starts up. The typical soft start time is 15msec, The pulse
width to the power switching device is progressively
increased to establish the correct working conditions for
transformers, rectifier diodes and capacitors. The voltage on
the output capacitors is progressively increased with the
intention of smoothly establishing the required output
voltage. It also helps to prevent transformer saturation and
reduce the stress on the secondary diode during startup.
6. Burst operation : In order to minimize power dissipation
in standby mode, the FSCM0565R enters into burst mode
operation at light load condition. As the load decreases, the
feedback voltage decreases. As shown in Figure 10, the
12
FSCM0565R
Typical application circuit
Application
Output power
40W
Input voltage
Universal input
(85-265Vac)
Output voltage (Max current)
5V (2.0A)
LCD Monitor
12V (2.5A)
Features
• High efficiency (>81% at 85Vac input)
• Low standby mode power consumption (<1W at 240Vac input and 0.4W load)
• Low component count
• Enhanced system reliability through various protection functions
• Low EMI through frequency modulation
• Internal soft-start (15ms)
Key Design Notes
• The delay time for over load protection is designed to be about 50ms with C106 of 47nF. If a faster triggering of OLP is
required, C106 can be reduced to 22nF.
• Using a resistor R106 on the current limit pin (#5), the pule-by-pulse current limit level is reduced to about 2A.
• Zener diode ZD102 is used for a safety test such as UL. When the drain pin and feedback pin are shorted, the zener diode
fails and remains short, which causes the fuse (F1) blown and prevents explosion of the opto-coupler (IC301). This zener
diode also increases the immunity against line surge.
1. Schematic
D202
MBRF10100
T1
EER3016
L201
12V, 2.5A
10
1
2
C202
1000uF
25V
C201
1000uF
R102
500kΩ
25V
8
C104
2.2nF
1kV
R103
56kΩ
2W
R105
D101 500kΩ
UF 4007
C103
100uF
400V
3
BD101
2
2KBP06M3N257
FSCM0565RC
1
5
1
3
3
Drain
Vcc
Ilimit
C106
47nF
50V
D201
MBRF1045
ZD102
10V
L202
5V, 2A
R106
10kΩ
1/4W
4
Vfb
4
7
4
D102
TVR10G
R104
5Ω
C204
1000uF
10V
GND
2
C105
22uF
50V
C203
1000uF
C102
220nF
275VAC
ZD101
22V
10V
6
5
C301
4.7nF
LF101
23mH
R201
1kΩ
R101
560kΩ
1W
R204
5.6kΩ
R202
1.2kΩ
R203
10kΩ
C205
47nF
IC301
H11A817A
IC201
KA431
F1
C101
220nF
275VAC
RT1
5D-9
FUSE
250V
2A
R205
5.6kΩ
13
FSCM0565R
2. Transformer Schematic Diagram
EER3016
1
2
3
10
9
Np/2
Np/2
N12V
8
4
5
7
N5V
6
Na
3.Winding Specification
No
Pin (s→f)
4 → 5
Wire
0.2φ × 1
Turns
Winding Method
Na
8
Center Winding
Insulation: Polyester Tape t = 0.050mm, 2Layers
Np/2 2 → 1
0.4φ × 1
Insulation: Polyester Tape t = 0.050mm, 2Layers
10 → 8
0.3φ × 3
Insulation: Polyester Tape t = 0.050mm, 2Layers
N5V 7 → 6
0.3φ × 3
Insulation: Polyester Tape t = 0.050mm, 2Layers
Np/2 3 → 2
0.4φ × 1
18
7
Solenoid Winding
Center Winding
Center Winding
Solenoid Winding
N
12V
3
18
Outer Insulation: Polyester Tape t = 0.050mm, 2Layers
4.Electrical Characteristics
Pin
Specification
570uH ± 10%
10uH Max
Remarks
100kHz, 1V
2nd all short
Inductance
1 - 3
1 - 3
Leakage Inductance
5. Core & Bobbin
Core : EER 3016
Bobbin : EER3016
Ae(mm2) : 96
14
FSCM0565R
6.Demo Circuit Part List
Part
F101
Value
2A/250V
5D-9
Note
Part
Value
Note
Fuse
NTC
C301
4.7nF
Polyester Film Cap.
Inductor
RT101
L201
L202
5uH
5uH
Wire 1.2mm
Wire 1.2mm
Resistor
R101
R102
R103
R104
R105
R106
R201
R202
R203
R204
R205
560K
500K
56K
5
1W
1/4W
2W
1/4W
1/4W
1/4W
1/4W
1/4W
1/4W
1/4W
1/4W
Diode
500K
10K
1K
D101
D102
D201
D202
UF4007
TVR10G
MBRF1045
10K
1.2K
5.6K
5.6K
MBRF10100
ZD101 22V Zener diode
ZD102 10V Zener diode
Bridge Diode
BD101 2KBP06M 3N257
Bridge Diode
Wire 0.4mm
Capacitor
C101
C102
C103
C104
C105
C106
C201
C202
C203
C204
C205
220nF/275VAC
220nF/275VAC
100uF/400V
10nF/1kV
Box Capacitor
Line Filter
Box Capacitor
LF101
23mH
Electrolytic Capacitor
Ceramic Capacitor
Electrolytic Capacitor
Ceramic Capacitor
Electrolytic Capacitor
Electrolytic Capacitor
Electrolytic Capacitor
Electrolytic Capacitor
Ceramic Capacitor
IC
IC101
IC201
IC301
FSCM0565RC
KA431(TL431)
H11A817A
FPSTM(7A,650V)
Voltage reference
Opto-coupler
22uF/50V
47nF/50V
1000uF/25V
1000uF/25V
1000uF/10V
1000uF/10V
47nF/50V
15
FSCM0565R
7. Layout
Figure 11. Layout Considerations for FSCM0565RC
Figure 12. Layout Considerations for FSCM0565RC
16
FSCM0565R
Package Dimensions
D2-PAK-5L
17
FSCM0565R
Package Dimensions (Continued)
TO-220-5L(Forming)
18
FSCM0565R
Ordering Information
Product Number
FSCM0565RD
Package
D2-PAK-5L
TO-220-5L
Marking Code
CM0565RD
CM0565RC
BVdss
650V
Rds(on)Max.
2.2 Ω
2.2 Ω
FSCM0565RCYDTU
650V
19
FSCM0565R
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER
DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
1/13/05 0.0m 001
2005 Fairchild Semiconductor Corporation
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