FMS2704T1C [FAIRCHILD]
Analog Circuit, 1 Func, PDSO24, TSSOP-24;
| 型号： | FMS2704T1C |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Analog Circuit, 1 Func, PDSO24, TSSOP-24 光电二极管 |
| 文件： | 总39页 (文件大小：173K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
www.fairchildsemi.com
FMS 2 7 0 4 /FMS 2 7 0 4 L
S m a rt TTV Ha rd w a re Mo n it o r
Tachometer inputs are monitored continuously with speeds
compared with internal limits stored in registers. Individual
fan speeds can be sensed through the six TACH inputs.
Features
• Six tachometer inputs
• Two analog/PWM fan-speed outputs
• Fan speed controller mode
• Dual remote thermal diode inputs
• Local (on-chip) temperature sense
• Voltage monitoring
Remote and local diode temperatures are monitored at a 1Hz
rate. Diode temperatures are digitized to 1°C resolution prior
to storage in remote and local temperature registers. Violations
of temperature limits/trip points set interrupt register bits and
assert the INT or THERM outputs.
• Serial Bus access to internal registers
• Thermal Alarm output
• Maskable Interrupt output
• Status & Configuration registers
• Integrated Reset Generators
Reset output, RST is asserted if STANDBY = L or VCC ≤
2.9/2.9/4.4V. Voltages V1-6 can be monitored in place of the
diode inputs and tachometer inputs 5 and 6.
Fan noise can be minimized using the Controller Mode to set
speed as a function of temperature. Alternatively, external
firmware/software can be used to control the fan speed volt-
Description
The FMS2704 is a Smart Tachometer/ Thermometer/
Voltmeter with a fan speed control mode independent of
system management software or BIOS. Outputs are two fan
control voltages, THERM alarm and interrupt INT.
ages, FAN_SPDA,B
.
Supply voltages are 5.0V for the FMS2704 and 3.3V for the
FMS2704L. Performance is specified from 0 to 85°C. Package
is a 24-lead TSSOP
Block Diagram
OSC1
OSC2
3.58 MHz
Oscillator
Oscillator
VCC
ADD
Main Reset
RST
Timing
and Control
STANDBY
SDA
SCL
SMBus
Interface
Internal Reset
TL, TR
Fan Speed
Controller
Internal Bus
8-bit DAC
Converters
FAN_SPDA
FAN_SPDB
Current
Generators
D/A
8-bit DAC
Converters
Registers
DXP1/V1
DXN1/V2
Low-pass
Filter
Interrupt
Status
Registers
Voltage/
Temperature
Comparators
A/D
Converter
THERM
DSP
DXP2/V3
DXN2/V2
Low-pass
Filter
Mux
On-chip
Temperature
Sensor
Interrupt
Mask
Register
Trip & Limit
Registers
V5/V6
Mask
Gating
INT
TACHA1
TACHB1
TACHA2
TACHB2
Tachometers
Configuration
Register
TACHA3/V5
TACHB3/V6
REV. 1.01 12/2/99
PRODUCT SPECIFICATION
FMS2704/FMS2704L
Tachometers
Architectural Overview
Six tachometers monitor fan speed. Stored in each 8-bit
tachometer register is the fan speed value expressed in 22.5kHz
clock counts per blade revolution. Sensitivity is established by
the Tachometer Divisor Register which matches pulse count-
ing to the sensor pulses per revolution.
As a sensor, the FMS2704 has three monitoring functions:
1. Tachometer
2. Thermometer
3. Voltmeter.
Each tachometer output is compared against a low speed
threshold. A violation will trip the interrupt output to notify
System Management software or BIOS that a fault has
occurred.
Additional functions are:
1. Fan speed controller mode.
2. Programmable dual fan speed outputs.
3. Reset Generator.
Thermometers
There are three thermometers: two for remote sensing; one for
measuring local temperature. All channels utilize the thermal
variation of the voltage drop, VD across a diode, sampled at
two currents to derive the diode temperature.
Overall operation of the FMS2704 is controlled by the Serial
Bus, which sets register values and interrupt masking. Ten of
sixteen inputs can be monitored:
1. Two remote thermal diode voltages.
2. Local thermal diode voltage.
To facilitate tracking of temperatures for controlling fan speed,
upper and lower temperature limits can be loaded into the
Limit Registers. If a limit is violated, the INT output is
asserted to indicate that limits must be updated and fan speed
changed. A remote diode open or short circuit fault will also
assert INT. All interrupt sources are maskable.
3. VCC voltage.
4. Six tachometer, TACH.
5. V4-1 voltages instead of external diode inputs.
6. V6-5 voltages instead of TACHA3 and TACHB3.
Maximum allowable remote and local temperatures are loaded
into the Trip Point registers. If a Trip Point is violated, the
THERM output is asserted warning that system temperature is
too high.
Following comparisons against either preset or programmable
thresholds the following hardware outputs are set:
1. Reset, RST if VCC is low.
2. THERM if a remote or local thermometer trip point
violated.
Instead of sensing the change in VD at one current, which is
approximately –2mV/°C, VD is sampled at two currents (IHI
100 and ILO = 10µA) to cancel out common error voltages.
=
3. Interrupt (INT), if:
Difference voltage between the two currents is proportional to
absolute temperature:
a) Fan speed is low.
b) Remote/Local High/Low temperature limit is violated.
c) Remote diode fault.
IHI
nkT
---------
q
--------
ILO
∆VD
=
• 1n
d) V6-1 voltage out of tolerance.
Register bits also indicate status:
1. Fan speed error.
where:
n = PN junction ideality factor, typically 1.0065 for the
Pentium II thermal diode.
2. Remote high/low temperature limit violated.
3. Local high/low temperature limit violated.
4. THERM input asserted.
k = Boltmann’s constant, 1.381 x 10-23 J.K-1
T = Absolute temperature, °K
5. Remote diode fault.
6. Voltage error.
q = Electron charge, 1.602 x 10-19
C
2
REV. 1.01 12/2/99
FMS2704/FMS2704L
PRODUCT SPECIFICATION
Nominal thermal diode sensitivity is 199.7µV/°C. Diode volt-
age variation over a –40 to +125°C temperature range, is
approximately 300 to 800mV, while the difference voltage
variation is approximately 50 to 110mV. Overall sensitivity of
the conversion is 1°C/lsb.
By varying the balance between these parameters, over limited
ranges, either local or remote temperatures can dominate the
fan speed. With both remote temperature inputs processed
against the same values, fan speed control parameters are
established through three groups of six registers. There is one
group for each temperature input, while within each group
there are four registers containing the following data:
Voltmeters
1. FANLO7-0, the idle-speed fan-drive value if the
temperature is below TEMPLO7-0.
If the TACA3/V5, TACB3/V6 or the DX2-1/V4-1 inputs are
configured to measure voltage, corresponding tachometer or
diode registers are disabled. V6-1 inputs are sequentially sam-
pled by anAnalog Multiplexer, prior to digitization by theA/D
Converter with 8-bit accuracy over a 0–1300mV range. Using
external voltage dividers, each incoming voltage should be
normalized to 1000mV.
2. TEMPLO7-0, the threshold for the start of fan drive rising
from RFANLO7-0 in proportion to temperature minus
TEMPLO7-0
.
3. TEMPHI7-0, the limit above which the fan drive will
have the value 255.
Upper and Lower Voltage Thresholds are common to all six
voltmeters. If an input violates a threshold, a flag is set in the
Voltmeter Configuration Register. A voltage error will cause a
maskable interrupt.
4. SLOPE7-0 the incremental rate of fan speed versus
temperature.
Either the analog output from the D/A or the PWM digital out-
put can be selected.
Fan Speed Controller
Reset Generators
If the FMS2704 is operating in the controller mode, local and/
or remote temperatures: TL, TR1 and TR2 establish the fan
speed drive voltages or PWM output. Fan drive voltage range
is 0–2.5V corresponding to 0–255 DAC value.
If VCC ≤ 2.9/4.4V, then RST = L and internal reset is active,
resetting all internal registers to default values.
If the input STANDBY = L, then RST = L and the Standby
Mode is active with sensing suspended and tachometer,
temperatures and voltage register values frozen, while supply
current is minimized. Internal reset in not active.
Overall response to one sensor will be a straight-line segment
that is defined by the upper and lower temperatures and the
minimum fan speed. Maximum fan speed always corresponds
to SPEED7-0 = 255.
After input VCC > 2.9/4.4V and input, STANDBY = H, then
RST = L for a timeout period of 0.2 seconds.
Full Speed Value = 255
Serial Interface
Idle Speed
Temperature
Registers are accessed through an I2C/SMBus compatible
Serial Interface located at the address selected by the A
address pin.
Full Speed
Temperature
Idle Speed
Value
Registers
Temperature
Registers setup the monitoring configuration and report status:
For each temperature input, a fan speed value is calculated as a
function of temperature along a straight line segment preset to
match the thermal characteristics of the system environment.
The value inserted into the fan speed register is the sum of the
responses of the local and two remote diode segments. Updat-
ing control points through the Serial Bus can change response.
Configuration: Establish the mode of operation: Run/
standby, Interrupt control, etc.
Status: Report violations of limits or trip points and fault
conditions.
Tachometer: Fan speed periods.
Temperature: Local and remote temperatures in °C.
Voltage: Digitized voltage inputs.
Remote and Local responses can be set up with different:
1. Idle temperatures.
2. Full speed temperatures.
3. Idle speed values
Limits: Tachometer, Temperature and Voltage limit and trip
point values.
Fan Speed Controller: minimum fan speed, lowest tempera-
ture, slope.
REV. 1.01 12/2/99
3
PRODUCT SPECIFICATION
FMS2704/FMS2704L
Pin Assignments
No.
1.
Name
OSC1
OSC2
RST
No.
13.
14.
15.
16.
17.
18.
19.
20.
21.
22.
23.
24.
Name
DXP1/V1
DXN1/V2
DXP2/V3
DXN2/V4
TACHA3/V5
TACHB3/V6
VCCA
2.
3.
4.
THERM
SDA
5.
6.
SCL
7.
VCCD
8.
INT
TACHB2
TACHA2
TACHB1
TACHA1
STANDBY
9.
ADD
10.
11.
12.
FAN_SPDA
FAN_SPDB
GND
Pin Descriptions
Pin Name
Pin No.
Type/Value
Pin Function Description
Analog I/O (11)
DXP1/V1
13
Voltage input/
current source
External diode input/V1 sense.
DISXD1 = 0: Current source to remote thermal diode 1 anode and
voltage sense input.
DISXD1 = 1: V1 voltage sense input (0–1000mV)
DXN1/V2
DXP2/V3
DXN2/V4
14
15
16
Voltage input/
current sink
External diode input/V2 sense.
DISXD1 = 0: Current sink from remote thermal diode 1 cathode and
voltage sense input.
DISXD1 = 1: V2 voltage sense input (0–1000mV)
Voltage input/
current source
External diode input/V3 sense.
DISXD2 = 0: Current source to remote thermal diode 1 anode and
voltage sense input.
DISXD2 = 1: V3 voltage sense input (0–1000mV)
Voltage input/
current sink
External diode input/V4 sense.
DISXD2 = 0: Current sink from remote thermal diode 1 cathode and
voltage sense input.
DISXD2 = 1: V4 voltage sense input (0–1000mV)
TACHA3/V5
TACHB3/V6
FAN_SPDA,B
OSC2-1
17
18
Voltage input
Voltage input
Fan Tachometer 5/V5 sense. Dual function pin. 10KΩ pull-up
TACH5 = 0: V5 Voltage input (0–1000mV)
TACH5 = 1: Tachometer TACA3 Input
Fan Tachometer 6/V6 sense. Dual function pin.
TACH6 = 1: Tachometer TACB3 Input
TACH6 = 0: V6 Voltage input (0–1000mV)
10, 11 Analog/Digital
output
Fan A, B speed control. Analog (± 2mA) or PWM (± 12mA) output
programmed from the Fan Speed Configuration Register. Analog
output is 0–2.5V. External THERM = L forces a 2.5 volt output.
2, 1
Output/Input
Oscillator/Clock Inputs. Connection to 3.58MHz external
frequency reference: ceramic resonator across OSC2-1 or clock
connected to OSC1.
4
REV. 1.01 12/2/99
FMS2704/FMS2704L
PRODUCT SPECIFICATION
Pin Descriptions (continued)
Pin Name
Serial Port (3)
SDA
Pin No.
Type/Value
Pin Function Description
5
6
9
Bi-directional
Input
Data. Serial Bus data to/from FMS2704
Clock. Serial Bus clock into FMS2704
SCL
ADD
3-level
Address Select Pins. Serial Port address select corresponding to
H, L and Z levels.
Digital Inputs/Outputs (6)
TACHB2,
TACHA2,
TACHB1,
TACHA1
20, 21, Input
22, 23
Fan Tachometer 4-1 Inputs. One,two, four or eight pulses per
revolution. Three tachometers inputs per bank of fans, A or B.
10KΩ pull-up.
THERM
4
8
I/O (Open drain) Thermal Overload. Output THERM = L indicates that a temperature
trip point has been exceeded. Input THERM = L sets the THERM bit
in the Interrupt Status Register.
INT
Open drain
Interrupt Output. INT = L when a voltage, temperature limit or
temperature trip point is violated and bit 1 of the Configuration
Register is set H.
Reset (3)
RST
3
Output
Input
Reset. Output from Main Reset Generator, which is tripped by
STANDBY = L or VCC < 2.9/4.4 volt.
STANDBY
24
Standby Mode. Forces the Standby Mode with interrupts disabled
and register read backs frozen. Initiates a master reset cycle.
Current is minimized by powering down: D/A converters, A/D
converters, serial bus ADD detection. The STANDBY pin should
biased to VCC through a 20KΩ pull-up resistor.
Power and Ground (2)
VCCD
VCCA
GND
7
+3.3/5V
+3.3/5V
0 V
Digital Supply Voltage.
19
12
Analog Supply Voltage.
Ground. Return for VCC supply.
Addressable Memory
FMS2704 Memory Map
Name
Address (hex)
POR[7:0] (hex)
Thermometer
PTL7-0
0x13
0x14
0x16
0x17
0x18
0x19
0x20
0x21
0x22
0x23
0x24
0x46
0x64
0x00
0x46
0x64
0x00
0x16
0x15
0x14
0x20
0x02
70°C
PTR7-0
100°C
SPEEDA7-0
FTL7-0
70°C
FTR7-0
100°C
SPEEDB7-0
TR27-0
22°C
21°C
20°C
32°C
02°C
TR17-0
TL7-0
TR2HI7-0
TR2LO7-0
REV. 1.01 12/2/99
5
PRODUCT SPECIFICATION
FMS2704/FMS2704L
FMS2704 Memory Map (continued)
Name
Address (hex)
POR[7:0] (hex)
0x04
TRAVE, TLAVE
TRSENS13-8
TRSENS7-0
TROS7-0
0x29
0x2A
0x2B
0x2C
0x2D
0x2E
0x2F
0x37
0x38
0x39
0x3A
Temperature samples averaged
0x16
5708 + TROS8
5708
0x4C
0xF8
249-1
TLSENS13-8
TLSENS7-0
TLOS7-0
0x53
5008 + TLOS8
5008
0x90
0x08
265-1
TR1HI7-0
0x1F
31°C
TR1LO7-0
0x01
01°C
TLHI7-0
0x1E
30°C
TLLO7-0
0x00
0°C
Global
Manufacturer ID
Version, Revision
Configuration
Interrupt Status
Interrupt Mask
Fan Speed Configuration
0x3E
0x3F
0x40
0x41
0x43
0x44
0x45
0x46
0x47
0x48
0x49
0x4A
0x4B
0x4C
0x4D
0x4E
0x4F
0xFC
0x10
0x05
0x00
0x00
0x00
reserved
reserved
reserved
reserved
N/A
reserved
reserved
reserved
reserved
reserved
reserved
Tachometer
TACA17-0
TACA27-0
TACA37-0
TACB17-0
TACB27-0
0x50
0x51
0x52
0x53
0x54
0x55
0x56
0x57
0x58
0x59
0x5A
reserved
reserved
reserved
reserved
reserved
reserved
00
00
0x00
0x00
0x00
6
REV. 1.01 12/2/99
FMS2704/FMS2704L
PRODUCT SPECIFICATION
FMS2704 Memory Map (continued)
Name
Address (hex)
POR[7:0] (hex)
TACB37-0
0x5B
0x5C
0x5D
0x5E
0x5F
0x60
0x61
0x62
0x63
0x00
reserved
TACHTRIPA7-0
0xFF
Bank A speed boundary
reserved
TACHTRIPB7-0
0xFF
0x00
0x00
0x09
0x3F
Bank B speed boundary
Tachometer Status
Tachometer Mask
Tachometer Divisor
Divide by 2, A and B banks
Tachometer Configuration
Voltage
Voltage V17-0
Voltage V27-0
Voltage V37-0
Voltage V47-0
Voltage V57-0
Voltage V67-0
VHI7-0
0x70
0x71
0x72
0x73
0x74
0x75
0x76
0x77
0x78
0x79
0c7A
0x7C
0x7D
0x7E
0x7F
0x00
0x00
0x00
0x00
0x00
0x00
0xFF
0x00
0x00
0x00
0x00
0x01
0x00
0xF0
0x00
Voltage High Limit
Voltage Low Limit
VLO7-0
Voltmeter Configuration
Voltage Error
Voltage Mask
VAVE
Voltage samples averaged
VSENS13-8
VSENS7-0
0 + VOS8
240
VOS7-0
Zero offset
Controller
SPEEDLOA7-0
TLLOA7-0
0x80
0x81
0x82
0x83
0x84
0x85
0x86
0x87
0x88
0x89
0x8A
0x8B
0x8C
0x8D
0x8E
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
Controller A low speed
Controller A local low temp
Controller A local slope
SLOPEAL7-0
TRLOA17-0
SLOPEA17-0
TRLOA27-0
SLOPEA27-0
SPEEDLOB7-0
TLLOB7-0
Controller A remote low temp 1
Controller A remote slope 1
Controller A remote low temp 2
Controller A remote slope 2
Controller B low speed
Controller B local low temp
Controller B local slope
SLOPEBL7-0
TRLOB17-0
SLOPEB17-0
TRLOB27-0
SLOPEB27-0
Controller Configuration
Controller B remote low temp 1
Controller B remote slope 1
Controller B remote low temp 2
Controller B remote slope 2
Fan Speed Controller Modes
REV. 1.01 12/2/99
7
PRODUCT SPECIFICATION
FMS2704/FMS2704L
Global Register Definitions
Address
0x3E
Name
MFR7-0
NUM7-0
Type
R
Description
Manufacturer ID. Value is FC.
0x3F
R
Version and Revision. NUM7-4 = 1, the FMS2704 version number.
NUM3-0 = revision number.
Configuration Register (0x40)
BIT#
Name
Type
Description
0
START
R/W
Start Temperature and Voltage Monitoring. (Power-up default = 1)
0: Standby mode. (INT is not cleared)
1: Run. All limit and trip values should be entered into FMS2704 registers
prior to setting START = 1.
1
2
INT_EN
R/W
R/W
Interrupt Enable
0: Disabled (Power-up default)
1: Enables the INT output.
INT_CLR
Interrupt Clear. (Power-up default = 1)
0: INT output unaffected.
1: Clears the INT output. Contents of the Interrupt Status Register
preserved.
3
TRIP_LOCK R/(W-once) Temperature Trip Point Lock. (Power-up default = 0)
0:
1. THERM limits are the fixed values: FTL7-0 and FTR7-0
.
2. Writes to programmable registers PTL and PTR are enabled.
3. Writes to A/D Converter Calibration Registers are enabled.
1:
1. THERM limits are the programmable values PTL7-0 and PTR7-0, while
RST = H.
2. Writes to A/D Converter Calibration Registers are inhibited.
4
5
SOFT_RST
R/W
Soft Reset. (Power-up default = 0)
0: Power-up default restored by SOFT_RST cycle.
1: Restore power-up values to the Configuration, Interrupt Status, and
Interrupt Mask registers.
Reserved
Fan Drive Configuration Register (44)
BIT#
Name
Type
Description
0
VOLTA
R/W
Fan Speed A Analog Voltage Output Enable.
0: Disable.
1: Enable analog voltage output on FAN_SPDA.
1
2
3
PWMA
VOLTB
PWMB
R/W
R/W
R/W
Fan Speed A PWM Output Enable.
0: Disable.
1: Enable pulse width modulated output on FAN_SPDA.
Fan Speed B Analog Output Enable.
0: Disable.
1: Enable analog voltage output on FAN_SPDB.
Fan Speed B PWM Output Enable.
0: Disable.
1: Enable pulse width modulated output on FAN_SPDB.
8
REV. 1.01 12/2/99
FMS2704/FMS2704L
PRODUCT SPECIFICATION
Fan Drive Configuration Register (44) (continued)
BIT#
Name
Type
Description
4
PWM_INVA
Fan Speed A PWM Output Invert.
0: Mark-space ratio increases with drive.
1: Mark-space ratio decreases with drive.
5
PWM_INVB
Fan Speed B PWM Output Invert.
0: Mark-space ratio increases with drive.
1: Mark-space ratio decreases with drive.
Thermometer Register Definitions
Thermometer Value Registers
Address
Name
Type
Description
Programmable Local Temperature Automatic Trip Point. If TA7- > PTL7-0,
0x13
PTL7-0
R/W
then THERM = L. Write access is disabled if the TRIP_LOCK bit in the
Configuration Register been set. (default: 46h [70°C])
0x14
PTR7-0
R/W
Programmable Remote Thermal Diode Automatic Trip Point. If TR17- >
PTR7-0 or TR27- > PTR7-0 then THERM = L. Write access is disabled if the
TRIP_LOCK bit in the Configuration Register been set. (default: 64h [100°C])
Fan Speed Register. Fan speed control value. (default: 00h)
Fixed Local Temperature Automatic Trip Point. (default: 46h [70°C])
Fixed Remote Thermal Diode Automatic Trip Point. (default: 64h [100°C])
Fan Speed Register. Fan speed control value. (default: 00h)
Remote Thermal Diode 2 Temperature.
0x16
0x17
0x18
0x19
0x20
0x21
0x22
SPEEDA7-0
FTL7-0
R/W
R
FTR7-0
R
SPEEDB7-0
TR27-0
R/W
R
TR17-0
R
Remote Thermal Diode 1 Temperature.
TL7-0
R
Local Temperature. Temperature output derived from on-chip thermal
diode.
0x23
0x24
0x37
0x38
0x39
0x3A
TR2HI7-0
TR2LO7-0
TR1HI7-0
TR1LO7-0
TLHI7-0
R/W
R/W
R/W
R/W
R/W
R/W
Remote Thermal Diode 2 High Temperature Limit. TR27-0 > TR2HI7-0 will
set the RTV2 bit in the Interrupt Status Register.
Remote Thermal Diode 2 Low Temperature Limit. TR27-0 < TR2LO7-0 will
set the RTV2 bit in the Interrupt Status Register.
Remote Thermal Diode 1 High Temperature Limit. TR17-0 > TR1HI7-0 will
set the RTV1 bit in the Interrupt Status Register.
Remote Thermal Diode 1 Low Temperature Limit. TR17-0 < TR1LO7-0 will
set the RTV1 bit in the Interrupt Status Register.
Local Temperature High Temperature Limit. TA7-0 > TAHI7-0 will set the
ATV and MATV bits in the Interrupt Register.
TLLO7-0
Local Temperature Low Temperature Limit. TA7-0 < TALO7-0 will set the
ATV and ARTV bits in the Interrupt Register.
Temperature Status Register (0x41)
BIT#
Name
Type
Description
0
LTV
R
Local Temperature Violation
0: On-chip temperature within limits.
1: On-chip temperature limit violated
1
RTV2
R
Remote Diode 2 Temperature Violation.
0: Remote temperature within limits.
1: Remote temperature limit violated
REV. 1.01 12/2/99
9
PRODUCT SPECIFICATION
FMS2704/FMS2704L
Temperature Status Register (0x41) (continued)
BIT#
Name
Type
Description
2
FAULT_D2
R
Remote Diode 2 Fault.
0: Diode functional
1: Short or open circuit.
4–3
5
R
R
Reserved
RTV1
THERM
Remote Diode 1 Temperature Violation.
0: Remote temperature within limits.
1: Remote temperature limit violated
6
7
R
R
THERM input status.
0: THERM input negated.
1: THERM input asserted.
FAULT_D1
Remote Diode 1 Fault.
0: Diode functional
1: Short or open circuit.
Note: An error that causes continuous interrupts may be concealed using the mask register, until the error can be alleviated.
Temperature Interrupt Mask Register (0x43)
BIT#
Name
Type
Description
0
MASKLTV
R/W
Mask Local Temperature Violation bit.
0: Allow ATV bit to affect INT output.
1: Prohibit ATV bit from affecting the INT output.
1
2
3
MASKRTV2
MASKFAULT_D2
MASKITHERM
R/W
R/W
R/W
Mask Remote Diode 2 Temperature Violation.
0: Allow RTV2 bit to assert INT output.
1: Prevent RTV2 bit from asserting the INT output.
Mask Remote Diode 2 Fault bit.
0: Allow FAULT_D2 bit to assert the INT output.
1: Prohibit FAULT_D2 bit from asserting the INT output.
Mask Internal THERM.
0: Allow ITHERM to affect INT output.
1: Block ITHERM from affecting the INT output.
4
5
Reserved
MASKRTV1
MSKTHERM
R/W
R/W
R/W
Mask Remote Diode 1 Temperature Violation bit.
0: Allow RTV1 bit to assert INT output.
1: Prevent RTV1 bit from asserting the INT output.
6
7
Mask THERM bit.
0: Allow THERM bit to affect INT output.
1: Block THERM bit from affecting the INT output.
MASKFAULT_D1
Mask Remote Diode 1 Fault bit.
0: Allow FAULT_D1 bit to assert the INT output.
1: Prohibit FAULT_D1 bit from asserting the INT output.
10
REV. 1.01 12/2/99
FMS2704/FMS2704L
PRODUCT SPECIFICATION
Temperature Samples Averaged Register (0x29)
BIT#
Name
Type
Description
2-0
TRAVE
R/W
Number of remote samples averaged.
000
001
010
011
100
101
110
1
2
4
8
16
32
64
5-3
TLAVE
R/W
Number of local samples averaged.
000
001
010
011
100
101
110
1
2
4
8
16
32
64
Thermometer Calibration Registers (0x2A–2F)
Register[bit]
Name
Type
Description
0x2A[6]
TROS8
R/W
Remote Diode A/D Converter Offset MSB. MSB of a 9-bit number that
offsets the remote temperature by TROS °C. Default = 0 (TROS = 249-1)
Range = 0 to 255.
0x2A[5:0]
0x2B
TRSENS13-8
TRSENS7-0
TROS7-0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Remote Diode A/D Converter Sensitivity HI. Upper six bits of the A/D
sensitivity (lsbs/volt) value programmed into the Voltage Counter Limit
Register. Default = 0x16 (TRSENS = 5708). Range 0 to 16383.
Remote Diode A/D Converter Sensitivity LO. Lower eight bits of the A/D
sensitivity (lsbs/volt) value programmed into the Voltage Counter Limit
Register. Default = 0x4C (TRSENS = 5708) Range 0 to 16383.
0x2C
Remote Diode A/D Converter Offset LO. Lower eight bits of a 9-bit
number that offsets the remote temperature by TROS °C. Default = 0xF8
(TROS = 249-1) Range = 0 to 511.
0x2D[6]
0x2D[5:0]
0x2E
TLOS8
Local Diode A/D Converter Offset MSB. MSB of a 9-bit number that
offsets the remote temperature by TLOS °C. Default = 1 (TLOS = 265-1)
Range = 0 to 511.
TLSENS13-8
TLSENS7-0
TLOS7-0
Local Diode A/D Converter Sensitivity HI. Upper six bits of the A/D
sensitivity (lsbs/volt) value programmed into the Voltage Counter Limit
Register. Default = 0x13 (TLSENS = 5008) Range 0 to 16383.
Local Diode A/D Converter Sensitivity LO. Lower eight bits of the A/D
sensitivity (lsbs/volt) value programmed into the Voltage Counter Limit
Register. Default = 0x90 (TLSENS = 5008) Range 0 to 16383.
0x2F
Local Diode A/D Converter Offset LO. Lower eight bits of a 9-bit
number that offsets the local temperature by TLOS °C. Default = 0x08
(NOS = 265-1) Range = 0 to 511.
REV. 1.01 12/2/99
11
PRODUCT SPECIFICATION
FMS2704/FMS2704L
Tachometer Register Definitions
Tachometer Value Registers
Address
0x51
Name
TACA17-0
Type
R
Description
Fan Bank A Tachometer 1 Speed LSB.
Fan Bank A Tachometer 2 Speed LSB.
Fan Bank A Tachometer 3 Speed LSB.
Fan Bank B Tachometer 1 Speed LSB.
Fan Bank B Tachometer 2 Speed LSB.
Fan Bank B Tachometer 3 Speed LSB.
Tachometer speed boundary A LSB
Tachometer speed boundary B LSB
0x53
TACA27-0
R
0x55
TACB37-0
R
0x57
TACB1L7-0
TACB27-0
R
0x59
R
0x5B
0x5D
0x5F
TACB37-0
R
TACHTRIPA7-0
TACHTRIPB7-0
R/W
R/W
Tachometer Status Register (0x60)
BIT#
Name
Type
Description
0
ERROR_TA1
R
Bank A Fan 1 speed status.
0: Speed within TACHTRIPA register boundary.
1: Speed violates TACHTRIPA register boundary.
1
2
ERROR_TA2
ERROR_TA3
ERROR_TB1
ERROR_TB2
ERROR_TB3
R
R
R
R
R
Bank A Fan 2 speed status.
0: Speed within TACHTRIPA register boundary.
1: Speed violates TACHTRIPA register value.
Bank A Fan 3 speed status.
0: Speed within TACHTRIPA register boundary.
1: Speed violates TACHTRIPA register value.
3
Bank B Fan 1 speed status.
0: Speed within TACHTRIPB register boundary.
1: Speed violates TACHTRIPB register value.
4
Bank B Fan 2 speed status.
0: Speed within TACHTRIPB register boundary.
1: Speed violates TACHTRIPB register value.
5
Bank B Fan 3 speed status.
0: Speed within TACHTRIPB register boundary.
1: Speed violates TACHTRIPB register value.
7–6
Tachometer Status Mask Register (0x61)
BIT#
Name
Type
Description
0
MASKA1
R
Mask Bank A Fan 1 speed status.
0: Allow A1LO bit to assert INT output.
1: Prevent A1LO bit from asserting INT output.
1
2
MASKA2
MASKA3
R
R
Mask Bank A FAN 2 speed status.
0: Allow A2LO bit to assert INT output.
1: Prevent A2LO bit from asserting INT output.
Mask Bank A FAN 3 speed status.
0: Allow A3LO bit to assert INT output.
1: Prevent A2LO bit from asserting INT output.
12
REV. 1.01 12/2/99
FMS2704/FMS2704L
PRODUCT SPECIFICATION
Tachometer Status Mask Register (0x61) (continued)
BIT#
Name
Type
Description
3
MASKB1
R
Mask Bank B FAN 1 speed status.
0: Allow B1LO bit to assert INT output.
1: Prevent B1LO bit from asserting INT output.
4
5
MASKB2
MASKB3
R
R
Mask Bank B FAN 2 speed status.
0: Allow B2LO bit to assert INT output.
1: Prevent B2LO bit from asserting INT output.
Mask Bank B FAN 3 speed status.
0: Allow B2LO bit to assert INT output.
1: Prevent B2LO bit from asserting INT output.
7–6
Reserved
Tachometer Divisor Register (0x62)
BIT#
Name
Type
Description
2–0
ADIV
R/W
Bank A Divisor.
000: Divide tachometer input rate by 1.
001: 2
010: 4
011: 8
100: 16
101: 32
5–3
7–6
BDIV
R/W
Bank B Divisor.
000: Divide tachometer input rate by 1.
001: 2
010: 4
011: 8
100: 16
101: 32
Reserved
Tachometer Configuration Register (0x63)
BIT#
Name
Type
Description
0
ENA1
R/W
Enable Bank A Fan 1 Tachometer.
0: Standby.
1: Run.
1
2
3
4
ENA2
ENA3
ENB1
ENB2
R/W
R/W
R/W
R/W
Enable Bank A Fan 2 Tachometer.
0: Standby.
1: Run.
Enable Bank A Fan 3 Tachometer.
0: Standby.
1: Run.
Enable Bank B Fan 1 Tachometer.
0: Standby.
1: Run.
Enable Bank B Fan 2 Tachometer.
0: Standby.
1: Run.
REV. 1.01 12/2/99
13
PRODUCT SPECIFICATION
FMS2704/FMS2704L
Tachometer Configuration Register (0x63) (continued)
BIT#
Name
Type
Description
5
ENB3
R/W
Enable Bank B Fan 3 Tachometer.
0: Standby.
1: Run.
7–6
Reserved
Voltmeter Register Definitions
Voltmeter Value Registers
Address
0x70
0x71
0x72
0x73
0x74
0x75
0x76
0x77
0x7D
0x7E
0x7F
Name
V17-0
Type
R
Description
Voltage Value V1. 200 == 1000mV input.
Voltage Value V2. 200 == 1000mV input.
Voltage Value V3. 200 == 1000mV input.
Voltage Value V4. 200 == 1000mV input.
Voltage Value V5. 200 == 1000mV input.
Voltage Value V6. 200 == 1000mV input.
High Voltage Trip Level. Common to V6-1
Low Voltage Trip Level. Common to V6-1
Voltmeter Sensitivity HI. (Default = 0)
Voltmeter Sensitivity LO. (Default = 240)
Voltmeter Offset. (Default = 0)
V27-0
R
V37-0
R
V47-0
R
V57-0
R
V67-0
R
VHI7-0
VLO7-0
VSENS15-8
VSENS7-0
VOS7-0
R/W
R/W
R/W
R/W
R/W
Voltmeter Configuration Register (0x78)
BIT#
Name
Type
Description
0
V12D1
R
DXP1/V1 and DXN1/V2 Configuration.
0: Thermometer inputs DXP1 and DXN1
1: Voltmeter inputs V1 and V2.
1
2
V34D2
V5TACHA3
V6TACHB3
-
R
R/W
R/W
-
DXP2/V2 and DXN3/V4 Configuration.
0: Thermometer inputs DXP2 and DXN2
1: Voltmeter inputs V3 and V4.
Tachometer A3/Voltage 5 input configuration.
0: Tachometer A3 input.
1: Voltmeter V5 input.
3
Tachometer B3/Voltage 6 input configuration.
0: Tachometer B3 input.
1: Voltmeter V6 input.
7-4
-
14
REV. 1.01 12/2/99
FMS2704/FMS2704L
PRODUCT SPECIFICATION
Voltage Error Register (0x79)
BIT#
Name
Type
Description
0
ERROR_V1
R
Voltage 1 Error.
0: V1 within tolerance.
1: V1 out of tolerance.
1
2
3
4
5
ERROR_V2
ERROR_V3
ERROR_V4
ERROR_V5
ERROR_V6
R
R
R
R
R
Voltage 2 Error.
0: V2 within tolerance.
1: V2 out of tolerance.
Voltage 3 Error.
0: V3 within tolerance.
1: V3 out of tolerance.
Voltage 4 Error.
0: V4 within tolerance.
1: V4 out of tolerance.
Voltage 5 Error.
0: V5 within tolerance.
1: V5 out of tolerance.
Voltage 6 Error.
0: V6 within tolerance.
1: V6 out of tolerance.
6
7
-
-
Voltage Error Mask Register (7A)
BIT#
Name
Type
Description
0
MASKV1ERR
R/W
R/W
R/W
R/W
R/W
R/W
Mask Voltage 1 Error.
0: Allow V1ERR bit to assert INT output.
1: Prevent V1ERR bit from asserting INT output.
1
2
3
4
5
MASKV2ERR
MASKV3ERR
MASKV4ERR
MASKV5ERR
MASKV6ERR
Mask Voltage 2 Error.
0: Allow V2ERR bit to assert INT output.
1: Prevent V2ERR bit from asserting INT output.
Mask Voltage 3 Error.
0: Allow V3ERR bit to assert INT output.
1: Prevent V3ERR bit from asserting INT output.
Mask Voltage 4 Error.
0: Allow V4ERR bit to assert INT output.
1: Prevent V4ERR bit from asserting INT output.
Mask Voltage 5 Error.
0: Allow V5ERR bit to assert INT output.
1: Prevent V5ERR bit from asserting INT output.
Mask Voltage 6 Error.
0: Allow V6ERR bit to assert INT output.
1: Prevent V6ERR bit from asserting INT output.
6
7
-
-
REV. 1.01 12/2/99
15
PRODUCT SPECIFICATION
FMS2704/FMS2704L
Voltage Samples Averaged Register (0x7C)
BIT#
Name
Type
Description
2-0
VAVE
R/W
Number of voltage samples averaged.
000
001
010
011
100
101
110
1
2
4
8
16
32
64
7-3
Voltmeter Calibration Registers (0x7D–7F)
Register[bit]
Name
Type
Description
0x7D[6]
VOS8
R/W
Voltmeter Offset Polarity. Polarity of VOS7-0
0: Positive.
1: Negative.
Default = 0.
0x7D[5:0]
0x7E
VSENS13-8
VSENS7-0
VOS7-0
R/W
R/W
R/W
Voltmeter Sensitivity HI. Upper six bits of the A/D converter sensitivity
(LSB/volt) value programmed into the Voltage Counter Limit Register.
Default = 0x0 (TRSENS = 240). Range 0 to 16383.
Voltmeter Sensitivity LO. Lower eight bits of the A/D converter
sensitivity (LSB/volt) value programmed into the Voltage Counter Limit
Register. Default = 0xF0 (TRSENS = 240) for 5mV/LSB. Range 0 to 16383.
0x7F
Voltmeter Offset Magnitude. An 8-bit number that offsets the Voltage
ADC output by VOS LSBs with polarity determined by VOS8. Default =
0x00 (VOS = 0) Range = 0 to 255.
Controller Register Definitions
Controller Value Registers
Address
0x80
0x81
0x82
0x83
0x84
0x85
0x86
0x87
0x88
0x89
0x8A
0x8B
0x8C
0x8D
Name
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
SPEEDLOA7-0
TLLOA7-0
Controller A low speed
Controller A local low temp
SLOPEAL7-0
TRLOA17-0
SLOPEA17-0
TRLOA27-0
SLOPEA27-0
SPEEDLOB7-0
TLLOB7-0
Controller A local slope. (integer + fraction)
Controller A remote low temp 1
Controller A remote slope 1. (integer + fraction)
Controller A remote low temp 2
Controller A remote slope 2. (integer + fraction)
Controller B low speed
Controller B local low temp
SLOPEBL7-0
TRLOB17-0
SLOPEB17-0
TRLOB27-0
SLOPEB27-0
Controller B local slope. (integer + fraction)
Controller B remote low temp 1
Controller B remote slope 1. (integer + fraction)
Controller B remote low temp 2
Controller B remote slope 2. (integer + fraction)
Note: All controller register values must be postitive.
16
REV. 1.01 12/2/99
FMS2704/FMS2704L
PRODUCT SPECIFICATION
Fan Speed Controller Configuration Register (8E)
BIT#
Name
Type
Description
0
FAN_CTRL
R/W
Fan Speed Control Enable. (Power up default =0)
0: Fan speed outputs set through SERIAL BUS (Power up default)
1: Fan speed outputs depend on local/remote diode temperatures.
1
2
3
4
5
6
TLA_CTRL
TRA1_CTRL
TRA2_CTRL
TLB_CTRL
R/W
R/W
R/W
R/W
R/W
R/W
Local Diode Fan Speed A Control Enable.
0: Fan speed outputs established by other thermal diode inputs.
1: Fan speed outputs depend on local thermal diode temperature and any
other enabled thermal diode input.
Remote Diode 1 Fan Speed A Control Enable.
0: Fan speed outputs established by other thermal diode inputs.
1: Fan speed outputs depend on remote thermal diode 1 temperature and
any other enabled thermal diode input.
Remote Diode 2 Fan Speed A Control Enable.
0: Fan speed outputs established by other thermal diode inputs.
1: Fan speed outputs depend on remote thermal diode 2 temperature and
any other enabled thermal diode input.
Local Diode Fan Speed B Control Enable.
0: Fan speed outputs established by other thermal diode inputs.
1: Fan speed outputs depend on local thermal diode temperature and any
other enabled thermal diode input.
TRB1_CTRL
TRB2_CTRL
Remote Diode 1 Fan Speed B Control Enable.
0: Fan speed outputs established by other thermal diode inputs.
1: Fan speed outputs depend on remote thermal diode 1 temperature and
any other enabled thermal diode input.
Remote Diode 2 Fan Speed B Control Enable.
0: Fan speed outputs established by other thermal diode inputs.
1: Fan speed outputs depend on remote thermal diode 2 temperature and
any other enabled thermal diode input.
REV. 1.01 12/2/99
17
PRODUCT SPECIFICATION
FMS2704/FMS2704L
Functional Description
Within the FMS2704, there are six major functional blocks:
Each TACH input can be programmed to accept fan rotation
pulses at one, two, four or eight pulses per revolution.
Tachometer output is an 8-bit value indicating the period of
one fan revolution:
1. Tachometers
2. Temperature Processor.
3. Voltage Monitor
4. Data Processor
225000 • 60
TAC = -----------------------------
RPM • DIV
5. Fan Speed Controller
6. Reset Generators
To accommodate slow rise and fall times, edge filtering is
inserted at each tachometer input. Open drain/collector out-
puts are accommodated by pulling up each TACH input with a
10 KΩ resistor.
Tachometers
There are six tachometers, three for each of the two banks of
fans. Tachometers are enabled through the Tachometer
Configuration Register.
Tach Channel A3
Tach Channel A2
TACHA3
TACHA2
TACHA1
Tach Channel A1
Tach Channel B3
TACHB3
TACHB2
Tachometer
Status
Register
Tach Channel B2
Tach Channel B1
Tachometer
Register
Tachometer
TACHB1
Comparator
Tach
Interrupt
Interrupt
Mask
TACHTRIPA
and
TACHTRIPB
Registers
Figure 1. Tachometry
Each tachometer output is compared against a programmable
threshold.
If a violation occurs, an interrupt is generated (INT =L) to
inform BIOS or System Management software that fan regis-
ters should be read. After servicing the interrupt, the source
can be masked to prevent further interrupts.
1. TACHTRIPA for bank A tachometers
2. TACHTRIPB for bank B tachometers
Thermometers
Threshold Period is set at a fraction (e.g. 110%) of nominal, a
level below which airflow may be diminished.
Remote and local thermal diode voltages are sensed by the
Temperature Processor which sequentially outputs values of
the remote and local temperatures. Inputs are derived from a
remote diode that is connected by two wires to the input of the
processor; and the local diode, which is located on-chip. Out-
put is supplied to the Data Processor which loads the TL7-0
and TR7-0 registers with the digitized local and remote tem-
peratures.
An Error Flag will be set in the Tachometer Status Register
under either of the following conditions:
TACA1-A3 > TACHTRIPA
TACB1-B3 > TACHTRIPB
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REV. 1.01 12/2/99
FMS2704/FMS2704L
PRODUCT SPECIFICATION
Current
Generators
Remote
Thermal
Diodes
T7-0
A/D
Converter
DSP
Mux
FAULT
Local
Thermal
Diode
Figure 2. Temperature Processor Block Diagram
Table 1.Temperature/Data Conversion/Format
A differential multiplexer selects the thermal diode input
voltage to be applied to the A/D converter and the bandgap
used for the A/D calibration cycle. Voltage of the diode is
sensed at two currents:10 and 100µA. During the diode sam-
pling interval, the A/D converter digitizes low and high cur-
rent samples. DSP averages and subtracts the samples to
output an 8-bit temperature that is updated a rate greater than
1Hz. Remote and Local diode temperatures are outputted
alternately on the T7-0 bus which is connected to the
Temperature Registers.
Digital Output
Temperature
Binary
Hex
0x7D
0x19
0x01
0x00
0xFF
0xE7
0xC9
+125°C
+25°C
+1.0°C
0°C
0111 1101
0001 1001
0000 0001
0000 0000
1111 1111
1110 0111
1100 1001
-1.0°C
-25°C
-55°C
Remote Diode fault sensing is included within the DSP block.
If either remote diode voltage indicates either a short or an
open circuit, the appropriate FAULT_D1 or FAULT_D2 bit is
set in the Interrupt Status Register.
A block diagram of the processing shared by the thermometer
channels is shown in Figure 3.
Temperature data format is 8-bit, two’s complement with the
LSB equivalent to 1.0°C. Range and conversion between °C
and equivalent binary and hexadecimal data is exemplified in
Table 1.
VHI[13:0]
ADC[13:0]
TK[9:0]
TC[8:0]
VPN
A/D
VLO[13:0]
Sensitivity
Register
(NG)
Offset
Register
(NOS = 272.2)
Ambient: No A/D averaging
Remote: Average 16 HI/LO sample pairs
Figure 3. Temperature Processor Architecture
REV. 1.01 12/2/99
19
PRODUCT SPECIFICATION
FMS2704/FMS2704L
Default response of the Temperature Processor is set to match
the expected characteristics of the Intel Pentium thermal diode
and the on-chip local diode. By updating the values in the
TRSENS, TRSO, TLSENS and TLOS registers sensitivity can
be trimmed to accommodate alternate thermal diode charac-
teristics.
Local temperatures are compared against:
1. TLHI7-0 and TLLO7-0 values stored in the Limit Registers
which bracket the temperature range to be tracked. If a
limit is violated, INT = L.
2. Thermal trip points PTL7-0 or FTL7-0 set at high levels
corresponding to a serious overheating problem.
Diode low current voltage value VLO is subtracted from the
high current value VHI to yield TK = ∆VD . TK is the digitized
temperature in °K with a sensitivity of 1/2 °/lsb.
Remote temperatures, TR1 and TR2 are compared against:
1. TR1HI7-0, TR1LO7-0 TR2HI7-0 and TR2LO7-0 values
stored in the Limit Registers which bracket the tempera-
ture range to be tracked. If a limit is violated, INT = L.
Next, the value 273.2 is subtracted to transform TK from °K to
°C. Diode offsets are trimmed out by adjusting the value of
NOS. TC is truncated to 8-bits prior to storage in the tempera-
ture registers.
2. Thermal Trip points FTR7-0 or PTR7-0. If TR7-0
>
FTR7-0 or PTR7-0, the alert output THERM = asserted.
Following a violation, the sensed temperature must drop
5°C to clear the trip flag.
To minimize the effects of noise, digitized temperatures are
averaged over several samples.
Figure 4 depicts the logical flow of the internal and external
THERM signals, showing the origins and destinations.
THERM Processing
THERM is a bi-directional pin with an open drain output.
When the THERM output is asserted L, the THERM input
is disabled.
INTRSTb
Interrupt
Status
Register
Mirror
TEMPVALID
THERM
PFRY7-0
XTHERM
Programmable
Trip Point
PHOT7-0
Registers
FRY7-0
ITHERM
HOT7-0
THERM
Comparators
FFRY7-0
FHOT7-0
Fixed Trip
Point
Registers
Interrupt
Status
Register
Other
Interrupts
THERM
Interrupt
OR-gate
Mask
Gating
ITHERM
Restore
Interrupt
Mask
INT
MSKTHERM
Register
TRIPLOCK
TR[7:0]
TA[7:0]
Configuration
Register
FAN_ON
FAN_OFF
DACFF==THERM
D/A
Register
D/A
Converter
FAN_SPD
Figure 4. THERM I/O Structure/Detail
As an input, if THERM = L the following events occur:
As an output, ITHERM = H, causes THERM = L; ITHERM
= L, causes THERM = Z, open drain. ITHERM = H, if any of
the following conditions occur:
1. If the mask bit, MSKTHERM = L, output pin, INT = L
2. Configuration Register bit, FAN_OFF = H.
1. If Configuration Register bit, TRIPLOCK = L:
3. Output pins, FAN_SPDA,B = 2.5V for maximum fan
speed, with register values SPEEDA7-0 and SPEEDB7-0
unchanged.
a) TL7-0 > FTL7-0
.
b) TR17-0 > FTR7-0
.
.
4. Interrupt Status Register bit, THERM = H.
c) TR27-0 > FTR7-0
5. Interrupt Status Register Mirror bit, MTHERM = H.
20
REV. 1.01 12/2/99
FMS2704/FMS2704L
PRODUCT SPECIFICATION
2. If Configuration Register bit, TRIPLOCK = H
TRIPLOCK is Temperature Trip Point Lock bit in the Config-
uration Register. After a Trip Point has been exceeded, to
restore the open drain output, THERM = Z, the temperature
must fall 5°C below the trip point.
a) TL7-0 > PTL7-0
.
b) TR17-0 > PTR7-0
.
.
c) TR27-0 > PTR7-0
A typical THERM sequence is shown in Figure 5, which
depicts the profile of events when TR1 transitions through the
PTR trip point threshold. Similar profiles apply to:
1. TR1 with FTR limits
2. TR2 with PTR and FTR trip points
3. and to TL and TR2 with the appr
PTR
PTR - 5
TR1
ITHERM
INT
RD_INT
Figure 5. Profile of THERM Driven Events
One set of high and low limit values, VHI7-0 and VLO7-0 are
shared between the six voltage values. Violation of a limit will
set the corresponding flag in the Voltage Error Register. Flag i
is set as a result of either of the following conditions:
Voltage Monitoring
In the voltmeter mode, either diode input can become a pair
of single-ended voltage inputs. A low pass filter in each
input minimizes fluctuations caused by noise riding on the
input signals. Voltmeter inputs are optimized for conversion
of a nominal 1000mV signal that is converted with a sensi-
tivity of 0.2 lsb/mV.
1. Vi < VLO
2. Vi > VHI
Where i = 1:6.
Voltmeter data format is 8-bit integer. Table 2 shows register
values corresponding to selected inputs. By setting the value
of VAVE, the number of samples to be averaged can be set to
be either 1, 2, 4, 8, 16, 32 or 64.
If the flag is not masked by the Voltage Error Mask Register,
the Interrupt Output, INT = L. After the source of the error
has been identified, further interrupts can be prevented by
masking the source of the error.
Table 2. Voltage Conversion
Voltage Value
Input (mV)
Interrupt Processing
Decimal
0
Hex
0
INT is a hardware interrupt output. INT operation is
controlled by the Configuration Register bits: INT_EN and
INT_CLR bits, which enable and clear the open drain INT
output. Subject to the setting of the Mask Registers, INT =L,
if any bit is active in the following registers:
0
100
20
14
64
B4
C8
DC
FF
500
100
180
200
220
255
900
1000
1100
1275
1. Tachometer Status.
2. Voltage Status Register.
3. Temperature Status Register.
REV. 1.01 12/2/99
21
PRODUCT SPECIFICATION
FMS2704/FMS2704L
Otherwise INT = Z, open drain. Figure 6 depicts the logical
flow of the interrupt sources to the INT output.
Voltage Status Register bits indicate if any one of the six volt-
meter inputs violates the high or low voltage trip levels bound-
ary, causing the appropriate ERROR_V6-1 bit to be set.
Unwanted interrupts can be masked by programming the Volt-
meter Mask Register.
For the Tachometer Status Register, if any one of the six fan
speed inputs violates the speed boundary, the appropriate
ERRORA1-3,B1-3 bit is set. Unused tachometer inputs can be
disabled by programming in the Tachometer Configuration
Register. Unwanted interrupts can be masked by program-
ming the Tachometer Mask Register.
XTHERM
THERM
INT
ITHERM
LTV & RTV
Interrupt
LTV, RTV2-1
Control &
Masking
Interrupt
Control
ITHERM
THERM,
Mask
Interrupt
Status
Register
FAULT1-2
Gating
ERROR_V6-1
ERROR_TA3-1,B3-1
FAULT_D1-2
Interrupt
Mask
Register(s)
Interrupt
Status
Register
Mirror
INT_CLR
INT_EN
Configuration
Register
INT_RST
SOFT_RST
Figure 6. INT Output Structure
With Configuration Register bits INT_EN = 1 and INT_CLR
= 0, output pin INT = L, if any of the following bits are set in
the Temperature Interrupt Register:
Output pin INT = Z, clearing the interrupt output, if any of the
following events occur:
1. Interrupt Status Register is read, causing this register to
be cleared to the default state that is all interrupts
cleared. However a THERM or FAULT1-2 condition will
cause an immediate re-assertion of the interrupt.
1. LTV: An local temperature limit is violated indicating
that the on-chip temperature falls outside the boundaries
established by TLLO7-0 and TLHI7-0
.
2. Configuration Register bit INT_CLR = 1, which is the
default condition following an internal reset.
2. RTV1: Remote thermal diode 1 temperature limit is
violated, indicating that the temperature falls outside the
3. Configuration Register bit INT_EN = 0, which is the
default condition following an internal reset.
boundaries established by TRLO7-0 and TRHI7-0
.
3. RTV2: Remote thermal diode 2 temperature limit is
violated, indicating that the temperature falls outside the
Status of the INT_CLR and INT_EN bits does not impact the
contents of the Interrupt Status. Reading the Interrupt Status
Registers clears only that register.
boundaries established by TRLO7-0 and TRHI7-0
.
4. THERM: Temperature exceeds an selected automatic
trip point (PTL7-0, PTR7-0, FTL7-0, or FTR7-0) causing
output THERM = L or the THERM input = L even if the
THERM bit in the Interrupt Register is masked.
Note that setting the INT output by exceeding a temperature
limit is an edge-driven event. Only when the temperature
actually crosses the limit boundary does INT transition LOW.
An example of interrupts caused by a series of temperature, T
transitions across temperature limits is shown in Figure 7.
5. FAULT_D1-2: Remote diode D1-2 is either open or short
circuit.
22
REV. 1.01 12/2/99
FMS2704/FMS2704L
PRODUCT SPECIFICATION
Temperature limits are fixed for the first series of temperature
excursions. Then, for the second series, following the THI1
violation, the THI limit is raised from THI1 to THI2. If THI is
reprogrammed from a value above T to a value below THI,
then an interrupt is generated.
THI2
THI3
THI1
TLO1
TLO2
T
RTV/LTV
Read_INT
INT
Figure 7. Profile of Temperature Driven Interrupts
LTV and RTV bits operate in conjunction with the INT output
and Interrupt Status Register as follows:
If the low temperature limit is changed from a level below the
ambient/remote temperature to a level above, then the LTV/
RTV bit is set.
1. When the temperature exceeds a high limit, the corre-
sponding Interrupt Status Register bit, either LTV or
RTV is set.
Serial Interface
FMS2704 register access is via a 2-wire I2C/SMBus compati-
ble interface. Base address is 0x2C + n, where n is an offset
defined by the state of the ADD pin: Z, H, L == 0, 1, 2. (see
Table 3) State Z corresponds to the ADD pin being open
circuit.
2. Reading the Interrupt Status Register clears LTV and
RTV.
3. Once the high limit has been exceeded, a subsequent
transitions through the high level will not cause an
interrupt, unless:
Table 3. Serial Port Slave Addresses
a) The temperature passes through the low limit.
ADD
Address
2C
b) Or, the high temperature limit is changed.
Z
H
L
2D
4. If the high temperature limit is changed from a level
above the temperature to a level below, then the relevant
Interrupt Status Register bit, either LTV or RTV is set.
2E
5. If the temperature falls below a low limit, the corre-
sponding Interrupt Status Register bit, either LTV or
RTV is set.
Two signals comprise the bus: clock (SCL) and bi-directional
data (SDA). When receiving and transmitting data through the
serial interface, the FMS2704 acts as a slave, responding only
to commands by the I2C/SMBus master.
6. Once the low limit has been exceeded, a subsequent
transitions through the low level will not cause an inter-
rupt, unless:
Data received or transmitted on the SDA line must be stable
for the duration of the positive-going SCL pulse. Data on
SDA may change only when SCL = L. An SDA transition
while SCL = H is interpreted as a start or stop signal.
a) The temperature passes through the high limit.
b) Or, the low temperature limit is changed.
REV. 1.01 12/2/99
23
PRODUCT SPECIFICATION
FMS2704/FMS2704L
SDA
tBUFF
tSTAH
tDHO
tSU
tSTASU
tSTOSU
tDAL
SCL
tDAH
Figure 8. Serial Bus: Read/Write Timing
SDA
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
ACK
SCL
Figure 9. Serial Bus: Typical Byte Transfer
SDA
SCL
A6
A5
A4
A3
A2
A1
A0
R/W\
ACK
Figure 10. Serial Bus: Slave Address with Read/Write Bit
There are five steps within an I2C/SMBus cycle:
Data Transfer Via Serial Interface
If a slave device, such as the FMS2704 does not acknowledge
the master device during a write sequence, SDA remains
HIGH so the master can generate a stop signal. During a read
sequence, if the master device does not acknowledge (ACK
= L), the FMS2704 interprets this as “end of data.” SDA
remains HIGH so the master can generate a stop signal.
1. Start signal
2. Slave address byte
3. Pointer register address byte
4. Data byte to read or write
5. Stop signal
To write data to a specific FMS2704 control register, three
bytes are sent:
When the Serial Bus interface is inactive (SCL = H and SDA
= H) communications are initiated by sending a start signal.
The start signal (Figure 8, left waveform) is a HIGH-to-LOW
transition on SDA while SCL is HIGH. This signal alerts all
slaved devices that a data transfer sequence is imminent.
1. Write the slave address byte with bit R/W = L.
2. Write the pointer byte.
3. Write to the control register indexed by the pointer.
After a start signal, the first eight bits of data that are transferred,
comprise a seven bit slave address followed a single R/W bit
(Read = H, Write = L). As shown in Figure 9, the R/W bit
indicates the direction of data transfer: read from; or write to
the slave device. If the transmitted slave address matches the
address of the FMS2704 which set by the state of the ADD
pin, the FMS2704 acknowledges by pulling SDA LOW on the
9th SCL pulse (see Figure 10). If the addresses do not match,
the FMS2704 does not acknowledge.
Data is read from the control registers of the FMS2704 in a
similar manner, except that two data transfer operations are
required:
4. Write the slave address byte with bit R/W = L.
5. Write the pointer byte.
6. Write the slave address byte with bit R/W = H
7. Read the control register indexed by the pointer.
For each byte of data read or written, the MSB is the first bit of
the sequence.
24
REV. 1.01 12/2/99
FMS2704/FMS2704L
PRODUCT SPECIFICATION
Preceding each slave write, there must be a start cycle. Follow-
ing the pointer byte there should be a stop cycle. After the last
read, there must be a stop cycle comprising a LOW-to-HIGH
transition of SDA while SCL is HIGH. (see Figure 8, right
waveform)
Following power-up, registers are set to default values. After a
200 msec. power up reset delay, the FMS2704 will begin
checking sensor inputs to determine if the temperature in volt-
ages fall within default limits, which can be overridden by
changing the values stored in the Value RAM.
A repeated start signal occurs when the master device driving
the serial interface generates a start signal without first gener-
ating a stop signal to terminate the current communication.
This is used to change the mode of communication (read,
write) between the slave and master without releasing the
serial interface lines.
If the PTL7-0 and PTR7-0 values are changed, then the
TRIP_LOCK (Temperature Trip Point Lock) bit in the Config-
uration Register must be set to enable temperature values to be
compared against the programmable rather than the fixed trip
point values. If the temperature limit values are changed, then
the changes are effective immediately. Interrupt masking (reg-
ister 0x43), enabling (INT_EN bit) and clearing (INT_CLR
bit) can be used to disable interrupts during register setup.
Serial Interface Read/Write Examples
Register functions and bit assignments defined in the Address-
able Memory and Global Register Definitions sections.
Examples below show how serial bus cycles can be linked
together for multiple register read and write access cycles. For
sequential register accesses, each ACK handshake initiates
further SCL clock cycles from the master to transfer the next
data byte.
Temperature register outputs, TR7-0 and TA7-0 are compared
with the limit values TRHI7-0, TRLO7-0, TAHI7-0 and TALO7-0
that are stored in the Limit Registers. Out of range TA7-0 and
TR7-0 values set the INT bit in the Interrupt Status Register.
TR7-0 and TA7-0 are also compared with the values in Trip
Point Registers, PTL7-0 and PTR7-0 if these registers have
been loaded or FTL7-0 and FTR7-0, which contain power up
default values.
Write to one control register
1. Start signal
2. Slave Address byte (R/W bit = LOW)
3. Pointer byte
4. Data byte to base address
5. Stop signal
Fan Speed Outputs
Fan speed outputs FAN_SPDA and FAN_SPDB can be pro-
grammed individually to be either 0–2.5V analog output or
Pulse Width Modulated Output. Register values are set
directly through the Serial Bus by external software or firm-
ware following interrogation to temperature and tachometer
values. Also, the fan speed may be derived from the internal
registers, SPEEDA and SPEEDB or from the Channel A or
Channel B Fan Speed Controllers.
Read from one control register
1. Start signal
2. Slave Address byte (R/W bit = LOW)
3. Pointer byte (= base address)
4. Stop signal
5. Start signal
If the A Channel analog output is selected, the output of the
ADAC D/A converter is connected to the FAN_SPDA output.
If A Channel PWM is selected, then Pulse Width Modulator is
connected to the FAN_SPDA output. B channel analog/PWM
selection functions similarly.
6. Slave Address byte (R/W bit = HIGH)
7. Data byte from base address
8. Stop signal
Registers
Reset Generator
Based upon setup commands via the Serial Bus, the FMS2704
gathers sensor inputs from the Tachometers, Thermometers and
Voltmeters. Measured values are compared against reference
values stored in the Trip and Limit registers. Fault conditions
set flags in the Interrupt registers and activate THERM and
INT outputs. Sensor and interrupt status are passed to the host
via the Serial Bus interface. Host commands set the FMS2704
configuration, interrupt masking and the fan speed.
The Reset Generator emits a RST = L pulse under either of the
following conditions:
1. STANDBY = L, causing no internal reset, INTRST.
2. VCCA & VCCD < 4.4V (FMS2704) or
VCCA & VCCD < 2.9V (FMS2704L),
Following release of the reset stimulus, RST = L for a further
200 msec.
REV. 1.01 12/2/99
25
PRODUCT SPECIFICATION
FMS2704/FMS2704L
tRST
200mS
200mS
VCC3<2.9
STANDBY
RST
tDSTBY
200mS
tDIR
INTRST
Figure 11. Reset Generator Waveforms
In the standby mode power is minimized by stopping all sens-
ing activities and freezing the tachometer, temperature and
voltage register values. When power is initially applied, the
Reset Generator instigates five events through internal reset,
INTRST:
4. Temperature Processor and Data Processor are reset.
5. Fan Speed Controller is disengaged with output set to zero.
Fan Speed Controllers
If the FAN_CTRL bit is set H, D/A converter fan drive volt-
ages are established as a function of FMS2704 sensor inputs.
If the FAN_CTRL bit is set L, the Controller does not influ-
ence the D/A register values, which are set through the Serial
Bus. There are two identical channels, A and B that can be set
up independently to control the A and B fan banks. Figure 12
shows both controllers and the details of the A controller.
1. Configuration, Interrupt and Mask registers are reset to
default values.
2. THERM Trip Point registers: PTL7-0, PTR7-0, FTL7-0
FTR7-0 are set to default values.
,
3. SPEEDA7-0 and SPEEDB7-0 registers are set to 0x00.
SPEEDA
REGISTER
TR17-0
TR27-0
TL7-0
DACA
FAN_SPDA
PWMA
+
+
DACB
FAN_SPDB
PWMB
TR17-0
TR27-0
TL7-0
Channel B
Controller
SPEEDB
REGISTER
Part of Data Processor
Figure 12. Fan Speed Controller
26
REV. 1.01 12/2/99
FMS2704/FMS2704L
PRODUCT SPECIFICATION
Fan control is based upon running the fans at slow speed for
minimum noise, unless the local temperature rises due to a
higher ambient temperature or a remote temperature rises
because a CPU is running hot. If remote or local diode tem-
perature rises, then the fan speed is increased. Fan drive is
controlled on the basis of:
For each thermometer channel, a piece-wise linear approxima-
tion response like that shown in Figure 13 is defined.
255
SLOPEA1
1. Remote temperatures 1 and 2 (CPU temperatures).
2. Local temperature (FMS2704 die temperature).
A straightforward mode of operation is to control fan speed as
a function of one CPU temperature. Another mode is to base
primary control upon local temperature, which is sensed to
anticipate the extra cooling required to compensate for higher
ambient temperature surrounding the enclosure. Secondary
control augments cooling by increasing fan speed if the tem-
perature of either CPU begins to rise. If a fan runs low or fails,
the fan speed within that bank is automatically increased,
while an interrupt is generated to inform the CPU that a fan
speed has fallen below threshold.
0
0
TRLOA1
TR1(°C)
Figure 13. Fan Drive Response
This straight-line segment defines the value to be added to the
Channel A fan speed drive for a given temperature. For exam-
ple setting TRLOA1 = 60 and SLOPEA1 = 4D hex to define
fan speed drive increment of 9.5 lsbs/°C, above 60°C. Below
60°C, the contribution is zero.
To account for multiple temperature inputs, separate segments
are defined for the local and remote temperatures. Drive con-
tributions from these segments are added to a minimum fan
speed to create a target drive value.
Channel A drive is:
DRIVEA = SPEEDLOA + SLOPEAL • (TL – TLLOA) + SLOPEA1 • (TR1 – TRLOA1) + SLOPEA2 • (TR2 – TRLOA2)
where:
And logic within the FMS2704 applies the following constraints:
TL = Local temperature.
TR1 = Remote temperature of diode 1.
DRIVEA ≤ 255
TL > TLLOA
SLOPEAL*(TL – TLLOA) ≤ 255
TR1 > TRLOA1
TR2 = Remote temperature of diode 2.
SLOPEA1*(TR1 – TRA1) ≤ 255
TR2 > TRLOA2
SLOPEA2*(TR2 – TRA2) ≤ 255
Channel B drive is:
DRIVEB = SPEEDLOB + SLOPEBL • (TL – TLLOB) + SLOPEB1 • (TR1 – TRLOB1) + SLOPEB2 • (TR2 – TLLOB2)
REV. 1.01 12/2/99
27
PRODUCT SPECIFICATION
FMS2704/FMS2704L
Essentially, the overall response amounts to summing individ-
ual fan speed contributions that have different gains and offsets.
TRLOA1, TRLOA2, TRLOB1 and TRLOB2 must be
unsigned integer °C values.
An example with channel A fan drive caused solely by remote
diode 1 is shown in Figure 14, which is the result of adding the
remote diode 1 segment to minimum fan speed. Using the
values from the segment example, if SPEEDLOA = 16, the
SPEED drive rises from 16 at 60°C to a 255 limit at 78°C.
SLOPEAL,BL,A1-2,B1-2 is expressed as a 5-bit integer plus a
fraction. SLOPE7-3 is the integer. SLOPE2-0 is the fraction in
1/8’th degrees. For example, the slope 13.5 is coded as 6C
(SLOPE7-3 = 13, SLOPE2-0 = 1/2).
A typical Fan Speed Controller register set up is shown in
Table 4.
255
Table 4. Example Controller Register Values
9.5 LSB/°C
Register
Address
80
Decimal
Hex
60
00
3C
40
00
05
01
SPEEDALO
SLOPEAL
TRLOA1
96
0
75
0
82
83
60
64
0
SLOPEA1
SLOPEA2
FAN_CTRL
VOLTA
84
60
79
86
TR1(°C)
8E
5
Figure 14. Fan Speed Response
44
1
With both remote temperature inputs processed against the
same values, fan speed control parameters are established
through a set of fourteen registers:
With these register values, Fan ControllerA is selected with an
analog voltage output (rather than PWM). Below 60°C, the
fan idles at 38% (96/255) maximum speed. Above 60°C, fan
drive increases at 8 LSB/°C (0.3%/°C) until the fan drive is
255 at 80°C.
1. SPEEDLOA, TRLOA1, SLOPEA1, TRLOA2, SLOPEA2
,
TRLOAL, SLOPEAL
2. SPEEDLOB, TRLOB1, SLOPEB1, TRLOB2, SLOPEB2
TRLOB2, SLOPEBL
.
,
Since SLOPEAL and SLOPEA2 values are zero, neither local
temperature, TL nor remote diode 2 temperature, TR2 impact
the value of drive A, which is a solely dependant upon temper-
ature TR1.
.
In the slave mode, FAN_SPDA and FAN_SPDB outputs are
derived from the SPEEDA and SPEEDB registers.
Format of the values in the registers is as follows:
SPEEDLOA,B is expressed in LSBs of fan drive output. Range
is 0–255 corresponding to 0–2.5V DAC output or 0–100%
PWM on the FANSPDA,B outputs.
28
REV. 1.01 12/2/99
FMS2704/FMS2704L
PRODUCT SPECIFICATION
Equivalent Circuits
VDD
VDD
p
Digital
Output
Digital
Input
n
n
GND
GND
Figure 18. Equivalent Open Drain Output Circuit
Figure 15. Equivalent Digital Input Circuit
VDD
p
Digital
Output
n
GND
Figure 16. Equivalent Digital and D/A Output Circuit
Figure 19. Equivalent D/A Output Circuit
VCC
DXP
DXN
GND
Figure 17. Equivalent Remote Diode Interface Circuit
REV. 1.01 12/2/99
29
PRODUCT SPECIFICATION
FMS2704/FMS2704L
(beyond which the device may be damaged)1
Absolute Maximum Ratings
Parameter
Min
Typ
Max
Unit
Power Supply Voltages
VCC (Measured to GND)
Digital Inputs
-0.5
3.3/5.0
5.75
V
3.3/5.0V logic applied voltage (Measured to GND)2
Forced current3, 4
-0.3
-5.0
5.75
5.0
V
mA
Analog Inputs
Applied Voltage (Measured to GND)2
Forced current3, 4
-0.5
5.75
10.0
V
-10.0
mA
Digital Outputs
Applied voltage (Measured to GND)2
-0.5
5.75
V
Parameter
Forced current3, 4
Forced current3, 4
Min
-6.0
-8.0
Typ
Max
6.0
8.0
1
Unit
mA
mA
Short circuit duration (single output in HIGH state to ground)
second
Temperature
Operating, Ambient
Junction
-40
-65
125
150
300
220
150
±150
°C
°C
°C
°C
°C
V
Lead Soldering (10 seconds)
Vapor Phase Soldering (1 minute)
Storage
Electrostatic Discharge5
Notes:
1. Functional operation under any of these conditions is NOT implied. Performance and reliability are guaranteed only if
Operating Conditions are not exceeded.
2. Applied voltage must be current limited to specified range.
3. Forcing voltage must be limited to specified range.
4. Current is specified as conventional current flowing into the device.
5. EIAJ test method.
Operating Conditions
Parameter
VCC
Min
Nom
Max
Units
V
Digital Power Supply Voltage
Ambient Temperature, Still Air
3.3/5.0
TA
0
85
°C
30
REV. 1.01 12/2/99
FMS2704/FMS2704L
PRODUCT SPECIFICATION
Electrical Characteristics
Parameter
Conditions
Min
Typ
Max
Unit
Power Supply Currents
IVCC
Supply Current
Operating Standby
15
10
7
20
mA
mA
mA
TACHA1-3, B1-3 Active
Standby, TACHA1-3, B1-3 = H
Digital Inputs/Outputs
CI
Input Capacitance
5
10
pF
pF
µA
µA
µA
V
CO
IIH
Output Capacitance
10
Input Current, HIGH
-1
0.005
0.005
200
IIL
Input Current, LOW
+1
+1
IILR
VIH
VIL
IOZH
IOH
IOL
VOH
VOL
Input Current, LOW, Master Reset
Input Voltage, HIGH
STANDBY = L
2.0
Input Voltage, LOW
0.8
100
-2
V
Output Current, HIGH, open drain
Output Current, HIGH
Output Current, LOW
Output Voltage, HIGH
-0.1
µA
µA
mA
V
3
IOH = max.
IOL = max.
2.4
2.1
Output Voltage, LOW (VDD3
)
0.4
V
Serial Bus I/O
VSMIH
VSMIL
Input Voltage, HIGH
Input Voltage, LOW
V
V
0.8
0.4
-100
4
VSMOL Output Voltage, LOW
ISMOL = max.
V
ISMOH
ISMOL
Output Current, HIGH
Output Current, HIGH
-0.1
µA
mA
Diode Inputs
IDH Source Current, High
IDL Source Current, Low
Analog Output
80
8
100
10
120
12
µA
µA
VAH
VAL
IAH
IAL
Output Voltage, high
SPEEDA/B7-0 = 0xFF
SPEEDA/B7-0 = 0x00
2.5
0
V
V
Output Voltage, low
Output Current , source
Output Current , sink
2
mA
mA
1
REV. 1.01 12/2/99
31
PRODUCT SPECIFICATION
FMS2704/FMS2704L
Switching Characteristics
Parameter
Conditions
Min
Typ1
Max
Unit
Digital Inputs
tDI
Delay, input to register
Reset Generators
tDR
Delay, STANDBY ↓ to RST = L
ns
ms
ns
tWR
Pulsewidth, STANDBY ↑ to RST = H
Delay, VCC < 2.9/4.4 V to RST output
Pulsewidth, RST after VCC > 2.9/4.4 V
180
140
500
500
tDVR
tDVW
Serial Bus Interface
tDAL SCL Pulse Width, LOW
tDAH
ms
4.7
4.0
4.0
4.0
4.7
4.7
250
300
µs
µs
µs
µs
µs
µs
ns
ns
SCL Pulse Width, HIGH
tSTAH
tSTASU
tSTOSU
tBUFF
tDSU
SDA Start Hold Time
SCL to SDA Setup Time (Stop)
SCL to SDA Setup Time (Start)
SDA Stop Hold Time Setup
SDA to SCL Data Setup Time
SDA to SCL Data Hold Time
tDHO
Notes:
1. ↓ is a H to L transition.
2. ↑ is a L to H transition.
System Performance Characteristics
Parameter
Conditions
Min
Typ1
Max
Unit
Thermometer
Remote Accuracy
Local Accuracy
-40°C ≤ TR ≤+125°C
+60°C ≤ TR ≤ +100°C
0°C ≤ TA ≤ +85°C
±5
±3
±5
±3
°C
°C
°C
°C
20°C ≤ TA ≤ +50°C
Tachometer
Voltmeter
Accuracy
±1
%
Accuracy
±1
8
%
Resolution
bits
A/D Converter
ETUADC
ELDADC
PSS
Error, Total Unadjusted
Differential Linearity Error
Power Supply Sensitivity
Total Monitoring Cycle Time
±1
±1
±1
1.0
%
LSB
%/V
Sec.
tC
Remote and Local
1.4
D/A Converter Output
ETUDAC Error, Total Unadjusted
ELDDAC Differential Linearity Error
-3
-1
+3
+1
%
LSB
32
REV. 1.01 12/2/99
FMS2704/FMS2704L
PRODUCT SPECIFICATION
System Performance Characteristics (continued)
Parameter
Conditions
Min
Typ1
Max
Unit
Reset Generators
VRES
Threshold Voltage
FMS2704
4.4
2.9
200
V
V
FMS2704L
tRES
Reset Interval
msec.
Notes:
1. Unless stated otherwise, values shown in Typ. column are typical for V = 3.3/5.0V and T = 25°C.
CC
A
Parasitic voltages and leakage can cause errors. Voltage sensi-
tivity is 200µV/°C. 1µA current leakage can cause a 4%
change in sensitivity that corresponds to a 12°C error at room
temperature.
Applications Information
Before illustrating some applications with a few examples,
below are several guidelines that should be adopted to opti-
mize performance of the FMS2704.
Fan Control
Thermal Diode Connections
Whether setting the fan speed through the SMBus or using the
internal controller, the fan speed should be constrained
between a value corresponding to stall speed and normal rated
speed. Stall speed is typically 30% of normal speed.
When connecting a bipolar transistor configured as a thermal
diode, sensing the base-emitter junction with the collector dis-
connected is not recommended. Intrinsic base resistance will
induce an error causing the indicated temperature to be high.
Instead connect the transistor in either of the configurations
shown in Figure 20:
1. PNP: Collector connected to ground, with DXP con-
nected to the emitter and DXN connected to the base.
Stall Voltage
2. NPN: Collector connected to base, with DXN con-
nected to the emitter and DXP connected to the base.
Within the FMS2704, there is a return to ground through the
DXN pin which conducts the base current of a PNP transistor
or the emitter current from an NPN transistor.
Voltage
Figure 21. Fan Speed verses Drive Voltage
DXP
Q1
General
DXN
PNP
Power is supplied to the VCCA and VCCD pins, which should
be de-coupled to ground through local 0.1µF chip capacitors.
To minimize the effects of noise, locate the FMS2704 over a
ground plane.
DXP
Q2
Input pin STANDBY and bi-directional pin THERM, should
be biased to VCCD through a pull-up resistor to prevent spuri-
ous triggering. Tachometer inputs are internally biased to
VCCD.
NPN
DXN
JP1
Opitional Ground
Serial Bus pins SCL and SDA require pull-up resistors along
the bus but not necessarily local to the FMS2704. ADD must
be set H, L or open to match the FMS2704 address to the
assigned Serial Bus address.
Figure 20. Thermal Diode Connections
Cleanly route the DXP1, DXN1 and DXP2, DXN2 analog
traces as pairs over the ground plane. Segregate DXP2-1,N2-1
traces from digital traces and areas of noise.
REV. 1.01 12/2/99
33
PRODUCT SPECIFICATION
FMS2704/FMS2704L
Recommended ceramic resonator to be connected across the
OSC2-1 pins is a Murata CSTCC358-TC or equivalent. This
resonator includes capacitors that form the resonant circuit of
a Colpitts oscillator. If a resonator without internal capacitors
is used, external capacitors should be connected as shown in
Figure 22.
Example Applications Circuits
Several applications are depicted in the schematics below.
Figure 23 shows how the FMS2704 can be used to set the
speed of two fans while monitoring the rotation rates with the
tachometer inputs. Fan speed is set by programming the
SPEEDA and SPEEDB registers. Drive to the P-channel
MOSFETs is set to be PWM.
Y1
CSTCC358-TC
1
HI
OSC1
OSC2
2
GND
LO
Figure 24 shows the FMS2704 used as a Fan Speed Control-
ler. Fan Drive increases as the temperature of the thermal
diode increases. There are two separate controllers, one for
each fan. PNP transistors comprising the diodes may be
embedded within processor silicon such as a Pentium II or III.
3
OSC1
C?
30PF
Y?
Figure 25 shows an FMS2704 driving two banks of three fans
while monitoring the speed of each fan.
RESONATOR
C?
30PF
OSC2
Figure 22. Schematic, Ceramic Resonator
Configurations
34
REV. 1.01 12/2/99
FMS2704/FMS2704L
PRODUCT SPECIFICATION
S O P
1
G E N
S O P
2
1
G E N
2
8
8
4
4
A C C V
D C C V
9 1
7
D N G
2 1
Figure 23. FMS2704 Reference Schematic, Dual Analog Fan Drive with Tachometers
REV. 1.01 12/2/99
35
PRODUCT SPECIFICATION
FMS2704/FMS2704L
S O P
G E N
2
1
S O P
G E N
2
1
A C C V
D C C V
9 1
7
D N G
2 1
Figure 24. FMS2704 Reference Schematic, Dual PWM Fan Speed Controller with Voltage Monitoring
36
REV. 1.01 12/2/99
FMS2704/FMS2704L
PRODUCT SPECIFICATION
S O P
S O P
S O P
S O P
1
1
1
G E N
G E N
G E N
G E N
2
2
2
2
S O P
1
G E N
2
S O P
1
G E N
2
8
4
8
4
A C C V
D C C V
9 1
D N G
7
2 1
Figure 25. FMS2704 Reference Schematic, Dual Triple Fan Drive, Six Tachometers
REV. 1.01 12/2/99
37
PRODUCT SPECIFICATION
FMS2704/FMS2704L
Mechanical Dimensions
24-Lead TSSOP (T1) Package
Notes:
Inches
Millimeters
Symbol
Notes
1. Dimensioning and tolerancing per ANSI Y14.5M-1982.
Min.
Max.
Min.
Max.
2. "D" and "E" do not include mold flash. Mold flash or
protrusions shall not exceed .006 inch (0.15mm).
A
—
.047
.006
.012
.008
.316
.180
—
1.20
0.15
0.30
0.20
7.90
4.50
A1
B
.002
.007
.004
.308
.172
0.05
0.19
0.09
7.70
4.30
3. "L" is the length of terminal for soldering to a substrate.
4. Terminal numbers are shown for reference only.
5. Symbol "N" is the maximum number of terminals.
C
D
E
2
2
e
.026 BSC
.256 BSC
.018 .030
0.65 BSC
6.40 BSC
0.45 0.75
H
L
3
5
N
α
24
24
0°
8°
0°
8°
ccc
—
.004
—
0.10
D
E
H
C
A1
A
α
SEATING
PLANE
– C –
L
B
LEAD COPLANARITY
ccc C
e
38
REV. 1.01 12/2/99
PRODUCT SPECIFICATION
FMS2704/FMS2704L
Ordering Information
Product Number Temperature Range
Screening
Commercial
Commercial
Package
Package Marking
2704T1
FMS2704T1C
FMS2704LT1C
0°C to 85°C
0°C to 85°C
24 Lead TSSOP
24 Lead TSSOP
2704LT1
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
12/2/99 0.0m 004
Stock#DS30001117
1998 Fairchild Semiconductor Corporation
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