FDP14N60 [FAIRCHILD]
Power Field-Effect Transistor, 14A I(D), 600V, 0.49ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-220AB, TO-220, 3 PIN;
| 型号： | FDP14N60 |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Power Field-Effect Transistor, 14A I(D), 600V, 0.49ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-220AB, TO-220, 3 PIN 局域网 开关 晶体管 |
| 文件： | 总6页 (文件大小：162K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
May 2003
FDP14N60
14A, 600V, 0.490 Ohm, N-Channel SMPS Power MOSFET
Applications
Features
Switch Mode Power Supplies(SMPS), such as
•
Low Gate Charge
Requirement
Q
results in Simple Drive
g
•
•
•
•
•
•
PFC Boost
Two Switch Forward Converter
Single Switch Forward Converter
Flyback Converter
•
Improved Gate, Avalanche and High Reapplied dv/dt
Ruggedness
•
•
•
•
Reduced r
DS(ON)
Buck Converter
Reduced Miller Capacitance and Low Input Capacitance
Improved Switching Speed with Low EMI
175°C Rated Junction Temperature
High Speed Switching
Package
Symbol
JEDEC TO-220
D
G
S
S
Drain
(FLANGE)
D
G
o
Absolute Maximum Ratings T = 25 C unless otherwise noted
J
Symbol
Parameter
Drain to Source Voltage
Ratings
600
Units
V
V
V
DSS
V
Gate to Source Voltage
±30
GS
Drain Current
o
14
10
A
A
Continuous (T = 25 C, V = 10V)
C
GS
I
D
o
Continuous (T = 100 C, V = 10V)
C
GS
Pulsed
Figure 10
A
Power dissipation
Derate above 25 C
300
2
W
W/ C
P
D
o
o
2
E
Single Pulse Avalanche Energy
Avalanche Current
550
14
mJ
AS
I
A
AR
o
T , T
Operating and Storage Temperature
Soldering Temperature for 10 seconds
-55 to 175
C
J
STG
o
300 (1.6mm from case)
C
Thermal Characteristics
o
R
Thermal Resistance Junction to Case
0.50
C/W
θJC
o
R
Thermal Resistance Case to Sink, Flat, Greased Surface
Thermal Resistance Junction to Ambient
0.24 TYP
62
C/W
C/W
θCS
o
R
θJA
©2003 Fairchild Semiconductor Corporation
FDP14N60 Rev. A
Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
Tape Width
Quantity
FDP14N60
FDP14N60
TO-220
N/A
N/A
50
Electrical Characteristics T = 25°C (unless otherwise noted)
J
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Statics
B
Drain to Source Breakdown Voltage
I
= 250µA, V = 0V
600
-
-
-
-
V
VDSS
D
GS
o
Reference to 25 C,
ID = 1mA
∆B
/∆T Breakdown Voltage Temp. Coefficient
0.6
V/°C
VDSS
J
r
Drain to Source On-Resistance
Gate Threshold Voltage
V
V
V
V
V
= 10V, I = 7.0A
-
0.457
0.490
4.0
Ω
DS(ON)
GS
DS
DS
GS
GS
D
V
= V , I = 250µA
2.0
3.6
V
GS(th)
GS
D
o
= 600V
T
T
= 25 C
-
-
-
-
-
-
25
C
C
I
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
µA
DSS
GSS
o
= 0V
= 150 C
250
±100
I
= ±30V
nA
Dynamics
g
Forward Transconductance
Total Gate Charge
V
= 50V, I = 7.0A
8
-
-
-
-
-
-
-
-
-
-
-
-
47
12
16
-
S
fs
DS
D
Q
36
nC
nC
nC
ns
ns
ns
ns
pF
pF
pF
g(TOT)
V
V
= 10V,
= 480V,
= 14A
GS
DS
Q
Q
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
Turn-On Delay Time
Rise Time
9.3
gs
I
D
12.6
14.2
15.2
37.2
15.7
1900
200
15
gd
t
d(ON)
V
I
= 300V,
= 14A,
= 6.2Ω,
= 21.4Ω
DD
t
-
r
D
R
R
t
Turn-Off Delay Time
Fall Time
-
G
D
d(OFF)
t
-
f
C
Input Capacitance
-
ISS
V
= 25V, V = 0V,
GS
DS
C
Output Capacitance
Reverse Transfer Capacitance
-
OSS
RSS
f = 1MHz
C
-
Avalanche Characteristics
2
E
Single Pulse Avalanche Energy
Avalanche Current
550
-
-
-
mJ
A
AS
AR
I
-
14
Drain-Source Diode Characteristics
Continuous Source Current
D
S
MOSFET symbol
showing the
integral reverse
p-n junction diode.
I
-
-
-
-
14
56
A
A
S
(Body Diode)
1
G
Pulsed Source Current
(Body Diode)
I
SM
V
Source to Drain Diode Voltage
Reverse Recovery Time
I
I
I
= 14A
-
-
-
0.87
580
6.4
1.2
775
8.6
V
SD
SD
SD
SD
t
= 14A, dI /dt = 100A/µs
ns
µC
rr
SD
Q
Reverse Recovered Charge
= 14A, dI /dt = 100A/µs
SD
RR
Notes:
1: Repetitive rating; pulse width limited by maximum junction temperature.
2: Starting T = 25°C, L = 5.64mH, I = 14A
J
AS
©2003 Fairchild Semiconductor Corporation
FDP14N60 Rev. A
Typical Characteristics
100
100
o
o
T
= 25 C
T
= 175 C
J
J
V
DESCENDING
V
DESCENDING
GS
GS
15V
12V
10V
9V
8V
7V
6V
5.5V
5V
15V
12V
10V
9V
8V
7V
6V
5.5V
5V
4.5V
4V
10
1
10
1
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
4.5V
VGS = 4V
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
VGS = 4.5V
0.1
0.1
0.1
1
10
100
0.1
1
10
100
VDS, DRAIN TO SOURCE VOLTAGE (V)
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 1. Output Characteristics
Figure 2. Output Characteristics
35
30
25
20
15
10
5
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
PULSE DURATION = 80
µ
s
PULSE DURATION = 80
µs
DUTY CYCLE = 0.5% MAX
VDD = 100V
DUTY CYCLE = 0.5% MAX
TJ = 175oC
TJ = 25oC
V
= 10V, I = 7.0A
D
GS
0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
-50
-25
0
25
50
75
100
125
150
175
TJ, JUNCTION TEMPERATURE (oC)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Transfer Characteristics
Figure 4. Normalized Drain To Source On
Resistance vs Junction Temperature
5000
1000
15
VGS = 0V, f = 1MHz
CISS
ID = 14A
12
9
COSS
6
100
10
480V
300V
3
CRSS
120V
0
1
10
100
0
10
20
30
40
50
60
Qg, GATE CHARGE (nC)
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 5. Capacitance vs Drain To Source
Voltage
Figure 6. Gate Charge Waveforms For Constant
Gate Current
©2003 Fairchild Semiconductor Corporation
FDP14N60 Rev. A
Typical Characteristics
100
10
35
30
25
TC = 25oC
100µs
1ms
10ms
20
TJ = 175oC
DC
15
1.0
10
TJ = 25oC
OPERATION IN THIS AREA
LIMITED BY RDS(ON)
5
0
0.1
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1
10
100
1000
VSD, SOURCE TO DRAIN VOLTAGE (V)
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Body Diode Forward Voltage vs Body
Diode Current
Figure 8. Maximum Safe Operating Area
16
12
9
200
100
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
o
T
= 25 C
C
FOR TEMPERATURES
o
ABOVE 25 C DERATE PEAK
CURRENT AS FOLLOWS:
6
175 - T
150
C
I = I
25
V
= 10V
GS
3
10
10-5
0
25
50
75
100
125
150
175
10-4
10-3
10-2
10-1
100
101
TC, CASE TEMPERATURE (oC)
t, PULSE WIDTH (s)
Figure 9. Maximum Drain Current vs Case
Temperature
Figure 10. Peak Current Capability
2
Duty Cycle - Descending Order
0.50
0.20
1
0.10
0.05
0.02
0.01
t
1
0.1
P
D
t
2
DUTY FACTOR, D = t / t
1
2
PEAK T = (P
D
X Z
X R
) + T
JC C
J
θ
JC
θ
SINGLE PULSE
0.01
-5
10
-4
-3
-2
-1
10
0
1
10
10
10
10
10
t , RECTANGULAR PULSE DURATION (s)
1
Figure 11. Normalized Transient Thermal Impedance, Junction to Case
©2003 Fairchild Semiconductor Corporation
FDP14N60 Rev. A
Test Circuits and Waveforms
V
BV
DSS
DS
t
P
V
DS
L
I
AS
V
DD
VARY t TO OBTAIN
P
+
-
R
REQUIRED PEAK I
G
AS
V
DD
V
GS
DUT
t
P
I
0V
0
AS
0.01Ω
t
AV
Figure 12. Unclamped Energy Test Circuit
Figure 13. Unclamped Energy Waveforms
V
DS
V
Q
V
DD
g(TOT)
R
L
V
= 10V
GS
DS
V
GS
+
-
V
DD
V
GS
V
= 1V
DUT
GS
0
I
g(REF)
Q
g(TH)
Q
Q
gd
gs
I
g(REF)
0
Figure 14. Gate Charge Test Circuit
Figure 15. Gate Charge Waveforms
V
t
t
DS
ON
OFF
t
d(OFF)
t
d(ON)
t
t
f
R
L
r
V
DS
90%
90%
+
-
V
GS
V
DD
10%
10%
0
DUT
90%
50%
R
GS
V
GS
50%
PULSE WIDTH
10%
V
GS
0
Figure 16. Switching Time Test Circuit
Figure 17. Switching Time Waveform
©2003 Fairchild Semiconductor Corporation
FDP14N60 Rev. A
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Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product developmentꢀ Specifications may change in
any manner without noticeꢀ
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later dateꢀ
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
designꢀ
No Identification Needed
Obsolete
Full Production
This datasheet contains final specificationsꢀ Fairchild
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This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductorꢀ
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Revꢀ I2
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