DSP56F807EVMUM [ETC]
56F807 Evaluation Module Hardware User＇s Manual ; 56F807评估模块硬件用户手册\n
| 型号： | DSP56F807EVMUM |
| 厂家： | 
ETC |
| 描述： | 56F807 Evaluation Module Hardware User＇s Manual
|
| 文件： | 总80页 (文件大小：1114K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Freescale Semiconductor, Inc.
Order this document by
DSP56F807EVMUM/D
Rev. 2, 06/05/2003
56F807 Evaluation Module
Hardware User’s Manual
© Motorola, Inc., 2003. All rights reserved.
For More Information On This Product,
Go to: www.freescale.com
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
Freescale Semiconductor, Inc.
Table of Contents
Preface
Audience . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xi
Organization. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xi
Suggested Reading. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xi
Notation Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xii
Definitions, Acronyms, and Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xii
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xiii
Chapter 1
Introduction
1.1
1.2
1.3
56F807EVM Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1
56F807EVM Configuration Jumpers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
56F807EVM Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4
Chapter 2
Technical Summary
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.7.1
2.7.2
2.8
56F807 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3
Program and Data Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5
RS-232 Serial Communications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6
Clock Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7
Operating Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7
Debug LEDs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8
Debug Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8
JTAG Connector. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9
Parallel JTAG Interface Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10
External Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-11
Reset. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-12
2.9
2.10 Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-13
2.11 Primary UNI-3 Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-14
2.12 Secondary UNI-3 Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-15
2.13 General Purpose Switches and Run/Stop Switch. . . . . . . . . . . . . . . . . . . . . . . . 2-17
2.14 Serial 10-bit 4-channel D/A Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-18
2.15 Motor Control PWM Signals and LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-18
MOTOROLA
Table of Contents
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2.16 Motor Protection Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-19
2.16.1
2.16.2
Primary UNI-3 Motor Protection Logic. . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-20
Secondary UNI-3 Motor Protection Logic. . . . . . . . . . . . . . . . . . . . . . . . . . 2-21
2.17 Back-EMF and Motor Phase Current Sensing. . . . . . . . . . . . . . . . . . . . . . . . . . 2-22
2.18 Quadrature Encoder/Hall-Effect Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-23
2.19 Zero-Crossing Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-23
2.20 CAN Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-24
2.21 Software Feature Jumpers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-25
2.22 Peripheral Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-26
2.22.1
2.22.2
2.22.3
2.22.4
2.22.5
2.22.6
2.22.7
2.22.8
2.22.9
Port B Expansion Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-27
Port D Expansion Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-27
Port E Expansion Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-28
External Memory Control Signal Expansion Connector . . . . . . . . . . . . . . . 2-28
Primary Encoder/Timer Channel A Expansion Connector . . . . . . . . . . . . . 2-29
Secondary Encoder/Timer Channel B Expansion Connector . . . . . . . . . . . 2-29
Timer Channel C Expansion Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-30
Timer Channel D Expansion Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-30
Address Bus Expansion Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-31
2.22.10 Data Bus Expansion Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-32
2.22.11 A/D Port A Expansion Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-32
2.22.12 A/D Port B Expansion Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-33
2.22.13 Serial Communications Port 0 Expansion Connector . . . . . . . . . . . . . . . . . 2-33
2.22.14 Serial Communications Port 1 Expansion Connector . . . . . . . . . . . . . . . . . 2-34
2.22.15 Serial Peripheral Interface Expansion Connector . . . . . . . . . . . . . . . . . . . . 2-34
2.22.16 CAN Expansion Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-34
2.22.17 PWM Port A Expansion Connector. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-35
2.22.18 PWM Port B Expansion Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-35
2.23 Test Points . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-36
Appendix A
56F807EVM Schematics
Appendix B
56F807EVM Bill of Material
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List of Figures
1-1
Block Diagram of the 56F807EVM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
56F807EVM Jumper Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3
Connecting the 56F807EVM Cables . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4
Schematic Diagram of the External Memory Interface . . . . . . . . . . . . . . 2-5
Schematic Diagram of the RS-232 Interface . . . . . . . . . . . . . . . . . . . . . . 2-6
Schematic Diagram of the Clock Interface. . . . . . . . . . . . . . . . . . . . . . . . 2-7
Schematic Diagram of the Debug LED Interface. . . . . . . . . . . . . . . . . . . 2-8
Block Diagram of the Parallel JTAG Interface. . . . . . . . . . . . . . . . . . . . 2-10
Schematic Diagram of the User Interrupt Interface . . . . . . . . . . . . . . . . 2-11
Schematic Diagram of the RESET Interface . . . . . . . . . . . . . . . . . . . . . 2-12
Schematic Diagram of the Power Supply . . . . . . . . . . . . . . . . . . . . . . . . 2-13
Run/Stop and General Purpose Switches . . . . . . . . . . . . . . . . . . . . . . . . 2-17
Serial 10-bit, 4-Channel D/A Converter . . . . . . . . . . . . . . . . . . . . . . . . . 2-18
PWM Group A Interface and LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-19
FAULTA1 Selection Circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-20
DC-Bus Over-Voltage and Phase Over-Current Detection Circuits. . . . 2-21
FAULTB1 Selection Circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-22
Primary Back-EMF or Motor Phase Current Sense Signals. . . . . . . . . . 2-23
Zero-Crossing Encoder Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-24
CAN Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-24
Software Feature Jumpers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-25
56F807 Processor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-2
Reset, Mode,Clock & IRQS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-3
Program & Data SRAM Memory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-4
RS-232 and SCI Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-5
Debug Serial 4-Channel D/A Converter. . . . . . . . . . . . . . . . . . . . . . . . . . A-6
PWMA and 3 User LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-7
1-2
1-3
2-1
2-2
2-3
2-4
2-5
2-6
2-7
2-8
2-9
2-10
2-11
2-12
2-13
2-14
2-15
2-16
2-17
2-18
A-1
A-2
A-3
A-4
A-5
A-6
MOTOROLA
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A-7
Primary UNI-3 Interface and Over-Voltage Fault Detection . . . . . . . . . . A-8
Secondary UNI-3 and Over-Voltage Detection . . . . . . . . . . . . . . . . . . . . A-9
User General Purpose Switches and Jumpers. . . . . . . . . . . . . . . . . . . . . A-10
Motor Phase-Current/Back-EMF Voltage Analog Input Selector . . . . . A-11
Primary and Secondary 3-Phase Over-Current Sense . . . . . . . . . . . . . . A-12
Primary Zero-Crossing/Quadrature-Encoder or Hall-Effect Selector . . A-13
A-8
A-9
A-10
A-11
A-12
A-13
Secondary Zero-Crossing/Quadrature-Encoder or Hall-Effect
Selector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-14
A-14
A-15
A-16
A-17
A-18
Port Expansion Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-15
High-Speed CAN Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-16
Parallel JTAG Host Target Interface and JTAG Connector. . . . . . . . . . A-17
Power Supplies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-18
Bypass Capacitors and Spare Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-19
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List of Tables
1-1
56F807EVM Default Jumper Options . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3
RS-232 Serial Connector Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6
Operating Mode Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7
JTAG Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9
Parallel JTAG Interface Disable Jumper Selection. . . . . . . . . . . . . . . . . . 2-9
Parallel JTAG Interface Connector Description. . . . . . . . . . . . . . . . . . . 2-10
Primary UNI-3 Connector Description. . . . . . . . . . . . . . . . . . . . . . . . . . 2-14
Secondary UNI-3 Connector Description. . . . . . . . . . . . . . . . . . . . . . . . 2-15
D/A Header Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-18
FAULTA1 Source Selection Jumper . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-20
FAULTB1 Source Selection Jumper . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-22
CAN Header Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-25
Port B Connector Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-27
Port D Connector Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-27
Port E Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-28
External Memory Control Signal Connector Description . . . . . . . . . . . 2-28
Timer A Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-29
Timer B Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-29
Timer C Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-30
Timer D Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-30
External Memory Address Bus Connector Description . . . . . . . . . . . . . 2-31
External Memory Address Bus Connector Description . . . . . . . . . . . . . 2-32
A/D Port A Connector Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-32
A/D Port B Connector Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-33
SCI0 Connector Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-33
SCI1 Connector Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-34
SPI Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-34
2-1
2-2
2-3
2-4
2-5
2-6
2-7
2-8
2-9
2-10
2-11
2-12
2-13
2-14
2-15
2-16
2-17
2-18
2-19
2-20
2-21
2-22
2-23
2-24
2-25
2-26
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2-27
2-28
2-29
CAN Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-34
PWM Port A Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-35
PWM Port B Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-35
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Preface
This reference manual describes in detail the hardware on the 56F807 Evaluation Module.
Audience
This document is intended for application developers who are creating software for
devices using the Motorola 56F807 part.
Organization
This manual is organized into two chapters and two appendixes.
• Chapter 1, Introduction - provides an overview of the EVM and its features.
• Chapter 2, Technical Summary - describes in detail the 56F807EVM hardware.
• Appendix A, 56F807EVM Schematics - contains the schematics of the
56F807EVM.
• Appendix B, 56F807EVM Bill of Material - provides a list of the materials used on the
56F807EVM board.
Suggested Reading
More documentation on the 56F807 and the 56F807EVM kit may be found at URL:
http://www.motorola.com/semiconductors
MOTOROLA
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Notation Conventions
This manual uses the following notational conventions:
Term or Value
Symbol
No special
symbol attached
to the signal
name
Examples
Exceptions
Active High Signals
(Logic One)
A0
CLKO
Active Low Signals
(Logic Zero)
Noted with an
overbar in text
and in most
figures
WE
OE
In schematic
drawings, Active
Low Signals may be
noted by a
backslash: /WE
Hexadecimal Values
Decimal Values
Begin with a “$”
symbol
$0FF0
$80
No special
symbol attached
to the
10
34
number
Binary Values
Numbers
Begin with the
letter “b” attached b0011
to the number
b1010
Considered
positive unless
specifically noted
as a negative
value
5
-10
Voltage is often
shown as positive:
+3.3V
Bold
Reference
...see: http://www.motorola.com...
sources, paths,
emphasis
Definitions, Acronyms, and Abbreviations
Definitions, acronyms and abbreviations for terms used in this document are defined
below for reference.
A/D
CAN
CiA
Analog-to-Digital
Controller Area Network; serial communications peripheral and method
CAN in Automation, an international CAN user’s group that coordinates
standards for CAN communications protocols
D/A
DSP
Digital-to-Analog
Digital Signal Processor or Digital Signal Processing
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EVM
GPIO
IC
Evaluation Module
General Purpose Input and Output Port
Integrated Circuit
JTAG
LQFP
MPIO
Joint Test Action Group, a bus protocol/interface used for test and debug
Low-profile Quad Flat Pack
Multi Purpose Input and Output Port ; shares package pins with other
peripherals on the chip and can function as a GPIO
On-Chip Emulation, a debug bus and port created by Motorola to enable
designers to create a low-cost hardware interface for a
professional-quality debug environment
TM
OnCE
PCB
PLL
PWM
RAM
ROM
SCI
SPI
SRAM
UART
Printed Circuit Board
Phase Locked Loop
Pulse Width Modulation
Random Access Memory
Read-Only Memory
Serial Communications Interface
Serial Peripheral Interface Port
Static Random Access Memory
Universal Asynchronous Receiver/Transmitter
References
The following sources were referenced to produce this manual:
[1] DSP56800 Family Manual, Motorola, DSP56800FM/D
[2] DSP56F801/803/805/807 User’s Manual, Motorola, DSP56F801-7UM/D
[3] 56F807 Technical Data, Motorola, DSP56F807/D
[4] CiA Draft Recommendation DR-303-1, Cabling and Connector Pin
Assignment, Version 1.0, CAN in Automation
[5] CAN Specification 2.0B, BOSCH or CAN in Automation
MOTOROLA
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xiv56F807EVM
Hardware
UseMr’sOTOROLA
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Chapter 1
Introduction
The 56F807EVM is used to demonstrate the abilities of the 56F807 and to provide a
hardware tool allowing the development of applications that use the 56F807.
The 56F807EVM is an evaluation module board that includes a 56F807 part, peripheral
expansion connectors, external memory and a CAN interface. The expansion connectors
are for signal monitoring and user feature expandability.
The 56F807EVM is designed for the following purposes:
• Allowing new users to become familiar with the features of the 56800 architecture.
The tools and examples provided with the 56F807EVM facilitate evaluation of the
feature set and the benefits of the family.
• Serving as a platform for real-time software development. The tool suite enables
the user to develop and simulate routines, download the software to on-chip or
TM
on-board RAM, run it, and debug it using a debugger via the JTAG/OnCE port.
The breakpoint features of the OnCE port enable the user to easily specify complex
break conditions and to execute user-developed software at full-speed, until the
break conditions are satisfied. The ability to examine and modify all user
accessible registers, memory and peripherals through the OnCE port greatly
facilitates the task of the developer.
• Serving as a platform for hardware development. The hardware platform enables
the user to connect external hardware peripherals. The on-board peripherals can be
disabled, providing the user with the ability to reassign any and all of the hybrid
controller’s peripherals. The OnCE port's unobtrusive design means that all of the
memory on the board and on the chip are available to the user.
1.1 56F807EVM Architecture
The 56F807EVM facilitates the evaluation of various features present in the 56F807 part.
The 56F807EVM can be used to develop real-time software and hardware products based
on the 56F807. The 56F807EVM provides the features necessary for a user to write and
debug software, demonstrate the functionality of that software and interface with the
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customer's application-specific device(s). The 56F807EVM is flexible enough to allow a
user to fully exploit the 56F807's features to optimize the performance of their product, as
shown in Figure 1-1.
56F807
RESET
LOGIC
4-Channel
10-bit D/A
RESET
SPI
RS-232
Interface
MODE/IRQ
LOGIC
DSub
9-Pin
MODE/IRQ
SCI #0
CAN Interface
Debug LEDs
PWM LEDs
Address,
Data &
Control
Program Memory
64Kx16-bit
SRAM
SCI #1
CAN
Peripheral
Expansion
Connector(s)
Data Memory
64Kx16-bit
SRAM
TIMER
GPIO
Over V Sense
Over I Sense
Memory
Expansion
Connector(s)
Zero Crossing
Detect
PWM #1
A/D #0
JTAG
Connector
JTAG/OnCE
Pri UNI-3
Parallel
JTAG
Interface
DSub
25-Pin
A/D #1
Sec UNI-3
PWM #2
Low Freq
Crystal
Power Supply
3.3V, 5.0V & 3.3VA
XTAL/EXTAL
3.3 V & GND
Figure 1-1. Block Diagram of the 56F807EVM
1.2 56F807EVM Configuration Jumpers
Seventeen jumper groups, (JG1-JG17), shown in Figure 1-2, are used to configure various
features on the 56F807EVM board. Table 1-1 describes the default jumper group settings.
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56F807EVM Configuration Jumpers
JG17
JG16
3
3
3
1
1
2
2
2
1
1
1
JG3
JG12
JG13
3
3
JG10
JG7
3
USER
PWM
J4
JG2
J5
3
2
1
3
2
1
1
JG10
3
2
1
JG13
JG12
JG7
JG17JG16
JG3
3
1
JG11
J1
JG6
JG5
2
Y1
JG11
JG2
JG8
1
7
2
8
JG5
U1
U2
JG14
S/N
DSP56F807EVM
JG1
1
4
7
J2
8
S4
S6
S5
JTAG
J3
JG9
JG4
U9
GP1
S1
GP2
S2
RUN/STOP
S3
P2
P1
P3
IRQB
RESET
IRQA
7
1
JG14
JG8
1
4
7
3
6
9
JG6
3
1
JG9
JG1
JG4
Figure 1-2. 56F807EVM Jumper Reference
Table 1-1. 56F807EVM Default Jumper Options
Jumper
Group
Jumpers
Connections
Comment
JG1
JG2
Primary UNI-3 Phase A Over-Current Selected for FAULTA1
Secondary UNI-3 Phase A Over-Current Selected for FAULTB1
CAN termination unselected
1–2
1–2
NC
NC
2–3
1–2
1-2
1–2
NC
JG3
JG4
Enable on-board Parallel JTAG Host/Target Interface
Use on-board EXTAL crystal input for oscillator
Use on-board XTAL crystal input for oscillator
Selects device’s Mode 0 operation upon exit from reset
Enable on-board SRAM
JG5
JG6
JG7
JG8
JG9
Disable RS-232 output
JG10
JG11
JG12
JG13
JG14
JG15
JG16
JG17
Secondary UNI-3 3-Phase Current Sense Selected as inputs to A/D
Secondary UNI-3 serial selected
2–3, 5–6 & 8–9
1–2, 3–4, 5–6 & 7–8
2–3, 5–6 & 8–9
2–3, 5–6 & 8–9
2–3, 5–6 & 8–9
1–2, 3–4, 5–6 & 7–8
1–2
Primary Encoder Input Selected
Secondary Encoder Input Selected
Primary UNI-3 3-Phase Current Sense Selected as inputs to A/D
Primary UNI-3 serial selected
PD0 input selected as a high input
PD1 input selected as a high input
1–2
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1.3 56F807EVM Connections
An interconnection diagram is shown in Figure 1-3 for connecting the PC and the external
+12V DC power supply to the 56F807EVM board.
Parallel Extension
Cable
56F807EVM
PC-compatible
Computer
P1
Connect cable
P2
to Parallel/Printer port
External
+12V
Power
with 2.1mm,
receptacle
connector
Figure 1-3. Connecting the 56F807EVM Cables
Perform the following steps to connect the 56F807EVM cables:
1. Connect the parallel extension cable to the Parallel port of the host computer
2. Connect the other end of the parallel extension cable to P1, shown in Figure 1-3,
on the 56F807EVM board. This provides the connection which allows the host
computer to control the board.
3. Make sure that the external +12V DC, 4.0A power supply is not plugged into a
120V AC power source
4. Connect the 2.1mm output power plug from the external power supply into P2,
shown in Figure 1-3, on the 56F807EVM board.
5. Apply power to the external power supply. The green Power-On LED, LED10, will
illuminate when power is correctly applied.
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Chapter 2
Technical Summary
The 56F807EVM is designed as a versatile hybrid controller development card for
developing real-time software and hardware products to support a new generation of
applications in digital and wireless messaging, servo and motor control, digital answering
machines, feature phones, modems, and digital cameras. The power of the 16-bit 56F807
controller, combined with the on-board 64K × 16-bit external program static RAM
(SRAM), 64K × 16-bit external data SRAM, CAN interface, Hall-Effect/Quadrature
Encoder interface, motor zero crossing logic, motor bus over-current logic, motor bus
over-voltage logic and parallel JTAG interface, makes the 56F807EVM ideal for
developing and implementing many motor controlling algorithms, as well as for learning
the architecture and instruction set of the 56F807 processor.
The main features of the 56F807EVM, with board and schematic reference designators,
include:
• 56F807 16-bit +3.3V hybrid controller operating at 80MHz [U1]
• External fast static RAM (FSRAM) memory [U2], configured as:
— 64K×16-bit of Program memory with 0 wait states at 70MHz
— 64K×16-bit of Data memory with 0 wait states at 70MHz
• 4-Channel 10-bit Serial D/A, SPI for real-time user data display [U14]
• 8.00MHz crystal oscillator for frequency generation [Y1]
• Optional external oscillator frequency input connector [JG5 and JG6]
• Joint Test Action Group (JTAG) port interface connector for an external debug
Host Target Interface [J3]
• On-board Parallel JTAG Host Target Interface, with a connector for a PC printer
port cable [P1]
• RS-232 interface for easy connection to a host processor [U13 and P3]
• CAN interface for high speed, 1.0Mbps, communications [U8 and J24]
• CAN bypass and bus termination [J25 and JG3]
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• Connector to allow the user to connect his own SCI0 / MPIO-compatible peripheral
[J15]
• Connector to allow the user to connect his own SCI1 /MPIO-compatible peripheral
[J14]
• Connector to allow the user to connect his own SPI / MPIO-compatible peripheral
[J13]
• Connector to allow the user to connect his own PWMA or MPIO-compatible
peripheral [J10]
• Connector to allow the user to connect his own PWMB / MPIO-compatible
peripheral [J11]
• Connector to allow the user to connect his own CAN physical layer peripheral
[J16]
• Connector to allow the user to connect his own Timer A / MPIO-compatible
peripheral [J18]
• Connector to allow the user to connect his own Timer B / MPIO-compatible
peripheral [J21]
• Connector to allow the user to connect his own Timer C / MPIO-compatible
peripheral [J19]
• Connector to allow the user to connect his own Timer D / MPIO-compatible
peripheral [J22]
• Connector to allow the user to attach his own Port B GPIO-compatible peripheral
[J20]
• Connector to allow the user to attach his own Port D GPIO-compatible peripheral
[J23]
• Connector to allow the user to attach his own Port E GPIO-compatible peripheral
[J17]
• Connector to allow the user to attach their own A/D Port A-compatible peripheral
[J9]
• Connector to allow the user to attach his own A/D Port B-compatible peripheral
[J12]
• 56F807’s external memory expansion connectors [J6, J7 and J8]
• On-board power regulation from an external +12V DC-supplied power input [P2]
• Light Emitting Diode (LED) power indicator [LED10]
• Three on-board real-time user debugging LEDs [LED1-3]
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56F807
• Six on-board Primary PWM monitoring LEDs [LED4-9]
• Primary UNI-3 Motor interface [J1]
— Encoder/Hall-Effect interface and selector [JG12]
— Over-Voltage sensing [U16]
— Over-Current sensing [U3]
— Phase Current sensing [U3 and U4]
— Back-EMF sensing and selector [JG14]
— Temperature sensing
— Zero Crossing detection and selector [JG14]
— Pulse Width Modulation
• Secondary UNI-3 Motor interface [J2]
— Encoder/Hall-Effect interface and selector [JG13]
— Over-Voltage sensing [U16]
— Over-Current sensing [U6]
— Phase Current sensing [U5 and U6]
— Back-EMF sensing and selector [JG10]
— Temperature sensing
— Zero Crossing detection and selector [JG10]
— Pulse Width Modulation
• Manual RESET push-button [S1]
• Manual interrupt push-button for IRQA [S2]
• Manual interrupt push-button for IRQB [S3]
• General purpose push-button on GPIO PD3 [S4]
• General purpose push-button on GPIO PD4 [S5]
• General purpose toggle switch for RUN/STOP control(PD5) [S6]
• General purpose jumper on GPIO PD0 [JG16]
• General purpose jumper on GPIO PD1 [JG17]
2.1 56F807
The 56F807EVM uses a Motorola DSP56F807FV80 part, designated as U1 on the board
and in the schematics. This part will operate at a maximum speed of 80MHz. A full
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description of the 56F807, including functionality and user information, is provided in
these documents:
• DSP56800 Family Manual, (DSP56800FM/D): Provides a detailed description of
the core processor, including internal status and control registers and a detailed
description of the family instruction set.
• DSP56F801/803/805/807 User’s Manual, (DSP56F801-7UM/D): Provides an
overview description of the hybrid controller and detailed information about the
on-chip components including the memory and I/O maps, peripheral functionality,
and control/status register descriptions for each subsystem.
• 56F807 Technical Data, (DSP56F807/D): Provides features list and specifications
including signal descriptions, DC power requirements, AC timing requirements
and available packaging.
Refer to these documents for detailed information about chip functionality and operation.
They can be found on this URL:
http://www.motorola.com/semiconductors
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Program and Data Memory
2.2 Program and Data Memory
The 56F807EVM uses one bank of 128K×16-bit Fast Static RAM (GSI GS72116, labeled
U2) for external memory expansion; see the FSRAM schematic diagram in Figure 2-1.
This physical memory bank is split into two logical memory banks of 64Kx16-bits: one
for Program memory and the other for Data memory. By using the controller’s program
strobe, PS, signal line along with the memory chip’s A0 signal line, half of the memory
chip is selected when Program memory accesses are requested and the other half of the
memory chip is selected when Data memory accesses are requested. This memory bank
will operate with zero wait-state accesses while the 56F807 is running at 70MHz.
However, when running at 80MHz, the memory bank operates with four wait-state
accesses. This memory bank can be disabled by removing the jumper at JG8.
GS72116
56F807
A0-A15
A1-A16
A0
PS
D0-D15
RD
DQ0-DQ15
OE
WR
WE
+3.3V
JG8
Jumper Pin 1-2:
Enable SRAM
Jumper Removed:
Disable SRAM
CE
Figure 2-1. Schematic Diagram of the External Memory Interface
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2.3 RS-232 Serial Communications
The 56F807EVM provides an RS-232 interface by the use of an RS-232 level converter,
(Maxim MAX3245EEAI, designated as U13). Refer to the RS-232 schematic diagram in
Figure 2-2. The RS-232 level converter transitions the SCI UART’s +3.3V signal levels
to RS-232-compatible signal levels and connects to the host’s serial port via connector P3.
Flow control is not provided, but could be implemented using uncommitted GPIO signals.
The pin-out of connector P3 is listed in Table 2-1. The RS-232 level converter/transceiver
can be disabled by placing a jumper at JG9.
RS-232
56F807
Level Converter
Interface
1
6
2
T1in
T1out
R1in
TXDO
RXDO
7
3
8
R1out
4
9
5
+3.3V
x
FORCEOFF
Jumper Removed:
JG9
Enable RS-232
1
2
Jumper Pin 1-2:
Disable RS-232
Figure 2-2. Schematic Diagram of the RS-232 Interface
.
Table 2-1. RS-232 Serial Connector Description
P3
Pin #
Signal
Pin #
Signal
1
2
3
4
5
Jumper to 6 & 4
TXD
6
7
8
9
Jumper to 1 & 4
Jumper to 8
Jumper to 7
N/C
RXD
Jumper to 1 & 6
GND
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Operating Mode
2.4 Clock Source
The 56F807EVM uses an 8.00MHz crystal, Y1, connected to its External Crystal Inputs,
EXTAL and XTAL. The 56F807 uses its internal PLL to multiply the input frequency by
10, to achieve its 80MHz maximum operating frequency. An external oscillator source can
be connected to the controller by using the oscillator bypass connector, JG6 and JG18; see
Figure 2-3.
EXTERNAL
OSCILLATOR
HEADERS
56F807
JG5
3
2
1
EXTAL
8.00MHz
10M
JG6
1
2
XTAL
Figure 2-3. Schematic Diagram of the Clock Interface
2.5 Operating Mode
The 56F807EVM provides a boot-up MODE selection jumper, JG7. This jumper is used
to select the operating mode of the hybrid controller as it exits RESET. Refer to the
DSP56F801/803/805/807 User’s Manual for a complete description of the chip’s
operating modes. Table 2-2 shows the two operation modes available on the 56F807.
Table 2-2. Operating Mode Selection
Operating Mode
JG7
Comment
0
3
1–2
Bootstrap from internal memory (GND)
Bootstrap from external memory (3.3V)
No Jumper
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2.6 Debug LEDs
Three on-board Light-Emitting Diodes, (LEDs), are provided to allow real-time
debugging for user programs. These LEDs will allow the programmer to monitor program
execution without having to stop the program during debugging; refer to Figure 2-4. User
LED1 is controlled by Port B’s PB0 signal. User LED2 is controlled by PB1. User LED3
is controlled by PB2. Setting PB0, PB1 or PB2 to a Logic One value will turn on the
associated LED.
56F807
INVERTING BUFFER
+3.3V
RED LED
PB0
YELLOW LED
GREEN LED
PB1
PB2
Figure 2-4. Schematic Diagram of the Debug LED Interface
2.7 Debug Support
The 56F807EVM provides an on-board Parallel JTAG Host Target Interface and a JTAG
interface connector for external Target Interface support. Two interface connectors are
provided to support each of these debugging approaches. These two connectors are
designated the JTAG connector and the Host Parallel Interface Connector.
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Debug Support
2.7.1 JTAG Connector
The JTAG connector on the 56F807EVM allows the connection of an external Host
Target Interface for downloading programs and working with the 56F807’s registers. This
connector is used to communicate with an external Host Target Interface which passes
information and data back and forth with a host processor running a debugger program.
Table 2-3 shows the pin-out for this connector.
Table 2-3. JTAG Connector Description
J3
Pin #
Signal
Pin #
Signal
1
3
TDI
TDO
TCK
2
4
GND
GND
GND
KEY
TMS
NC
5
6
7
NC
8
9
RESET
+3.3V
NC
10
12
14
11
13
TRST
When this connector is used with an external Host Target Interface, the parallel JTAG
interface should be disabled by placing a jumper in jumper block JG4. Reference
Table 2-4 for this jumper’s selection options.
Table 2-4. Parallel JTAG Interface Disable Jumper Selection
JG4
Comment
No jumpers
1–2
On-board Parallel JTAG Interface Enabled
Disable on-board Parallel JTAG Interface
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2.7.2 Parallel JTAG Interface Connector
The Parallel JTAG Interface Connector, P1, allows the 56F807 to communicate with a
Parallel Printer Port on a Windows PC; reference Figure 2-5. By using this connector, the
user can download programs and work with the 56F807’s registers. Table 2-5 shows the
pin-out for this connector. When using the parallel JTAG interface, the jumper at JG4
should be removed, as shown in Table 2-4.
Parallel JTAG Interface
IN OUT
DB-25 Connector
56F807
TDI
TDO
TDI
TDO
OUT
IN
IN
P_TRST
TMS
OUT
TRST
TMS
TCK
IN OUT
IN OUT
TCK
P_RESET
IN
OUT
RESET
+3.3V
EN
JG4
1
2
Jumper Removed:
Enable JTAG I/F
Jumper Pin 1-2:
Disable JTAG I/F
Figure 2-5. Block Diagram of the Parallel JTAG Interface
Table 2-5. Parallel JTAG Interface Connector Description
P1
Pin #
Signal
Pin #
Signal
1
2
3
4
5
6
7
8
NC
14
15
16
17
18
19
20
21
NC
PORT_IDENT
NC
PORT_RESET
PORT_TMS
PORT_TCK
PORT_TDI
PORT_TRST
NC
NC
GND
GND
GND
PORT_IDENT
GND
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External Interrupts
Table 2-5. Parallel JTAG Interface Connector Description
P1
Pin #
Signal
Pin #
Signal
9
PORT_VCC
NC
22
23
24
25
GND
GND
GND
GND
10
11
12
13
PORT_TDO
NC
PORT_CONNECT
2.8 External Interrupts
Two on-board push-button switches are provided for external interrupt generation, as
shown in Figure 2-6. S2 allows the user to generate a hardware interrupt for signal line
IRQA. S3 allows the user to generate a hardware interrupt for signal line IRQB. These two
switches allow the user to generate interrupts for his user-specific programs.
+3.3V
56F807
10K
SW2
IRQA
0.1µF
+3.3V
10K
SW3
IRQB
0.1µF
Figure 2-6. Schematic Diagram of the User Interrupt Interface
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2.9 Reset
Logic is provided on the 56F807 to generate a clean Power-On RESET signal. Additional,
reset logic is provided to support the RESET signals from the JTAG connector, the
Parallel JTAG Interface and the user RESET push-button; refer to Figure 2-7.
+3.3V
RESET
PUSHBUTTON
MANUAL RESET
RESET
P_RESET
Figure 2-7. Schematic Diagram of the RESET Interface
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Power Supply
2.10 Power Supply
The main power input, +12V DC at 4.0A, to the 56F807EVM is through a 2.1mm coax
power jack. A 4.0A power supply is provided with the 56F807EVM; however, less than
500mA is required by the EVM. The remaining current is available for user motor control
applications when connected to an optional motor power stage board. The 56F807EVM
provides +3.3V DC voltage regulation for the hybrid controller, memory, D/A, CAN,
parallel JTAG interface and supporting logic; refer to Figure 2-8. Power applied to the
56F807EVM is indicated with a Power-On LED, referenced as LED10.
+3.3V
+5.0V
+12V DC
+5.0V
Regulator
+3.3V
Regulator
+3.3V Digital
+3.3V Analog
56F807
POWER ON
56F807EVM
PARTS
GREEN LED
LED10
Figure 2-8. Schematic Diagram of the Power Supply
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2.11 Primary UNI-3 Interface
Motor control signals from a family of motor driver boards can be connected to the EVM
board via the Primary UNI-3 connector/interface. The Primary UNI-3 connector/interface
contains all of the signals needed to drive and control the motor drive boards. These
signals are connected to various groups of the hybrid controller’s input and output ports:
A/D, TIMER and PWM Port A. The header, JG14, is used to select between the
Back-EMF and Motor Phase Current signals. Refer to Table 2-6 for the pin-out of the
Primary UNI-3 connector, J1.
Table 2-6. Primary UNI-3 Connector Description
J1
Pin #
Signal
Pin #
Signal
1
3
PWM_AT
PWM_AB
PWM_BT
2
Shield
Shield
4
5
6
Shield
7
PWM_BB
PWM_CT
PWM_CB
GND
8
Shield
9
10
12
14
16
18
20
22
Shield
11
13
15
17
19
21
GND
+5.0V DC
Analog +3.3V DC
Analog GND
Analog -15V DC
+5.0V DC
Analog GND
Analog +15V DC
Motor DC Bus
Voltage Sense
Motor DC Bus
Current Sense
23
25
Motor Phase A
Current Sense
24
26
Motor Phase B
Current Sense
Motor Phase C
Current Sense
Motor Drive
Temperature
Sense
27
29
NC
28
30
Shield
Motor Drive Brake
Control
Serial COM
31
33
35
PFC PWM
PFC Zero Cross
Zero Cross B
32
34
36
PFC Inhibit
Zero Cross A
Zero Cross C
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Secondary UNI-3 Interface
Table 2-6. Primary UNI-3 Connector Description (Continued)
J1
Pin #
Signal
Pin #
Signal
37
Shield
38
Back-EMF Phase
A Sense
39
Back-EMF Phase
B Sense
40
Back-EMF Phase
C Sense
2.12 Secondary UNI-3 Interface
A Secondary UNI-3 Motor Drive interface is available on the EVM board. Motor control
signals from a family of motor driver boards can be connected to the EVM board via the
Secondary UNI-3 connector/interface. The Secondary UNI-3 connector/interface contains
all of the signals needed to drive and control the motor drive boards. These signals are
connected to various groups of the controller’s input and output ports: A/D, TIMER and
PWM Port B. The header, JG10, is used to select between the Back-EMF and Motor Phase
Current signals. Refer to Table 2-7 for the pin-out of the Secondary UNI-3 connector, J2.
Table 2-7. Secondary UNI-3 Connector Description
J2
Pin #
Signal
Pin #
Signal
1
3
PWM_AT
PWM_AB
PWM_BT
PWM_BB
PWM_CT
PWM_CB
GND
2
Shield
Shield
Shield
Shield
Shield
GND
4
5
6
7
8
9
10
12
14
16
18
20
22
11
13
15
17
19
21
NC
NC
NC
Analog GND
NC
Analog GND
NC
Motor DC Bus
Voltage Sense
Motor DC Bus
Current Sense
23
Motor Phase A
Current Sense
24
Motor Phase B
Current Sense
MOTOROLA
Technical Summary
2-15
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Table 2-7. Secondary UNI-3 Connector Description (Continued)
J2
Pin #
Signal
Pin #
Signal
25
Motor Phase C
Current Sense
26
Motor Drive
Temperature
Sense
27
29
NC
28
30
Shield
Motor Drive Brake
Control
Serial COM
31
33
35
37
PFC PWM
PFC Zero Cross
Zero Cross B
Shield
32
34
36
38
PFC Inhibit
Zero Cross A
Zero Cross C
Back-EMF Phase
A Sense
39
Back-EMF Phase
B Sense
40
Back-EMF Phase
C Sense
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General Purpose Switches and Run/Stop Switch
2.13 General Purpose Switches and Run/Stop Switch
Two general-purpose user pushbutton switches are connected to Port D GPIO signals,
PD3 and PD4. A Run/Stop toggle switch is connected to GPIO signal PD5. Refer to
Figure 2-9.
+3.3V
56F807
10K
GP #1 SWITCH
PD3
+3.3V
10K
GP #2 SWITCH
PD4
+3.3V
10K
START/STOP SWITCH
PD5
Figure 2-9. Run/Stop and General Purpose Switches
MOTOROLA
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2.14 Serial 10-bit 4-channel D/A Converter
The 56F807EVM board contains a serial 10-bit, 4-channel D/A converter connected to the
56F807’s SPI port. The output pins are uncommitted and are connected to a 4X2 header,
J26, to allow easy user connections. Refer to Figure 2-10 for the D/A connections and
Table 2-8 for the header’s pin-out. The D/A’s output full-scale range value can be set to a
value from 0.0V to 2.4V by a trimpot, R97. This trimpot is preset to +2.05V, which
provides approximately 2mV per step.
56F807
MAX5251
D/A CONNECTOR
J26
MOSI
MISO
DIN
D/A 0
D/A 1
D/A 2
D/A 3
OUT A
OUT B
2
4
1
3
DOUT
SCLK
SCLK
6
8
OUT C
OUT D
5
7
PB4
CS
CL
Vref
RSTO
R97
+3.3VA
10K
Figure 2-10. Serial 10-bit, 4-Channel D/A Converter
Table 2-8. D/A Header Description
J20
Pin #
Signal
Pin #
Signal
1
3
5
7
D/A Channel 0
D/A Channel 1
D/A Channel 2
D/A Channel 3
2
4
6
8
AGND
AGND
AGND
AGND
2.15 Motor Control PWM Signals and LEDs
The 56F807 has two independent groups of dedicated PWM units. Each unit contains six
PWM, three Phase Current sense and four Fault input lines. PWM group A’s PWM lines
are connected to the UNI-3 interface connector and to a set of six PWM LEDs via
inverting buffers. The inverting buffers are used to isolate and drive the controller’s PWM
2-18
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Motor Protection Logic
group A’s outputs to the PWM LEDs. The secondary PWM signals are routed to the
Secondary UNI-3 connector. The PWM LEDs indicate the status of PWM group A
signals, as shown in Figure 2-11. PWM Group A and B signals are routed out to headers,
J10 and J11 respectively, and are available for use by the end user.
56F807
UNI-3
PWMA0
PWMA1
PWMA2
PWMA3
PWMA4
PWMA5
PWMA0
PWMA1
PWMA2
PWMA3
PWMA4
PWMA5
+3.3V
LED4
YELLOW LED
PHASE A TOP
LED5
LED6
GREEN LED
PHASE A BOTTOM
PHASE B TOP
LED
BUFFER
YELLOW LED
LED7
LED8
GREEN LED
PHASE B BOTTOM
PHASE C TOP
YELLOW LED
LED9
GREEN LED
PHASE C BOTTOM
Figure 2-11. PWM Group A Interface and LEDs
2.16 Motor Protection Logic
The 56F807EVM contains two UNI-3 connectors that interface with various motor drive
boards, Primary UNI-3 and Secondary UNI-3. The device can sense error conditions
generated by the motor power stage boards via signals on the UNI-3 connector. The motor
driver board’s Motor Supply DC Bus Voltage, Current and Motor Phase Currents are
sensed on the power stage board. The conditioned signals are transferred to the board via
the UNI-3 connector. These analog input signals are compared to a limit set by trimpots. If
the input analog signals are greater than the limit set by the trimpot, a controller digital
voltage-compatible +3.3V DC fault signal is generated.
MOTOROLA
Technical Summary
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2.16.1 Primary UNI-3 Motor Protection Logic
The Primary UNI-3 DC Bus Over-Voltage signal is connected to the hybrid controller’s
PWM group A fault inputs. The three Primary UNI-3 Phase Over-Current signals are
connected to the device’s PWM group A’s fault inputs, i.e., FAULTA1, FAULTA2 and
FAULTA3. Figure 2-13 contains the diagram of the Over-Voltage and one phase of the
Phase Over-Current circuit for the UNI-3 interface. The FAULTA1 input can be sourced
from the Phase A Over-Current circuit or the DC Bus Over-Current circuit. Jumper JG1,
provides the selection; reference Figure 2-12 and Table 2-9.
DC BUS CURRENT SENSE
I_sense_DCB
+3.3V
+5.0V
+5.0V
+
–
LM393
+5.0V
JG1
3
2
1
FAULTA1
+3.3V
+5.0V
PHASE A CURRENT SENSE
+
PHA_IS
–
LM393
Figure 2-12. FAULTA1 Selection Circuit
Table 2-9. FAULTA1 Source Selection Jumper
JG1
Comment
1–2
2–3
Phase A Over-Current Sense input
DC Bus Over-Current Sense input
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Motor Protection Logic
2.16.2 Secondary UNI-3 Motor Protection Logic
The Secondary UNI-3 interface is similar to the Primary UNI-3 interface. The Secondary
UNI-3 Over-Voltage signal is connected to the hybrid controller’s PWM group B’s fault
input, FAULTB1. The three Secondary UNI-3 Phase Over-Current signals are connected
to the device’s PWM group B fault inputs, i.e., FAULTB1, FAULTB2 and FAULTB3.
The Secondary UNI-3 interface is similar to the circuits contained in Figure 2-13. The
FAULTB1 input can be sourced from the Phase A Over-Current circuit or the DC Bus
Over-Current circuit. Jumper JG16, provides the selection; reference Figure 2-14 and
Table 2-10.
DC BUS VOLTAGE SENSE
V_sense_DCB
+3.3V
+5.0V
+5.0V
+
FAULT0
–
LM393
EXAMPLE DC PHASE CURRENT SENSE
+5.0V
+3.3V
+5.0V
+
–
FAULT2
PHB_IS
LM393
Figure 2-13. DC-Bus Over-Voltage and Phase Over-Current Detection Circuits
MOTOROLA
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DC BUS CURRENT SENSE
I_sense_DCB
+3.3V
+5.0V
+5.0V
+
–
LM393
+5.0V
JG2
3
2
1
FAULTB1
+3.3V
+5.0V
PHASE A CURRENT SENSE
+
–
PHA_IS
LM393
Figure 2-14. FAULTB1 Selection Circuit
Table 2-10. FAULTB1 Source Selection Jumper
JG2
Comment
1–2
2–3
Phase A Over-Current Sense input
DC Bus Over-Current Sense input
2.17 Back-EMF and Motor Phase Current Sensing
The primary and secondary UNI-3 connectors supply Back-EMF and Motor Phase
Current signals from the three phases of a motor attached to a motor drive unit. The
Back-EMF signals on the UNI-3 connectors are derived from a resistor divider network
contained in the motor drive unit. These resistors divide down the attached motor’s
Back-EMF voltages to a 0 to +3.3V level. The Motor Phase Current signals are derived
from current sense resistors. Both of these signal groups are then routed to a group of
2-22
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Zero-Crossing Detection
header pins, JG14, that allow the end user to select which signal group the device’s A/D
will monitor. Refer to Figure 2-15 for the design of a single channel. The Secondary
UNI-3’s Back-EMF signals are simularly derived and routed to a group of header pins,
JG10, that allow the end user to select which signal group the controller’s A/D will
monitor; reference Table 2-8.
Typical Motor Phase-Current/Back-EMF Analog Input Selector
JG14
BACK_EMF_A
1
3
AN2
2
PHASE_A_I_SENSE
Figure 2-15. Primary Back-EMF or Motor Phase Current Sense Signals
2.18 Quadrature Encoder/Hall-Effect Interface
The 56F807EVM board contains a Primary and Secondary Quadrature
Encoder/Hall-Effect interface connected to the hybrid controller’s first and second Quad
Encoder input ports. The circuit is designed to accept +3.0V to +5.0V encoder or
Hall-Effect sensor inputs. Input noise filtering is supplied on the input path for the
Quadrature Encoder/Hall-Effect interface, along with additional noise rejection circuitry
inside the device. Figure 2-16 contains the primary encoder interface. The secondary
encoder interface is a duplicate of the primary encoder interface.
2.19 Zero-Crossing Detection
An attached UNI-3 motor drive board contains logic that can send out pulses when the
phase voltage of an attached 3-phase motor drops to zero. The motor drive board circuits
generate a 0 to +5.0V DC pulse via voltage comparators. The resulting pulse signals are
sent to a set of jumper blocks shared with the Encoder/Hall-Effect interface. The jumper
blocks allow the selection of Zero-Crossing signals or Quadrature Encoder/Hall-Effect
signals. When in operation, the controller will only monitor one set of signals,
Encoder/Hall-Effect or Zero-Crossing. Figure 2-16 contains the Zero-Crossing and
Encoder/Hall circuits.
MOTOROLA
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2-23
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ZERO_X_A
ZERO_X_B
ZERO_X_C
56F807
JG12
1
PHASEA1
2
5
8
3
FILTER
+5.0V
4
6
PHASEB
1
2
3
4
5
6
FILTER
FILTER
7
9
INDEX1
HOME 1
PIN 1: +5.0V
FILTER
PIN 2: GROUND
PIN 3: PHASE A
PIN 4: PHASE B
PIN 5: INDEX
PIN 6: HOME
Figure 2-16. Zero-Crossing Encoder Interface
2.20 CAN Interface
The 56F807EVM board contains a CAN physical-layer interface chip that is attached to
the MSCAN_RX and MSCAN_TX pins on the 56F807. The EVM board uses a Philips,
PCA82C250, high speed, 1Mbps, physical layer interface chip. Due to the +5.0V
operating voltage of the CAN chip, a pull-up to +5.0V is required to level shift the
Transmit Data output line from the 56F807. A primary, J24, and daisy-chain, J25, CAN
connector are provided to allow easy daisy-chaining of CAN devices. CAN bus
termination of 120 ohms can be provided by adding a jumper to JG3. Refer to Table 2-11
for the CAN connector signals, and to Figure 2-17 for a connection diagram
+5.0V
56F807
1K
CAN Transceiver
CAN Connector
Daisy-Chain CAN Connector
MSCAN_TX
MSCAN_RX
TXD
CANH
J24
J25
RXD
x
x
1
3
5
7
9
2
4
6
8
10
x
1
3
5
7
9
2
4
6
8
10
x
+5.0V
VCC
VREF
SLOPE GND
PCA82C250T
CANL
x
x
x
x
x
x
x
x
x
x
JG3
1
CAN Bus
Terminator
2
120
Figure 2-17. CAN Interface
2-24
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Software Feature Jumpers
Table 2-11. CAN Header Description
J24 and J25
Pin #
Signal
Pin #
Signal
1
3
5
7
9
NC
CANL
GND
NC
2
4
NC
CANH
NC
6
8
NC
NC
10
NC
2.21 Software Feature Jumpers
The 56F807EVM board contains two software feature jumpers that allow the user to select
“User Defined” software features. Two GPIO port pins, PD0 and PD1, are pulled high
with 10K ohm resistors on JG16 and JG17. Attaching a jumper will ground the respective
Port D signal line; see Figure 2-18.
56F807
User Jumper # 0
+3.3V
JG16
1
10K
PD0
PD1
2
10K
3
User Jumper # 1
+3.3V
JG17
1
2
10K
10K
3
Figure 2-18. Software Feature Jumpers
MOTOROLA
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2.22 Peripheral Connectors
The EVM board contains a group of Peripheral Expansion Connectors used to gain access
to the resources of the 56F807. These signal groups have Expansion Connectors:
• Port B
• Port D
• Port E
• External Memory Control
• Encoder A/Timer Channel A
• Encoder B/Timer Channel B
• Timer Channel C
• Timer Channel D
• Port A/Address Bus
• Data Bus
• A/D Input Port A
• A/D Input Port B
• Serial Communications Port 0
• Serial Communications Port 1
• Serial Peripheral Port
• PWM Port A
• PWM Port B
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Peripheral Connectors
2.22.1 Port B Expansion Connector
Port B is a GPIO port which is connected to the Port B header. The pins of the port,
PB0-PB7, are dedicated to general purpose I/O and Interrupt operations. The GPIO port
pins may be programmed as inputs, outputs or level-sensitive interrupt inputs. Table 2-12
shows the port pin to headed connections.
Table 2-12. Port B Connector Description
J20
Pin #
Signal
Pin #
Signal
1
3
5
7
9
PB0
PB2
PB4
PB6
GND
2
4
PB1
PB3
6
PB5
8
PB7
10
+3.3V
2.22.2 Port D Expansion Connector
Port D is an MPIO port with signal lines attached to various headers. The six pins of the
port, PD0-PD5, are dedicated to general purpose operation. The remaining two pins, PD6
and PD7, are shared with the TXD1 and RXD1 signal lines. The GPIO port pins may be
programmed as inputs, outputs or level-sensitive interrupt inputs. Table 2-13 shows the
exclusive Port D signals. The shared Port D signals are contained in Table 2-20.
Table 2-13. Port D Connector Description
J23
Pin #
Signal
Pin #
Signal
1
3
5
7
PD0
PD2
PD4
GND
2
4
6
8
PD1
PD3
PD5
+3.3V
MOTOROLA
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2.22.3 Port E Expansion Connector
Port E is an MPIO port with signal lines attached to various headers. The pins of the port
are shared with one SCI port, SCI0, two Address bus lines, A6 and A7, and the SPI port.
Table 2-14 shows the shared pins and functions
Table 2-14. Port E Connector Description
J17
Pin #
Signal
Alternate Funct
Pin #
Signal
Alternate Funct
1
3
5
7
9
PE0
PE2
PE4
PE6
GND
TXD0
TXD1
SCLK
MISO
GND
2
4
PE1
PE3
RXD0
RXD1
MOSI
SS
6
PE5
8
PE7
10
+3.3V
+3.3V
2.22.4 External Memory Control Signal Expansion Connector
The External Memory Control Signal connector contains the device’s external memory
control signal lines. Refer to Table 2-15 for the names of these signals.
Table 2-15. External Memory Control Signal Connector Description
J8
Pin #
Signal
Pin #
Signal
1
3
RD
WR
2
4
IRQA
IRQB
RESET
RSTO
DE
5
PS
6
7
DS
8
9
CLKO
GND
10
12
11
+3.3V
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Peripheral Connectors
2.22.5 Primary Encoder/Timer Channel A Expansion Connector
The Primary Encoder/Timer Channel A port is an MPIO port attached to the Timer A
expansion connector. The port can act as a Quadrature Decoder interface port or as a
general purpose Timer port. See Table 2-16 for the signals attached to the connector.
Table 2-16. Timer A Connector Description
J18
Pin #
Signal
Alternate
1
2
3
4
5
6
TA0
TA1
PhaseA0
PhaseB0
INDEX0
HOME0
+3.3V
TA2
TA3
+3.3V
GND
GND
2.22.6 Secondary Encoder/Timer Channel B Expansion Connector
The Secondary Encoder/Timer Channel B port is an MPIO port attached to the Timer B
expansion connector. The port can act as a Quadrature Decoder interface port or as a
general purpose Timer port. Refer to Table 2-17 for the signals attached to the connector.
Table 2-17. Timer B Connector Description
J21
Pin #
Signal
Alternate
1
2
3
4
5
6
TB0
TB1
PhaseA1
PhaseB1
INDEX1
HOME1
+3.3V
TB2
TB3
+3.3V
GND
GND
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2.22.7 Timer Channel C Expansion Connector
The Timer Channel C port is an MPIO port attached to the Timer C expansion connector.
Refer to Table 2-18 for the signals attached to the connector.
Table 2-18. Timer C Connector Description
J19
Pin #
Signal
1
2
3
4
TC0
TC1
+3.3V
GND
2.22.8 Timer Channel D Expansion Connector
The Timer Channel D port is an MPIO port attached to the Timer D expansion connector.
Refer to Table 2-19 for the signals attached to the connector.
Table 2-19. Timer D Connector Description
J22
Pin #
Signal
1
2
3
4
5
6
TD0
TD1
TD2
TD3
+3.3V
GND
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Peripheral Connectors
2.22.9 Address Bus Expansion Connector
The 16-bit Address bus connector contains the hybrid controller’s external memory
address signal lines. The upper 8 bits, A8 - A15, can also be used as Port A GPIO lines.
See Table 2-20 for the Address bus connector information.
Table 2-20. External Memory Address Bus Connector Description
J6
Pin #
Signal
Pin #
Signal
1
3
A0
A2
2
4
A1
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10
12
14
16
18
A9
11
13
15
17
A10
A12
A14
GND
A11
A13
A15
+3.3V
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2.22.10 Data Bus Expansion Connector
The 16-bit Data bus connector contains the device’s external memory data signal lines.
Refer to Table 2-21 for the Data bus connector information.
Table 2-21. External Memory Address Bus Connector Description
J7
Pin #
Signal
Pin #
Signal
1
3
D0
D2
2
4
D1
D3
5
D4
6
D5
7
D6
8
D7
9
D8
10
12
14
16
18
D9
11
13
15
17
D10
D12
D14
GND
D11
D13
D15
+3.3V
2.22.11 A/D Port A Expansion Connector
The 8-channel Analog-to-Digital conversion Port A is attached to this connector. See
Table 2-22 for the connection information.
Table 2-22. A/D Port A Connector Description
J9
Pin #
Signal
Pin #
Signal
1
3
5
7
9
AN0
AN1
2
4
AN4
AN5
AN2
6
AN6
AN3
8
AN7
GNDA
10
+3.3VA
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Peripheral Connectors
2.22.12 A/D Port B Expansion Connector
The 8-channel Analog-to-Digital conversion Port B is attached to this connector. Refer to
Table 2-23 for the connection information.
Table 2-23. A/D Port B Connector Description
J12
Pin #
Signal
Pin #
Signal
1
3
5
7
9
AN8
AN9
2
4
AN12
AN13
AN14
AN15
+3.3VA
AN10
AN11
GNDA
6
8
10
2.22.13 Serial Communications Port 0 Expansion Connector
The Serial Communications Port 0, SCI0, is attached to this connector. See Table 2-24 for
the connection information.
Table 2-24. SCI0 Connector Description
J15
Pin #
Signal
1
2
3
TXD0
RXD0
GND
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2.22.14 Serial Communications Port 1 Expansion Connector
The Serial Communications Port 1, SCI1, is attached to this connector. Refer to
Table 2-25 for the connection information.
Table 2-25. SCI1 Connector Description
J14
Pin #
Signal
1
2
3
TXD1
RXD1
GND
2.22.15 Serial Peripheral Interface Expansion Connector
The Serial Peripheral Interface, SPI, is attached to this connector. Refer to Table 2-26 for
the connection information.
Table 2-26. SPI Connector Description
J13
Pin #
Signal
1
2
3
4
MOSI
MISO
SCLK
GND
2.22.16 CAN Expansion Connector
The CAN port is attached to this connector. See Table 2-27 for the connection
information.
Table 2-27. CAN Connector Description
J16
Pin #
Signal
1
2
3
MSCAN_TX
MSCAN_RX
GND
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Peripheral Connectors
2.22.17 PWM Port A Expansion Connector
The PWM Port A is attached to this connector. Refer to Table 2-28 for the connection
information.
Table 2-28. PWM Port A Connector Description
J10
Pin #
Signal
Pin #
Signal
1
3
PWMA0
PWMA2
PWMA4
FAULTA0
FAULTA2
ISA0
2
4
PWMA1
PWMA3
PWMA5
FAULTA1
FAULTA3
ISA1
5
6
7
8
9
10
12
14
11
13
ISA2
GND
2.22.18 PWM Port B Expansion Connector
The PWM Port B is attached to this connector. Refer to Table 2-29 for the connection
information.
Table 2-29. PWM Port B Connector Description
J11
Pin #
Signal
Pin #
Signal
1
3
PWMB0
PWMB2
PWMB4
FAULTB0
FAULTB2
ISB0
2
4
PWMB1
PWMB3
PWMB5
FAULTB1
FAULTB3
ISB1
5
6
7
8
9
10
12
14
11
13
ISB2
GND
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2.23 Test Points
The 56F807EVM board has a total of eight test points. Four test points are located near the
breadboard area: +3.3VA, AGND, +3.3V and GND. Three test points are located near the
Primary UNI-3 connector, J1: -15VA, GND and +15VA. The final test point, GND, is
located in the upper left corner of the board.
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Appendix A
56F807EVM Schematics
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56F807EVM Schematics
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A-1
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A-2
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MOTOROLA
56F807EVM Schematics
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A-3
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A-4
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Freescale Semiconductor, Inc.
MOTOROLA
56F807EVM Schematics
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A-5
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A-6
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MOTOROLA
56F807EVM Schematics
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A-7
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1
1
8
4
A-8
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8
4
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56F807EVM Schematics
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A-9
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A-10
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MOTOROLA
56F807EVM Schematics
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A-11
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8
4
8
4
8
4
8
4
8
4
8
4
8
4
8
4
A-12
56F807EVM Hardware User’s Manual
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A-13
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A-14
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MOTOROLA
56F807EVM Schematics
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A-15
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A-16
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1
2
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56F807EVM Schematics
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A-17
Freescale Semiconductor, Inc.
1
1
1
1
3
1
1
A-18
56F807EVM Hardware User’s Manual
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MOTOROLA
56F807EVM Schematics
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A-19
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A-20
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Freescale Semiconductor, Inc.
Appendix B
56F807EVM Bill of Material
Qty
Description
Ref. Designators
Vendor Part #
Integrated Circuits
1
5
1
2
1
1
1
1
1
1
1
DSP56F807FV80
LM393
U1
Motorola, DSP56F807FV80
National, LM393M
U3, U4, U5, U6, U16
74LCX244
74AC04
U9
U12, U15
U10
ON Semiconductor, MC74LCX244DW
Fairchild, 74AC04SC
MC33269DT-5.0
MC33269DT-3.3
GS72116
ON Semiconductor, MC33269DT-5.0
ON Semiconductor, MC33269DT-3.3
GSI, GS72116TP-12
U11
U2
MAX3245
U13
Maxim, MAX3245EEAI
MAX5251
U14
Maxim, MAX5251BEAP
PCA82C250T
74AC00
U8
Philips Semiconductor, PCA82C250T
Fairchild, 74AC00SC
U18
Resistors
20
16K Ω
R8 - R11, R16 - R19,
R24 - R29, R31, R32, R107,
R108, R112 ,R113
SMEC, RC73L2A16KOHMJT
10
18
1M Ω
R4, R5, R12, R13, R20, R21,
R30, R33, R109, R114
SMEC, RC73L2A1MOHMJT
SMEC, RC73L2A5.1KOHMJT
5.1K Ω
R6, R7, R14, R15, R22, R23,
R34, R35, R69, R72, R73,
R75, R79 - R81, R96, R110,
R115
12
2
10K Ω
51 Ω
R82 - R85, R117 - R123,
R125
SMEC, RC73L2A10KOHMJT
SMEC, RC73L2A51OHMJT
R70, R71
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56F807EVM Bill of Material
B-1
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Qty
Description
Ref. Designators
Vendor Part #
Resistors (Continued)
3
1
47K Ω
470 Ω
10M Ω
1K Ω
R74, R76, R77
SMEC, RC73L2A47KOHMJT
SMEC, RC73L2A470OHMJT
SMEC, RC73L2A10MOHMJT
SMEC, RC73L2A1KOHMJT
R78
R1
1
20
R38, R41, R44, R47, R50,
R53, R56, R59, R62,
R86 - R95, R124
14
16
270 Ω
24 Ω
R64 - R68, R98 - R106
SMEC, RC73L2A270OHMJT
SMEC, RC73L2A24OHMJT
R39, R40, R42, R43, R45,
R46, R48, R49, R51, R52,
R54, R55, R57, R58, R60,
R61
1
7
120 Ω, 1/4W
10K Ω
R63
YAGEO, CFR 120QBK
Potentioneters
R2, R3, R36, R37, R97, R111,
R116
BC/MEPCOPAL, ST4B103CT
Inductors
L1, L2, L3, L4
LEDs
4
1.0mH
Panasonic, EXC-ELSA35V
1
4
5
Red LED
LED1
Hewlett-Packard, HSMS-C650
Hewlett-Packard, HSMY-C650
Hewlett-Packard, HSMG-C650
Yellow LED
Green LED
LED2, LED4, LED6, LED8
LED3, LED5, LED7, LED9,
LED10
Diode
3
S2B-FM401
D1, D2, D3
Vishay, DL4001DICT
B-2
56F807EVM Hardware User’s Manual
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Qty
Description
Ref. Designators
Vendor Part #
Capacitors
5
2.2µF, 50VDC
C1 - C3, C18, C24
NICHICON, UWX1H2R2MCR2GB
SMEC, MCCE104K2NR-T1
31
0.1µF
C7 - C17, C23, C29 - C31,
C33, C35, C37, C38, C40,
C41, C43, C45, C48,
C50 - C52, C54, C56, C65,
C66
1
2
8
470µF, 16VDC
47µF, 16VDC
470pF
C4
ELMA, RV-16V471MH10R
ELMA, RV2-16V470M-R
SMEC, MCCE471J2NO-T1
C5, C6
C19 - C22, C25 - C28
10
4
C32, C34, C36, C39, C44,
C46, C49, C53, C55, C57
SMEC, MCCE103K2NR-T1
0.01uF
C60 - C63
NICHICON, UWX1H010MCR1GB
1.0uF, 50VDC
Jumpers
8
3 × 1 Bergstick
JG1, JG2, JG5, J14, J15,
JG16, J16, JG17
SAMTEC, TSW-103-07-S-S
4
6
4 × 2 Bergstick
1 × 2 Bergstick
JG11, JG15, J23, J26
SAMTEC, TSW-104-07-S-D
SAMTEC, TSW-102-07-S-S
JG3, JG4, JG6, JG7, JG8,
JG9
4
2
3
6
2
3
2
1
2
3 x 3 Bergstick
9 x 2 Bergstick
6 x 1 Bergstick
5 x 2 Bergstick
4 x 1 Bergstick
7 x 2 Bergstick
6 x 1 MTA
JG10, JG12, JG13, JG14
SAMTEC, TSW-103-07-S-T
SAMTEC, TSW-109-07-S-D
SAMTEC, TSW-106-07-S-S
SAMTEC, TSW-105-07-S-D
SAMTEC, TSW-104-07-S-S
SAMTEC, TSW-107-07-S-D
AMP, MTA 640456-6
J6, J7
J18, J21, J22
J9, J12, J17, J20, J24, J25
J13, J19
J3, J10, J11
J4, J5
6 x 2 Bergstick
20 x 2 Shrouded
J8
SAMTEC, TSW-106-07-S-D
3M, 2540-6002UB
J1, J2
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56F807EVM Bill of Material
B-3
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Qty
Description
Ref. Designators
Vendor Part #
Test Points
TP1 - TP8
Crystals
Y1
8
1
1 × 1 Bergstick
Samtec, TSW-101-07-S-S
CTS, ATS08ASM-T
8.00MHz Crystal
Connectors
P1
1
1
DB25M Connector
AMPHENOL, 617-C025P-AJ121
Switch Craft, RAPC-722
2.1mm coax
P2
Power Connector
1
DE9F Connector
P3
AMPHENOL, 617-C009S-AJ120
Switches
S1 - S5
5
1
SPST Pushbutton
SPDT Toggle
Panasonic, EVQ-PAD05R
C&K, GT11MSCKE
S6
Transistors
Q1
1
2N2222A
ZETEX, FMMT2222ACT
Miscellaneous
SH1–SH28
RF1–RF6
28
6
Shunt
Samtec, SNT-100-BL-T
3M, SJ5018BLKC
Rubber Feet
B-4
56F807EVM Hardware User’s Manual
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Index
Symbols
C
+12V DC power supply 1-4
CAN xii
interface 2-1
CAN in Automation
CiA xii
CAN Specification 2.0B xiii
CiA xii
CiA Draft Recommendation DR-303-1 xiii
Connector
Numerics
56F807 Technical Data xiii
56F807EVM
16-bit +3.3V Hybrid Controller 2-1
4.0Amp power supply 2-13
4-Channel 10-bit Serial D/A 2-1
64Kx16-bit of Data memory 2-1
64Kx16-bit of Program memory 2-1
8.00MHz crystal oscillator 2-1
A/D Port A-compatible peripheral 2-2
CAN bypass 2-1
CAN interface 2-1
CAN physical layer peripheral 2-2
Development Card 2-1
A/D 2-32, 2-33
Address bus 2-31
CAN 2-34
Data bus 2-32
External Memory Control 2-28
PWM 2-35
SCI 2-33, 2-34
SPI 2-34
Connectors
external memory expansion connectors 2-2
external oscillator frequency input 2-1
FSRAM 2-1
Peripheral Expansion 2-26
Controller Area Network
CAN xii
JTAG port interface 2-1
MPIO-compatible peripheral 2-2
On-board power regulation 2-2
Parallel JTAG Host Target Interface 2-1
Port B GPIO-compatible peripheral 2-2
Port D GPIO-compatible peripheral 2-2
Port E GPIO-compatible peripheral 2-2
PWMA-compatible peripheral 2-2
PWMB-compatible peripheral 2-2
real-time debugging 2-8
D
D/A xii
D/A converter 2-18
Data memory 2-5
Debugging 2-8
Digital Signal Processor
DSP xii
Digital-to-Analog
D/A xii
RS-232 interface 2-1
SCI1-compatible peripheral 2-2
SPI-compatible peripheral 2-2
Timer-compatible peripheral 2-2
UNI-3 connector/interface 2-14
DSP xii
DSP56800 Family Manual xiii
DSP56F801/803/805/807 User’s Manual xiii
DSP56F807EVM
CAN bus termination 2-1
A
E
A/D xii
Analog-to-Digital
A/D xii
Encoder/Hall-Effect
circuits 2-23
Encoder/Timer 2-29
Evalation Module
EVM xiii
EVM xiii
External Memory Control Signal 2-28
B
Back-EMF 2-22
signals 2-15
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Index
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Low-Profile Quad Flat Pack
LQFP xiii
F
LQFP xiii
FSRAM 2-5
M
G
motor bus
over-current 2-1
over-voltage 2-1
Motor Phase
General Purpose Input and Outpus
GPIO xiii
GPIO xiii, 2-27, 2-31
signals 2-17
signals 2-15
H
Motor Phase Current 2-22
MPIO xiii, 2-27, 2-28, 2-29
port 2-30
Multi Purpose Input and Output
MPIO xiii
Hall-Effect/Quadrature Encoder interface 2-1
Host Parallel Interface Connector 2-8
Host Target Interface 2-8
I
O
IC xiii
Integrated Circuit
IC xiii
OnCE xiii, 1-1
On-Chip Emulation
OnCE xiii
J
P
Joint Test Action Group
JTAG xiii
JTAG xiii, 1-1, 2-1
connector 2-9
Jumper Group 1-3
JG1 1-3
PCB xiii
Phase Locked Loop
PLL xiii
PLL xiii
Printed Circuit Board
PCB xiii
Program memory 2-5
Pulse Width Modulation
PWM xiii
JG10 1-3
JG11 1-3
JG12 1-3
JG13 1-3
PWM xiii
JG14 1-3
JG15 1-3
JG16 1-3
Q
Quad Encoder 2-23
JG17 1-3
Quadrature Decoder
JG2 1-3
interface port 2-29
JG3 1-3
Quadrature Encoder/Hall-Effect interface 2-23
JG4 1-3
JG5 1-3
JG6 1-3
JG7 1-3
JG8 1-3
R
RAM xiii
Random Access Memory
RAM xiii
JG9 1-3
Read-Only Memory
ROM xiii
L
ROM xiii
Logic
motor bus over-current 2-1
motor bus over-voltage 2-1
motor zero crossing 2-1
2
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RS-232
interface 2-6
level converter 2-6
schematic diagram 2-6
RS-232 Serial Communications 2-6
S
SCI xiii
Serial Communications Port 2-33, 2-34
Serial Communications Interface
SCI xiii
Serial Peripheral Interface
SPI xiii
SPI xiii
Serial Peripheral Interface 2-34
SRAM xiii
external data 2-1
external program 2-1
Static Random Access Memory
SRAM xiii
U
UART xiii
UNI-3
Back-EMF 2-23
connector/interface 2-14
DC Bus Over-Voltage signal 2-20
Motor Drive interface 2-15
Motor interface
Primary 2-3
Secondary 2-3
Over-Voltage signal 2-21
Universal Asynchronous Receiver/Transmitter
UART xiii
Z
Zero-Crossing
circuits 2-23
Zero-Crossing Detection 2-23
MOTOROLA
Index
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