74LCX257T [ETC]
2-Input Digital Multiplexer ; 2 ，输入数字多路复用器\n
| 型号： | 74LCX257T |
| 厂家： | 
ETC |
| 描述： | 2-Input Digital Multiplexer
|
| 文件： | 总10页 (文件大小：73K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74LCX257
LOW VOLTAGE QUAD 2 CHANNEL MULTIPLEXER
WITH 5V TOLERANT INPUTS AND OUTPUTS (3-STATE)
■
■
5VTOLERANT INPUTS AND OUTPUTS
HIGH SPEED:
tPD =6.0 ns (MAX.)at VCC =3V
POWER-DOWN PROTECTIONON INPUTS
ANDOUTPUTS
SYMMETRICALOUTPUT IMPEDANCE:
|IOH| = IOL =24 mA (MIN)
■
■
M
T
(Micro Package)
(TSSOPPackage)
ORDER CODES :
■
■
PCI BUSLEVELSGUARANTEED AT 24mA
BALANCEDPROPAGATIONDELAYS:
tPLH tPHL
74LCX257M
74LCX257T
■
■
OPERATINGVOLTAGERANGE:
It is composed of four independent 2 channel
multiplexers with common SELECT and ENABLE
INPUT. The 74VHC257 is a non inverting
multiplexer.
When the ENABLE INPUT is held ”High”, all
outputs become high impedance state. If
SELECT INPUT is held ”Low”, ”A” data is
selected, when SELECT INPUT is ”High”, ”B”
data is chosen. It has same speed performance
at 3.3V than 5V, AC/ACT family, combined with a
lower power consumption.
VCC (OPR)= 2.0Vto 3.6V (1.5VDataRetention)
PIN AND FUNCTION COMPATIBLEWITH
74 SERIES257
LATCH-UP PERFORMANCE EXCEEDS 500mA
ESD PERFORMANCE:
■
■
HBM>2000V;MM> 200V
DESCRIPTION
The 74LCX257 is a low voltage CMOS QUAD 2
CHANNEL MULTIPLEXER (3-STATE) fabricated
with sub-micron silicon gate and double-layer
metal wiring C2MOS technology. It is ideal for low
power and high speed 3.3V applications. It can
be interfaced to 5V signal environment for both
inputs and outputs.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
1/9
October 1999
74LCX257
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
TRUTH TABLE
PIN No
1
SYMBOL NAME AND FUNCTION
SELECT Common Data Select Input
1A to 4A Data Input From Source A
1B to 4B Data Inputs from Source B
1Y to 4Y 3 State Multiplexer Outputs
INPUTS
OUTPUTS
OE
H
L
SELECT
A
X
L
B
X
X
X
L
Y
Z
L
X
L
2, 5, 14, 11
3, 6, 13, 10
4, 7, 12, 9
15
L
L
H
X
X
H
L
L
H
H
OE
3 State Output Enable
Inputs (Active LOW)
L
H
H
X= DON’T CARE Z = HIGHIMPEDANCE
8
GND
VCC
Ground (0V)
16
Positive Supply Voltage
LOGIC DIAGRAM
Thislogic diagram has notbe used to estimate propagation delays
2/9
74LCX257
ABSOLUTE MAXIMUM RATINGS
Symbol
VCC
VI
Parameter
Value
-0.5 to + 7.0
-0.5 to + 7.0
-0.5 to + 7.0
-0.5 to VCC + 0.5
- 50
Unit
V
Supply Voltage
DC Input Voltage
V
VO
DC Output Voltage (OFF State)
DC Output Voltage (High or Low State) (note1)
DC Input Diode Current
V
VO
V
IIK
mA
mA
mA
mA
mA
oC
oC
IOK
DC Output Diode Current (note2)
DC Output Source/Sink Current
DC Supply Current per Supply Pin
DC Ground Current per Supply Pin
Storage Temperature
50
50
±
±
IO
ICC
± 100
± 100
IGND
Tstg
TL
-65 to +150
300
Lead Temperature (10 sec)
AbsoluteMaximum Ratingsarethose values beyond whichdamage tothe device may occur. Functional operation under these condition isnot implied.
1)IO absolute maximum ratingmustbeobserved
2)VO < GND, VO >VCC
RECOMMENDED OPERATING CONDITIONS
Symbol
VCC
Parameter
Value
2.0 to 3.6
0 to 5.5
0 to 5.5
0 to VCC
± 24
Unit
V
Supply Voltage (note 1)
Input Voltage
VI
V
VO
Output Voltage (Off State)
V
VO
Output Voltage (High or Low State)
V
IOH, IOL
IOH, IOL
Top
High or Low Level Output Current (VCC = 3.0 to 3.6V)
High or Low Level Output Current (VCC = 2.7 to 3.0V)
Operating Temperature:
mA
mA
oC
ns/V
± 12
-40 to +85
0 to 10
dt/dv
Input Transition Rise or Fall Rate (VCC = 3.0V) (note 2)
1)TruthTable guaranteed: 1.5V to3.6V
2)VIN from0.8Vto2.0V
3/9
74LCX257
DC SPECIFICATIONS
Symbol
Parameter
Test Conditions
Value
-40 to 85 oC
Unit
VCC
(V)
Min.
Max.
VIH
VIL
High Level Input Voltage
Low Level Input Voltage
High Level Output Voltage
2.0
V
V
2.7 to 3.6
0.8
VOH
2.7 to 3.6
2.7
IO=-100 µA VCC-0.2
VI =
VIH or
VIL
IO=-12 mA
IO=-18 mA
IO=-24 mA
IO=100 µA
IO=12 mA
IO=16 mA
IO=24 mA
2.2
2.4
2.2
V
3.0
VOL
Low Level Output Voltage
2.7 to 3.6
2.7
0.2
0.4
0.4
0.55
±5
VI =
VIH or
VIL
V
3.0
3.0
II
Input Leakage Current
VI = 0 to 5.5 V
µA
µA
µA
2.7 to 3.6
0
Ioff
IOZ
Power Off Leakage Current
3 State Output Leakage Current
VI or VO = 5.5V
10
2.7 to 3.6
VI = VIH or VIL
VO = 0 to 5.5V
±5
ICC
Quiescent Supply Current
ICC incr. per input
2.7 to 3.6
2.7 to 3.6
VI = VCC or GND
10
µA
µA
VI or VO
=
10
±
3.6 to 5.5V
∆ICC
VIH = VCC -0.6V
500
DYNAMIC SWITCHING CHARACTERISTICS
Ω
)
(CL = 50 pF, RL = 500
Symbol
Parameter
Test Conditions
Value
TA = 25 oC
Unit
VCC
(V)
Min. Typ. Max.
VOLP Dynamic Low Voltage Quiet Output
3.3
0.8
VIL = 0 V
VIH = 3.3V
V
(note 1)
VOLV
-0.8
1)Number ofoutputs defined as”n”. Measured with”n-1”outputs switchingfrom HIGHtoLOWor LOW toHIGH. The remaining output ismeasured in
theLOW state.
4/9
74LCX257
AC ELECTRICAL CHARACTERISTICS
(CL = 50 pF, RL = 500 Ω, Input tr = t = 2.5 ns)
f
Symbol
Parameter
Test Condition
Value
-40 to 85 oC
Unit
VCC
Waveform
(V)
Min. Max.
tPLH
tPHL
Propagation Delay Time
A, B to Y
2.7
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
6.5
6.0
8.5
7.0
8.5
7.0
6.0
5.5
1.0
2
1, 2
3
ns
ns
ns
3.0 to 3.6
2.7
tPLH
tPHL
Propagation Delay Time
SELECT to Y
3.0 to 3.6
2.7
tPZL
tPZH
Output Enable Time
3.0 to 3.6
2.7
tPLZ
tPhZ
Output Disable Time
3
ns
ns
3.0 to 3.6
3.0 to 3.6
tOSLH Output to Output Skew Time (note 1, 2)
tOSHL
1) Skewis defined astheabsolute value ofthe difference between theactual propagation delay for any twooutputs of thesame device switching inthe
same direction, either HIGHor LOW (tOSLH = |tPLHm -tPLHn|,tOSHL =|tPHLm -tpHLn|)
2) Parameter guaranteed bydesign
CAPACITIVE CHARACTERISTICS
Symbol
Parameter
Test Conditions
Value
TA = 25 oC
Unit
VCC
(V)
Min. Typ. Max.
CIN
Input Capacitance
VIN = 0 to VCC
VIN = 0 to VCC
fIN = 10MHz
7
8
3.3
3.3
3.3
pF
pF
pF
COUT Output Capacitance
CPD Power Dissipation Capacitance (note 1)
25
V
IN = 0 or VCC
1)CPD isdefined as thevalue ofthe IC’sinternal equivalent capacitance whichiscalculated fromthe operating current consumption without load. Average
operting current canbe obtained bythe followingequation. ICC(opr)= CPD VCC
fIN +ICC/4(per channel)
•
•
TEST CIRCUIT
TEST
SWITCH
Open
6V
tPLH, tPHL
tPZL, tPLZ
tPZH, tPHZ
GND
CL = 50 pF or equivalent (includes jigand probe capacitance)
RL =R1 =500Ω orequivalent
Ω
)
RT = ZOUT ofpulse generator (typically50
5/9
74LCX257
WAVEFORM 1: PROPAGATION DELAYS FOR INVERTING CONDITIONS
(f=1MHz; 50% duty cycle)
WAVEFORM 2: PROPAGATION DELAYS FOR NON-INVERTING CONDITIONS (f=1MHz; 50% duty
cycle)
6/9
74LCX257
WAVEFORM 3: OUTPUT ENABLE AND DISABLE TIME
(f=1MHz; 50% duty cycle)
7/9
74LCX257
SO-16 MECHANICAL DATA
mm
inch
TYP.
DIM.
MIN.
TYP.
MAX.
1.75
0.2
MIN.
MAX.
0.068
0.007
0.064
0.018
0.010
A
a1
a2
b
0.1
0.004
1.65
0.46
0.25
0.35
0.19
0.013
0.007
b1
C
0.5
0.019
c1
D
45 (typ.)
9.8
5.8
10
0.385
0.228
0.393
0.244
E
6.2
e
1.27
8.89
0.050
0.350
e3
F
3.8
4.6
0.5
4.0
5.3
0.149
0.181
0.019
0.157
0.208
0.050
0.024
G
L
1.27
0.62
M
S
8 (max.)
P013H
8/9
74LCX257
TSSOP16 MECHANICAL DATA
mm
inch
TYP.
DIM.
MIN.
TYP.
MAX.
1.1
MIN.
MAX.
0.433
0.006
0.374
0.0118
0.0079
0.201
0.256
0.176
A
A1
A2
b
0.05
0.85
0.19
0.09
4.9
0.10
0.9
0.15
0.95
0.30
0.20
5.1
0.002
0.335
0.0075
0.0035
0.193
0.246
0.169
0.004
0.354
c
D
5
6.4
0.197
0.252
E
6.25
4.3
6.5
E1
e
4.4
4.48
0.173
0.65 BSC
4o
0.0256 BSC
4o
K
0o
8o
0o
8o
L
0.50
0.60
0.70
0.020
0.024
0.028
A2
A
K
L
b
e
A1
c
E
D
E1
PIN 1 IDENTIFICATION
1
9/9
74LCX257
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of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. Thispublication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in lifesupport devices or systems withoutexpress written approval of STMicroelectronics.
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.
10/9
相关型号：
74LCX257TTR
LOW VOLTAGE CMOS QUAD 2 CHANNEL MULTIPLEXER WITH 5V TOLERANT INPUTS AND OUTPUTS (3-STATE)
STMICROELECTR
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