74LCX273MSA [NSC]
Low-Voltage Octal D Flip-Flop with 5V Tolerant Inputs and Outputs; 低电压八路D触发器与5V容限输入和输出![74LCX273MSA](http://pdffile.icpdf.com/pdf1/p00020/img/icpdf/74LCX273_100277_icpdf.jpg)
型号: | 74LCX273MSA |
厂家: | ![]() |
描述: | Low-Voltage Octal D Flip-Flop with 5V Tolerant Inputs and Outputs |
文件: | 总2页 (文件大小:66K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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ADVANCE INFORMATION
November 1996
74LCX273
Low-Voltage Octal D Flip-Flop
with 5V Tolerant Inputs and Outputs
General Description
Features
Y
5V tolerant inputs and outputs
The LCX273 has eight edge-triggered D-type flip-flops with
individual D inputs and Q outputs. The common buffered
Clock (CP) and Master Reset (MR) input load and reset
(clear) all flip-flops simultaneously.
Y
Y
Y
Y
Y
Y
10 mA I
max
CCQ
Power-down high impedance inputs and outputs
Supports live insertion/withdrawal
The register is fully edge-triggered. The state of each D in-
put, one setup time before the LOW-to-HIGH clock tran-
sition, is transferred to the corresponding flip-flop’s Q out-
put.
2.0V–3.6V V supply operation
24 mA output drive
CC
g
Implements patented Quiet SeriesTM noise/EMI
reduction circuitry
All outputs will be forced LOW independently of Clock or
Data inputs by a LOW voltage level on the MR input. The
device is useful for applications where the true output only is
required and the Clock and Master Reset are common to all
storage elements.
Y
Y
Y
Functionally compatible with the 74 series 273
Latch-up performance exceeds 500 mA
ESD performance:
l
200V
Human Body Model
l
2000V
Machine Model
The device is designed for low voltage (3.3V) V
applica-
CC
tions with capability of interfacing to a 5V signal environ-
ment. The LCX273 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing CMOS low power dissipation.
Logic Symbols
Connection Diagram
Pin Assignment for
SOIC, SSOP and TSSOP
IEEE/IEC
TL/F/12640–1
TL/F/12640–3
TL/F/12640–2
Pin Names
Description
D –D
0
Data Inputs
7
MR
CP
Master Reset
Clock Pulse Input
Data Outputs
Q –Q
0
7
SOIC JEDEC
SOIC EIAJ
SSOP Type II
TSSOP JEDEC
Order Number
74LCX273WM
74LCX273WMX
74LCX273SJ
74LCX273MSA
74LCX273MSAX
74LCX273MTC
74LCX273MTCX
74LCX273SJX
See NS Package Number
M20B
M20D
MSA20
MTC20
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.
Quiet SeriesTM is a trademark of National Semiconductor Corporation.
C
1996 National Semiconductor Corporation
TL/F/12640
RRD-B30M17/Printed in U. S. A.
http://www.national.com
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NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and whose
failure to perform, when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
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Corporation
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Europe
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National Semiconductor
Japan Ltd.
a
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National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
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