CS8128YDR8 [CHERRY]
5V Linear Controller/Driver; 5V线性控制器/驱动器
| 型号： | CS8128YDR8 |
| 厂家： | 
CHERRY SEMICONDUCTOR CORPORATION |
| 描述： | 5V Linear Controller/Driver |
| 文件： | 总6页 (文件大小：169K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CS8128
5V Linear Controller/Driver
Features
Description
The CS8128 contains all the necessary
lead allows remote sensing of the output
ꢀ Externally Set Delay for
control circuitry to implement a 5V lin-
ear regulator. An external pass device is
used to produce superior performance
compared to conventional monolithic
regulators. The CS8128 with a TIP42
PNP transistor typically provides a
100mV dropout voltage at 500mA,
increasing to 350mV at 3A. Quiescent
current at 500mA is only 5mA.
voltage for improved regulation.
Reset
An active microprocessor RESET func-
tion is included on-chip with externally
programmable delay time. During
power-up, or after detection of any error
in the regulated output, the RESET lead
will remain in the low state for the dura-
tion of the delay. Types of errors include
short circuit, low input voltage, over-
voltage shutdown, thermal shutdown,
or others that cause the output to
ꢀ 60V Load Dump
Protection
ꢀ Internal Thermal
Overload Protection
ꢀ 3% Output Accuracy
ꢀ Active RESET
ꢀ Noise Immunity
Monolithic regulators cannot approach
these figures because their power tran-
sistors do not provide the high beta and
excellent saturation characteristics at
high currents. The CS8128 is compatible
with a wide variety of external transis-
tors, allowing flexibility for thermal,
space, and cost management.
become unregulated. This function is
independent of the input voltage and
will function correctly with an output
voltage as low as 1V. Hysteresis is
ꢀ On Chip EMC Hardening
Protection Incorporated
included in both the reset and delay
comparators for noise immunity and to
prevent oscillations. A latching dis-
charge circuit is used to discharge the
delay capacitor, even when triggered by
a relatively short fault condition. This
ꢀ Externally Set Current
Limit
The CS8128 includes thermal shutdown
and externally programmable current
limit and over-voltage shutdown, mak-
ing it suitable for use in automotive and
ꢀ Externally Set
Overvoltage Shutdown
switching regulator post regulator appli- circuit improves upon the commonly
cations. An optional external RC filter
added to the CS8128 supply lead pro-
vides EMC hardening in addition to the
on-chip EMC hardening. The SENSE
used SCR structure by providing
improved noise immunity and full
capacitor discharge (0.2V typ).
Package Options
Block Diagram
8L SO & 8L PDIP
SHUTDOWN
Pwr Gnd
Ref Gnd
IC
Over
Power
Gnd
Voltage
Shutdown
V
OUT
1
2
3
4
8
7
6
5
V
V
OUT
IN
IC
Reference
Gnd
Sense
Delay
Pwr Gnd
V
IN
Sense
SHUTDOWN
Ref Gnd
PRE-
REGULATOR
RESET
Thermal
Shutdown
Error
Amp
Regulated Supply
for Circuit Bias
-
Bandgap
Reference
10µA
Delay
Current
1.25V
+
-
Delay
Reset
Comparator
Latching
Discharge
Q
S
R
RESET
-
Delay
Comparator
+
-
V
dis
+
Cherry Semiconductor Corporation
2000 South County Trail, East Greenwich, RI 02818
Tel: (401)885-3600 Fax: (401)885-5786
Email: info@cherry-semi.com
Web Site: www.cherry-semi.com
Rev. 2/5/99
A
®
Company
1
Absolute Maximum Ratings
Power Dissipation.............................................................................................................................................Internally Limited
Input Voltage ..................................................................................................................................................................–0.3V, 26V
Transient Input Voltage ............................................................................................................................................................60V
Output Current ...............................................................................................................................................Externally Limited
ESD Susceptibility (Human Body Model)..............................................................................................................................2kV
Junction Temperature ............................................................................................................................................–45°C to 150°C
Storage Temperature..............................................................................................................................................–55°C to 150°C
Lead Temperature Soldering
Wave Solder (through hole styles only) .....................................................................................10 sec. max, 260°C peak
Reflow (SMD styles only) ......................................................................................60 sec. max above 183°C, 230°C peak
Electrical Characteristics: TA = -40˚C to +125˚C, TJ = -40˚C to +150˚C, VIN = 6 to 26V, IOUT = 5 to 500mA, Per Test Circuit
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ꢀ Output Stage (VOUT
)
Output Voltage
Dropout Voltage
4.85
5.00
0.1
5.15
0.6
V
V
I
OUT = 500mA, note 1
Supply Current IQ
IOUT ≤ 10mA
4
8
mA
IOUT ≤ 500mA
IOUT ≤ 3A, note 1
5
15
30
Line Regulation
Load Regulation
Ripple Rejection
6V ≤ VIN ≤ 26V, IOUT = 5mA
5V ≤ IOUT ≤ 500mA, VIN = 14V
12
2
70
50
50
mV
mV
dB
f = 120Hz, 7V ≤ VIN ≤ 17V,
60
IOUT = 350mA
VIN Overvoltage Shutdown
Drive Current
32
25
40
V
mA
VSENSE = 0V
250
RESET
ꢀ
and Delay Functions
Delay Charge Current, ICharge
VDelay = 2V
5
10
15
µA
Threshold V
VOUT Increasing
VOUT Decreasing
4.65
4.90
4.70
200
VOUT-0.10
VOUT-0.15
V
RESET
RESET
RTH
VRTL
4.50
V
Hysteresis V
150
250
mV
RH
Delay Threshold VDTC
Charge
3.25
3.50
3.75
V
VDTD
Discharge
2.80
3.00
3.40
V
Delay Hysteresis, VDH
VDTC - VDTD
1V < VOUT < VRTL, 3kΩ to VOUT
VD > VDTC , VOUT > VRTH
200
400
800
0.4
10
mV
V
µA
Output Voltage Low
Output
RESET
RESET
Leakage Current
Delay Capacitor (Vdis)
Discharge Latched "ON",
VOUT > VRTH
CDelay = 0.1µF, note 2
0.2
32
0.5
48
V
Discharge Voltage
Delay Time
16
ms
C
Delay x VDTC
ICharge
= CDelay x 3.5 x 105 (Typical)
Note 2: Delay Time =
Note 1: Dependent on characteristics of external transistor.
2
Package Lead Description
LEAD SYMBOL
PACKAGE LEAD #
FUNCTION
8L SO & PDIP
1
VIN
Unregulated supply voltage to the IC.
2
Sense
Kelvin connection which allows remote sensing of output volt-
age for improved regulation.
3
4
Delay
RESET
Timing CAP for
function
RESET
CMOS/TTL compatible open collector output.
goes low
RESET
whenever VOUT drops below 6% of it's typical value.
Ground connection
5
6
7
8
Ref Gnd
SHUTDOWN Overvoltage shutdown control input.
Pwr Gnd
VOUT
Ground connection
Supplies base current to PNP pass transistor or threshold volt-
age to FET pass transistor.
Typical Performance Characteristics (per Test Circuit)
Dropout Voltage vs. IOUT
Temperature Performance of VOUT
RESET Voltage vs. Output Current
5.02
2000
400
350
300
250
200
IOUT=500mA
V
= 5V
25°C
in
1800
1600
1400
1200
1000
800
5.01
5.00V @ 25°C
5
4.99
4.98
4.97
4.96
4.95
R
= 47Ω
OUT
150
100
50
600
400
200
0
0
0
5
10
15
20
25
30
35
40
0
1.0
1.5
(Amps)
OUT
2.0
2.5
3.0
0.5
-40 -20
0
20 40 60 80 100120 140150
I
RESET OUTPUT CURRENT (mA)
JUNCTION TEMPERATURE (°C)
IQ vs. VIN
VOUT vs. VIN
IQ vs. IOUT
40
35
30
25
20
100.00
90.00
80.00
70.00
60.00
50.00
40.00
30.00
5.50
5.00
4.50
4.00
3.50
3.00
2.50
2.00
1.50
1.00
0.50
0.00
25°C
I
R
= 3A
OUT
= 47Ω
OUT
V
=14V
IN
I
= 3A
OUT
I
=0.5A
OUT
15
10
5
I
R
= 0.5A
= 330Ω
OUT
OUT
20.00
10.00
0.00
0
0
1
2
3
4
5
(V)
6
7
8
9
10
0
1
2
3
4
5
(V)
6
7
8
9
10
0
0.5
1.0
1.5
2.0
2.5
3.0
V
IN
V
IN
I
(Amps)
OUT
Line Regulation vs. IOUT
Load Regulation vs. IOUT
Ripple Rejection
80
70
60
50
40
30
20
10
20
18
20
15
10
5
25°C
=14V
25°C
=250mA
25°C
6V≤V ≤- 26V
V
IN
I
IN
OUT
16
14
12
10
8
6
4
2
0
10
0
0
0
100
1K
10K 100K 1M
10M
100M
0.5
1.0
1.5
2.0
2.5
3.0
0.5
1.0
I
1.5
2.0
2.5
3.0
0
FREQUENCY (Hz)
I
(Amps)
(Amps)
OUT
OUT
3
RESET Circuit Waveform
(1) = No Delay Capacitor
(2) = With Delay Capacitor
(3) = Max: RESET Voltage (1.0V)
VOUT
VRH
VRTH
VRTL
(1)
RESET
(2)
(3)
VRL
TD
Delay
VDH
VDTC
VDTD
VDIS
(2)
RESET Circuit Functional Description
The CS8128
on both the
function is very precise, has hysteresis
and Delay comparators, a latching
RESET
RESET
RESET Delay Circuit
This circuit provides a programmable (by external capaci-
Delay capacitor discharge circuit, and operation down to
1V.
tor) delay on the output lead. The Delay lead pro-
RESET
vides source current to the external delay capacitor only
when the Low Voltage Inhibit circuit indicates that output
voltage is above VRTH. Otherwise, the Delay lead sinks
current to ground (used to discharge the Delay capacitor).
The discharge current is latched ON when the output volt-
age falls below VRTL. The Delay capacitor is fully dis-
charged anytime the output voltage falls out of regulation,
even for a short period of time. This feature ensures a con-
The reset circuit output is an open collector type with ON
and OFF parameters as specified. The reset output NPN
transistor is controlled by the Low Voltage Inhibit and
Reset Delay circuits (see Block Diagram).
Low Voltage Inhibit Circuit
This circuit monitors output voltage, and when output
voltage is below VRTL, causes the reset output transistor to
be in the ON (saturation) state. When the output voltage is
above VRTH, this circuit permits the reset output transistor
to go into the OFF state if allowed by the reset Delay cir-
cuit.
trolled
pulse is generated following the detection
RESET
of an error condition. The circuit allows the
out-
RESET
put transistor to go to the OFF (open) state only when the
voltage on the Delay lead is higher than VDTC
.
4
Test Circuit
VIN
RBIAS
560Ω
TIP42B
VOUT
(5V)
RIN
ROUT
220Ω
220Ω
CO
10µF
CIN
0.022µF
V
VIN
OUT
Sense
Delay
RESET
Pwr Gnd
CS8128
SHUTDOWN
Ref Gnd
CDelay
0.022µF
RRST
4.7 kΩ
Gnd
RESET
Application Information
“leaking”. It also speeds the turn-off of the pass device
during an overvoltage transient. For proper operation over
temperature, the recommended value is 560Ω, although it
may be increased or decreased for a particular application.
Overvoltage Shutdown
The CS8128 includes an over voltage shutdown circuit
which is activated by connecting the SHUTDOWN lead to
the input. Shutdown typically occurs at 36V. Grounding
the SHUTDOWN lead disables this function. With the
overvoltage shutdown disabled, the CS8128 will continue
to regulate during an overvoltage condition.
R
OUT Resistor - This resistor controls the drive current
available to the pass transistor. It also determines regula-
tor start-up current and short circuit current limit. For
bipolar pass transistors, it can be selected by use of the fol-
lowing formulae:
Thermal Shutdown
VIN(min) – 1V
x ßQ1***
ROUT
=
The CS8128 includes a thermal shutdown circuit that dis-
ables the output when junction temperature exceeds
approximately 180˚C. This is a self-protection feature
designed to protect the CS8128. The thermal shutdown cir-
cuit does not monitor the temperature of the pass transis-
tor, which will probably be much hotter. To optimize ther-
mal shutdown, board design should minimize the differ-
ence in temperature of the CS8128 and the pass device.
IOUT(max)
***βQ1 = Pass transistor minimum β @ maximum output
current.
Typical start-up current and current limit can be calculat-
ed as follows:
4V
+ 5mA
ISTART
≈
ROUT
V
IN – 1V
External Component Selection
ILimit
≈
x ßQ1 @ Current Limit
ROUT
External Pass Device - Select a pass device that will deliv-
er the desired output current, withstand the maximum
expected input voltage, and dissipate the resulting power.
The CS8128 is compatible with a wide variety of Bipolar
and FET pass transistors.
For example, if the minimum input voltage is 6V, maxi-
mum output current is 1Amp, and minimum transistor
β@ 1Amp is 60, then ROUT can be calculated as follows:
Output Capacitor - An output capacitor is required for sta-
bility in most applications. Though a 10µF capacitor should
be sufficient, regulator stability is dependent on the
6V – 1V
ROUT
≈
x 60 = 300Ω
1Amp
characteristics of the pass transistor. Capacitor effective
series resistance (ESR) also factors in system stability. Some
bench work may be required to determine the capacitor
characteristics required for use in a particular application.
4V
300Ω
IStart
≈
+ 5mA = 18.3mA
With VIN = 14V, and a pass transistor β of 40 @ current
limit:
BIAS Resistor - This resistor provides bias current for the
14V – 1V
300Ω
ILimit
≈
x 40 = 1.7Amps
CS8128 output stage, and prevents the pass device from
5
Package Specification
PACKAGE THERMAL DATA
PACKAGE DIMENSIONS IN mm (INCHES)
Thermal Data
8 Lead
PDIP
52
100
8 Lead
D
SO Narrow
Lead Count
Metric
English
Max Min
.400 .355
.197 .189
RΘJC
RΘJA
typ
typ
45
165
˚C/W
˚C/W
Max
Min
9.02
4.80
8L PDIP
8L SO Narrow
10.16
5.00
Plastic DIP (N); 300 mil wide
7.11 (.280)
6.10 (.240)
1.77 (.070)
1.14 (.045)
8.26 (.325)
7.62 (.300)
2.54 (.100) BSC
3.68 (.145)
2.92 (.115)
0.39 (.015)
MIN.
.356 (.014)
.203 (.008)
.558 (.022)
.356 (.014)
Some 8 and 16 lead
packages may have
1/2 lead at the end
of the package.
REF: JEDEC MS-001
D
All specs are the same.
Surface Mount Narrow Body (D); 150 mil wide
6.20 (.244)
5.80 (.228)
4.00 (.157)
3.80 (.150)
0.51 (.020)
0.33 (.013)
1.27 (.050) BSC
1.75 (.069) MAX
1.57 (.062)
1.37 (.054)
0.25 (.010)
0.19 (.008)
1.27 (.050)
0.40 (.016)
0.25 (0.10)
0.10 (.004)
D
REF: JEDEC MS-012
Ordering Information
Part Number
CS8128YN8
CS8128YD8
CS8128YDR8
Description
8 Lead PDIP
Ch erry Sem icon du ctor Corporation reserves th e
righ t to m ake ch an ges to th e specification s with ou t
n otice. Please con tact Ch erry Sem icon du ctor
Corporation for th e latest available in form ation .
8 Lead SO Narrow
8 Lead SO Narrow (tape & reel)
© 1999 Cherry Semiconductor Corporation
Rev. 2/5/99
6
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