CEB50N10 [CET]
N-Channel Enhancement Mode Field Effect Transistor; N沟道增强型网络场效晶体管
| 型号： | CEB50N10 |
| 厂家： | 
CHINO-EXCEL TECHNOLOGY |
| 描述： | N-Channel Enhancement Mode Field Effect Transistor |
| 文件： | 总4页 (文件大小：426K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CEP50N10/CEB50N10
N-Channel Enhancement Mode Field Effect Transistor
FEATURES
100V, 50A, RDS(ON) = 30mΩ @VGS = 10V.
Super high dense cell design for extremely low RDS(ON)
High power and current handing capability.
Lead free product is acquired.
.
D
TO-220 & TO-263 package.
G
CEB SERIES
TO-263(DD-PAK)
CEP SERIES
TO-220
S
ABSOLUTE MAXIMUM RATINGS T = 25 C unless otherwise noted
c
Parameter
Symbol
VDS
VGS
ID
Limit
Units
V
Drain-Source Voltage
100
Gate-Source Voltage
±25
50
V
Drain Current-Continuous
A
Drain Current-Pulsed a
IDM
200
A
Maximum Power Dissipation @ TC = 25 C
- Derate above 25 C
Single Pulsed Avalanche Energy d
Single Pulsed Avalanche Current d
Operating and Store Temperature Range
136
W
PD
0.91
397
W/ C
mJ
A
EAS
IAS
43.5
-55 to 175
TJ,Tstg
C
Thermal Characteristics
Parameter
Symbol
RθJC
Limit
1.1
Units
C/W
C/W
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient
RθJA
62.5
Rev 1. 2008.Nov
Details are subject to change without notice .
http://www.cetsemi.com
1
CEP50N10/CEB50N10
Electrical Characteristics T = 25 C unless otherwise noted
c
Parameter
Off Characteristics
Symbol
Test Condition
Min
Typ
Max
Units
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate Body Leakage Current, Forward
Gate Body Leakage Current, Reverse
On Characteristics b
BVDSS
IDSS
VGS = 0V, ID = 250µA
VDS = 100V, VGS = 0V
VGS = 25V, VDS = 0V
VGS = -25V, VDS = 0V
100
V
1
µA
nA
nA
IGSSF
IGSSR
100
-100
VGS = VDS, ID = 250µA
VGS = 10V, ID = 25A
Gate Threshold Voltage
VGS(th)
RDS(on)
2
4
V
Static Drain-Source
25
30
mΩ
On-Resistance
Dynamic Characteristics c
Forward Transconductance
gFS
Ciss
Coss
Crss
VDS = 40V, ID = 21.8A
24
2060
330
40
S
Input Capacitance
pF
pF
pF
VDS = 25V, VGS = 0V,
f = 1.0 MHz
Output Capacitance
Reverse Transfer Capacitance
Switching Characteristics c
Turn-On Delay Time
Turn-On Rise Time
td(on)
tr
td(off)
tf
35
30
70
60
ns
ns
VDD = 50V, ID = 50A,
VGS = 10V, RGEN = 25Ω
Turn-Off Delay Time
Turn-Off Fall Time
138
29
276
58
ns
ns
Total Gate Charge
Qg
50.8
12
67.5
nC
nC
nC
VDS = 80V, ID = 50A,
VGS = 10V
Gate-Source Charge
Gate-Drain Charge
Qgs
Qgd
19
Drain-Source Diode Characteristics and Maximun Ratings
Drain-Source Diode Forward Current
Drain-Source Diode Forward Voltage b
Notes :
IS
50
A
V
VSD
VGS = 0V, IS = 40A
1.5
a.Repetitive Rating : Pulse width limited by maximum junction temperature
b.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%.
c.Guaranteed by design, not subject to production testing.
d.L = 0.42mH, I = 43.5A, V = 25V, R = 25Ω, Starting T = 25 C
AS
DD
G
J
2
CEP50N10/CEB50N10
36
30
24
18
12
6
100
VGS=10,9V
80
V
GS=6V
60
V
GS=5V
40
25 C
20
-55 C
TJ=125 C
0
0
0
0.5
1.0
1.5
2.0
2.5
3.0
0
2
4
6
8
VDS, Drain-to-Source Voltage (V)
VGS, Gate-to-Source Voltage (V)
Figure 1. Output Characteristics
Figure 2. Transfer Characteristics
2.6
2.2
1.8
1.4
1.0
0.6
0.2
6000
5000
4000
3000
2000
1000
0
ID=25A
VGS=10V
C
iss
C
oss
C
rss
0
5
10
15
20
25
-100
-50
0
50
100
150
200
VDS, Drain-to-Source Voltage (V)
TJ, Junction Temperature( C)
Figure 3. Capacitance
Figure 4. On-Resistance Variation
with Temperature
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
VDS=VGS
ID=250µA
V
GS=0V
102
101
100
-50 -25
0
25 50 75 100 125 150
0.4
0.6
0.8
1.0
1.2
1.4
1.6
TJ, Junction Temperature( C)
VSD, Body Diode Forward Voltage (V)
Figure 5. Gate Threshold Variation
with Temperature
Figure 6. Body Diode Forward Voltage
Variation with Source Current
3
CEP50N10/CEB50N10
103
10
8
VDS=80V
ID=50A
RDS(ON)Limit
102
10µs
6
100µs
1ms
4
DC
101
2
TC=25 C
TJ=175 C
Single Pulse
100
0
100
101
102
103
0
9
18
27
36
45
54
Qg, Total Gate Charge (nC)
VDS, Drain-Source Voltage (V)
Figure 7. Gate Charge
Figure 8. Maximum Safe
Operating Area
VDD
on
t
toff
d(off)
t
r
t
d(on)
OUT
RL
t
f
t
VIN
90%
10%
90%
D
OUT
V
V
VGS
10%
INVERTED
RGEN
G
90%
50%
50%
S
IN
V
10%
PULSE WIDTH
Figure 10. Switching Waveforms
Figure 9. Switching Test Circuit
100
D=0.5
0.2
PDM
10-1
0.1
t1
t2
0.05
0.02
1. Rθ JC (t)=r (t) * Rθ JC
2. Rθ JC=See Datasheet
3. TJM-TC = P* Rθ JC (t)
4. Duty Cycle, D=t1/t2
0.01
Single Pulse
10-2
10-2
10-1
100
101
102
103
104
Square Wave Pulse Duration (msec)
Figure 11. Normalized Thermal Transient Impedance Curve
4
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