TISP61521DR-S [BOURNS]

DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS; 双正向导电的P- GATE闸流体可编程过电压保护
TISP61521DR-S
型号: TISP61521DR-S
厂家: BOURNS ELECTRONIC SOLUTIONS    BOURNS ELECTRONIC SOLUTIONS
描述:

DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS
双正向导电的P- GATE闸流体可编程过电压保护

电信集成电路 电信电路 电信保护电路 光电二极管
文件: 总11页 (文件大小:199K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
TISP61521  
T
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IA  
L
P
S
M
N
E
O
L
IO  
C
B
S
S
A
R
DUAL FORWARD-CONDUCTING P-GATE THYRISTORS  
PROGRAMMABLE OVERVOLTAGE PROTECTORS  
H
E
IL  
o
V
A
V
*R  
A
TISP61521 SLIC Protector  
Overvoltage Protection for High Voltage Negative Rail  
Ringing SLICs  
D Package (Top View)  
1
8
7
6
5
K1  
G
K1 (Tip)  
(Tip)  
Dual Voltage-Programmable Protectors  
- Supports Battery Voltages Down to -150 V  
- Low 3 mA max. Gate Triggering Current  
- High 150 mA min. Holding Current  
2
A
A
(Ground)  
(Ground)  
(Gate)  
3
4
NC  
K2  
K2 (Ring)  
(Ring)  
Rated for International Surge Wave Shapes  
MD6XANB  
NC - No internal connection  
Terminal typical application names shown in  
parenthesis  
I
Voltage  
TSP  
A
Standard  
Waveshape  
2/10  
GR-1089-CORE  
170  
Device Symbol  
K1  
ITU-T K.22  
VDE 0878  
1.2/50  
50  
K1  
G
1.2/50  
10/160  
0.5/700  
IEC 61000-4-5  
FCC Part 68 Type A  
I3124  
100  
50  
A
A
40  
ITU-T K.20,  
VDE 0433  
10/700  
40  
IEC 61000-4-5  
9/720  
10/560  
10/1000  
FCC Part 68 Type B  
FCC Part 68 Type A  
GR-1089-CORE  
40  
35  
30  
K2  
K2  
Terminals K1, K2 and A correspond to the alternative  
line designators of T, R and G or A, B and C. The  
negative protection voltage is controlled by the  
voltage, VGG, applied to the G terminal.  
SD6XAEB  
Functional Replacements for  
Functional  
............................................ UL Recognized Components  
Device Type Package Type  
Replacement  
LCP1511D,  
8-pin Small-Outline TISP61521D  
LCP1521  
How To Order  
For Standard  
For Lead Free  
Termination Finish Termination Finish  
Device  
Package  
Carrier  
Embossed Tape Reeled  
Tube  
Order As  
TISP61521DR  
TISP61521D  
Order As  
TISP61521DR-S  
TISP61521D-S  
TISP61521  
D (8-pin Small-Outline)  
Description  
The TISP61521 is a dual forward-conducting buffered p-gate overvoltage protector. It is designed to protect monolithic SLICs (Subscriber Line  
Interface Circuits) against overvoltages on the telephone line caused by lightning, a.c. power contact and induction. The TISP61521 limits  
voltages that exceed the SLIC supply rail voltage. The TISP61521 parameters are specified to allow equipment compliance with Bellcore  
GR-1089-CORE, Issue 1 and ITU-T recommendation K.20.  
*RoHS Directive 2002/95/EC Jan 27 2003 including Annex  
APRIL 2001 REVISED FEBRUARY 2005  
Specifications are subject to change without notice.  
Customers should verify actual device performance in their specific applications.  
TISP61521 SLIC Protector  
Description (continued)  
The SLIC line driver section is typically powered from 0 V (ground) and a negative voltage in the region of -20 V to -150 V. The protector gate is  
connected to this negative supply. This references the protection (clipping) voltage to the negative supply voltage. The protection voltage will  
then track the negative supply voltage and the overvoltage stress on the SLIC is minimized.  
Positive overvoltages are clipped to ground by diode forward conduction. Negative overvoltages are initially clipped close to the SLIC negative  
supply rail value. If sufficient current is available from the overvoltage, then the protector will switch into a low voltage on-state condition. As  
the overvoltage subsides, the high holding current of TISP61521 crowbar prevents d.c. latchup.  
These monolithic protection devices are fabricated in ion-implanted planar vertical power structures for high reliability and in normal system  
operation they are virtually transparent. The TISP61521 buffered gate design reduces the loading on the SLIC supply during overvoltages  
caused by power cross and induction. The TISP61521 is available in an 8-pin plastic small-outline surface mount package.  
Absolute Maximum Ratings, T = 25 °C (Unless Otherwise Noted)  
J
Rating  
Symbol  
Value  
-175  
-162  
Unit  
V
Repetitive peak off-state voltage, V = 0, -40 °C T 85 °C (see Note 1)  
V
DRM  
GK  
J
Repetitive peak gate-cathode voltage, V = 0, -40 °C T 85 °C (see Note 1)  
V
GKRM  
V
KA  
J
Non-repetitive peak on-state pulse current (see Note 2)  
2/10 µs (GR-1089-CORE, 2/10 µs voltage waveshape)  
1/20 µs (K.22, VDE0878, 1.2/50 voltage waveshape)  
8/20 µs (IEC 61000-4-5, combination wave generator, 1.2/50 voltage, 8/20 current)  
10/160 µs (FCC Part 68, 10/160 µs voltage waveshape)  
0.2/310 µs (I3124, 0.5/700 µs voltage waveshape)  
5/310 µs (VDE 0433, 10/700 µs voltage waveshape)  
5/310 µs (ITU-T K.20/21, K.44 10/700 µs voltage wave shape)  
5/320 µs (FCC Part 68, 9/720 µs voltage waveshape)  
10/560 µs (FCC Part 68, 10/560 µs voltage waveshape)  
10/1000 µs (GR-1089-CORE, 10/1000 µs voltage waveshape)  
Non-repetitive peak on-state current, 50 Hz (see Notes 2 and 3)  
0.01 s  
170  
50  
100  
50  
I
40  
A
TSP  
40  
40  
40  
35  
30  
I
15  
5
A
TSM  
1 s  
Non-repetitive peak gate current, 10 ms half-sine wave, cathodes commoned (see Notes 1 and  
2)  
I
+2  
A
GSM  
Junction temperature  
T
-40 to +150  
-65 to +150  
°C  
J
Storage temperature range  
T
°
C
stg  
NOTES: 1. These voltage ratings are set by the -150 V maximum supply voltage plus the 12 V diode overshoot (V  
) and the 25 V SCR  
GKRM  
overshoot (V  
).  
DRM  
2. Initially, the protector must be in thermal equilibrium. The surge may be repeated after the device returns to its initial conditions. The  
rated current values may be applied either to the Ring to Ground or to the Tip to Ground terminal pairs. Additionally, both terminal  
pairs may have their rated current values applied simultaneously (in this case, the Ground terminal current will be twice the rated  
current value of an individual terminal pair).  
3. Values for V  
= -48 V. For values at other voltages, see Figure 2.  
GG  
APRIL 2001 REVISED FEBRUARY 2005  
Specifications are subject to change without notice.  
Customers should verify actual device performance in their specific applications.  
TISP61521 SLIC Protector  
Recommended Operating Conditions  
Component  
Min  
100  
25  
Typ  
Max  
Unit  
nF  
C1  
Gate decoupling capacitor  
220  
series resistor for GR-1089-CORE, 2/10, 10/360 and 10/1000 first-level surge survival  
series resistor for GR-1089-CORE, 2/10, 10/360 and 10/1000 first-level and 2/10 second-level  
surge survival  
40  
series resistor for K.20, K.21 and K.45 coordination with a 400 V primary protector  
series resistor for K.44 4 kV 10/700 surge survival  
10  
60  
20  
0
series resistor for FCC Part 68 Type A 10/160 and 10/560 surge survival  
series resistor for FCC Part 68 Type B 9/720 surge survival  
series resistor for VDE 0433 2 kV 10/700 surge survival  
R
S
10  
0
series resistor for VDE 0878 2 kV 1.2/50 surge survival  
series resistor for IEC 6100-4-5 4 kV, 10/700, class 5, long distance balanced circuits surge  
survival with a 400 V primary protector  
10  
0
series resistor for IEC 6100-4-5 1.2/50-8/20combination generator, classes 0 to 5 (500 V to  
4 kV maximum), short distance balanced circuits surge survival.  
Electrical Characteristics, T = 25 °C (Unless Otherwise Noted)  
J
Parameter  
Test Conditions  
Min  
Typ  
Max  
-5  
Unit  
µA  
T = 25 °C  
J
I
Off-state current  
V
= V  
, V = 0  
DRM GK  
D
D
T = 85 °C  
-50  
µA  
J
V
= -48 V, C = 220 nF  
G
GG  
Gate-cathode impulse 10/700, I = -30 A, R = 10 Ω  
7
TM  
S
V
V
GK(BO)  
breakover voltage  
1.2/50, I = -30 A, R = 10 Ω  
10  
25  
TM  
S
2/10, I = -38 A, R = 62 ,  
TM  
S
V
Forward voltage  
I
= 5 A, t = 500 µs  
2
V
V
F
F
w
10/700, I = 30 A, R = 10 Ω  
5
7
F
S
Peak forward recovery  
voltage  
V
1.2/50, I = 30 A, R = 10 Ω  
F S  
2/10, I = 38 A, R = 62 ,  
FRM  
12  
F
S
I
Holding current  
I
= -1 A, di/dt = 1A/ms, V = -100 V  
GG  
-150  
mA  
µA  
H
T
T = 25 °C  
-5  
J
I
Gate reverse current  
V
= V = V  
, V = 0  
GKRM KA  
GKS  
GG  
GK  
T = 85 °C  
-50  
3.0  
µA  
J
I
Gate trigger current  
I
= -3 A, t  
20 µs, V = -100 V  
mA  
GT  
T
p(g)  
p(g)  
GG  
Gate-cathode trigger  
voltage  
V
I = -3 A, t  
20 µs, V = -100 V  
2.0  
V
GT  
T
GG  
V
= -3 V  
100  
50  
pF  
pF  
Cathode-anode off-  
state capacitance  
D
C
f = 1 MHz, V = 1 V, I = 0, (see Note 4)  
d G  
KA  
V
= -48 V  
D
NOTE 4: These capacitance measurements employ a three terminal capacitance bridge incorporating a guard circuit. The unmeasured  
device terminals are a.c. connected to the guard terminal of the bridge.  
APRIL 2001 REVISED FEBRUARY 2005  
Specifications are subject to change without notice.  
Customers should verify actual device performance in their specific applications.  
TISP61521 SLIC Protector  
Thermal Characteristics  
Parameter  
Test Conditions  
T = 25 °C, EIA/JESD51-3 PCB, EIA/JESD51-  
Min  
Typ  
Max  
Unit  
A
RθJA Junction to free air thermal resistance  
170  
°C/W  
2 environment, P  
= 1.7 W  
TOT  
Parameter Measurement Information  
+i  
Quadrant I  
IFSP (= | TSP|)  
Forward  
Conduction  
Characteristic  
IFSM (= |ITSM|)  
IF  
VF  
VGK(BO)  
VGG  
VD  
+v  
-v  
ID  
I
I(BO)  
IH  
IS  
VT  
VS  
V(BO)  
IT  
ITSM  
Quadrant III  
ITSP  
Switching  
Characteristic  
-i  
PM6XAAA  
Figure 1. Voltage-Current Characteristic  
UnlessOtherwise Noted,All Voltagesare Referencedto the Anode  
APRIL 2001 REVISED FEBRUARY 2005  
Specifications are subject to change without notice.  
Customers should verify actual device performance in their specific applications.  
TISP61521 SLIC Protector  
Thermal Information  
PEAK NON-RECURRING AC  
vs  
CURRENT DURATION  
TI61AF  
20  
15  
RING AND TIP TERMINALS:  
Equal ITSM values applied  
simultaneously  
GROUND TERMINAL:  
Current twice ITSM value  
10  
8
7
6
5
4
EIA / JEDSD51  
Environmentand  
PCB, TA = 25 °C  
3
VGG = -80 V  
VGG =-60 V  
2
1.5  
1
VGG = -100 V  
VGG = -120 V  
0.8  
0.7  
0.6  
0.5  
0.01  
0.1  
1
10  
100  
1000  
t — Current Duration — s  
Figure 2. Non-Repetitive Peak On-State Current against Duration  
APRIL 2001 REVISED FEBRUARY 2005  
Specifications are subject to change without notice.  
Customers should verify actual device performance in their specific applications.  
TISP61521 SLIC Protector  
APPLICATIONS INFORMATION  
Gated Protectors  
This section covers three topics. First, it is explained why gated protectors are needed. Second, the voltage limiting action of the protector is  
described. Third, an example application circuit is described.  
Purpose of Gated Protectors  
Fixed voltage thyristor overvoltage protectors have been used since the early 1980s to protect monolithic SLICs (Subscriber Line Interface  
Circuits) against overvoltages on the telephone line caused by lightning, a.c. power contact and induction. As the SLIC was usually powered  
from a fixed voltage negative supply rail, the limiting voltage of the protector could also be a fixed value. The TISP1072F3 is a typical example  
of a fixed voltage SLIC protector.  
SLICs have become more sophisticated. To minimize power consumption, some designs automatically adjust the driver supply voltage to a  
value that is just sufficient to drive the required line current. For short lines, the supply voltage would be set low, but for long lines, a higher  
supply voltage would be generated to drive sufficient line current. The optimum protection for this type of SLIC would be given by a protection  
voltage which tracks the SLIC supply voltage. This can be achieved by connecting the protection thyristor gate to the SLIC V  
supply,  
Figure 3. This gated (programmable) protection arrangement minimizes the voltage stress on the SLIC, no matter what value of supply voltage.  
BATH  
SLIC  
PROTECTOR  
SLIC  
PROTECTOR  
SLIC  
SLIC  
IF  
Th5  
IK  
Th5  
TISP  
61521  
TISP  
61521  
IG  
VBAT  
VBAT  
C1  
220 nF  
C1  
220 nF  
AI6XABA  
AI6XACA  
Figure 3. Negative Overvoltage Condition  
Figure 4. Positive Overvoltage Condition  
Operation of Gated Protectors  
Figure 3 and Figure 4 show how the TISP61521 limits negative and positive overvoltages. Positive overvoltages (Figure 4) are clipped by the  
antiparallel diode of Th5 and the resulting current is diverted to ground. Negative overvoltages (Figure 3) are initially clipped close to the SLIC  
negative supply rail value (V  
BATH  
). If sufficient current is available from the overvoltage, then Th5 will switch into a low voltage on-state  
condition. As the overvoltage subsides, the high holding current of Th5 prevents d.c. latchup. The protection voltage will be the sum of the  
gate supply (V ) and the peak gate-cathode voltage (V ). The protection voltage will be increased if there is a long connection  
BATH GK(BO)  
between the gate decoupling capacitor, C1, and the gate terminal. During the initial rise of a fast impulse, the gate current (I ) is the same as  
G
the cathode current (I ). Rates of 70 A/µs can cause inductive voltages of 0.7 V in 2.5 cm of printed wiring track. To minimize this inductive  
K
voltage increase of protection voltage, the length of the capacitor to gate terminal tracking should be minimized. Inductive voltages in the  
protector cathode wiring will also increase the protection voltage. These voltages can be minimized by routing the SLIC connection through  
the protector as shown in Figure 6.  
Figure 5, which has a 10 A/µs rate of impulse current rise, shows a positive gate charge (Q ) of about 0.1 µC. With the 0.1 µF gate  
GS  
decoupling capacitor used, the increase in gate supply is about 1 V (= Q /C1). This change is just visible on the -72 V gate voltage, V  
GS BATH  
.
But the voltage increase does not directly add to the protection voltage, as the supply voltage change reaches a maximum at 0.4 µs, when the  
gate current reverses polarity, and the protection voltage peaks earlier at 0.3 µs. In Figure 5, the peak clamping voltage (V ) is -77.5 V, an  
increase of 5.5 V on the nominal gate supply voltage. This 5.5 V increase is the sum of the supply rail increase at that time, (0.5 V), and the  
protection circuit’s cathode diode to supply rail breakover voltage (5 V). In practice, use of the recommended 220 nF gate decoupling capacitor  
(BO)  
would give a supply rail increase of about 0.3 V and a V  
value of about -77.3 V.  
(BO)  
APRIL 2001 REVISED FEBRUARY 2005  
Specifications are subject to change without notice.  
Customers should verify actual device performance in their specific applications.  
TISP61521 SLIC Protector  
0
-20  
-40  
-60  
V
V
K
BATH  
-80  
0.0  
0.5  
1.0  
1.5  
Time - µs  
AI6XDE  
1
Q
GS  
I
G
0
-1  
-2  
-3  
-4  
I
K
-5  
0.0  
0.5  
1.0  
1.5  
Time - µs  
Figure 5. Protector Fast Impulse Clamping and Switching Waveforms  
Application Circuit  
Figure 6 shows a typical TISP61521 SLIC card protection circuit. The incoming line conductors, Ring (R) and Tip (T), connect to the relay  
matrix via the series overcurrent protection. Fusible resistors, fuses and positive temperature coefficient (PTC) resistors can be used for  
overcurrent protection. Resistors will reduce the prospective current from the surge generator for both the TISP61521 and the ring/test  
protector. The TISP7xxxF3 protector has the same protection voltage for any terminal pair. This protector is used when the ring generator  
configuration may be ground or battery-backed. For dedicated ground-backed ringing generators, the TISP3xxxF3 gives better protection as  
its inter-conductor protection voltage is twice the conductor to ground value.  
Relay contacts 3a and 3b connect the line conductors to the SLIC via the TISP61521 protector. The protector gate reference voltage comes  
from the SLIC negative supply (V  
). A 220 nF gate capacitor sources the high gate current pulses caused by fast rising impulses.  
BATH  
APRIL 2001 REVISED FEBRUARY 2005  
Specifications are subject to change without notice.  
Customers should verify actual device performance in their specific applications.  
TISP61521 SLIC Protector  
OVER-  
RING/TEST  
CURRENT  
TEST  
RELAY  
RING  
RELAY  
SLIC  
RELAY  
SLIC  
PROTECTOR  
SLIC  
PROTECTION  
PROTECTION  
TIP  
WIRE  
Th1  
S3a  
Th4  
RSA  
S1a  
S2a  
Th3  
RSB  
Th5  
Th2  
RING  
WIRE  
S3b  
TISP  
TISP  
3xxxF3  
OR  
7xxxF3  
61521  
S1b  
S2b  
VBAT  
C1  
F
220 n  
TEST  
EQUIP-  
MENT  
RING  
GENERATOR  
AI6XAAB  
Figure 6. Typical Application Circuit  
APRIL 2001 REVISED FEBRUARY 2005  
Specifications are subject to change without notice.  
Customers should verify actual device performance in their specific applications.  
TISP61521 SLIC Protector  
MECHANICAL DATA  
Device Symbolization Code  
Devices will be coded as follows:  
Symbolization  
Device  
TISP61521  
Code  
61521  
APRIL 2001 REVISED FEBRUARY 2005  
Specifications are subject to change without notice.  
Customers should verify actual device performance in their specific applications.  
TISP61521 SLIC Protector  
MECHANICAL DATA  
D008 Plastic Small-outline Package  
This small-outline package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. The compound will  
withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated in high  
humidity conditions. Leads require no additional cleaning or processing when used in soldered assembly.  
D008  
8-pin Small Outline Microelectronic Standard  
Package MS-012, JEDEC Publication 95  
4.80 - 5.00  
(0.189 - 0.197)  
8
7
6
5
5.80 - 6.20  
(0.228 - 0.244)  
INDEX  
3.81 - 4.00  
(0.150 - 0.157)  
1
3
2
4
4.60 - 5.21  
(0.181 - 0.205)  
0.25 - 0.50  
(0.010 - 0.020)  
1.35 - 1.75  
(0.053 - 0.069)  
7 ° NOM  
3 Places  
x 45 ° N0M  
0.102 - 0.203  
(0.004 - 0.008)  
4 ° ± 4 °  
0.36 - 0.51  
(0.014 - 0.020)  
8 Places  
7 ° NOM  
4 Places  
0.28 - 0.79  
Pin Spacing  
1.27  
(0.050)  
(see Note A)  
6 places  
(0.011 - 0.031)  
0.190 - 0.229  
(0.0075 - 0.0090)  
0.51 - 1.12  
(0.020 - 0.044)  
MILLIMETERS  
(INCHES)  
DIMENSIONS ARE:  
MDXXAAC  
NOTES: A. Leads are within 0.25 (0.010) radius of true position at maximum material condition.  
B. Body dimensions do not include mold flash or protrusion.  
C. Mold flash or protrusion shall not exceed 0.15 (0.006).  
D. Lead tips to be planar within ±0.051 (0.002).  
APRIL 2001 REVISED FEBRUARY 2005  
Specifications are subject to change without notice.  
Customers should verify actual device performance in their specific applications.  
TISP61521 SLIC Protector  
MECHANICAL DATA  
D008 Tape DImensions  
D008 Package (8-pin Small Outline) Single-Sprocket Tape  
3.90 - 4.10  
1.50 - 1.60  
(.154 - .161)  
(.059 - .063)  
1.95 - 2.05  
7.90 - 8.10  
0.40  
(.077 - .081)  
(.311 - .319)  
(0.016)  
0.8  
(0.03)  
MIN.  
5.40 - 5.60  
(.213 - .220)  
11.70 - 12.30  
(.461 - .484)  
Cover  
Tape  
6.30 - 6.50  
(.248 - .256)  
1.50  
(.059)  
ø
MIN.  
0 MIN.  
Carrier Tape  
Embossment  
2.0 - 2.2  
(.079 - .087)  
Direction of Feed  
MILLIMETERS  
(INCHES)  
DIMENSIONS ARE:  
NOTES: A. Taped devices are supplied on a reel of the following dimensions:-  
MDXXATB  
330 +0.0/-4.0  
Reel diameter:  
(12.992 +0.0/-.157)  
100 ± 2.0  
Reel hub diameter:  
(3.937 ± .079)  
13.0 ± 0.2  
Reel axial hole:  
(.512 ± .008)  
B. 2500 devices are on a reel.  
“TISP” is a trademark of Bourns, Ltd., a Bourns Company, and is Registered in U.S. Patent and Trademark Office.  
“Bourns” is a registered trademark of Bourns, Inc. in the U.S. and other countries.  
APRIL 2001 REVISED FEBRUARY 2005  
Specifications are subject to change without notice.  
Customers should verify actual device performance in their specific applications.  

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QUAD FORWARD-CONDUCTING BUFFERED P-GATE THYRISTORS
BOURNS