TISP6NTP2A_08 [BOURNS]

QUAD FORWARD-CONDUCTING BUFFERED P-GATE THYRISTORS; QUAD正向传导BUFFERED P- GATE闸流体
TISP6NTP2A_08
型号: TISP6NTP2A_08
厂家: BOURNS ELECTRONIC SOLUTIONS    BOURNS ELECTRONIC SOLUTIONS
描述:

QUAD FORWARD-CONDUCTING BUFFERED P-GATE THYRISTORS
QUAD正向传导BUFFERED P- GATE闸流体

文件: 总7页 (文件大小:368K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
TISP6NTP2A  
*RoHS COMPLIANT  
QUAD FORWARD-CONDUCTING BUFFERED P-GATE THYRISTORS  
TISP6NTP2A Programmable Protector  
Independent Overvoltage Protection for Two SLICs in Short  
Loop Applications:  
D Package (Top View)  
– Wide 0 to -90 V Programming Range  
– Low 5 mA max. Gate Triggering Current  
– High 150 mA min. (85 °C) Holding Current  
– Specified 1.2/50 & 0.5/700 Limiting Voltage  
– Full -40 °C to 85 °C Temperature Range  
1
2
3
4
8
7
6
5
K2  
A
K1  
G1,G2  
G3,G4  
K3  
A
K4  
MDRXAM  
Rated for Common Impulse Waveforms  
I
Voltage Impulse  
Form  
Current Impulse  
Shape  
TSP  
A
Device Symbol  
K1  
10/1000 µs  
10/700 µs  
1.2/50 µs  
2/10 µs  
10/1000 µs  
5/310 µs  
8/20 µs  
20  
25  
75  
85  
2/10 µs  
G1,G2  
.............................................. UL Recognized Component  
Description  
The TISP6NTP2A has been designed for short loop systems  
such as:  
– WILL (Wireless In the Local Loop)  
– FITL (Fibre In The Loop)  
K2  
A
– DAML (Digital Added Main Line, Pair Gain)  
– SOHO (Small Office Home Office)  
– ISDN-TA (Integrated Services Digital Network -  
Terminal Adaptors)  
A
K3  
Typical TISP6NTP2A Router Application  
TERMINAL ADAPTOR  
G3,G4  
SLIC 1  
POTS 1  
SDRXAI  
TISP6  
NTP2A  
K4  
PROCESSOR  
POTS 2  
LAN  
SLIC 2  
LINE  
TRANSCEIVER  
TRANSCEIVER  
How To Order  
Device  
Package  
Carrier  
Order As  
Tape and Reel TISP6NTP2ADR-S  
TISP6NTP2A D, Small-Outline  
*RoHS Directive 2002/95/EC Jan 27 2003 including Annex  
JUNE 1998 - REVISED JULY 2008  
Specifications are subject to change without notice.  
Customers should verify actual device performance in their specific applications.  
TISP6NTP2A Programmable Protector  
Description (continued)  
These systems often have the need to source two POTS (Plain Old Telephone Service) lines, one for a telephone and the other for a facsimile  
machine. In a single surface mount package, the TISP6NTP2A protects the two POTS line SLICs (Subscriber Line Interface Circuits) against  
overvoltages caused by lightning, a.c. power contact and induction.  
The TISP6NTP2A has an array of four buffered P-gate forward conducting thyristors with twin commoned gates and a common anode  
connection. Each thyristor cathode has a separate terminal connection. An antiparallel anode-cathode diode is connected across each  
thyristor. The buffer transistors reduce the gate supply current.  
In use, the cathodes of an TISP6NTP2A thyristor are connected to the four conductors of two POTS lines (see applications information). Each  
gate is connected to the appropriate negative voltage battery feed of the SLIC driving that line pair. By having separate gates, each SLIC can  
be protected at a voltage level related to the negative supply voltage of that individual SLIC. The anode of the TISP6NTP2A is connected to the  
SLIC common.  
Positive overvoltages are clipped to common by forward conduction of the TISP6NTP2A antiparallel diode. Negative overvoltages are initially  
clipped close to the SLIC negative supply by emitter follower action of the TISP6NTP2A buffer transistor. If sufficient clipping current flows, the  
TISP6NTP2A thyristor will regenerate and switch into a low voltage on-state condition. As the overvoltage subsides, the high holding current of  
the TISP6NTP2A prevents d.c. latchup.  
Absolute Maximum Ratings, T = 25 °C (Unless Otherwise Noted)  
A
Rating  
Repetitive peak off-state voltage, I = 0,- 40 °C  
Symbol  
Value  
-100  
-90  
Unit  
V
T
85 °C  
V
DRM  
G
J
Repetitive peak gate-cathode voltage, V = 0,- 40 °C  
T
85 °C  
T 85 °C, (see Notes 1 and 2)  
J
V
GKRM  
V
KA  
J
Non-repetitive peak on-state pulse current, -40 °C  
10/1000 µs (Bellcore GR-1089-CORE, Issue 1, November 1994, Section 4)  
20  
0.2/310 µs (I3124, open-circuit voltage wave shape 0.5/700 µs)  
5/310 µs (ITU-T K.20 & K.21, open-circuit voltage wave shape 10/700 µs)  
8/20 µs (IEC 61000-4-5:1995, open-circuit voltage wave shape 1.2/50 µs)  
25  
25  
75  
I
A
A
TSP  
2/10 µs (Bellcore GR-1089-CORE, Issue 1, November 1994, Section 4)  
85  
Non-repetitive peak on-state current, 50/60 Hz, -40 °C  
T 85 °C, (see Notes 1 and 2)  
J
100 ms  
7
1 s  
5 s  
2.7  
1.5  
I
TSM  
300 s  
900 s  
0.45  
0.43  
Non-repetitive peak gate current, 1/2 µs pulse, cathodes commoned (see Note 1)  
Operating free-air temperature range  
I
25  
A
GSM  
T
-40 to +85  
-40 to +150  
-65 to +150  
°C  
°C  
°C  
A
Junction temperature  
T
J
Storage temperature range  
T
stg  
NOTES: 1. Initially, the protector must be in thermal equilibrium with -40 °C  
T 85 °C. The surge may be repeated after the device returns  
J
to its initial conditions.  
2. These non-repetitive rated currents are peak values for either polarity. The rated current values may be applied to any cathode-  
anode terminal pair. Additionally, all cathode-anode terminal pairs may have their rated current values applied simultaneously (in  
this case the anode terminal current will be four times the rated current value of an individual terminal pair). Above 85 °C, derate  
linearly to zero at 150 °C lead temperature.  
JUNE 1998 - REVISED JULY 2008  
Specifications are subject to change without notice.  
Customers should verify actual device performance in their specific applications.  
TISP6NTP2A Programmable Protector  
Recommended Operating Conditions  
Min.  
Typ.  
Max.  
Unit  
C
Gate decoupling capacitor  
100  
220  
nF  
G
Series resistor for GR-1089-CORE first-level surge survival  
Series resistor for ITU-T recommendation K.20  
Series resistor for ITU-T recommendation K.21  
40  
12  
20  
4
R1, R2  
Series resistor for IEC 61000-4-5:1995, class 5, 1.2/50 or 10/700  
Electrical Characteristics for any Section, T = 25 °C (Unless Otherwise Noted)  
A
Parameter  
Test Conditions  
Min.  
Typ.  
Max.  
-5  
Unit  
µA  
T = 25 °C  
J
I
Off-state current  
V
= V  
, I = 0  
DRM G  
D
D
T = 85 °C  
-50  
-70  
µA  
J
I = -20 A, IEC 61000-4-5:1995 combination impulse generator,  
T
V
Breakover voltage  
V
= -50 V  
V
(BO)  
GG  
I = -18 A, I3124 impulse generator, V = -50 V  
-70  
2
T
GG  
t
Breakdown time  
Forward voltage  
I = -18 A, I3124 impulse generator, V  
< -50 V  
µs  
(BR)  
T
(BR)  
I = 0.6 A, t = 500 µs, V = -50 V  
3
5
F
w
GG  
V
V
F
I = 18 A, t = 500 µs, V = -50 V  
F
w
GG  
I = 20 A, IEC 61000-4-5:1995 combination impulse generator,  
15  
F
Peak forward recovery  
voltage  
V
V
= -50 V  
V
FRM  
GG  
I = 18 A, I3124 impulse generator, V = -50 V  
15  
F
GG  
I = 18 A, I3124 impulse generator,  
V > 10 V  
V > 5 V  
F
2
4
F
F
t
Forward recovery time  
Holding current  
µs  
FR  
V
= -50 V  
GG  
I
I = -1 A, di/dt = 1A/ms, V = -50 V, T = 85 °C  
-150  
mA  
µA  
µA  
H
T
GG  
J
T = 25 °C  
-5  
J
I
Gate reverse current  
V
= V  
, V = 0  
GKRM AK  
GKS  
GG  
T = 85 °C  
-50  
J
Gate reverse current,  
on state  
I
I = -0.6 A, t = 500 µs, V = -50 V  
-1  
mA  
GAT  
T
w
GG  
Gate reverse current,  
forward conducting  
state  
I
I
I = 0.6 A, t = 500 µs, V = -50 V  
-40  
mA  
GAF  
F
w
GG  
Gate trigger current  
Gate trigger voltage  
I = -5 A, t  
20 µs, V = -50 V  
5
mA  
V
GT  
T
p(g)  
GG  
V
I = -5 A, t  
20 µs, V = -50 V  
2.5  
100  
60  
GT  
T
p(g)  
GG  
V
= -3 V  
pF  
pF  
Anode-cathode off-  
state capacitance  
D
C
f = 1 MHz, V = 1 V, I = 0, (see Note 3)  
d G  
AK  
V
= -50 V  
D
NOTE 3: These capacitance measurements employ a three terminal capacitance bridge incorporating a guard circuit. The unmeasured  
device terminals are a.c. connected to the guard terminal of the bridge.  
Thermal Characteristics  
Parameter  
Test Conditions  
Min.  
Typ.  
Max.  
Unit  
2
RθJA  
Junction to free air thermal resistance  
P
= 0.52 W, T = 85 °C, 5 cm , FR4 PCB  
160  
°C/W  
tot  
A
JUNE 1998 - REVISED JULY 2008  
Specifications are subject to change without notice.  
Customers should verify actual device performance in their specific applications.  
TISP6NTP2A Programmable Protector  
Parameter Measurement Information  
PRINCIPAL TERMINAL V-I CHARACTERISTIC  
GATE TRANSFER  
CHARACTERISTIC  
+i  
+iK  
Quadrant I  
IFSP (= |ITSP|)  
Forward  
Conduction  
Characteristic  
IFSM (= |ITSM|)  
IF  
IF  
VF  
VGK(BO)  
IGT  
VGG  
VD  
+v  
-iG  
+iG  
-v  
ID  
IGAF  
I(BO)  
IH  
IS  
VT  
IGAT  
VS  
V(BO)  
IT  
IT  
ITSM  
IG  
Quadrant III  
Switching  
IK  
ITSP  
Characteristic  
-i  
-iK  
PM6XAIA  
Figure 1. Principal Terminal And Gate Transfer Characteristics  
JUNE 1998 - REVISED JULY 2008  
Specifications are subject to change without notice.  
Customers should verify actual device performance in their specific applications.  
TISP6NTP2A Programmable Protector  
APPLICATIONS INFORMATION  
Operation of Gated Protectors  
Figure 2 and Figure 3 show how the TISP6NTP2A limits overvoltages. The TISP6NTP2A thyristor sections limit negative overvoltages and the  
diode sections limit positive overvoltages.  
SLIC  
SLIC  
PROTECTOR  
PROTECTOR  
R1A  
R1B  
R2A  
R2B  
R1A  
R1B  
R2A  
R2B  
SLIC 1  
SLIC 1  
VBAT1  
VBAT1  
0 V  
0 V  
C1  
100 nF  
C1  
100 nF  
TISP6NTP2A  
TISP6NTP2A  
SLIC 2  
SLIC 2  
IK  
IF  
IG  
IG  
VBAT2  
VBAT2  
0 V  
0 V  
C2  
100 nF  
C2  
100 nF  
AI6XBN  
AI6XBO  
Figure 3. Positive Overvoltage Condition  
Figure 2. Negative Overvoltage Condition  
Negative overvoltages (Figure 2) are initially clipped close to the SLIC negative supply rail value (V  
base-emitter and the thyristor gate-cathode junctions. If sufficient current is available from the overvoltage, then the thyristor will crowbar into  
a low voltage ground referenced on-state condition. As the overvoltage subsides, the high holding current of the crowbar thyristor prevents  
) by the conduction of the transistor  
BAT  
d.c. latchup. The common gate of each thyristor pair is connected the appropriate SLIC battery feed voltage (V  
or V  
).  
BAT1  
BAT2  
The negative protection voltage, V  
, will be the sum of the gate supply (V  
BAT  
) and the peak gate (terminal)-cathode voltage (V ). Under  
GT  
(BO)  
a.c. overvoltage conditions V  
and sink current loading on the V  
will be less than 2.5 V. The integrated transistor buffer in the TISP6NTP2A greatly reduces protectors source  
supply. Without the transistor, the thyristor gate current would charge the V supply. An electronic  
GT  
BAT  
BAT  
power supply is not usually designed to be charged like a battery. As a result, the electronic supply would switch off and the thyristor gate  
current would provide the SLIC supply current. Normally the SLIC current would be less than the gate current, which would cause the supply  
voltage to increase and destroy the SLIC by a supply overvoltage. The integrated transistor buffer removes this problem.  
Fast rising impulses will cause short term overshoots in gate-cathode voltage. The negative protection voltage under impulse conditions will  
also be increased if there is a long connection between the gate decoupling capacitor and the gate terminal. During the initial rise of a fast  
impulse, the gate current (I ) is the same as the cathode current (I ). Rates of 60 A/µs can cause inductive voltages of 0.6 V in 2.5 cm of  
G
K
printed wiring track. To minimize this inductive voltage increase of protection voltage, the length of the capacitor to gate terminal tracking  
should be minimized.  
JUNE 1998 - REVISED JULY 2008  
Specifications are subject to change without notice.  
Customers should verify actual device performance in their specific applications.  
TISP6NTP2A Programmable Protector  
APPLICATIONS INFORMATION  
Operation of Gated Protectors (continued)  
Positive overvoltages (Figure 3) are clipped to ground by forward conduction of the diode section in the TISP6NTP2A. Fast rising impulses will  
cause short term overshoots in forward voltage (V  
).  
FRM  
Central Office Application to Bellcore GR-1089-Core Issue 1  
The most stressful impulse for first-level surge testing (section 4.5.7) is the 1000 V, 10/1000 impulse. To limit the circuit current to the  
TISP6NTP2A rating of 20 A requires the total circuit resistance to be 1000/20 = 50 . Subtracting the generator fictive source impedance of  
10 gives 40 as the required series resistor value for the TISP6NTP2A (R1A, R1B, R2A and R2B). The various first level impulse current  
levels are shown in table 1. The maximum 1.2/50 and 2/10 current levels of 56 A are below the TISP6NTP2A ratings of 60 A and 85 A. In table  
1, the designation 2x20 means that each conductor has a simultaneous peak current of 20 A and 2x20 = 40 A flows in the anode (ground)  
connection.  
Ta ble 1. First-level Surge Currents  
To t a l S e r ie s  
Resistance  
I
T
Open-circuit Voltage  
V
Short-circuit Current  
A
Generator Resistance  
Waveshape  
WiresTested  
A
2/10  
2500  
2500  
500  
500  
5
Both  
Single  
Both  
22.5  
45  
2x56  
56  
1.2/50  
8/20  
2 + 3/Wire  
28.5  
50  
2x53  
20  
Single  
Both  
10/1000  
1000  
100  
10  
25  
2x20  
Central Office Application to ITU-T Recommendation K.20  
The test level of 1000 V 10/700 delivers a peak short-circuit current level of 25 A, which is equal to the TISP6NTP2A rated value. A series  
resistor (R1A, R1B, R2A and R2B) is required to ensure coordinated operation with the primary protector at the 4000 V test level. The resistor  
value will be set by the sparkover voltage of the primary protector. A sparkover voltage of 300 V will give a 300/25 = 12 series resistor.  
Local Subscribers Line Equipment to ITU-T Recommendation K.21  
The test level of 1500 V 10/700 delivers a peak short-circuit current level of 37.5 A. To limit the circuit current to the TISP6NTP2A rating of 25 A  
requires the total circuit resistance to be 1500/25 = 60 . Subtracting the generator fictive source impedance of 40 gives 20 as the  
required series resistor value for the TISP6NTP2A. Even at the 1500 V test level, this resistor develops 25x20 = 500 V, which should ensure the  
coordination with the primary protector sparkover.  
JUNE 1998 - REVISED JULY 2008  
Specifications are subject to change without notice.  
Customers should verify actual device performance in their specific applications.  
TISP6NTP2A Programmable Protector  
APPLICATIONS INFORMATION  
Indoor POTS Lines to ITU-T Recommendation K.21. K.22 and IEC 61000-4-5: 1995  
Internal POTS lines from WILL and ISDN-TA equipment are in a relatively unexposed environment. If these lines are galvanically isolated  
(floating), the return path for any induced surges can only be through equipment capacitance or insulation breakdown.  
The most stressful condition would be when the POTS lines are not galvanically isolated. Such a case is when an ISDN-TA has a common  
connection between the incoming ISDN line and the internal POTS lines. The ISDN line is likely to be ground referenced and may have primary  
protection at the subscriber connection. If the primary protection operates, it provides a direct return to ground.  
ITU-T recommendation K.22 for a floating 4-conductor T/S bus uses a 1 kV 1.2/50 or 2/10 impulse, capacitively coupled via 8 nF to the bus  
conductors. Very little circulating current is likely to flow during K.22 testing. If the T/S bus has a ground return, then the testing changes to  
ITU-T recommendation K.21. The required series resistor values for K.21 and the TISP6NTP2A have been calculated earlier.  
In IEC 61000-4-5: 1995 the highest specified test level is class 5. For unshielded symmetrically operated lines, class 5 testing uses a 4000 V  
combination wave (1.2/50, 8/20) generator to apply a simultaneous impulse to all conductors. For the four conductors of the two POTS lines,  
the currents are equalized by the use of specified 160 feed resistors. As the generator fictive source impedance is 2 , the peak current in  
each conductor is 4000/(2x4 + 160) = 24 A. This is less than the 60 A TISP6NTP2A rating.  
If the lines are long and exit the building, testing is done with a 10/700 generator. In this case the feed resistors are 100 and the fictive  
impedance is 15 . The peak current in each conductor will be 4000/(15x4 + 100) = 25 A. This value is the same as the TISP6NTP2A rating.  
As the equipment connected to the POTS line may have uncoordinated protection, it is desirable to provided the ring-tip pair current sharing to  
the TISP6NTP2A by series resistors (R1A, R1B, R2A and R2B). A value of 4 should be sufficient to ensure sharing.  
“TISP” is a trademark of Bourns, Ltd., a Bourns Company, and is Registered in U.S. Patent and Trademark Office.  
“Bourns” is a registered trademark of Bourns, Inc. in the U.S. and other countries.  
JUNE 1998 - REVISED JULY 2008  
Specifications are subject to change without notice.  
Customers should verify actual device performance in their specific applications.  

相关型号:

TISP6NTP2B

QUAD FORWARD-CONDUCTING BUFFERED P-GATE THYRISTORS
ETC

TISP6NTP2BD

暂无描述
BOURNS

TISP6NTP2BD-S

Surge Protection Circuit, PDSO8, ROHS COMPLIANT, PLASTIC, MS-012, SO-8
BOURNS

TISP6NTP2BDR

TELECOM, SURGE PROTECTION CIRCUIT, PDSO8, PLASTIC, SO-8
TI

TISP6NTP2BDR

Surge Protection Circuit, PDSO8, PLASTIC, MS-012, SO-8
BOURNS

TISP6NTP2BDR-S

Surge Protection Circuit, PDSO8, ROHS COMPLIANT, PLASTIC, MS-012, SO-8
BOURNS

TISP6NTP2C

High Voltage Ringing SLIC Protector
BOURNS

TISP6NTP2CD

High Voltage Ringing SLIC Protector
BOURNS

TISP6NTP2CD-S

High Voltage Ringing SLIC Protector
BOURNS

TISP6NTP2CDR

High Voltage Ringing SLIC Protector
BOURNS

TISP6NTP2CDR-S

High Voltage Ringing SLIC Protector
BOURNS

TISP6NTP2C_07

TISP6NTP2C High Voltage Ringing SLIC Protector
BOURNS