AOB240L [AOS]
40V N-Channel MOSFET; 40V N沟道MOSFET型号: | AOB240L |
厂家: | ALPHA & OMEGA SEMICONDUCTORS |
描述: | 40V N-Channel MOSFET |
文件: | 总7页 (文件大小:360K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
AOT240L/AOB240L/AOTF240L
40V N-Channel MOSFET
General Description
Product Summary
VDS
The AOT240L & AOB240L & AOTF240L uses Trench
MOSFET technology that is uniquely optimized to provide
the most efficient high frequency switching performance.
Power losses are minimized due to an extremely low
combination of RDS(ON) and Crss.
40V
ID (at VGS=10V)
RDS(ON) (at VGS=10V)
RDS(ON) (at VGS=4.5V)
105A/85A
< 2.9mΩ (< 2.6mΩ )
< 3.7mΩ (< 3.5mΩ )
100% UIS Tested
100% Rg Tested
Top View
TO-263
D2PAK
D
TO-220
TO-220F
D
G
S
S
S
S
D
D
G
G
G
AOT240L
AOTF240L
AOB240L
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Symbol
AOT240L/AOB240L
AOTF240L
Units
Drain-Source Voltage
VDS
40
V
V
Gate-Source Voltage
VGS
±20
TC=25°C
105
82
85
60
Continuous Drain
Current G
ID
TC=100°C
A
Pulsed Drain Current C
IDM
400
20
TA=25°C
TA=70°C
Continuous Drain
Current
IDSM
A
16
Avalanche Current C
IAS
68
A
Avalanche energy L=0.1mH C
EAS
231
mJ
TC=25°C
Power Dissipation B
TC=100°C
176
88
41
20
PD
W
TA=25°C
1.9
1.2
PDSM
W
°C
Power Dissipation A
TA=70°C
Junction and Storage Temperature Range
TJ, TSTG
-55 to 175
Thermal Characteristics
Parameter
Symbol
AOT240L/AOB240L
AOTF240L
Units
°C/W
°C/W
°C/W
Maximum Junction-to-Ambient A
Maximum Junction-to-Ambient A D
Maximum Junction-to-Case
t
≤ 10s
15
65
15
65
RθJA
Steady-State
Steady-State
RθJC
0.85
3.6
* Surface mount package TO263
Rev 1 : Dec. 2011
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Page 1 of 7
AOT240L/AOB240L/AOTF240L
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max Units
STATIC PARAMETERS
ID=250µA, VGS=0V
BVDSS
Drain-Source Breakdown Voltage
40
V
VDS=40V, VGS=0V
1
IDSS
Zero Gate Voltage Drain Current
µA
5
TJ=55°C
VDS=0V, VGS=±20V
VDS=VGS,ID=250µA
VGS=10V, VDS=5V
VGS=10V, ID=20A
TO220/TO220F
IGSS
Gate-Body leakage current
Gate Threshold Voltage
On state drain current
±100
2.2
nA
V
VGS(th)
ID(ON)
1
1.7
400
A
2.4
3.7
2.9
4.7
mΩ
mΩ
mΩ
mΩ
TJ=125°C
VGS=4.5V, ID=20A
3
3.7
2.6
3.5
TO220/TO220F
VGS=10V, ID=20A
RDS(ON)
Static Drain-Source On-Resistance
2.1
2.7
TO263
VGS=4.5V, ID=20A
TO263
VDS=5V, ID=20A
gFS
VSD
IS
Forward Transconductance
Diode Forward Voltage
78
S
V
A
IS=1A,VGS=0V
Maximum Body-Diode Continuous Current G
0.65
1
105
DYNAMIC PARAMETERS
Ciss
Coss
Crss
Rg
Input Capacitance
3510
1070
68
pF
pF
pF
Ω
VGS=0V, VDS=20V, f=1MHz
Output Capacitance
Reverse Transfer Capacitance
Gate resistance
VGS=0V, VDS=0V, f=1MHz
VGS=10V, VDS=20V, ID=20A
VGS=10V, VDS=20V, RL=1Ω,
0.5
1
1.5
SWITCHING PARAMETERS
Qg(10V) Total Gate Charge
49
22
9
72
32
nC
nC
nC
nC
ns
Qg(4.5V) Total Gate Charge
Qgs
Qgd
tD(on)
tr
Gate Source Charge
Gate Drain Charge
Turn-On DelayTime
Turn-On Rise Time
Turn-Off DelayTime
Turn-Off Fall Time
7
11
10
38
11
ns
RGEN=3Ω
tD(off)
tf
ns
ns
trr
IF=20A, dI/dt=500A/µs
IF=20A, dI/dt=500A/µs
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
21
58
ns
Qrr
nC
A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application
depends on the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allows it.
B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C. Ratings are based on low frequency and duty cycles to keep
initial TJ =25°C.
D. The RθJA is the sum of the thermal impedance from junction to case RθJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedance which is measured with the device mounted to a large heatsink,
assuming a maximum junction temperature of TJ(MAX)=175°C. The SOA curve provides a single pulse rating.
G. The maximum current limited by package.
H. These tests are performed with the device mounted on 1 in2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C.
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Rev 1 : Dec. 2011
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Page 2 of 7
AOT240L/AOB240L/AOTF240L
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
100
80
60
40
20
0
100
80
60
40
20
0
3.5V
7V
10V
VDS=5V
3V
125°C
25°C
Vgs=2.5V
4
1
1.5
2
2.5
3
3.5
4
0
1
2
3
5
VGS(Volts)
VDS (Volts)
Fig 1: On-Region Characteristics (Note E)
Figure 2: Transfer Characteristics (Note E)
8
6
4
2
0
2
1.8
1.6
1.4
1.2
1
VGS=10V
ID=20A
VGS=4.5V
VGS=10V
VGS=4.5V
ID=20A
0.8
0
5
10
15
ID (A)
20
25
30
0
25
50
75
100 125 150 175 200
Temperature (°C)
Figure 3: On-Resistance vs. Drain Current and Gate
Voltage (Note E)
Figure 4: On-Resistance vs. Junction Temperature
(Note E)
8
6
4
2
0
1.0E+02
1.0E+01
ID=20A
1.0E+00
125°C
125°C
1.0E-01
1.0E-02
1.0E-03
1.0E-04
1.0E-05
25°C
25°C
0.0
0.2
0.4
VSD (Volts)
Figure 6: Body-Diode Characteristics (Note E)
0.6
0.8
1.0
1.2
2
4
6
8
10
VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
Rev 1 : Dec. 2011
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Page 3 of 7
AOT240L/AOB240L/AOTF240L
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
10
5000
VDS=20V
ID=20A
Ciss
8
4000
3000
2000
1000
0
6
4
Coss
2
Crss
0
0
10
20
Qg (nC)
30
40
50
0
10
20
30
40
VDS (Volts)
Figure 8: Capacitance Characteristics
Figure 7: Gate-Charge Characteristics
600
500
400
300
200
100
1000.0
100.0
10.0
1.0
TJ(Max)=175°C
TC=25°C
10µs
RDS(ON)
100µs
1ms
10ms
DC
TJ(Max)=175°C
TC=25°C
0.1
0.0
0.01
0.1
1
10
100
0.001
0.01
0.1
Pulse Width (s)
1
10
VDS (Volts)
Figure 9: Maximum Forward Biased Safe Operating
Area for AOT240L and AOB240L (Note F)
Figure 10: Single Pulse Power Rating Junction-to-Case
for AOT240L and AOB240L (Note F)
10
1
D=Ton/T
TJ,PK=TC+PDM.ZθJC.RθJC
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
RθJC=0.85°C/W
PD
0.1
0.01
Single Pulse
Ton
T
0.00001
0.0001
0.001
0.01
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance for AOT240L and AOB240L (Note F)
0.1
1
10
Rev 1 : Dec. 2011
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Page 4 of 7
AOT240L/AOB240L/AOTF240L
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
600
1000.0
100.0
10.0
1.0
TJ(Max)=175°C
TC=25°C
10µs
500
400
300
200
100
0
RDS(ON)
100µs
1ms
10ms
DC
TJ(Max)=175°C
TC=25°C
0.1
0.0
0.01
0.1
1
10
100
0.001
0.01
0.1
1
10
100
1000
VDS (Volts)
Pulse Width (s)
Figure 13: Single Pulse Power Rating Junction-to-Case
Figure 12: Maximum Forward Biased
Safe Operating Area for AOTF240L
for AOTF240L (Note F)
10
1
D=Ton/T
TJ,PK=TC+PDM.ZθJC.RθJC
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
RθJC=3.6°C/W
0.1
0.01
P
Single Pulse
T
T
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
Pulse Width (s)
Figure 14: Normalized Maximum Transient Thermal Impedance for AOTF240L (Note F)
Rev 1 : Dec. 2011
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Page 5 of 7
AOT240L/AOB240L/AOTF240L
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
1000
200
150
TA=25°C
TA=100°C
100
100
50
0
TA=150°C
TA=125°C
10
1
10
100
1000
0
25
50
75
TCASE (°C)
Figure 16: Power De-rating (Note F)
100
125
150
175
Time in avalanche, tA (µs)
Figure 15: Single Pulse Avalanche capability
(Note C)
120
1000
100
10
TA=25°C
100
80
60
40
20
0
1
0
25
50
75
100
125
150
175
0.00001
0.001
0.1
10
1000
TCASE (°C)
Pulse Width (s)
Figure 17: Current De-rating (Note F)
Figure 18: Single Pulse Power Rating Junction-to-
Ambient (Note H)
10
1
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
RθJA=65°C/W
0.1
PD
0.01
Single Pulse
1
Ton
T
0.001
0.01
0.1
10
100
1000
Pulse Width (s)
Figure 19: Normalized Maximum Transient Thermal Impedance (Note H)
Rev 1 : Dec. 2011
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Page 6 of 7
AOT240L/AOB240L/AOTF240L
Gate Charge Test Circuit & Waveform
Vgs
Qg
10V
+
VDC
+
Qgs
Qgd
Vds
VDC
-
-
DUT
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
Vds
90%
10%
+
DUT
Vdd
Vgs
VDC
Rg
-
Vgs
Vgs
td(on)
t
r
td(off)
t
f
ton
toff
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
L
EAR= 1/2 LIA2R
BVDSS
Vds
Id
Vgs
Vds
+
Vgs
Vdd
I AR
VDC
Id
Rg
-
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Qrr = - Idt
Vds +
Vds -
Ig
DUT
Vgs
trr
L
Isd
I F
Isd
Vgs
dI/dt
I RM
+
Vdd
VDC
Vdd
-
Vds
Rev 1 : Dec. 2011
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Page 7 of 7
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