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AWT6172RM33P8 [ANADIGICS]

GSM/GPRS/EDGE Power Amplifier Module with Integrated Power Control; GSM / GPRS / EDGE功率放大器模块集成功率控制
AWT6172RM33P8
型号： AWT6172RM33P8
厂家： ANADIGICS, INC    ANADIGICS, INC
描述：

GSM/GPRS/EDGE Power Amplifier Module with Integrated Power Control
GSM / GPRS / EDGE功率放大器模块集成功率控制

放大器 射频 微波 功率控制 功率放大器 GSM 高功率电源
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ꢁWt6172  
GSM/GPRS/EDGE Power Amplifier  
Module wiꢄh Inꢄegraꢄed Power Conꢄrol  
PꢃꢀLIMINꢁꢃY Dꢁtꢁ sHꢀꢀt - ꢃꢀv 1.4  
PꢃODꢂCt DꢀsCꢃIPtION  
Fꢀꢁtꢂꢃꢀs  
This quad band power amplifier module supports dual,  
tri and quad band applications for both GMSK and  
8-PSK modulation schemes. There are two amplifier  
chains, one to support GSM850/900 bands, the other  
for DCS/PCS bands.  
•ꢀ InGaP HBT Technology  
•ꢀ Low profile 1.1 mm  
•ꢀ Small Package Outline 6 mm x 6 mm  
•ꢀ EGPRS Capable (class 12)  
•ꢀ Integrated Reference Voltage  
GMsK MODꢀ  
The module includes an integrated power control  
scheme for use in the GMSK mode. This facilitates  
fast and easy production calibration and reduces the  
number of external components required to complete  
a power control function. The amplifier’s power control  
range is typically 55 dB, with the output power set by  
applying an analog voltage to VRAMP.  
•ꢀ Integrated power control (CMOS)  
•ꢀ +35 dBm GSM850/900 Output Power  
•
+33 dBm DCS/PCS Output Power  
•ꢀ 55 % GSM850/900 PAE  
52 % DCS/PCS PAE  
•
•ꢀ Power control range > 50 dB  
ꢀDGꢀ MODꢀ  
•
•
+28.5 dBm GSM850/900 Output Power  
+27.5 dBm DCS/PCS Output Power  
In EDGE mode, the VRAMP pin is disabled and no spe-  
cific voltage is required for proper operation. Output  
power is controlled by varying the input power.  
•ꢀ -66 dBc Typical ACPR (400 kHz)  
•ꢀ -78 dBc Typical ACPR (600 kHz)  
All of the RF ports for this device are internally matched  
to 50Ω.  
ꢁPPLICꢁtIONs  
•
Dual/Tri/Quad Band Handsets, PDAs and Data  
Devices  
DCS/PCS_OUT  
DCS/PCS_IN  
GSM850/900_OUT  
GSM850/900_IN  
Figure 1: Block Diagram  
02/2009  
ꢁWt6172  
DCS/PCS_IN  
BS  
DCS/PCS_OUT  
GSM850/900_IN  
GSM850/900_OUT  
Figure 2: Pinouꢄ (X - ray top view)  
2
PRELIMINARY DATA SHEET - Rev 1.4  
02/2009  
ꢁWt6172  
table 1: Pin Deꢅcripꢄion  
DꢀsCꢃIPtION  
PIN  
NꢁMꢀ  
RF input to the DCS/PCS PA. There is a 175 shunt resistor before the DC  
blocking capacitor to set the input impedance  
1
DCS/PCS_IN  
Band select logic pin. Logic low selects the GSM PA and a logic high selects  
the DCS/PCS PA  
2
BS  
3
TX_EN  
TX enable logic pin, a logic high will enable the PA  
Battery supply connection  
4
V
BATT  
Logic pin for selection of GMSK or 8PSK (EDGE) mode. A logic low selects  
GMSK mode and a logic high selects the 8PSK mode  
5
V
MODE  
RAMP  
6
7
V
Analog output power control pin  
GSM850/900_IN RF input to GSM850/900 PA.  
V
BIAS logic input. A logic low sets a low bias point for current savings at low  
8
V
BIAS  
power levels, a logic high sets a high bias point for meeting linearity  
perfomance up to the maximum specified linear ouptut power  
9
GND  
GND  
Ground  
Ground  
10  
11 GSM850/900_OUT RF output for GSM850/900 bands (DC blocked)  
12  
13  
14  
15  
16  
17  
18  
19  
20  
GND  
GND  
GND  
GND  
GND  
Ground  
Ground  
Ground  
Ground  
Ground  
DCS/PCS_OUT RF output for DCS/PCS bands (DC blocked)  
GND  
GND  
GND  
Ground  
Ground  
Ground  
3
PRELIMINARY DATA SHEET - Rev 1.4  
02/2009  
ꢁWt6172  
ꢀLꢀCtꢃICꢁL CHꢁꢃꢁCtꢀꢃIstICs  
table 2: ꢁbꢅoluꢄe Maximum ꢃaꢄingꢅ  
PꢁꢃꢁMꢀtꢀꢃ  
MIN  
-0.5  
-
MꢁX  
+6  
ꢂNIts  
V
Supply Voltage (VBATT)  
RF Input Power (RFIN)  
Control Voltage (VRAMP)  
Storage Temperature (TSTG)  
12  
dBm  
V
-0.3  
3.0  
-55  
150  
°C  
sꢄreꢅꢅeꢅ in exceꢅꢅ of ꢄhe abꢅoluꢄe raꢄingꢅ may cauꢅe permanenꢄ  
damage. Funcꢄional operaꢄion iꢅ noꢄ implied under ꢄheꢅe  
condiꢄionꢅ. ꢀxpoꢅure ꢄo abꢅoluꢄe raꢄingꢅ for exꢄended periodꢅ  
of ꢄime may adꢆerꢅely affecꢄ reliabiliꢄy.  
table 3: ꢀsD ꢃaꢄingꢅ  
PꢁꢃꢁMꢀtꢀꢃ  
MꢀtHOD  
HBM  
ꢃꢁtING  
2.5  
ꢂNIt  
kV  
ESD Threshold voltage (RF ports)  
ESD Threshold voltage (control inputs)  
HBM  
2.5  
kV  
ꢁlꢄhough proꢄecꢄion circuiꢄry haꢅ been deꢅigned inꢄo ꢄhiꢅ deꢆice, proper precauꢄionꢅ  
ꢅhould be ꢄaken ꢄo aꢆoid expoꢅure ꢄo elecꢄroꢅꢄaꢄic diꢅcharge (ꢀsD) during handling and  
mounꢄing. Human body model HBM employed iꢅ reꢅiꢅꢄance = 1500Ω, capaciꢄance = 100pF.  
table 4: Digiꢄal Inpuꢄꢅ  
PꢁꢃꢁMꢀtꢀꢃ  
sYMBOL  
MIN tYP MꢁX ꢂNIts  
Logic High Voltage  
Logic Low Voltage  
Logic High Current  
Logic Low Current  
V
IH  
1.2  
-
-
-
-
3.0  
0.5  
30  
V
V
IL  
-0.5  
V
A  
A  
|IIH  
|
-
-
|IIL  
|
30  
4
PRELIMINARY DATA SHEET - Rev 1.4  
02/2009  
ꢁWt6172  
table 5: Logic Conꢄrol table  
OPꢀꢃꢁtIONꢁL MODꢀ  
vMODꢀ  
Bs  
tX_ꢀN  
vBIꢁs  
NOtꢀs  
VRAMP Controls Output  
Power, X = Don't Care  
GSM850/900 GMSK  
LOW  
LOW  
HIGH  
X
VRAMP Controls Output  
Power, X = Don't Care  
DCS/PCS GMSK  
GSM850/900 EDGE  
DCS/PCS EDGE  
LOW  
HIGH  
HIGH  
HIGH  
HIGH  
LOW  
HIGH  
LOW  
HIGH  
HIGH  
HIGH  
HIGH  
X
VRAMP Control Disabled,  
Fixed Gain PA  
HIGH  
HIGH  
LOW  
VRAMP Control Disabled,  
Fixed Gain PA  
GSM850/900 EDGE (Low Power  
Levels) (1)  
VRAMP Control Disabled,  
Fixed Gain PA  
DCS/PCS EDGE (Low Power  
Levels) (2)  
VRAMP Control Disabled,  
Fixed Gain PA  
HIGH  
X
HIGH  
X
HIGH  
LOW  
PA DISABLED  
LOW  
X
X = Don't Care  
Notes:  
(1) POUT +20 dBm.  
(2) POUT +19 dBm.  
5
PRELIMINARY DATA SHEET - Rev 1.4  
02/2009  
ꢁWt6172  
table 6: Operaꢄing ꢃangeꢅ  
sYMBOL  
PꢁꢃꢁMꢀtꢀꢃ  
Case temperature  
Supply voltage  
Control voltage  
MIN tYP MꢁX ꢂNIts  
TC  
-20  
3.2  
-
3.6  
-
85  
4.5  
2.2  
°C  
V
V
BATT  
V
RAMP  
0.25  
V
V
BATT = 4.5 V,  
Power supply leakage current  
A  
V
RAMP = 0 V, TX_EN = LOW  
No RF applied  
-
-
5
V
V
RAMP Input Capacitance  
RAMP Input Current  
-
-
-
-
3
-
-
pF  
A  
10  
P
OUT = -10 dBm YPMAX  
s  
s  
s  
Rise Time (TRISE  
)
-
-
-
0.4  
0.5  
0.4  
1
1
1
(within 0.2 dB)  
P
OUT = PMAX Y-10 dBm  
Fall Time (TFALL  
)
(within 0.2 dB)  
GMSK YEDGE  
EDGE YGMSK  
Mode Switch  
High Power YLow Power  
Low Power YHigh Power  
s  
V
BIAS Switch  
-
-
-
-
1
Duty Cycle  
-
50  
%
6
PRELIMINARY DATA SHEET - Rev 1.4  
02/2009  
ꢁWt6172  
table 7: ꢀlecꢄrical Characꢄeriꢅꢄicꢅ for GsM850 GMsK Mode  
Unless otherwise specified: VBATT = 3.6 v, PIN = +2.0 dBm, Pulꢅe Widꢄh =1154µꢅ, Duꢄy Cycle 25%,  
ZIN = ZOUT = 50Ω, tC = 25 °C, vRAMP = 2.2 v, Bs = LOW, tX_ꢀN = HIGH, vMODꢀ = LOW  
PꢁꢃꢁMꢀtꢀꢃ  
MIN  
824  
0
tYP  
-
MꢁX  
849  
+4  
ꢂNIt  
MHz  
dBm  
dBm  
COMMꢀNts  
Operating Frequency  
Input Power  
( Fo )  
+2  
Output Power, PMAX  
34.5  
35.1  
-
V
P
BATT = 3.2 V, T  
IN = 0 dBm  
C
= +85 °C  
Degraded Output Power  
32.5  
33.5  
-
dBm  
PAE @ PMAX  
47  
54  
-
%
Forward Isolation 1  
-
-45  
-30  
dBm  
TX_EN = LOW, PIN = +4 dBm  
TX_EN = HIGH, VRAMP = 0.25 V,  
Forward Isolation 2  
Cross Isolation  
-
-28  
-10  
dBm  
dBm  
P
IN = +4 dBm  
F
2F  
o
@ DCS/PCS port  
, 3F @ DCS/PCS port  
-
-
-2  
-22  
+2  
-16  
P
OUT 34.5 dBm  
o
o
Harmonics  
Second Harmonic (2F  
o
)
-
-
-
-21  
-20  
-20  
-10  
-10  
-8  
P
OUT 34.5 dBm  
Third Harmonic (3F  
4F to 15F  
o
)
dBm  
o
o
Output Load VSWR = 6:1, All Phases POUT 34.5 dBm  
Stability (all spurious)  
Ruggedness  
-
-
-
-
-36  
-30  
dBm  
dBm  
F
F
OUT < 1 GHz, RBW = 3 MHz  
OUT > 1 GHz, RBW = 3 MHz  
Load VSWR = 10:1, All Phase Angles;  
OUT 34.5 dBm  
No Degradation, No Damage  
P
F
F
TX = 849 MHz, RBW = 100 kHz  
RX = 869 to 894 MHz, POUT < 34.5 dBm  
RX Noise Power  
Input Return Loss  
-
-
-84  
-81  
dBm  
-
2.5:1 VSWR  
7
PRELIMINARY DATA SHEET - Rev 1.4  
02/2009  
ꢁWt6172  
table 8: ꢀlecꢄrical Characꢄeriꢅꢄicꢅ for GsM900 GMsK Mode  
Unless otherwise specified: VBATT = 3.6 v, PIN = +2.0 dBm, Pulꢅe Widꢄh =1154µꢅ, Duꢄy Cycle 25%,  
ZIN = ZOUT = 50Ω, tC = 25 °C, vRAMP = 2.2 v, Bs = LOW, tX_ꢀN = HIGH, vMODꢀ = LOW  
PꢁꢃꢁMꢀtꢀꢃ  
MIN  
880  
0
tYP  
-
MꢁX  
915  
+4  
ꢂNIt  
MHz  
dBm  
dBm  
COMMꢀNts  
Operating Frequency  
Input Power  
( Fo )  
+2  
Output Power, PMAX  
34.5  
35.1  
-
V
P
BATT = 3.2 V, T  
IN = 0 dBm  
C
= +85 °C  
Degraded Output Power  
32.5  
33.5  
-
dBm  
PAE @ PMAX  
49  
55  
-
%
Forward Isolation 1  
-
-45  
-30  
dBm  
TX_EN = LOW, PIN = +4 dBm  
TX_EN = HIGH, VRAMP = 0.25 V,  
Forward Isolation 2  
Cross Isolation  
-
-27  
-10  
dBm  
dBm  
P
IN = +4 dBm  
F
2F  
o
@ DCS/PCS port  
, 3F @ DCS/PCS port  
-
-
-2  
-21  
+2  
-16  
P
OUT 34.5 dBm  
o
o
Harmonics  
Second Harmonic (2F  
o
)
-
-
-
-21  
-23  
-20  
-10  
-10  
-8  
P
OUT 34.5 dBm  
Third Harmonic (3F  
4F to 15F  
o
)
dBm  
o
o
Output Load VSWR = 6:1, All Phases POUT 34.5 dBm  
Stability (all spurious)  
Ruggedness  
-
-
-
-
-36  
-30  
dBm  
dBm  
F
F
OUT < 1 GHz, RBW = 3 MHz  
OUT > 1 GHz, RBW = 3 MHz  
Load VSWR = 10:1, All Phase Angles;  
OUT 34.5 dBm  
No Degradation, No Damage  
P
RX Noise Power  
10 MHz Offset  
F
F
TX = 915 MHz, RBW = 100 kHz  
RX = 925 to 935 MHz, POUT < 34.5 dBm  
-
-80  
-75  
-81  
dBm  
F
F
TX = 915 MHz, RBW = 100 kHz  
RX = 935 to 960 MHz, POUT < 34.5 dBm  
20 MHz Offset  
-
-
-84  
Input Return Loss  
-
2.5:1 VSWR  
8
PRELIMINARY DATA SHEET - Rev 1.4  
02/2009  
ꢁWt6172  
table 9: ꢀlecꢄrical Characꢄeriꢅꢄicꢅ for GsM850 ꢀDGꢀ Mode  
Unless otherwise specified: VBATT = 3.6 v, Pulꢅe Widꢄh =1154µꢅ, Duꢄy Cycle 25%  
ZIN = ZOUT = 50Ω, tC = 25 °C, Bs = LOW, tX_ꢀN = HIGH, vMODꢀ = HIGH  
PꢁꢃꢁMꢀtꢀꢃ  
MIN  
tYP  
MꢁX ꢂNIt  
COMMꢀNts  
Operating Frequency ( Fo )  
824  
-
849  
MHz  
dBm  
Linear POUT (High Power Mode) 28.5  
Linear POUT (Low Power Mode)  
-
-
-
-
V
V
BIAS = High  
BIAS = Low  
20  
Linear Degraded Output Power  
Meets ACPR and EVM limits specified  
under nominal conditions  
L
L
D
D
_POUT (High Power Mode) (1)  
_POUT (Low Power Mode) (2)  
26  
17.5  
-
-
-
-
dBm  
Linear Gain (High Power Mode) 29.0  
Linear Gain (Low Power Mode) 24.0  
31.5  
28.5  
-0.015  
22  
34.0  
dB  
dB  
V
V
BIAS = High  
BIAS = Low  
34.0  
Gain Variation  
-
-
-
-
-
-
dB/oC -20 oC T  
C
+85 oC  
POUT = 28.5 dBm  
VBIAS = Low  
Power-Added Efficiency  
Icq (Low Power Mode)  
Error Vector Magnitude (EVM)  
%
mA  
%
100  
2
-
5
Linearity  
ACPR1  
ACPR2  
ACPR3  
POUT < 28.5 dBm, BW = 30 kHz  
Fo 200 kHz  
Fo 400 kHz  
-
-
-
-38  
-66  
-79  
-33  
-58  
-64  
dBc  
Fo 600 kHz  
Cross Isolation  
Fo @ DCS/PCS port  
2Fo, 3Fo @ DCS/PCS port  
-
-
-7  
-50  
0
-20  
dBm POUT < 28.5 dBm  
dBm POUT < 28.5 dBm  
Harmonics  
Second Harmonic (2Fo)  
Third Harmonic (3Fo)  
4Fo to 15Fo  
-
-
-
-40  
-35  
-20  
-20  
-15  
-10  
Output Load VSWR = 6:1 All Phases, POUT < 28.5 dBm  
Stability (all spurious)  
-
-
-
-
-36  
-30  
dBm  
dBm  
F
F
OUT < 1 GHz, RBW = 3 MHz  
OUT > 1 GHz, RBW = 3 MHz  
Load VSWR = 10:1, All Phase Angles;  
OUT 28.5 dBm  
Ruggedness  
No Degradation, No Damage  
P
F
F
TX = 849 MHz, RBW = 100 kHz  
RX = 869 to 894MHz, POUT < 28.5 dBm  
RX Noise Power  
-
-
-83  
-80  
dBm  
Input Return Loss  
-
2.5:1 VSWR  
Notes:  
(1) VBIAS = High, VBATT = Range (3.2 V VBATT 4.5 V), Temp = Range (-20 oC TC +85 oC).  
(2) VBIAS = Low, VBATT = Range (3.2 V VBATT 4.5 V), Temp = Range (-20 oC TC +85 oC).  
9
PRELIMINARY DATA SHEET - Rev 1.4  
02/2009  
ꢁWt6172  
table 10: ꢀlecꢄrical Characꢄeriꢅꢄicꢅ for GsM900 ꢀDGꢀ Mode  
Unless otherwise specified: VBATT = 3.6 v, Pulꢅe Widꢄh =1154µꢅ, Duꢄy Cycle 25%  
ZIN = ZOUT = 50Ω, tC = 25 °C, Bs = LOW, tX_ꢀN = HIGH, vMODꢀ = HIGH  
PꢁꢃꢁMꢀtꢀꢃ  
MIN  
tYP  
MꢁX ꢂNIt  
COMMꢀNts  
Operating Frequency  
(
F
o )  
880  
-
915  
MHz  
dBm  
Linear POUT (High Power Mode) 28.5  
Linear POUT (Low Power Mode)  
-
-
-
-
V
V
BIAS = High  
BIAS = Low  
20  
Linear Degraded Output Power  
Meets ACPR and EVM limits specified  
under nominal conditions  
L
L
D
D
_POUT (High Power Mode) (1)  
_POUT (Low Power Mode) (2)  
26  
17.5  
-
-
-
-
dBm  
Linear Gain (High Power Mode) 29.0  
32.0  
29.0  
-0.015  
22  
34.0  
dB  
dB  
V
V
BIAS = High  
BIAS = Low  
Linear Gain (Low Power Mode)  
Gain Variation  
24  
-
34  
-
dB/oC -20 oC T +85 oC  
C
Power-Added Efficiency  
Icq (Low Power Mode)  
Error Vector Magnitude (EVM)  
-
-
%
mA  
%
P
OUT = 28.5 dBm  
BIAS = Low  
-
100  
2
-
V
-
5
Linearity  
ACPR1  
ACPR2  
ACPR3  
P
OUT < 28.5 dBm, BW = 30 kHz  
-
-
-
-36  
-67  
-79  
-33  
-58  
-64  
F
F
F
o
200 kHz  
400 kHz  
600 kHz  
dBc  
o
o
Cross Isolation  
F
2F  
o
@ DCS/PCS port  
, 3F @ DCS/PCS port  
-
-
-7  
-50  
0
-20  
dBm  
dBm  
P
P
OUT < 28.5 dBm  
OUT < 28.5 dBm  
o
o
Harmonics  
Second Harmonic (2F  
Third Harmonic (3F  
4F to 15F  
o
)
-
-
-
-40  
-35  
-20  
-20  
-15  
-10  
o)  
o
o
Output Load VSWR = 6:1 All Phases, POUT < 28.5 dBm  
Stability (all spurious)  
-
-
-
-
-36  
-30  
dBm  
dBm  
F
F
OUT < 1 GHz, RBW = 3 MHz  
OUT > 1 GHz, RBW = 3 MHz  
Load VSWR = 10:1, All Phase Angles;  
OUT 28.5 dBm  
Ruggedness  
No Degradation, No Damage  
P
Notes:  
(1) VBIAS = High, VBATT = Range (3.2 V VBATT 4.5 V), Temp = Range (-20 oC TC +85 oC).  
(2) VBIAS = Low, VBATT = Range (3.2 V VBATT 4.5 V), Temp = Range (-20 oC TC +85 oC).  
10  
PRELIMINARY DATA SHEET - Rev 1.4  
02/2009  
ꢁWt6172  
table 10: ꢀlecꢄrical Characꢄeriꢅꢄicꢅ for GsM900 ꢀDGꢀ Mode (Conꢄinued)  
Unless otherwise specified: VBATT = 3.6 v, Pulꢅe Widꢄh =1154µꢅ, Duꢄy Cycle 25%  
ZIN = ZOUT = 50Ω, tC = 25 °C, Bs = LOW, tX_ꢀN = HIGH, vMODꢀ = HIGH  
PꢁꢃꢁMꢀtꢀꢃ  
MIN tYP MꢁX ꢂNIt  
COMMꢀNts  
RX Noise Power  
10 MHz Offset  
-
-
-80  
-83  
-75  
-80  
dBm  
F
F
F
F
TX = 915 MHz, RBW = 100 kHz  
RX = 925 to 935 MHz, POUT < 28.5 dBm  
TX = 915 MHz, RBW = 100 kHz  
20 MHz Offset  
RX = 935 to 960 MHz, POUT < 28.5 dBm  
Input Return Loss  
-
-
2.5:1 VSWR  
11  
PRELIMINARY DATA SHEET - Rev 1.4  
02/2009  
ꢁWt6172  
table 11: ꢀlecꢄrical Characꢄeriꢅꢄicꢅ for DCs GMsK Mode  
Unless otherwise specified: VBATT = 3.6 v, PIN = +2.0 dBm, Pulꢅe Widꢄh =1154µꢅ, Duꢄy Cycle 25%,  
ZIN = ZOUT = 50Ω, tC = 25 °C, vRAMP = 2.2 v, Bs = HIGH, tX_ꢀN = HIGH, vMODꢀ =LOW  
PꢁꢃꢁMꢀtꢀꢃ  
MIN  
tYP  
MꢁX  
ꢂNIt  
COMMꢀNts  
Operating Frequency  
Input Power  
1710  
0
-
1785  
+4  
MHz  
dBm  
dBm  
+2  
33  
Output Power, PMAX  
32  
-
V
P
BATT = 3.2 V, T  
IN = 0 dBm  
C
= +85 °C  
Degraded Output Power  
29.5  
31  
-
dBm  
PAE @ PMAX  
45  
53  
-
%
Forward Isolation 1  
-
-40  
-30  
dBm  
TX_EN = LOW, PIN = +4 dBm  
TX_EN = HIGH, VRAMP = 0.25 V,  
Forward Isolation 2  
Harmonics  
-
-27  
-10  
dBm  
dBm  
P
IN = +4 dBm  
Second Harmonic (2F  
Third Harmonic (3F  
4F to 15F  
O)  
-
-
-
-23  
-28  
-20  
-10  
-10  
-8  
O)  
P
OUT < 32 dBm  
O
O
Output Load VSWR = 6:1 All Phases , POUT < 32dBm  
Stability (all spurious)  
-
-
-
-
-36  
-30  
dBm  
dBm  
F
F
OUT < 1 GHz, RBW = 3 MHz  
OUT > 1 GHz, RBW = 3 MHz  
Load VSWR = 10:1 All Phase Angles;  
OUT < 32dBm  
Ruggedness  
No Degradation, No Damage  
P
F
F
TX = 1785 MHz, RBW = 100 kHz,  
RX =1805 to 1880 MHz, POUT < 32 dBm  
RX Noise Power  
Input Return Loss  
-
-
-87  
-78  
dBm  
-
2.5:1 VSWR  
12  
PRELIMINARY DATA SHEET - Rev 1.4  
02/2009  
ꢁWt6172  
table 12: ꢀlecꢄrical Characꢄeriꢅꢄicꢅ for PCs GMsK Mode  
Unless otherwise specified: VBATT = 3.6 v, PIN = +2.0 dBm, Pulꢅe Widꢄh =1154µꢅ, Duꢄy Cycle 25%,  
ZIN = ZOUT = 50Ω, tC = 25 °C, vRAMP = 2.2 v, Bs = HIGH, tX_ꢀN = HIGH, vMODꢀ =LOW  
PꢁꢃꢁMꢀtꢀꢃ  
MIN  
1850  
0
tYP  
-
MꢁX  
1910  
+4  
ꢂNIt  
MHz  
dBm  
dBm  
COMMꢀNts  
Operating Frequency  
Input Power  
( Fo )  
+2  
33  
Output Power, PMAX  
32  
-
V
P
BATT = 3.2 V, T  
IN = 0 dBm  
C
= +85 °C  
Degraded Output Power  
29.5  
31  
-
dBm  
PAE @ PMAX  
45  
52  
-
%
Forward Isolation 1  
-
-38  
-30  
dBm  
TX_EN = LOW, PIN = +4 dBm  
TX_EN = HIGH, VRAMP = 0.25 V,  
Forward Isolation 2  
-
-26  
-10  
dBm  
dBm  
P
IN = +4 dBm  
Harmonics  
Second Harmonic (2F  
o
)
-
-
-
-25  
-30  
-20  
-10  
-10  
-8  
P
OUT 32 dBm  
Third Harmonic (3F  
4F to 15F  
o)  
o
o
Output Load VSWR = 6:1, All POUT 32 dBm  
Stability (all spurious)  
Ruggedness  
-
-
-
-
-36  
-30  
dBm  
dBm  
F
F
OUT < 1 GHz, RBW = 3 MHz  
OUT > 1 GHz, RBW = 3 MHz  
Load VSWR = 10:1, All Phase Angles;  
OUT 32 dBm  
No Degradation, No Damage  
P
F
F
TX = 1910 MHz, RBW = 100 kHz  
RX = 1930 to 1990 MHz, POUT < 32 dBm  
RX Noise Power  
Input Return Loss  
-
-
-88  
-79  
dBm  
-
2.5:1 VSWR  
13  
PRELIMINARY DATA SHEET - Rev 1.4  
02/2009  
ꢁWt6172  
table 13: ꢀlecꢄrical Characꢄeriꢅꢄicꢅ for DCs ꢀDGꢀ Mode  
Unless otherwise specified: VBATT = 3.6 v, Pulꢅe Widꢄh =1154µꢅ, Duꢄy Cycle 25%,  
ZIN = ZOUT = 50Ω, tC = 25 °C , Bs =HIGH, tX_ꢀN = HIGH, vMODꢀ = HIGH  
PꢁꢃꢁMꢀtꢀꢃ  
MIN  
tYP  
MꢁX ꢂNIt  
COMMꢀNts  
Operating Frequency  
(
F
o )  
1710  
-
1785 MHz  
Linear POUT (High Power Mode) 27.5  
-
-
-
-
V
V
BIAS = High  
BIAS = Low  
dBm  
Linear POUT (Low Power Mode)  
19  
Linear Degraded Output Power  
Meets ACPR and EVM limits specified  
under nominal conditions  
L
L
D
D
_POUT (High Power Mode) (1)  
_POUT (Low Power Mode) (2)  
25  
16.5  
-
-
-
-
dBm  
Linear Gain (High Power Mode)  
Linear Gain (Low Power Mode)  
Gain Variation  
34  
30  
-
37  
36  
40  
40  
-
dB  
dB  
V
V
BIAS = High  
BIAS = Low  
-0.04  
20  
dB/oC -20 oC T +85 oC  
C
Power-Added Efficiency  
Icq (Low Power Mode)  
-
-
%
mA  
%
P
OUT = 27.5 dBm  
BIAS = Low  
-
120  
2
-
V
Error Vector Magnitude (EVM)  
-
5
Linearity  
ACPR1  
ACPR2  
ACPR3  
P
OUT < 27.5 dBm, BW = 30 kHz  
-
-
-
-39  
-65  
-78  
-33  
-58  
-64  
F
F
F
o
200 kHz  
400 kHz  
600 kHz  
dBc  
o
o
Harmonics  
Second Harmonic (2F  
Third Harmonic (3F  
4F to 7F  
o
)
-
-
-
-38  
-47  
-20  
-20  
-20  
-10  
o
)
dBm  
P
OUT < 27.5 dBm  
o
o
Output Load VSWR = 6:1 All Phases, POUT < 27.5 dBm  
Stability (all spurious)  
-
-
-
-
-36  
-30  
dBm  
dBm  
F
F
OUT < 1 GHz, RBW = 3 MHz  
OUT > 1 GHz, RBW = 3 MHz  
Load VSWR = 10:1, All Phase Angles;  
OUT 27.5 dBm  
Ruggedness  
No Degradation, No Damage  
P
F
F
P
TX = 1785 MHz, RBW = 100 kHz  
RX = 1805 to 1880 MHz  
OUT < 27.5 dBm  
RX Noise Power  
-
-
-81  
-76  
dBm  
Input Return Loss  
-
2.5:1 VSWR  
Notes:  
(1) VBIAS = High, VBATT = Range (3.2 V VBATT 4.5 V), Temp = Range (-20 oC TC +85 oC).  
(2) VBIAS = Low, VBATT = Range (3.2 V VBATT 4.5 V), Temp = Range (-20 oC TC +85 oC).  
14  
PRELIMINARY DATA SHEET - Rev 1.4  
02/2009  
ꢁWt6172  
table 14: ꢀlecꢄrical Characꢄeriꢅꢄicꢅ for PCs ꢀDGꢀ Mode  
Unless otherwise specified: VBATT = 3.6 v, Pulꢅe Widꢄh =1154µꢅ, Duꢄy Cycle 25%,  
ZIN = ZOUT = 50Ω, tC = 25 °C , Bs =HIGH, tX_ꢀN = HIGH, vMODꢀ = HIGH  
PꢁꢃꢁMꢀtꢀꢃ  
MIN  
tYP  
MꢁX ꢂNIt  
COMMꢀNts  
Operating Frequency  
(
F
o )  
1850  
-
1910 MHz  
Linear POUT (High Power Mode) 27.5  
-
-
-
-
V
V
BIAS = High  
BIAS = Low  
dBm  
Linear POUT (Low Power Mode)  
19  
Linear Degraded Output Power  
Meets ACPR and EVM limits specified  
under nominal conditions  
L
L
D
D
_POUT (High Power Mode) (1)  
_POUT (Low Power Mode) (2)  
25  
16.5  
-
-
-
-
dBm  
Linear Gain (High Power Mode) 33.0  
36  
35  
39.5  
dB  
dB  
V
V
BIAS = High  
BIAS = Low  
Linear Gain (Low Power Mode)  
Gain Variation  
29  
-
39  
-
-0.044  
20  
dB/oC -20 oC T +85 oC  
C
Power-Added Efficiency  
Icq (Low Power Mode)  
Error Vector Magnitude (EVM)  
-
-
%
mA  
%
P
OUT = 27.5 dBm  
BIAS = Low  
-
120  
2
-
V
-
5
Linearity  
ACPR1  
ACPR2  
ACPR3  
P
OUT < 27.5 dBm, BW = 30 kHz  
-
-
-
-38  
-64  
-77  
-33  
-57  
-64  
F
F
F
o
200 kHz  
400 kHz  
600 kHz  
o
o
dBc  
Harmonics  
Second Harmonic (2F  
Third Harmonic (3F  
4F to 15F  
o
)
-
-
-
-40  
-46  
-20  
-20  
-20  
-10  
o
)
dBm  
P
OUT < 27.5 dBm  
o
o
Output Load VSWR = 6:1 All Phases, POUT < 27.5 dBm  
Stability (all spurious)  
-
-
-
-
-36  
-30  
dBm  
dBm  
F
F
OUT < 1 GHz, RBW = 3 MHz  
OUT > 1 GHz, RBW = 3 MHz  
Load VSWR = 10:1, All Phase Angles;  
OUT 27.5 dBm  
Ruggedness  
No Degradation, No Damage  
P
RX Noise Power  
-
-82  
-76  
dBm  
F
F
TX = 1910 MHz, RBW = 100 kHz  
RX = 1930 to 1990 MHz  
P
OUT < 27.5 dBm  
Input Return Loss  
-
-
2.5:1 VSWR  
Notes:  
(1) VBIAS = High, VBATT = Range (3.2 V VBATT 4.5 V), Temp = Range (-20 oC TC +85 oC).  
(2) VBIAS = Low, VBATT = Range (3.2 V VBATT 4.5 V), Temp = Range (-20 oC TC +85 oC).  
15  
PRELIMINARY DATA SHEET - Rev 1.4  
02/2009  
ꢁWt6172  
ꢁPPLICꢁtION INFOꢃMꢁtION  
DCS/PCS_OUT  
DCS/PCS_IN  
GSM850/900_IN  
GSM850/900_OUT  
Figure 3: ꢃecommended ꢁpplicaꢄion Circuiꢄ  
16  
PRELIMINARY DATA SHEET - Rev 1.4  
02/2009  
ꢁWt6172  
PꢁCKꢁGꢀ OꢂtLINꢀ  
Figure 4: M33 Package Ouꢄline - 20 Pin 6 mm x 6 mm x 1.1 mm surface Mounꢄ Module  
17  
PRELIMINARY DATA SHEET - Rev 1.4  
02/2009  
ꢁWt6172  
Figure 5: ꢃecommended PCB Fooꢄprinꢄ  
18  
PRELIMINARY DATA SHEET - Rev 1.4  
02/2009  
ꢁWt6172  
Figure 5B: ꢃecommended PCB Fooꢄprinꢄ Noꢄeꢅ  
19  
PRELIMINARY DATA SHEET - Rev 1.4  
02/2009  
ꢁWt6172  
OꢃDꢀꢃING INFOꢃMꢁtION  
OꢃDꢀꢃ  
NꢂMBꢀꢃ  
tꢀMPꢀꢃꢁtꢂꢃꢀ  
PꢁCKꢁGꢀ  
DꢀsCꢃIPtION  
COMPONꢀNt PꢁCKꢁGING  
ꢃꢁNGꢀ  
RoHS-compliant 20 Pin  
AWT6172RM33P8  
AWT6172RM33P9  
-20 °C to +85°C  
6 mm x 6 mm x 1.1 mm Tape and Reel, 2500 pieces per reel  
Surface Mount Module  
RoHS-compliant 20 Pin  
-20 °C to +85°C  
-20 °C to +85°C  
6 mm x 6 mm x 1.1 mm  
Surface Mount Module  
Partial Tape and Reel  
Halogen-free and  
RoHS-compliant 20 pin  
6mm x 6mm x 1.1mm  
Surface Mount Module  
AWT6172HM33P8  
AWT6172HM33P9  
Tape and Reel, 2500 pieces per reel  
Halogen-free and  
RoHS-compliant 20 pin  
6mm x 6mm x 1.1mm  
Surface Mount Module  
-20 °C to +85°C  
Partial Tape and Reel  
ꢁNꢁDIGICs, Inc.  
141 Mount Bethel Road  
Warren, New Jersey 07059, U.S.A.  
Tel: +1 (908) 668-5000  
Fax: +1 (908) 668-5132  
URL: http://www.anadigics.com  
E-mail: Mktg@anadigics.com  
IMPOꢃtꢁNt NOtICꢀ  
ANADIGICS, Inc. reserves the right to make changes to its products or to discontinue any product at any time without notice.  
The product specifications contained in Advanced Product Information sheets and Preliminary Data Sheets are subject to  
change prior to a product’s formal introduction. Information in Data Sheets have been carefully checked and are assumed  
to be reliable; however, ANADIGICS assumes no responsibilities for inaccuracies. ANADIGICS strongly urges customers  
to verify that the information they are using is current before placing orders.  
WꢁꢃNING  
ANADIGICS products are not intended for use in life support appliances, devices or systems. Use of anANADIGICS product  
in any such application without written consent is prohibited.  
20  
PRELIMINARY DATA SHEET - Rev 1.4  
02/2009  

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