AWT6222RM28Q7 [ANADIGICS]

HELP3TM Tri-band US Cellular/Japan Cellular/IMT UMTS/WCDMA Linear Power Amplifier Module; HELP3TM三频美国Cellular /日本蜂窝/ IMT UMTS / WCDMA线性功率放大器模块
AWT6222RM28Q7
型号: AWT6222RM28Q7
厂家: ANADIGICS, INC    ANADIGICS, INC
描述:

HELP3TM Tri-band US Cellular/Japan Cellular/IMT UMTS/WCDMA Linear Power Amplifier Module
HELP3TM三频美国Cellular /日本蜂窝/ IMT UMTS / WCDMA线性功率放大器模块

放大器 射频 微波 功率放大器 CD 蜂窝
文件: 总8页 (文件大小:388K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
AWT6222  
HELP3TM Tri-band  
US Cellular/Japan Cellular/IMT  
UMTS/WCDMA Linear Power Amplifier Module  
Data Sheet - Rev 2.1  
FEATURES  
InGaP HBT Technology  
High Efficiency:  
22 % @ +16 dBm POUT  
(without DC/DC converter)  
40 % @ maximum POUT  
Low Quiescent Current: 8 mA  
Internal Voltage Regulation  
Common VMODE Control Line  
Simplified VCC Bus PCB routing  
Reduced External Component Count  
Low Profile Surface Mount Package: 1 mm  
HSDPA Compliant  
A
W
T6222  
RoHS Compliant Package, 250 oC MSL-3  
APPLICATIONS  
WCDMA/HSPA JCell/IMT Dual-Band Wireless  
Handsets and Data Devices  
M28 Package  
14 Pin 3 mm x 5 mm x 1 mm  
Surface Mount Module  
PRODUCT DESCRIPTION  
The AWT6222 addresses the demand for increased  
integration in dual-band handsets for cellular network  
deployments. The small footprint 3 mm x 5 mm  
x 1 mm surface mount RoHS compliant package  
contains independent RF PA paths to ensure optimal  
performance in both frequency bands, while achieving  
a 25% PCB space savings compared with solutions  
requiring two single-band PAs. The package pinout  
was chosen to enable handset manufacturers  
to easily route VCC to both power amplifiers and  
simplify control with a common VMODE pin. The  
device is manufactured on an advanced InGaP HBT  
MMIC technology offering state-of-the-art reliability,  
temperature stability, and ruggedness. TheAWT6222  
incorporates ANADIGICS’ HELP3™ technology to  
provide low power consumption without the need for  
an external voltage regulator. Two operating modes  
provide optimum efficiency at high and medium/low  
power output levels, thereby dramatically increasing  
handset talk-time and standby-time. Its built-in voltage  
regulator eliminates the need for external voltage  
regulation and load switches. The 3 mm x 5 mm x 1  
mm surface mount package incorporates matching  
networks optimized for output power, efficiency and  
linearity in a 50 system.  
GND at slug (pad)  
V
EN_CELL  
1
2
14  
13  
12  
11  
10  
9
GND  
Bias Control  
RFIN_CELL  
RFOUT_CELL  
V
MODE1  
3
4
5
V
CC  
CC  
V
BATT  
V
A
V
MODE2 (N/C)  
GND  
RFIN_IMT  
GND  
6
7
Bias Control  
V
EN_IMT  
8
RFOUT_IMT  
GND  
Figure 1: Block Diagram  
11/2008  
AWT6222  
GND  
V
EN_CELL  
GND  
1
2
3
4
5
6
7
14  
RFIN_CELL  
RFOUT_CELL  
13  
12  
11  
10  
VCC  
V
MODE1  
VBATT  
VCCA  
V
MODE2 (N/C)  
GND  
RFIN_IMT  
9
GND  
V
EN_IMT  
8
RFOUT_IMT  
GND  
Figure 2: Pinout  
Table 1: Pin Description  
PIN  
NAME  
DESCRIPTION  
1
2
3
4
5
6
7
8
9
V
EN_CELL  
Enable Voltage for Cell Bands  
RF Input for Cell Bands  
Mode Control Voltage 1  
Battery Voltage  
RFIN_CELL  
V
MODE1  
V
BATT  
V
MODE2 (N/C) No Connection  
RFIN_IMT RF Input for IMT Band  
V
EN_IMT  
Enable Voltage for IMT Band  
RF Output for IMT Band  
Ground  
RFOUT_IMT  
GND  
10  
11  
12  
13  
14  
GND  
Ground  
V
CC  
A
Supply Voltage A  
Supply Voltage  
RF Output for Cell Band  
Ground  
V
CC  
RFOUT_CELL  
GND  
Data Sheet - Rev 2.1  
11/2008  
2
AWT6222  
ELECTRICAL CHARACTERISTICS  
Table 2: Absolute Minimum and Maximum Ratings  
PARAMETER  
MIN  
0
MAX  
+5  
UNIT  
V
Supply Voltage (VBATT, VCC, VCCA)  
Mode Control Voltage (VMODE  
)
0
+3.5  
+3.5  
+10  
+150  
V
Enable Voltage (VEN_CELL, VEN_IMT  
)
0
V
RF Input Power (PIN  
)
-
dBm  
°C  
Storage Temperature (TSTG  
)
-40  
Stresses in excess of the absolute ratings may cause permanent damage.  
Functional operation is not implied under these conditions. Exposure  
to absolute ratings for extended periods of time may adversely affect  
reliability.  
Table 3: Operating Ranges  
PARAMETER  
MIN  
TYP  
MAX  
UNIT  
MHz  
V
COMMENTS  
824  
1920  
849  
1980  
Japan and US Cellular  
IMT  
Operating Frequency (f)  
-
Supply Voltage (VCC and VBATT  
)
+3.2  
+3.4  
+4.2  
+2.2  
0
+2.4  
-
+3.1  
+0.5  
PA "on"  
PA "shut down"  
Enable Voltage (VEN  
)
V
+2.2  
0
+2.4  
-
+3.1  
+0.5  
Low Bias Mode  
High Bias Mode  
Mode Control Voltage (VMODE  
)
V
Cellular RF Output Power (POUT  
)
R99 WCDMA, HPM  
HSPA (MPR=0), HPM  
R99 WCDMA, LPM  
HSPA (MPR=0), LPM  
28.5 (1)  
27.5 (1)  
15.5 (1)  
14.5 (1)  
29  
28  
16  
15  
29  
28  
16  
15  
3GPP TS 34.121-1, Rel  
7 Table C.11.1.3  
dBm  
IMT RF Output Power (POUT  
)
R99 WCDMA, HPM  
HSPA (MPR=0), HPM  
R99 WCDMA, LPM  
28 (1)  
27 (1)  
28.5  
27.5  
16  
28.5  
27.5  
16  
3GPP TS 34.121-1, Rel  
7 Table C.11.1.3  
dBm  
15.5 (1)  
14.5 (1)  
HSPA (MPR=0), LPM  
15  
15  
Case Temperature (T  
C
)
-30  
-
+90  
°C  
The device may be operated safely over these conditions; however, parametric performance is guaranteed only  
over the conditions defined in the electrical specifications.  
Notes:  
(1) For operation at VCC = +3.2 V, POUT is derated by 0.5 dB (all operating modes).  
Data Sheet - Rev 2.1  
3
11/2008  
AWT6222  
Table 4: Electrical Specifications - Cellular Band  
(TC  
= +25 °C, VBATT = VCC = +3.4 V, VENABLE = +2.4 V, 50 system)  
COMMENTS  
PARAMETER  
MIN  
TYP  
MAX  
UNIT  
P
OUT  
V
MODE1  
25.0  
14.0  
28  
15.5  
30.5  
18.0  
+29 dBm  
+16 dBm  
0 V  
2.4 V  
Gain  
dB  
dBc  
dBc  
%
-
-
-41  
-42  
-37.5  
-37.5  
+29 dBm  
+16 dBm  
0 V  
2.4 V  
ACLR1 at 5 MHz offset (1)  
ACLR2 at 10 MHz offset  
Power-Added Efficiency (1)  
-
-
-62  
-57  
-48  
-48  
+29 dBm  
+16 dBm  
0 V  
2.4 V  
37  
19  
41  
22  
-
-
+29 dBm  
+16 dBm  
0 V  
2.4 V  
Quiescent Current (Icq)  
Low Bias Mode  
-
-
-
-
8
0.35  
0.5  
3
13  
0.8  
0.8  
5
mA  
mA  
mA  
mA  
VMODE1 = +2.4 V  
Mode Control Current  
Enable Current  
through VMODE pins, VMODE = +2.4 V  
through VENABLE pin  
BATT Current  
through VBATT pin, VMODE1 = 2.4 V  
V
V
BATT = +4.3 V, VCC = +4.3 V,  
ENABLE = 0 V, VMODE1 = 0 V  
Leakage Current  
-
<1  
5
µA  
-
-
-134.5 -133  
-139 -137  
P
P
OUT = +29 dBm, VMODE1 = 0 V,  
OUT = +16 dBm, VMODE1 =2.4 V  
Noise in Receive Band(2) (Band 6)  
Noise in Receive Band(3) (Band 5)  
dBm/Hz  
dBm/Hz  
-
-
-134.5 -133  
P
P
OUT = +29 dBm, VMODE1 = 0 V,  
OUT = +16 dBm, VMODE1 =2.4 V  
-139  
-137  
Harmonics  
2fo  
3fo, 4fo  
-
-
-45  
-50  
-30  
-35  
P
OUT < +29 dBm  
dBc  
VSWR  
dBc  
Input Impedance  
-
-
-
-
2:1  
Spurious Output Level  
(all spurious outputs)  
-70  
See Note 4  
Load mismatch stress with no  
permanent degradation or failure  
8:1  
-
-
VSWR Applies over full operating range  
Notes:  
(1) ACLR and Efficiency measured at 836.5 MHz.  
(2) 875 MHz to 885 MHz.  
(3) 869 MHz to 894 MHz.  
(4) POUT < +29 dBm, In-band load VSWR < 5:1, Out-of-band load VSWR < 10:1. Applies over all operating conditions.  
Data Sheet - Rev 2.1  
4
11/2008  
AWT6222  
Table 5: Electrical Specifications - IMT (Band 1)  
(TC  
= +25 °C, VBATT = VCC = +3.4 V, VENABLE = +2.4 V, 50 system)  
COMMENTS  
PARAMETER  
MIN  
TYP  
MAX  
UNIT  
P
OUT  
V
MODE1  
25  
12.0  
27.5  
14.0  
30  
16.0  
+28.5 dBm  
+16 dBm  
0 V  
2.4 V  
Gain  
dB  
dBc  
dBc  
%
-
-
-41  
-43  
-37.5  
-38  
+28.5 dBm  
+16 dBm  
0 V  
2.4 V  
ACLR1 at 5 MHz offset (1)  
ACLR2 at 10 MHz offset  
Power-Added Efficiency (1)  
-
-
-55  
-56  
-48  
-48  
+28.5 dBm  
+16 dBm  
0 V  
2.4 V  
36.5  
19  
40  
23  
-
-
+28.5 dBm  
+16 dBm  
0 V  
2.4 V  
Quiescent Current (Icq)  
Low Bias Mode  
-
-
-
-
8
0.35  
0.3  
3
13  
0.8  
0.8  
5
mA  
mA  
mA  
mA  
VMODE1 = +2.4 V  
Mode Control Current  
Enable Current  
through VMODE pins, VMODE = +2.4 V  
through VENABLE pin  
BATT Current  
through VBATT pin, VMODE1 = 2.4 V  
V
V
BATT = +4.3 V, VCC = +4.3 V,  
ENABLE = 0 V, VMODE1 = 0 V  
Leakage Current  
-
<1  
5
µA  
-
-
-136.5 -135  
P
P
OUT = +28.5 dBm, VMODE1= 0 V, V  
OUT = +16 dBm, VMODE1 = +2.4 V  
Noise in Receive Band(2)  
dBm/Hz  
-142  
-138  
Harmonics  
2fo  
3fo, 4fo  
-
-
-38  
-46  
-30  
-35  
dBc  
VSWR  
dBc  
Input Impedance  
-
-
-
-
2:1  
Spurious Output Level  
(all spurious outputs)  
-70  
See note 3  
Load mismatch stress with no  
permanent degradation or failure  
8:1  
-
-
VSWR Applies over full operating range  
Notes:  
(1) ACLR and Efficiency measured at 1950 MHz.  
(2) 2110 MHz to 2170 MHz.  
(3) POUT < +28.5 dBm, In-band load VSWR < 5:1, Out-of-band load VSWR < 10:1. Applies over all operating conditions.  
Data Sheet - Rev 2.1  
11/2008  
5
AWT6222  
APPLICATION INFORMATION  
The Bias Control table lists the recommended modes  
of operation for various applications. VMODE2 is not  
necessary for this PA.  
To ensure proper performance, refer to all related  
Application Notes on the ANADIGICS web site:  
http://www.anadigics.com  
Two operating modes are available to optimize current  
consumption. High Bias/High Power operating mode  
is for POUT levels > 16 dBm. At around 16 dBm output  
power, the PAshould be “Mode Switched” to Low power  
mode for lowest quiescent current consumption.  
Shutdown Mode  
The power amplifier may be placed in a shutdown  
mode by applying logic low levels (see Operating  
Ranges table) to the VENABLE and VMODE1 pins.  
Bias Modes  
The power amplifier may be placed in either a Low Bias  
mode or a High Bias mode by applying the appropriate  
logic level (see Operating Ranges table) to VMODE1.  
Table 6: Bias Control  
P
OUT  
BIAS  
MODE  
APPLICATION  
V
ENABLE  
V
MODE1  
V
CC  
V
BATT  
LEVELS  
< +16 dBm  
> +16 dBm  
< +7 dBm  
-
UMTS - low power  
UMTS - high power  
OPTIONAL - low power  
Shutdown  
Low  
High  
+2.4 V +2.4 V  
+2.4 V 0 V  
+2.4 V +2.4 V  
0 V 0 V  
3.2 - 4.2 V  
3.2 - 4.2 V  
1.5 - 3.2 V  
3.2 - 4.2 V  
> 3.2 V  
> 3.2 V  
> 3.2 V  
> 3.2 V  
Low  
Shutdown  
GND at slug (pad)  
V
EN_CELL  
1
14  
13  
12  
11  
10  
9
GND  
0.01 F  
Bias Control  
(1)  
RFIN_CELL  
(3)  
(3)  
68 pF  
TRL1  
2
TRL2  
RFOUT_CELL  
VMODE  
VCC  
3
1000 pF  
(4)  
V
BATT  
TRL5  
4
(2)  
68 pF  
2.2 F  
2.2 F  
5
GND  
GND  
N/C  
(1)  
(3)  
RFIN_IMT  
TRL3  
6
7
Bias Control  
(3)  
68 pF  
TRL4  
RFOUT_IMT  
VEN_IMT  
8
0.01 F  
GND  
Note:  
(1) Add blocking cap if DC voltage is present on input pin.  
(2) 68 pF cap should be placed as close as possible to Pin 4.  
(3) TRL should be short and of 50 characteristic impedance.  
(4) TRL 5 should be as long as possible (minimum of 0.1 at 800 MHz) and capable of handling 750 mA current.  
Optional 4.7 nH Inductor may be substituted.  
Figure 3: Application Circuit  
Data Sheet - Rev 2.1  
11/2008  
6
AWT6222  
PACKAGE OUTLINE  
Figure 4: Package Outline - 14 Pin 3 mm x 5 mm x 1 mm Surface Mount Module  
Figure 5: Branding Specification  
Data Sheet - Rev 2.1  
11/2008  
7
AWT6222  
ORDERING INFORMATION  
ORDER  
NUMBER  
TEMPERATURE  
RANGE  
PACKAGE  
DESCRIPTION  
COMPONENT PACKAGING  
RoHS Compliant 14 Pin  
3 mm x 5 mm x 1 mm  
Surface Mount Module  
AWT6222RM28Q7 -30 °C to +85 °C  
AWT6222RM28P9 -30 °C to +85 °C  
Tape and Reel, 2500 pieces per Reel  
RoHS Compliant 14 Pin  
3 mm x 5 mm x 1 mm  
Surface Mount Module  
Partial Tape and Reel  
ANADIGICS, Inc.  
141 Mount Bethel Road  
Warren, New Jersey 07059, U.S.A.  
Tel: +1 (908) 668-5000  
Fax: +1 (908) 668-5132  
URL: http://www.anadigics.com  
E-mail: Mktg@anadigics.com  
IMPORTANT NOTICE  
ANADIGICS, Inc. reserves the right to make changes to its products or to discontinue any product at any time without notice.  
The product specifications contained in Advanced Product Information sheets and Preliminary Data Sheets are subject to  
change prior to a product’s formal introduction. Information in Data Sheets have been carefully checked and are assumed  
to be reliable; however, ANADIGICS assumes no responsibilities for inaccuracies. ANADIGICS strongly urges customers  
to verify that the information they are using is current before placing orders.  
WARNING  
ANADIGICS products are not intended for use in life support appliances, devices or systems. Use of anANADIGICS product  
in any such application without written consent is prohibited.  
Data Sheet - Rev 2.1  
8
11/2008  

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