HSDL3602 [AGILENT]
Agilent HSDL-3602 IrDA?? Data 1.4 Compliant 4 Mb/s 3V Infrared Transceiver; 安捷伦HSDL- 3602红外线？ 1.4数据符合4 Mb / s的3V红外收发器
| 型号： | HSDL3602 |
| 厂家： | 
AGILENT TECHNOLOGIES, LTD. |
| 描述： | Agilent HSDL-3602 IrDA?? Data 1.4 Compliant 4 Mb/s 3V Infrared Transceiver |
| 文件： | 总24页 (文件大小：396K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Agilent HSDL-3602
®
IrDA Data 1.4 Compliant
4 Mb/s 3V Infrared Transceiver
Data Sheet
Features
•
Fully compliant to IrDA
1.1 specifications:
— 9.6 kb/s to 4 Mb/s operation
— Excellent nose-to-nose
operation
Description
Applications
•
•
•
Typical link distance > 1.5 m
IEC825-Class 1 eye safe
The HSDL-3602 is a low-height
infrared transceiver module that
provides interface between logic
and IR signals for through-air,
serial, half-duplex IR data link.
The module is compliant to IrDA
Data Physical Layer Specifica-
tions 1.1 and IEC825-Class 1 Eye
Safety Standard.
•
Digital imaging
— Digital still cameras
— Photo-imaging printers
Wide operating voltage range
— 2.7 V to 3.6 V
•
Data communication
— Notebook computers
— Desktop PCs
•
•
•
•
Small module size
— 4.0 x 12.2 x 4.9 mm (H x W x D)
— Win CE handheld products
— Personal Digital Assistants
(PDAs)
Complete shutdown
— TXD, RXD, PIN diode
Low shutdown current
— 10 nA typical
— Printers
V
— Fax machines, photocopiers
— Screen projectors
— Auto PCs
— Dongles
— Set-top box
CC
Adjustable optical power
management
— Adjustable LED drive-current
to maintain link integrity
R1
LEDA (10)
•
•
Telecommunication products
— Cellular phones
— Pagers
•
•
•
Single Rx data output
— FIR select pin switch to FIR
TXD (9)
SP
Integrated EMI shield
— Excellent noise immunity
Small industrial and medical
instrumentation
— General data collection
devices
— Patient and pharmaceutical
data collection devices
MD0 (4)
MD1 (5)
HSDL-3602
Edge detection input
— Prevents the LED from long
turn-on time
RXD (8)
•
•
•
Interface to various super I/O and
controller devices
•
IR LANs
FIR_SEL (3)
Designed to accommodate light
loss with cosmetic window
CX1
CX2
GND (7)
Only 2 external components are
required
V
(1)
CC
AGND (2)
HSDL-3602 Functional block diagram
The HSDL-3602 contains a high-
speed and high-efficiency 870 nm
LED, a silicon PIN diode, and
an integrated circuit. The IC
contains an LED driver and a
receiver providing a single
output (RXD) for all data rates
supported.
little photo-current even under
very bright ambient light. The
HSDL-3602 also incorporates the
capability for adjustable optical
power. With two programming
pins; MODE 0 and MODE 1, the
optical power output can be ad-
justed lower when the nominal
desired link distance is one-third
or two-third of the full IrDA link.
integrated shield that helps to
ensure low EMI emission and
high immunity to EMI field, thus
enhancing reliable performance.
Application Support Information
The Application Engineering
group in Agilent Technologies is
available to assist you with the
Technical understanding associ-
ated with HSDL-3602 infrared
transceiver module. You can
contact them through your local
Agilent sales representatives for
additional details.
The HSDL-3602 can be com-
pletely shut down to achieve very
low power consumption. In the
shut down mode, the PIN diode is
inactive, thus producing very
The HSDL-3602 comes with a
front view packaging option
(HSDL-3602-007/-037). It has an
Ordering Information
Package Option
Package
Part Number
Standard Package Increment
Front View
HSDL-3602-007
400
Front View
HSDL-3602-037
1800
I/O Pins Configuration Table
Pin
1
Description
Symbol
Supply Voltage
Analog Ground
FIR Select
V
CC
2
AGND
FIR_SEL
MD0
MD1
NC
3
10
9
8
7
6
5
4
3
2
1
4
Mode 0
5
Mode 1
Back view (HSDL-3602-007/-037)
6
No Connection
Ground
7
GND
RXD
8
Receiver Data Output
Transmitter Data Output
LED Anode
9
TXD
10
LEDA
2
Transceiver Control Truth Table
Mode 0
Mode 1
FIR_SEL
RX Function
Shutdown
SIR
TX Function
1
0
0
1
1
0
1
1
X
0
0
0
1
1
1
Shutdown
0
Full Distance Power
2/3 Distance Power
1/3 Distance Power
Full Distance Power
2/3 Distance Power
1/3 Distance Power
0
SIR
1
SIR
0
MIR/FIR
MIR/FIR
MIR/FIR
0
1
X = Don't Care
Transceiver I/O Truth Table
Inputs
Outputs
LED
Transceiver Mode
Active
FIR_SEL
TXD
EI
RXD
X
0
1
0
0
0
X
On
Not Valid
[1]
[3]
Active
High
Off
Low
[2]
[3]
Active
1
High
Off
Low
Active
X
X
Low
Low
Off
High
[4]
Shutdown
X
Not Valid
Not Valid
X = Don't Care EI = In-Band Infrared Intensity at detector
Notes:
1. In-Band EI ≤ 115.2 kb/s and FIR_SEL = 0.
2. In-Band EI ≥ 0.576 Mb/s and FIR_SEL = 1.
3. Logic Low is a pulsed response. The condition is maintained for duration dependent on the
pattern and strength of the incident intensity.
4. To maintain low shutdown current, TXD needs to be driven high or low and not left floating.
Recommended Application Circuit Components
Component
Recommended Value
2.2 Ω ± 5%, 0.5 Watt, for 2.7 ≤ V ≤ 3.3 V operation
R1
CC
2.7 Ω ± 5%, 0.5 Watt, for 3.0 ≤ V ≤ 3.6 V operation
CC
[5]
CX1
0.47 µF ± 20%, X7R Ceramic
6.8 µF ± 20%, Tantalum
[6]
CX2
Notes:
5. CX1 must be placed within 0.7 cm of the HSDL-3602 to obtain optimum noise immunity.
6. In "HSDL-3602 Functional Block Diagram" on page 3 it is assumed that Vled and V share the
CC
same supply voltage and filter capacitors. In case the 2 pins are powered by different supplies
CX2 is applicable for Vled and CX1 for V . In environments with noisy power supplies,
CC
including CX2 on the V line can enhance supply rejection performance.
CC
3
LIGHT OUTPUT POWER (LOP) vs ILED
ILED vs LEDA
450
400
350
300
250
200
150
100
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
50
0
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7
ILED (A)
1.3
1.5
1.7
1.9
2.1
2.3
LEDA VOLTAGE (V)
Marking Information
The HSDL-3602-007/-037 is marked '3602YYWW' on the shield where 'YY' indicates the unit's manufactur-
ing year, and 'WW' refers to the work week in which the unit is tested.
Caution: The BiCMOS inherent to the design of this component increases the component’s suscepti-
bility to damage from electrostatic discharge (ESD). It is advised that normal static precautions be
taken in handling and assembly of this component to prevent damage and/or degradation, which
may be induced by ESD.
[7]
Absolute Maximum Ratings
Parameter
Symbol
Minimum
–40
Maximum
+100
+70
Unit
˚C
Conditions
Storage Temperature
Operating Temperature
DC LED Current
T
T
S
–20
˚C
A
I
I
(DC)
(PK)
165
mA
mA
LED
LED
Peak LED Current
650
≤ 90 µs pulse width,
≤ 25% duty cycle
750
mA
≤ 2 µs pulse width,
≤ 10% duty cycle
LED Anode Voltage
Supply Voltage
V
V
–0.5
0
7
V
LEDA
7
V
CC
Transmitter Data Input Current
Receiver Data Output Voltage
Note:
I
(DC)
–12
–0.5
12
mA
V
TXD
V
V
CC
+ 0.5
|I (RXD)| = 20 µA
O
O
7. For implementations where case to ambient thermal resistance ≤ 50˚C/W.
4
Recommended Operating Conditions
Parameter
Symbol
Minimum
–20
Maximum
+70
Unit
˚C
V
Conditions
Operating Temperature
Supply Voltage
T
A
V
CC
V
IH
2.7
3.6
Logic High Input Voltage
for TXD, MD0, MD1, and
FIR_SEL
2 V /3
V
CC
V
CC
Logic Low Transmitter
Input Voltage
V
IL
0
V /3
CC
V
LED (Logic High) Current
Pulse Amplitude
I
400
0.0024
650
4
mA
Mb/s
LEDA
Receiver Signal Rate
Electrical & Optical Specifications
Specifications hold over the Recommended Operating Conditions unless otherwise noted. Unspecified test conditions
can be anywhere in their operating range. All typical values are at 25˚C and 3.3 V unless otherwise noted.
Parameter
Symbol
Min. Typ.
Max. Units
Conditions
≥ V – 0.5
Transceiver
Supply Current Shutdown
Idle
I
I
10
200
5
nA
mA
µA
V
SD
CC1
CC2
CC
2.5
–1
V (TXD) ≤ V , EI = 0
I IL
Digital Input
Current
Logic
Low/High
I /I
1
0 ≤ V ≤ V
I CC
L
H
Transmitter
Transmitter
Radiant
Intensity
Logic High
Intensity
EI
100
250
400
mW/sr
V
= 3.0 V
= 400 mA
≤ 15˚
H
IH
I
LEDA
θ
1/2
Peak
Wavelength
λ
875
35
nm
nm
p
Spectral Line
Half Width
∆λ
1/2
Viewing Angle 2θ
30
60
1/2
˚
Optical
tpw (EI)
1.5
1.6
1.8
µs
tpw(TXD) = 1.6 µs at 115.2 kb/s
Pulse Width
148
115
217
125
260
135
40
ns
ns
ns
tpw(TXD) = 217 ns at 1.15 Mb/s
tpw(TXD) = 125 ns at 4.0 Mb/s
tpw(TXD) = 125 ns at 4.0 Mb/s
Rise and
Fall Times
t (EI),
r
t (EI)
f
t (TXD) = 10 ns
r/f
Maximum
Optical
Pulse Width
tpw (max)
20
1
50
µs
TXD pin stuck high
LED Anode On State Voltage
V
ON
(LEDA)
2.4
V
I
= 400 mA, V (TXD) ≥ V
LEDA I IH
LED Anode Off State Leakage
Current
I (LEDA)
LK
100
nA
V = V = 3.6 V,
LEDA CC
V (TXD) ≤ V
I
IL
5
Electrical & Optical Specifications
Specifications hold over the Recommended Operating Conditions unless otherwise noted. Unspecified test conditions
can be anywhere in their operating range. All typical values are at 25˚C and 3.3 V unless otherwise noted.
Parameter
Receiver
Symbol
Min.
Typ.
Max.
Units
Conditions
= 1.0 mA,
Receiver Data
Output Voltage
Logic Low
Logic High
V
0
—
0.4
V
I
OL
OL
2
EI ≥ 3.6 µW/cm ,
θ
≤ 15˚
1/2
V
OH
V
CC
– 0.2
—
V
CC
V
I
= –20 µA,
OH
2
EI ≤ 0.3 µW/cm ,
≤ 15˚
θ
1/2
Viewing
Angle
2θ
30
1/2
˚
2
Logic High Receiver Input
Irradiance
EI
0.0036
0.0090
500
500
mW/cm For in-band signals
H
[8]
≤ 115.2 kb/s
2
mW/cm 0.576 Mb/s ≤ in-band
[8]
signals ≤ 4 Mb/s
2
[8]
Logic Low Receiver Input
Irradiance
EI
0.3
µW/cm For in-band signals
L
Receiver Peak Sensitivity
Wavelength
λ
880
nm
P
[10]
Receiver SIR Pulse Width
Receiver MIR Pulse Width
Receiver FIR Pulse Width
tpw (SIR) 1
tpw (MIR) 100
tpw (FIR) 85
4.0
µs
ns
ns
θ
θ
≤ 15˚ , C = 10 pF
L
1/2
1/2
[11]
500
165
≤ 15˚ , C = 10 pF
L
[12]
θ
V
≤ 15˚ , C = 10 pF,
1/2
CC
L
= 3 to 3.6 V
[12]
190
ns
θ
V
≤ 15˚ , C = 10 pF,
1/2
CC
L
= 2.7 V
Receiver ASK Pulse Width
tpw (ASK)
1
µs
500 kHz/50% duty cycle
carrier ASK
[13]
Receiver Latency Time for FIR
Receiver Latency Time for SIR
Receiver Rise/Fall Times
Receiver Wake Up Time
Notes:
t (FIR)
40
20
25
50
50
µs
µs
ns
µs
L
t (SIR)
L
t
t
(RXD)
r/f
W
[14]
100
8. An in-band optical signal is a pulse/sequence where the peak wavelength, λp, is defined as 850 ≤ λp ≤ 900 nm, and the pulse characteristics
are compliant with the IrDA Serial Infrared Physical Layer Link Specification.
9. Logic Low is a pulsed response. The condition is maintained for duration dependent on pattern and strength of the incident intensity.
2
2
2
2
10. For in-band signals ≤ 115.2 kb/s where 3.6 µW/cm ≤ EI ≤ 500 mW/cm .
11. For in-band signals at 1.15 Mb/s where 9.0 µW/cm ≤ EI ≤ 500 mW/cm .
12. For in-band signals of 125 ns pulse width, 4 Mb/s, 4 PPM at recommended 400 mA drive current.
13. Pulse width specified is the pulse width of the second 500 kHz carrier pulse received in a data bit. The first 500 kHz carrier pulse may exceed
2 µs in width, which will not affect correct demodulation of the data stream. An ASK or DASK system using the HSDL-3602 has been shown to
2
2
correctly receive all data bits for 9 µW/cm ≤ EI ≤ 500 mW/cm incoming signal strength. ASK or DASK should use the FIR channel enabled.
14. The wake up time is the time between the transition from a shutdown state to an active state, and the time when the receiver is active and
ready to receive infrared signals.
6
TXD "Stuck ON" Protection
RXD Output Waveform
t
pw
TXD
V
OH
90%
50%
10%
V
OL
LED
t
t
r
f
t
pw (MAX.)
LED Optical Waveform
Receiver Wake Up Time Definition
(when MD0 ≠ 1 and MD1 ≠ 0)
t
pw
LED ON
90%
50%
10%
RX
LIGHT
RXD
VALID DATA
LED OFF
t
t
t
f
w
r
7
HSDL-3602-007 and HSDL-3602-037 Package Outline with Dimension and Recommended PC Board Pad Layout
MOUNTING
CENTER
6.10
1.17
4.18
4.98
TOP VIEW
2.45
R 2.00
R 1.77
4.00
1.90
1.90
PIN
1
PIN
10
0.80
0.80
1.70
1.20
4.05
3.24
3.84
12.20
FRONT VIEW
SIDE VIEW
ALL DIMENSIONS IN MILLIMETERS (mm).
DIMENSION TOLERANCE IS 0.20 mm
UNLESS OTHERWISE SPECIFIED.
MOUNTING CENTER
MID OF LAND
1.05
PIN 1
0.70
PIN 10
0.43
2.40
2.35
PIN 10
PIN 1
2.08
0.45
0.70
4.95
10 CASTELLATION:
PITCH 1.1 ± 0.1
CUMULATIVE 9.90 ± 0.1
2.84
LAND PATTERN
BACK VIEW
8
Tape and Reel Dimensions (HSDL-3602-007, -037)
ALL DIMENSIONS IN MILLIMETERS (mm)
QUANTITY = 400 PIECES PER REEL (HSDL-3602-007)
1800 PIECES PER TAPE (HSDL-3602-037)
13.00 ± 0.50
R 1.00
(40 mm MIN.)
EMPTY
(400 mm MIN.)
LEADER
PARTS
MOUNTED
21.00 ± 0.80
EMPTY
(40 mm MIN.)
2.00 ± 0.50
DIRECTION OF PULLING
CONFIGURATION OF TAPE
LABEL
SHAPE AND DIMENSIONS OF REELS
A
10°
4
5
6
3
1.55 ± 0.05
2.00 ± 0.10
4.00 ± 0.10
B
1.75 ± 0.10
5° (MAX.)
11.50 ± 0.10
2
12.50 ± 0.10
12
3.8
A
24.00 ± 0.30
1
1.5 ± 0.1
A
8
0.40 ± 0.10
10
A
A
B
8.00 ± 0.10
7
11 4.25 ± 0.10
SECTION B-B
5° (MAX.)
4.4
A
5.20 ± 0.10
9
A
SECTION A-A
9
Moisture Proof Packaging
Baking Conditions
All HSDL-3602 options are shipped in moisture proof package. Once
opened, moisture absorption begins.
If the parts are not stored in dry
conditions, they must be baked
before reflow to prevent damage
to the parts.
UNITS IN A SEALED
MOISTURE-PROOF
PACKAGE
Package
In reels
In bulk
Temp.
60°C
Time
≥ 48 hours
≥ 4 hours
≥ 2 hours
≥ 1 hour
100°C
125°C
150°C
PACKAGE IS
OPENED (UNSEALED)
Baking should be done only once.
Recommended Storage Conditions
ENVIRONMENT
LESS THAN 30°C,
AND LESS THAN
60% RH
Storage
Temperature
10°C to 30°C
Relative
Humidity
below 60% RH
YES
PACKAGE IS
OPENED LESS
THAN 72 HOURS
NO BAKING
IS NECESSARY
YES
Time from Unsealing to Soldering
After removal from the bag, the
parts should be soldered within 3
days if stored at the recom-
mended storage conditions. If
times longer than 72 hours are
needed, the parts must be stored
in a dry box.
NO
PERFORM RECOMMENDED
BAKING CONDITIONS
NO
10
Reflow Profile
MAX. 245°C
R3 R4
230
The reflow profile is a straight-
line representation of a nominal
temperature profile for a convec-
tive reflow solder process. The
temperature profile is divided
into four process zones, each
with different ∆T/∆time tempera-
ture change rates. The ∆T/∆time
rates are detailed in the following
table. The temperatures are mea-
sured at the component to
200
183
170
R2
150
90 sec.
MAX.
125
100
ABOVE
183°C
R1
R5
50
25
0
50
100
150
200
250
300
t-TIME (SECONDS)
printed circuit board connections.
P1
HEAT
UP
P2
SOLDER PASTE DRY
P3
SOLDER
REFLOW
P4
COOL
DOWN
In process zone P1, the PC
board and HSDL-3602
castellation I/O pins are heated
to a temperature of 125°C to
activate the flux in the solder
paste. The temperature ramp up
rate, R1, is limited to 4°C per
second to allow for even heating
of both the PC board and
Maximum
∆T/∆time
Process Zone
Heat Up
Symbol
P1, R1
P2, R2
P3, R3
∆T
25˚C to 125˚C
125˚C to 170˚C
170˚C to 230˚C
(245˚C at 10 seconds max.)
230˚C to 170˚C
4˚C/s
HSDL-3602 castellation I/O pins.
Solder Paste Dry
Solder Reflow
0.5˚C/s
4˚C/s
Process zone P2 should be of
sufficient time duration (> 60
seconds) to dry the solder paste.
The temperature is raised to a
level just below the liquidus point
of the solder, usually 170°C
(338°F).
P3, R4
P4, R5
–4˚C/s
–3˚C/s
Cool Down
170˚C to 25˚C
Process zone P3 is the solder
reflow zone. In zone P3, the
of 90 seconds, the intermetallic
growth within the solder connec-
tions becomes excessive,
Process zone P4 is the cool
down after solder freeze. The
cool down rate, R5, from the
liquidus point of the solder to
25°C (77°F) should not exceed
-3°C per second maximum. This
limitation is necessary to allow
the PC board and HSDL-3602
castellation I/O pins to change
dimensions evenly, putting
minimal stresses on the
temperature is quickly raised
above the liquidus point of solder
to 230°C (446°F) for optimum
results. The dwell time above the
liquidus point of solder should be
between 15 and 90 seconds. It
usually takes about 15 seconds to
assure proper coalescing of the
solder balls into liquid solder and
the formation of good solder
connections. Beyond a dwell time
resulting in the formation of weak
and unreliable connections. The
temperature is then rapidly
reduced to a point below the
solidus temperature of the solder,
usually 170°C (338°F), to allow
the solder within the connections
to freeze solid.
HSDL-3602 transceiver.
11
Appendix A: HSDL-3602-007/-037 SMT Assembly Application Note
1.0. Solder Pad, Mask, and Metal Solder Stencil Aperture
METAL STENCIL
FOR SOLDER PASTE
PRINTING
STENCIL
APERTURE
LAND PATTERN
SOLDER
MASK
PCBA
Figure 1. Stencil and PCBA.
1.1. Recommended Land Pattern for HSDL-3602-007/-037
SHIELD SOLDER PAD
Rx LENS
Dim.
mm
2.40
0.70
inches
0.095
0.028
0.043
0.093
0.110
0.123
0.170
Tx LENS
a
b
e
c (pitch) 1.10
d
g
d
e
f
2.35
2.80
3.13
4.31
b
Y
f
g
a
X
theta
c
10x PAD
FIDUCIAL
FIDUCIAL
Figure 2. Top view of land pattern.
12
1.2. Adjacent Land Keep-out and
Solder Mask Areas
• Adjacent land keep-out is the
maximum space occupied by
the unit relative to the land
pattern. There should be no
other SMD components within
this area.
avoid solder bridging adjacent
pads.
Dim.
mm
inches
min. 0.008
0.528
• It is recommended that
2 fiducial cross be placed at
mid-length of the pads for unit
alignment.
h
j
min. 0.2
13.4
4.7
k
l
0.185
• “h” is the minimum solder
3.2
0.126
resist strip width required to
Note : Wet/Liquid Photo-Imagineable solder resist/mask is recommended.
j
Tx LENS
Rx LENS
LAND
k
h
SOLDER
MASK
Y
l
Figure 3. HSDL-3602-007/-037 PCBA-Adjacent land keep-out and solder mask.
13
2.0. Recommended solder paste/
cream volume for castellation joints
Based on calculation and experi-
ment, the printed solder paste
volume required per castellation
pad is 0.30 cubic mm (based on
either no-clean or aqueous solder
cream types with typically 60 to
65% solid content by volume).
2.1. Recommended Metal Solder
Stencil Aperture
It is recommended that only
0.152 mm (0.006 inches) or
0.127 mm (0.005 inches) thick
stencil be used for solder paste
printing. This is to ensure ad-
equate printed solder paste vol-
ume and no shorting. The
following combination of metal
stencil aperture and metal stencil
thickness should be used:
See Figure 4
t, nominal stencil thickness
l, length of aperture
mm
inches
0.006
mm
inches
0.152
0.127
2.8 ± 0.05
3.4 ± 0.05
0.110 ± 0.002
0.134 ± 0.002
0.005
w, the width of aperture is fixed at 0.70 mm (0.028 inches)
Aperture opening for shield pad is 2.8 mm x 2.35 mm as per land dimension.
APERTURE AS PER
LAND
t (STENCIL THICKNESS)
SOLDER
PASTE
w
l
Figure 4. Solder paste stencil aperture.
3.0. Pick and Place Misalignment
Tolerance and Product Self-Align-
ment after Solder Reflow
Allowable Misalignment Tolerance
X-direction
≤ 0.2 mm (0.008 inches)
± 2 degrees
Theta-direction
If the printed solder paste volume
is adequate, the unit will self-
align in the X-direction after sol-
der reflow. Units should be
properly reflowed in IR Hot Air
convection oven using the recom-
mended reflow profile. The di-
rection of board travel does not
matter.
14
3.1. Tolerance for X-axis Alignment of Castellation
Misalignment of castellation to the land pad should not exceed 0.2 mm or approximately half the width of
the castellation during placement of the unit. The castellations will completely self-align to the pads during
solder reflow as seen in the pictures below.
Picture 1. Castellation misaligned to land pads in X-axis before
reflow.
Picture 2. Castellation self-align to land pads after reflow.
3.2. Tolerance for Rotational (Theta) Misalignment
Units when mounted should not be rotated more than ± 2 degrees with reference to center X-Y as specified
in Figure 2. Pictures 3 and 4 show units before and after reflow. Units with a Theta misalignment of more
than 2 degrees do not completely self-align after reflow. Units with ± 2 degree rotational or Theta
misalignment self-aligned completely after solder reflow.
Picture 3. Unit is rotated before reflow.
Picture 4. Unit self-aligns after reflow.
15
3.3. Y-axis Misalignment of Castellation
In the Y-direction, the unit does not self-align after solder reflow. It is
recommended that the unit be placed in line with the fiducial mark
(mid-length of land pad). This will enable sufficient land length
1
(minimum of / land length) to form a good joint. See Figure 5.
2
LENS
EDGE
FIDUCIAL
MINIMUM 1/2 THE LENGTH
OF THE LAND PAD
Y
Figure 5. Section of a castellation in Y-axis.
3.4. Example of Good HSDL-3602-007/ 4.0. Solder Volume Evaluation and Calculation
-037 Castellation Solder Joints
This joint is formed when the
printed solder paste volume is
adequate, i.e., 0.30 cubic mm and
reflowed properly. It should be
reflowed in IR Hot-air convection
reflow oven. Direction of board
travel does not matter.
Geometery of an HSDL-3602-007/-037 solder fillet.
0.45
0.20
0.70
0.8
1.2
0.7
0.4
Picture 5. Good solder joint.
16
Appendix B: General Application
Guide for the HSDL-3602 Infrared
IrDA Compliant 4 Mb/s Transceiver
are setup to correspond nomi-
nally to maximum, two-third, and
one-third of the transmission
distance. This unique feature
allows lower optical power to be
transmitted at shorter link dis-
tances to reduce power consump-
tion.
Selection of Resistor R1
®
Resistor R1 should be selected to
provide the appropriate peak
pulse LED current over different
ranges of Vcc. The recommended
R1 for the voltage range of 2.7 V
to 3.3 V is 2.2 Ω while for 3.0 V
to 3.6 V is 2.7 Ω. The HSDL-3602
typically provides 250 mW/sr of
intensity at the recommended
minimum peak pulse LED current
of 400 mA.
Description
The HSDL-3602 wide voltage
operating range infrared trans-
ceiver is a low-cost and small
form factor that is designed to
address the mobile computing
market such as notebooks, print-
ers and LAN access as well as
small embedded mobile products
such as digital cameras, cellular
phones, and PDAs. It is fully com-
pliant to IrDA 1.1 specification
up to 4 Mb/s, and supports HP-
SIR, Sharp ASK, and TV Remote
modes. The design of the HSDL-
3602 also includes the following
unique features:
MODE
MODE 1
Transmitter
Shutdown
Full Power
2/3 Power
1/3 Power
1
0
0
1
0
0
1
1
Interface to Recommended I/O chips
The HSDL-3602’s TXD data input
is buffered to allow for CMOS
drive levels. No peaking circuit or
capacitor is required.
There are 2 basic means to
adjust the optical power of the
HSDL-3602:
Data rate from 9.6 kb/s up to 4
Mb/s is available at the RXD pin.
The FIR_SEL pin selects the data
rate that is receivable through
RXD. Data rates up to 115.2 kb/s
can be received if FIR_SEL is set
to logic low. Data rates up to 4
Mb/s can be received if FIR_SEL
is set to logic high. Software
driver is necessary to program
the FIR_SEL to low or high at a
given data rate.
• Low passive component count.
• Adjustable Optical Power Man-
agement (full, 2/3, 1/3 power).
• Shutdown mode for low power
consumption requirement.
• Single-receive output for all
data rates.
Dynamic: This implementation
enables the transceiver pair to
adjust their transmitter power
according to the link distance.
However, this requires the IrDA
protocol stack (mainly the IrLAP
layer) to be modified. Please con-
tact Agilent Application group for
further details.
Adjustable Optical Power Management
The HSDL-3602 transmitter of-
fers user-adjustable optical power
levels. The use of two logic-level
mode-select input pins, MODE 0
and MODE 1, offers shutdown
mode as well as three transmit
power levels as shown in the fol-
lowing Table. The power levels
Static: Pre-program the ROM
BIOS of the system (e.g. note-
book PC, digital camera, cell
phones, or PDA) to allow the end
user to select the desired optical
power during the system setup
stage.
4 Mb/s IR link distance of greater
than 1.5 meters have been
demonstrated using typical
HSDL-3602 units with National
Semiconductor’s PC87109 3 V
Endec and Super I/Os, and the
SMC Super I/O chips.
17
(A) National Semiconductor Super
I/O and Infrared Controller
For National Semiconductor
Super I/O and Infrared Controller
chips, IR link can be realized with
the following connections:
Please refer to the table below for
the IR pin assignments for the
National Super I/O and IR Con-
trollers that support IrDA 1.1 up
to 4 Mb/s:
• Connect IRTX of the National
Super I/O or IR Controller to
TXD (pin 9) of the HSDL-3602.
• Connect IRRX1 of the National
Super I/O or IR Controller to
RXD (pin 8) of the HSDL-3602.
• Connect IRSL0 of the National
Super I/O or IR Controller to
FIR_SEL (pin 3) of the HSDL-
3602.
IRTX
IRRX1
65
IRSL0
66
PC97/87338VJG
PC87308VUL
63
81
39
15
80
79
PC87108AVHG
PC87109VBE
38
37
16
14
Please refer to the National Semiconductor data sheets and application notes for updated
information.
V
CC
R1
LEDA (10)
TXD (9)
SP
IRTX
NATIONAL
SEMICONDUCTOR
SUPER I/O
MD0 (4)
MD1 (5)
IRRX1
HSDL-3602
OR
*
IR CONTROLLER
*
RXD (8)
IRSL0
FIR_SEL (3)
CX1
CX2
GND (7)
* MODE GROUND FOR
FULL POWER OPERATION
V
(1)
CC
AGND (2)
18
(B) HSDL-3602 Interoperability with
National Semiconductor
PC97338VJG SIO Evaluation Report
Introduction
The objective of this report is to
demonstrate the interoperability
of the HSDL-3602 IR transceiver
IR module as wireless communi-
cation ports at the speed of 2.4
kb/s - 4 Mb/s with NS’s
1.7M byte from the master
device, with the
Microsoft’s DOS operating
system. One system with an
HSDL-3602 IR transceiver
connected to the
PC97338VJG evaluation
board will act as the master
device. Another system with
an HSDL-3602 IR trans-
ceiver connected to the
PC97338VJG will act as the
slave device (i.e. Device
Under Test).
PC97338VJG performing
the framing, encoding is
transmitted to the slave
device. The slave device,
with the PC97338VJG per-
forming the decoding, and
CRC checksum, will receive
the file. The file is then
checked for error by com-
paring the received file with
the original file using the
DOS “fc” command.
PC97338VJG Super I/O under
typical operating conditions.
Test Procedures
(2) The test software used in
this interoperability test is
provided by National Semi-
conductor. A file size of
(1) Two PC97338VJG evalua-
tion boards were connected
to the ISA Bus of two PCs
(Pentium 200 MHz) running
(3) The link distance is mea-
sured by adjusting the dis-
tance between the master
and slave for errorless data
communications.
V
CC
14.314 MHz
CLOCK
R1
LEDA (10)
A0 - A3
TXD (9)
SP
IRTX (63)
RD, WR, CS
NATIONAL
SEMICONDUCTOR
PC97338VJG
SUPER I/O
MD0 (4)
D0 - D7
DRQ
IRRX1 (65)
IRSL0 (66)
MD1 (5)
HSDL-3602
*
*
RXD (8)
DACK, TC
IRQ
FIR_SEL (3)
CX1
CX2
GND (7)
* MODE GROUND FOR
FULL POWER OPERATION
V
(1)
CC
AGND (2)
HSDL-3602 Interoperability with NS
PC97338 Report
(i) Test Conditions
(ii) Test Result
The interoperability test results
show that HSDL-3602 IR trans-
ceiver can operate ≥ 1.5 meter
link distance from 3 V to 3.6 V
with NS’s PC97338 at any IrDA
1.1 data rate without error.
V
= 3.0 – 3.6 V
CC
RLED = 2.7 Ω
Optical transmitter pulse
width = 125 ns
Mode set to full power
19
(C) Standard Micro System
Corporation (SMC) Super and Ultra
I/O Controllers
For SMC Super and Ultra I/O
Controller chips, IR link can be
realized with the following con-
nections:
• Connect IRRX of the SMC
Super or Ultra I/O Controller to
RXD (pin 8) of the HSDL-3602.
• Connect IRMODE of the Super
or Ultra I/O Controller to
FIR_SEL (pin 3) of the
HSDL-3602.
• Connect IRTX of the SMC
Super or Ultra I/O Controller to
TXD (pin 9) of the HSDL-3602.
Please refer to the table below for
the IR pin assignments for the SMC
Super or Ultra I/O Controllers that
support IrDA 1.1 up to 4Mb/s:
IRTX
IRRX
88
IRMODE
23
FDC37C669FR
FDC37N769
89
87
86
21
FDC37C957/8FR
204
203
145 or 190
HSDL-3602 Interoperability with SMC's Super I/O or IR Controller
V
CC
R1
LEDA (10)
IRRX
RXD (8)
STANDARD
MICROSYSTEM
CORPORATION
SUPER I/O
FIR_SEL (3)
IRMODE
HSDL-3602
OR
IR CONTROLLER
IRTX
TXD (9)
SP
CX1
CX2
MD0
MD1
GND (7)
MODE GROUND
FOR FULL POWER
OPERATION
4
5
V
(1)
CC
AGND (2)
HSDL-3602 Interoperability with
SMC 669/769 Report
(i) Test Conditions
(ii) Test Result
The interoperability test results
show that HSDL-3602 IR
Vcc = 3.0 – 3.6 V
RLED = 2.2 Ω
Optical transmitter
pulse width = 125 ns
Mode set to full power
transceiver can operate ≥ 1.5
meter link distance from 3 V to
3.6 V with SMC 669/769 at any
IrDA 1.1 data rate without error.
20
parable, Z' replaces Z in the above
equation. Z' is defined as
Z'=Z+t/n
height of the window and Z is the
distance from the HSDL-3602 to
the back of the window. The dis-
tance from the center of the LED
lens to the center of the photo-
diode lens, K, is 7.08mm. The
equations for computing the win-
dow dimensions are as follows:
Appendix C: Optical Port
Dimensions for HSDL-3602:
To ensure IrDA compliance,
some constraints on the height
and width of the window exist.
The minimum dimensions ensure
that the IrDA cone angles are met
without vignetting. The maximum
dimensions minimize the effects
of stray light. The minimum size
corresponds to a cone angle of
where ‘t’ is the thickness of the
window and ‘n’ is the refractive
index of the window material.
X = K + 2*(Z+D)*tanA
Y = 2*(Z+D)*tanA
The depth of the LED image in-
side the HSDL-3602, D, is 8mm.
‘A’ is the required half angle for
viewing. For IrDA compliance,
0
30 and the maximum size corre-
The above equations assume that
the thickness of the window is
negligible compared to the dis-
tance of the module from the back
of the window (Z). If they are com-
0
º
the minimum is 15 and the
sponds to a cone angle of 60 .
0
maximum is 30 . Assuming the
thickness of the window to be
negligible, the equations result in
the following tables and graphs:
In the figure below, X is the
width of the window, Y is the
OPAQUE MATERIAL
IR TRANSPARENT WINDOW
X
K
IR TRANSPARENT WINDOW
OPAQUE MATERIAL
Z
A
D
21
Aperture Width
(x, mm)
Aperture height
(y, mm)
Module Depth, (z) mm
max.
min.
max.
min.
0
1
2
3
4
5
6
7
8
9
16.318
17.472
18.627
19.782
20.936
22.091
23.246
24.401
25.555
26.710
11.367
11.903
12.439
12.975
13.511
14.047
14.583
15.118
15.654
16.190
9.238
4.287
4.823
5.359
5.895
6.431
6.967
7.503
8.038
8.574
9.110
10.392
11.547
12.702
13.856
15.011
16.166
17.321
18.475
19.630
APERTURE WIDTH (X) vs MODULE DEPTH
30
APERTURE HEIGHT (Y) vs MODULE DEPTH
25
25
20
15
20
15
10
10
X MAX.
X MIN.
5
5
Y MAX.
Y MIN.
0
0
0
0
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
MODULE DEPTH (Z) – mm
MODULE DEPTH (Z) – mm
22
ensures that the window will not
alter either the radiation pattern
of the LED, or the receive pattern
of the photodiode.
Window Material
window, the radius of the front
and back curves, and the distance
from the back surface to the
transceiver. Once these items are
known, a lens design can be
Almost any plastic material will
work as a window material.
Polycarbonate is recommended.
The surface finish of the plastic
should be smooth, without any
texture. An IR filter dye may be
used in the window to make it
look black to the eye, but the
total optical loss of the window
should be 10 percent or less for
best optical performance. Light
loss should be measured at 875
nm.
If the window must be curved for
mechanical or industrial design
reasons, place the same curve on
the back side of the window that
has an identical radius as the
front side. While this will not
completely eliminate the lens
effect of the front curved surface,
it will significantly reduce the
effects. The amount of change in
the radiation pattern is dependent
upon the material chosen for the
made which will eliminate the
effect of the front surface curve.
The following drawings show the
effects of a curved window on the
radiation pattern. In all cases,
the center thickness of the
window is 1.5 mm, the window is
made of polycarbonate plastic,
and the distance from the
Shape of the Window
From an optics standpoint, the
window should be flat. This
transceiver to the back surface of
the window is 3 mm.
Flat Window
Curved Front and Back
Curved Front, Flat Back
(First choice)
(Second choice)
(Do not use)
23
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For product information and a complete list of
distributors, please go to our web site.
For technical assistance call:
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(408) 654-8675
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Japan: (+81 3) 3335-8152(Domestic/Interna-
tional), or 0120-61-1280(Domestic Only)
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Taiwan: (+65) 6271 2654
Data subject to change.
Copyright © 2002 Agilent Technologies, Inc.
Obsoletes 5988-5836EN
December 3, 2002
5988-8422EN
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