ADIS16060/PCBZ [ADI]

Wide Bandwidth Yaw Rate Gyroscope with SPI; 宽带宽偏航角速度陀螺仪,采用SPI
ADIS16060/PCBZ
型号: ADIS16060/PCBZ
厂家: ADI    ADI
描述:

Wide Bandwidth Yaw Rate Gyroscope with SPI
宽带宽偏航角速度陀螺仪,采用SPI

文件: 总12页 (文件大小:351K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Wide Bandwidth  
Yaw Rate Gyroscope with SPI  
ADIS16060  
FEATURES  
GENERAL DESCRIPTION  
Complete angular rate digital gyroscope  
14-bit resolution  
Scalable measurement range  
Initial range: 80ꢀ°sec ꢁtypical)  
Increase range with external resistor  
Z-axis ꢁyaw rate) response  
The ADIS16060 is a yaw rate gyroscope with an integrated  
serial peripheral interface (SPI). It features an externally  
selectable bandwidth response and scalable dynamic range.  
The SPI port provides access to the rate sensor, an internal  
temperature sensor, and two external analog signals (using  
internal ADC). The digital data available at the SPI port is  
proportional to the angular rate about the axis that is normal  
to the top surface of the package.  
SPI digital output interface  
High vibration rejection over wide frequency  
2000 g-powered shock survivability  
1 kHz bandwidth  
Selectable using external capacitor  
Externally controlled self-test  
Internal temperature sensor output  
Dual auxiliary 14-bit ADC inputs  
Absolute rate output for precision applications  
5 V single-supply operation  
An additional output pin provides a precision voltage reference.  
A digital self-test function electromechanically excites the sensor  
to test the operation of the sensor and the signal-conditioning  
circuits.  
The ADIS16060 is available in an 8.2 mm × 8.2 mm × 5.2 mm,  
16-terminal, peripheral land grid array (LGA) package.  
8.2 mm × 8.2 mm × 5.2 mm package  
−40ꢀC to +105ꢀC operation  
RoHS compliant  
APPLICATIONS  
Platform stabilization  
Image stabilization  
Guidance and control  
Inertia measurement units  
Robotics  
FUNCTIONAL BLOCK DIAGRAM  
FILT  
RATE  
V
CC  
ADIS16060  
RATE  
SENSOR  
SCLK  
DIN  
14-BIT  
ADC  
TEMPERATURE  
SENSOR  
DOUT  
MUX  
DIGITAL  
CONTROL  
MSEL1  
MSEL2  
AIN1  
AIN2  
GND  
Figure 1.  
Rev. 0  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2008 Analog Devices, Inc. All rights reserved.  
 
ADIS16060  
TABLE OF CONTENTS  
Features .............................................................................................. 1  
Basic Operation .............................................................................. 10  
Serial Peripheral Interface (SPI)............................................... 10  
Output Data Formatting............................................................ 10  
ADC Conversion........................................................................ 10  
Applications Information.............................................................. 11  
Supply and Common Considerations ..................................... 11  
Setting Bandwidth...................................................................... 11  
Increasing Measurement Range ............................................... 11  
Dynamic Digital Sensitivity Scaling ........................................ 11  
Temperature Measurements ..................................................... 11  
Self-Test Function ...................................................................... 11  
Outline Dimensions....................................................................... 12  
Ordering Guide .......................................................................... 12  
Applications....................................................................................... 1  
General Description......................................................................... 1  
Functional Block Diagram .............................................................. 1  
Revision History ............................................................................... 2  
Specifications..................................................................................... 3  
Timing Specifications .................................................................. 5  
Absolute Maximum Ratings............................................................ 6  
ESD Caution.................................................................................. 6  
Pin Configuration and Function Descriptions............................. 7  
Typical Performance Characteristics ............................................. 8  
Theory of Operation ........................................................................ 9  
Analog-to-Digital Converter Input............................................ 9  
Rate Sensitive Axis ....................................................................... 9  
REVISION HISTORY  
1/08—Revision 0: Initial Version  
Rev. 0 | Page 2 of 12  
 
ADIS16060  
SPECIFICATIONS  
TA = 25°C, VCC = 5 V, angular rate = 0°/sec, COUT = 0.01 μF, 1 g, unless otherwise noted.  
Table 1.  
Parameter  
SENSITIVITY  
Dynamic Range2  
Initial  
Conditions  
Min1  
Typ  
Max  
Unit  
Full-scale range over specifications range  
Clockwise rotation is positive output,  
TA = −40°C to +ꢀ±°C  
±±0  
0.0110  
±ꢀ0  
°/sec  
0.0122  
0.0134  
°/sec/LSB  
Change Over Temperature3  
Nonlinearity  
VCC = 4.7± V to ±.2± V  
Best fit straight line  
±3  
0.1  
%
°/sec  
NULL  
Initial  
Nominal 0°/sec output is ꢀ192 LSB  
VCC = 4.7± V to ±.2± V  
Power on to ±0.±°/sec of final value  
Any axis  
−44  
+44  
°/sec  
°/sec/°C  
ms  
°/sec/g  
°/sec/V  
Change Over Temperature3  
±0.11  
10  
±0.1  
±0.±  
Turn-On Time  
Linear Acceleration Effect  
Voltage Sensitivity  
VCC = 4.7± V to ±.2± V  
NOISE PERFORMANCE  
Rate Noise Density  
FREQUENCY RESPONSE  
3 dB Bandwidth (User-Selectable)4  
Sensor Resonant Frequency  
SELF-TEST RESPONSE  
Positive Self-Test±  
@ 2±°C  
0.04  
14.±  
°/sec/√Hz  
COUT = 0 μF  
1
1000  
ꢀ6ꢀ4  
Hz  
kHz  
See Table ±  
See Table ±  
+6226  
−6226  
LSB  
LSB  
Negative Self-Test±  
TEMPERATURE SENSOR  
Reading at 29ꢀ K  
Scale Factor  
7700  
ꢀ192  
0.034  
LSB  
K/LSB  
Proportional to absolute temperature  
LOGIC INPUTS  
Input High Voltage, VINH  
Input Low Voltage, VINL  
Input Current, IIN  
Input Capacitance, CIN (DIN)  
Input Capacitance, CIN (MSEL1, MSEL2 )  
0.7 × VCC  
−1  
V
V
μA  
pF  
pF  
0.ꢀ  
+1  
Typically 10 nA  
For VIN < VCC  
±
ANALOG INPUTS  
Resolution  
14  
Bits  
Integral Nonlinearity  
Differential Nonlinearity  
Offset Error  
Best fit straight line  
No missing codes to 13 bits  
−6  
−1  
−10  
+6  
+6  
+10  
LSB  
LSB  
mV  
Offset Error Temperature Drift  
Gain Error  
Gain Error Temperature Drift  
Input Voltage Range  
Leakage Current  
±0.3  
±0.3  
1
ppm/°C  
mV  
ppm/°C  
V
−40  
0
+40  
VCC  
nA  
DIGITAL OUTPUTS  
Output High Voltage, VOH  
Output Low Voltage, VOL  
CONVERSION RATE  
Conversion Time  
ISOURCE = ±00 μA  
ISINK = ±00 μA  
VCC − 0.3  
V
V
0.4  
10  
μs  
Throughput Rate  
100  
kSPS  
Rev. 0 | Page 3 of 12  
 
 
ADIS16060  
Parameter  
Conditions  
Min1  
Typ  
Max  
Unit  
POWER SUPPLY  
VCC  
VCC Quiescent Supply Current  
Power Dissipation  
TEMPERATURE RANGE  
All at TA = −40°C to +ꢀ±°C  
4.7±  
±
4.3  
22  
±.2±  
6.±  
33  
V
VCC @ ± V, ±0 kSPS sample rate  
VCC @ ± V, ±0 kSPS sample rate  
Operation  
mA  
mW  
°C  
−40  
+10±  
1 All minimum and maximum specifications are guaranteed. Typical specifications are neither tested nor guaranteed.  
2 Dynamic range is the maximum full-scale measurement range possible, including output swing range, initial offset, sensitivity, offset drift, and sensitivity drift at ± V supply.  
3 Defined as the output change from ambient to maximum temperature, or ambient to minimum temperature.  
4 Frequency at which the response is 3 dB down from dc response. Bandwidth = 1/(2 × π × 200 kΩ × COUT). For COUT = 0.01 μF, bandwidth = ꢀ0 Hz.  
± Self-test response varies with temperature.  
Rev. 0 | Page 4 of 12  
ADIS16060  
TIMING SPECIFICATIONS  
TA = 25°C, angular rate = 0°/sec, unless otherwise noted.1  
Table 2. Read/Output Sequence  
Parameter  
Figure Reference  
Symbol  
Min  
Typ  
Max  
2.9  
100  
0
Unit  
MHz  
kHz  
μs  
Serial Clock Frequency  
Throughput Rate  
See Figure 2  
See Figure 2  
See Figure 2  
See Figure 2  
See Figure 2  
See Figure 2  
See Figure 2  
See Figure 2  
See Figure 2  
See Figure 3  
See Figure 3  
See Figure 3  
tCYC  
tCSD  
tSUCS  
tHDO  
tDIS  
tEN  
tACQ  
tF  
tR  
t±  
t7  
t6  
MSEL1 Falling to SCLK Low  
MSEL1 Falling to SCLK Rising  
SCLK Falling to Data Remains Valid  
MSEL1 Rising Edge to DOUT High Impedance  
SCLK Falling to Data Valid  
Acquisition Time  
DOUT Fall Time  
DOUT Rise Time  
Data Setup Time  
SCLK Falling Edge to MSEL2 Rising Edge  
Data Hold Time  
20  
±
ns  
16  
14  
16  
ns  
ns  
100  
±0  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
400  
11  
11  
±
2±  
2±  
±
0
4.±  
0
1 Guaranteed by design. All input signals are specified with tR = tF = ± ns (10% to 90% of VCC) and timed from a voltage level of 1.6 V. The ± V operating range spans from  
4.7± V to ±.2± V.  
Timing Diagrams  
tCYC  
COMPLETE CYCLE  
MSEL1  
tSUCS  
tACQ  
POWER DOWN  
1
4
5
SCLK  
DOUT  
tCSD  
HIGH-Z  
tEN  
tHDO  
tDIS  
HIGH-Z  
0
D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0  
0
(MSB) (LSB)  
NOTE:  
A MINIMUM OF 20 CLOCK CYCLES ARE REQUIRED FOR 14-BIT CONVERSION.  
Figure 2. Serial Interface Timing Diagram–Read/Output Sequence (CPOL = 0, CPHA = 0)  
t7  
t5  
MSEL2  
t6  
SCLK  
DIN  
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0  
NOTE:  
THE LAST EIGHT BITS CLOCKED IN ARE LATCHED WITH THE RISING EDGE OF THE MSEL2 LINE.  
Figure 3. Serial interface Timing–Input/Configuration Sequence (CPOL = 0, CPHA = 1)  
Rev. 0 | Page ± of 12  
 
 
 
 
ADIS16060  
ABSOLUTE MAXIMUM RATINGS  
Table 3.  
Parameter  
Acceleration (Any Axis, Unpowered, 0.± ms)  
Acceleration (Any Axis, Powered, 0.± ms)  
VCC to GND  
Stresses above those listed under the Absolute Maximum  
Ratings may cause permanent damage to the device. This is a  
stress rating only; functional operation of the device at these or  
any other conditions above those indicated in the operational  
section of this specification is not implied. Exposure to absolute  
maximum rating conditions for extended periods may affect  
device reliability.  
Rating  
2000 g  
2000 g  
−0.3 V to +6.0 V  
−0.3 V to VCC + 0.3 V  
−0.3 V to VCC + 0.3 V  
−0.3 V to +7.0 V  
−0.3V to VCC + 0.3 V  
−40°C to +10±°C  
−6±°C to +1±0°C  
VCC to GND  
Analog Input Voltage to GND  
Digital Input Voltage to GND  
Digital Output Voltage to GND  
Operating Temperature Range  
Storage Temperature Range  
Drops onto hard surfaces can cause shocks of greater than  
2000 g and exceed the absolute maximum rating of the device.  
Care should be exercised in handling the device to avoid damage.  
ESD CAUTION  
Rev. 0 | Page 6 of 12  
 
ADIS16060  
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS  
16  
15  
14  
13  
3.6865 BSC  
8×  
DIN  
GND  
GND  
2.5050 BSC  
8×  
PIN 1  
INDICATOR  
0.6700 BSC  
12×  
SCLK  
DOUT  
NC  
GND  
AIN2  
7.373 BSC 5.010 BSC  
2×  
4×  
5
6
7
8
NOTES  
1. NC = NO CONNECT  
2. THIS IS NOT AN ACTUAL “TOP VIEW,” AS THE PINS ARE NOT VISIBLE FROM THE  
TOP. THIS IS A LAYOUT VIEW, WHICH REPRESENTS THE PIN CONFIGURATION, IF  
THE PACKAGE IS LOOKED THROUGH FROM THE TOP. THIS CONFIGURATION IS  
PROVIDED FOR PCB LAYOUT PURPOSES.  
1.000 BSC  
16×  
0.5000 BSC  
16×  
Figure 4. Pin Configuration  
Figure 5. Second-Level Assembly Pad Layout  
Table 4. Pin Function Descriptions  
Pin No.  
Mnemonic  
Type1 Description  
1
2
3
4
DIN  
I
I
O
SPI Data Input.  
SPI Serial Clock.  
SPI Data Output.  
No Connect.  
SCLK  
DOUT  
NC  
±
6
RATE  
FILT  
O
I
Buffered Analog Output. Represents the angular rate signal.  
External Capacitor Connection to Control Bandwidth.  
7
9
10  
11  
12  
13  
14  
1±  
16  
VCC  
S
I
I
S
S
S
S
S
I
Power Supply.  
External Analog Input Channel 1.  
External Analog Input Channel 2.  
Ground.  
Ground.  
Ground.  
Ground.  
Power Supply.  
AIN1  
AIN2  
GND  
GND  
GND  
GND  
VCC  
MSEL2  
SPI, Mode Select 2. Used for data input functions.  
SPI, Mode Select 1. Used for data output functions.  
MSEL1  
I
1 I = input; O = output; S = power supply.  
Rev. 0 | Page 7 of 12  
 
ADIS16060  
TYPICAL PERFORMANCE CHARACTERISTICS  
0.18  
6800  
6600  
6400  
6200  
6000  
5800  
5600  
5400  
5200  
5000  
4800  
0.16  
0.14  
0.12  
0.10  
0.08  
0.06  
0.04  
0.02  
0
–60  
–40  
–20  
0
20  
40  
60  
80  
100  
120  
BIAS (°/sec)  
TEMPERATURE (°C)  
Figure 6. Initial Bias Error Distribution, 25°C, VCC = 5 V  
Figure 9. Positive Self-Test Response vs. Temperature, VCC = 5 V  
0.30  
0.25  
0.20  
0.15  
0.10  
0.05  
0
–4800  
–5000  
–5200  
–5400  
–5600  
–5800  
–6000  
–6200  
–6400  
–6600  
–6800  
–60  
–40  
–20  
0
20  
40  
60  
80  
100  
120  
TEMPERATURE (°C)  
BIAS DRIFT OVER TEMPERATURE (°/sec/°C)  
Figure 7. Bias Drift Over −40°C to +85°C, VCC = 5 V  
Figure 10. Negative Self-Test Output Response vs. Temperature, VCC = 5 V  
0.1  
0.04  
0.03  
0.02  
0.01  
µ + 1σ  
0.01  
0
µ
–0.01  
–0.02  
µ – 1σ  
–0.03  
0.001  
–0.04  
1
10  
100  
1000  
–60  
–40  
–20  
0
20  
40  
60  
80  
100  
120  
Tau (°C)  
TEMPERATURE (°C)  
Figure 11. Allen Variance, 25°C, VCC = 5 V  
Figure 8. Sensitivity Drift vs. Temperature, VCC = 5 V  
Rev. 0 | Page ꢀ of 12  
 
ADIS16060  
THEORY OF OPERATION  
The ADIS16060 operates on the principle of a resonator  
gyroscope. Two polysilicon sensing structures each contain a  
dither frame that is electrostatically driven to resonance. This  
generates the necessary velocity element to produce a Coriolis  
force while rotating. At two of the outer extremes of each frame,  
orthogonal to the dither motion, are movable fingers that are  
placed between fixed pickoff fingers to form a capacitive pickoff  
structure that senses Coriolis motion.  
During the acquisition phase, the impedance model for AINx is a  
parallel combination of the capacitor CPIN and the network formed  
by the series connection of RIN and CIN. CPIN is primarily the pin  
capacitance. RIN is typically 600 Ω and is a lumped component  
made up of some serial resistors and the on resistance of the  
switches. CIN is typically 30 pF and mainly functions as the  
ADC sampling capacitor.  
During the conversion phase, when the switches are open, the  
input impedance is limited to CPIN. RIN and CIN make a 1-pole,  
low-pass filter that reduces undesirable aliasing effects and  
limits the noise.  
The resulting signal is fed to a series of gain and demodulation  
stages that produce the electrical rate signal output. The rate  
signal is then converted to a digital representation of the output  
on the SPI pins. The dual-sensor design provides linear acceleration  
(vibration, shock) rejection. Fabricating the sensor with the signal-  
conditioning electronics preserves signal integrity in noisy  
environments.  
When the source impedance of the driving circuit is low, the  
ADC input can be driven directly. Large source impedances  
significantly affect the ac performance, especially THD. The dc  
performances are less sensitive to the input impedance.  
The electrostatic resonator requires 14 V to 16 V for operation.  
Because only 5 V is typically available in most applications, a charge  
pump is included on chip. After the demodulation stage, a single-  
pole, low-pass filter on the chip is used to limit high frequency  
artifacts before final amplification. The frequency response is  
dominated by the second low-pass filter, which is set by adding  
capacitance across RATE and FILT.  
RATE SENSITIVE AXIS  
RATE  
AXIS  
LONGITUDINAL  
POSITIVE  
AXIS  
MEASUREMENT  
DIRECTION  
8
5
4
1
LATERAL  
AXIS  
ANALOG-TO-DIGITAL CONVERTER INPUT  
Figure 13. Rate Signal Increases with Clockwise Rotation  
Figure 12 shows an equivalent circuit of the input structure of  
the ADIS16060 auxiliary ADC.  
The two diodes, D1 and D2, provide ESD protection for the analog  
inputs, AINx (AIN1 and AIN2). Care must be taken to ensure  
that the analog input signal does not exceed the supply rails by  
more than 0.3 V, because exceeding this level causes these diodes to  
become forward-biased and to start conducting current. However,  
these diodes can handle a forward-biased current of 130 mA  
maximum. For instance, these conditions may eventually occur  
when the input signals exceed either VCC or GND.  
VDD  
D1  
D2  
C
IN  
R
IN  
AINx  
GND  
C
PIN  
Figure 12. Equivalent Analog Input Circuit  
Rev. 0 | Page 9 of 12  
 
 
ADIS16060  
BASIC OPERATION  
The ADIS16060 is designed for simple integration into indus-  
trial system designs, requiring only a 5 V power supply, two  
mode select lines, and three serial communications lines. The  
SPI handles all digital I/O communication in the ADIS16060.  
Output Data Access  
Use Table 2 and Figure 2 to determine the appropriate timing  
considerations for reading output data.  
OUTPUT DATA FORMATTING  
SERIAL PERIPHERAL INTERFACE ꢁSPI)  
All of the output data is in an offset-binary format, which in  
this case, means that the ideal output for a zero rate condition is  
8192 codes. If the sensitivity is equal to +0.0122°/sec/LSB, a rate  
of +10°/sec results in a change of 820 codes, and a digital rate  
output of 9012 codes. If an offset error of −20°/sec is introduced,  
the output is reduced by 1639 codes (if typical sensitivity is  
assumed), resulting in a digital rate output of 6552 codes.  
The ADIS16060 SPI port includes five signals: Mode Select 1  
MSEL1  
MSEL2  
(
), Mode Select 2 (  
), serial clock (SCLK), data  
MSEL1  
input (DIN), and data output (DOUT). The  
when reading data out of the sensor (DOUT), and the  
line is used when configuring the sensor (DIN).  
line is used  
MSEL2  
Selecting Output Data  
ADC CONVERSION  
Refer to Table 5 to determine the appropriate DIN bit sequence  
based on the required data source. Table 2 and Figure 3 provide  
the necessary timing details for the input configuration sequence.  
The internal successive approximation ADC begins the conversion  
MSEL1  
process on the falling edge of  
and starts to place data  
MSB first on the DOUT line at the 6th falling edge of SCLK, as  
shown in Figure 2. The entire conversion process takes 20 SCLK  
MSEL2  
After the  
goes high, the last eight DIN bits are loaded  
into the internal control register, which represents DB0 to DB7  
in Table 5.  
MSEL1  
cycles. After  
goes high, the acquisition process starts in  
preparation for the next conversion cycle.  
Table 5. DIN Configuration Bit Assignments  
Action  
DB7  
DB6  
DB5  
DB4  
DB3  
DB2  
DB1  
DB0  
Measure Angular Rate (Gyro)  
Measure Temperature  
Measure AIN2  
Measure AIN1  
Set Positive Self-Test and Output for Angular Rate  
Set Negative Self-Test and Output for Angular Rate  
0
0
1
0
0
0
0
0
0
1
0
0
1
0
0
0
1
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
1
Rev. 0 | Page 10 of 12  
 
 
ADIS16060  
APPLICATIONS INFORMATION  
1
0.1  
SUPPLY AND COMMON CONSIDERATIONS  
Power supply noise and transient behaviors can influence the  
accuracy and stability of any sensor-based measurement system.  
The ADIS16060 provides 0.2 μF of decoupling capacitance on  
the VCC pin. Depending on the level of noise present in the  
power supply of the system, the ADIS16060 may not require  
any additional decoupling capacitance for this supply.  
0.01  
SETTING BANDWIDTH  
0.001  
External Capacitor COUT is used in combination with the on-  
chip ROUT resistor to create a low-pass filter to limit the  
bandwidth of the ADIS16060 rate response. The –3 dB  
frequency set by ROUT and COUT is  
0.0001  
10  
100  
1k  
10k  
100k  
FREQUENCY (Hz)  
1
fOUT  
=
Figure 14. Noise Spectral Density with 2-Pole, Low-Pass Filter (40 Hz and 250 Hz)  
(
2 × π × ROUT ×COUT  
)
DYNAMIC DIGITAL SENSITIVITY SCALING  
and can be well controlled because ROUT has been trimmed  
during manufacturing to be 200 kΩ 5ꢀ. Setting the range  
with an external resistor impacts ROUT as follows:  
This device supports in-system, dynamic, digital sensitivity scaling.  
TEMPERATURE MEASUREMENTS  
(
200 kꢁ × REXT  
)
)
When using the temperature sensor, an acquisition time of  
greater than 40 ꢂs helps to ensure proper setting and measurement  
accuracy. See Table 2 and Figure 2 for details on the definition  
of acquisition time.  
ROUT  
=
(
200 kꢁ + REXT  
In general, an additional hardware or software filter is added to  
attenuate high frequency noise arising from demodulation spikes  
at the gyro’s 14 kHz resonant frequency. The noise spikes at 14 kHz  
can be clearly seen in the power spectral density curve shown in  
Figure 14.  
SELF-TEST FUNCTION  
Exercising the self-test function is simple, as shown in this  
example.  
1. Configure using DIN = 00100010 (positive self-test,  
rate selected).  
2. Read output.  
3. Configure using DIN = 00100000 (positive self-test off,  
rate selected)  
4. Read output.  
5. Calculate the difference between Step 2 and Step 4, and  
compare this with the specified self-test output changes in  
the Specifications section.  
INCREASING MEASUREMENT RANGE  
Scaling the measurement range requires the addition of a single  
resistor, connected across the RATE and FILT pins. The following  
equation provides the proper relationship for selecting the  
appropriate resistor:  
200 kꢁ  
REXT  
=
Δ −1  
where Δ is the increase in range.  
Exercising the negative self-test requires changing the sequence  
in Step 1 to DIN = 00100001.  
Rev. 0 | Page 11 of 12  
 
 
ADIS16060  
OUTLINE DIMENSIONS  
5.010  
BSC  
(4×)  
PIN 1  
INDICATOR  
2.505  
BSC  
(8×)  
8.35  
MAX  
0.873 BSC  
(16×)  
13  
16  
12  
1
7.373  
BSC  
(2×)  
8.20  
TYP  
0.797 BSC  
(12×)  
9
4
8
5
0.373 BSC  
(16×)  
0.200  
MIN  
(ALL SIDES)  
BOTTOM VIEW  
TOP VIEW  
7.00  
TYP  
5.20  
MAX  
SIDE VIEW  
Figure 15. 16-Terminal Stacked Land Grid Array [LGA]  
(CC-16-1)  
Dimensions shown in millimeters  
ORDERING GUIDE  
Model  
Temperature Range  
Package Description  
Package Option  
ADIS16060BCCZ1  
ADIS16060/PCBZ1  
1 Z = RoHS Compliant Part.  
−40°C to +10±°C  
16-Terminal Stacked Land Grid Array (LGA)  
Evaluation Board  
CC-16-1  
©2008 Analog Devices, Inc. All rights reserved. Trademarks and  
registered trademarks are the property of their respective owners.  
D07103-0-1°08ꢁ0)  
Rev. 0 | Page 12 of 12  
 
 
 

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