AD628ARMZ-REEL7 [ADI]
OP-AMP, 1500uV OFFSET-MAX, PDSO8, MO-187AA, MSOP-8;
| 型号： | AD628ARMZ-REEL7 |
| 厂家： | 
ADI |
| 描述： | OP-AMP, 1500uV OFFSET-MAX, PDSO8, MO-187AA, MSOP-8 放大器 光电二极管 |
| 文件： | 总21页 (文件大小：564K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
High Common-Mode Voltage,
Programmable Gain Difference Amplifier
AD628
FUNCTIONAL BLOCK DIAGRAM
FEATURES
R
R
EXT1
EXT2
High common-mode input voltage range
120 V at VS = 1ꢀ V
Gain range 0.1 to 100
+V
7
S
R
G
6
Operating temperature range: −40°C to +8ꢀ°C
Supply voltage range
Dual supply: 2.2ꢀ V to 18 V
100kΩ
100kΩ
10kΩ
8
–IN
+IN
G = +0.1
–IN
+IN
OUT
A2
5
–IN
10kΩ
Single supply: 4.ꢀ V to 36 V
A1
+IN
Excellent ac and dc performance
Offset temperature stability RTI: 10 μV/°C maximum
Offset: 1.ꢀ V mV maximum
1
10kΩ
AD628
CMRR RTI: 7ꢀ dB minimum, dc to ꢀ00 Hz, G = +1
2
3
4
–V
V
REF
S
C
FILT
APPLICATIONS
Figure 1.
High voltage current shunt sensing
Programmable logic controllers
Analog input front end signal conditioning
+ꢀ V, +10 V, ꢀ V, 10 V, and 4 to 20 mA
Isolation
Sensor signal conditioning
Power supply monitoring
Electrohydraulic controls
130
120
110
100
90
V
= ±15V
S
Motor controls
80
70
GENERAL DESCRIPTION
V
= ±2.5V
S
60
The AD628 is a precision difference amplifier that combines
excellent dc performance with high common-mode rejection
over a wide range of frequencies. When used to scale high
voltages, it allows simple conversion of standard control
voltages or currents for use with single-supply ADCs. A
wideband feedback loop minimizes distortion effects due to
capacitor charging of Σ-Δ ADCs.
50
40
30
10
100
1k
FREQUENCY (Hz)
10k
100k
Figure 2. CMRR vs. Frequency of the AD628
A reference pin (VREF) provides a dc offset for converting bipolar
to single-sided signals. The AD628 converts +5 V, +10 V, 5 V,
10 V, and 4 to 20 mA input signals to a single-ended output
within the input range of single-supply ADCs.
A precision 10 kΩ resistor connected to an external pin is
provided for either a low-pass filter or to attenuate large
differential input signals. A single capacitor implements a low-
pass filter. The AD628 operates from single and dual supplies
and is available in an 8-lead SOIC_N or an 8-lead MSOP. It
operates over the standard industrial temperature range of
−40°C to +85°C.
The AD628 has an input common mode and differential mode
operating range of 120 V. The high common mode, input
impedance makes the device well suited for high voltage
measurements across a shunt resistor. The inverting input of
the buffer amplifier is available for making a remote Kelvin
connection.
Rev. G
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rights of third parties that may result from its use. Specifications subject to change without notice. No
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AN-282: Fundamentals of Sampled Data Systems
AN-669: Effectively Applying the AD628 Precision Gain Block
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AD628
Applying Instrumentation Amplifiers Effectively: The Importance of an
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AD628
TABLE OF CONTENTS
Features .............................................................................................. 1
Theory of Operation ...................................................................... 15
Applications Information.............................................................. 16
Gain Adjustment ........................................................................ 16
Input Voltage Range................................................................... 16
Voltage Level Conversion.......................................................... 17
Current Loop Receiver .............................................................. 18
Monitoring Battery Voltages..................................................... 18
Filter Capacitor Values............................................................... 19
Kelvin Connection ..................................................................... 19
Outline Dimensions....................................................................... 20
Ordering Guide .......................................................................... 20
Applications....................................................................................... 1
General Description......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 7
Thermal Characteristics .............................................................. 7
ESD Caution.................................................................................. 7
Pin Configuration and Function Descriptions............................. 8
Typical Performance Characteristics ............................................. 9
Test Circuits ..................................................................................... 13
REVISION HISTORY
4/07—Rev. F to Rev. G
Changes to Absolute Maximum Ratings...................................... 7
Changes to Figure 3......................................................................... 7
Changes to Figure 26..................................................................... 13
Changes to Figure 27..................................................................... 13
Changes to Theory of Operation................................................. 14
Changes to Figure 29..................................................................... 14
Changes to Table 5......................................................................... 15
Changes to Gain Adjustment Section......................................... 15
Added the Input Voltage Range Section..................................... 15
Added Figure 30 ............................................................................ 15
Added Figure 31 ............................................................................ 15
Changes to Voltage Level Conversion Section .......................... 16
Changes to Figure 32..................................................................... 16
Changes to Table 6......................................................................... 16
Changes to Figure 33 and Figure 34............................................ 17
Changes to Figure 35..................................................................... 18
Changes to Kelvin Connection Section...................................... 18
Changes to Features.......................................................................... 1
Changes to Figure 22...................................................................... 11
Changes to Figure 25...................................................................... 13
Changes to Voltage Level Conversion Section............................ 17
Changes to Monitoring Battery Voltages Section ...................... 18
Changes to Figure 34...................................................................... 18
Changes to Figure 35...................................................................... 19
Updated Outline Dimensions....................................................... 20
3/06—Rev. E to Rev. F
Changes to Table 1............................................................................ 3
Changes to Figure 3.......................................................................... 7
Replaced Voltage Level Conversion Section............................... 16
Changes to Figure 32 and Figure 33............................................. 17
Updated Outline Dimensions....................................................... 19
Changes to Ordering Guide .......................................................... 19
5/05—Rev. D to Rev. E
6/03—Rev. A to Rev. B
Changes to Table 1........................................................................... 3
Changes to Table 2........................................................................... 5
Changes to Figure 33.....................................................................18
Changes to General Description ................................................... 1
Changes to Specifications............................................................... 2
Changes to Ordering Guide........................................................... 4
Changes to TPCs 4, 5, and 6 .......................................................... 5
Changes to TPC 9............................................................................ 6
Updated Outline Dimensions...................................................... 14
3/05—Rev. C to Rev. D
Updated Format................................................................ Universal
Changes to Table 1........................................................................... 3
Changes to Table 2........................................................................... 5
1/03—Rev. 0 to Rev. A
Change to Ordering Guide............................................................. 4
4/04—Rev. B to Rev. C
Updated Format................................................................ Universal
Changes to Specifications............................................................... 3
11/02—Rev. 0: Initial Version
Rev. G | Page 2 of 20
AD628
SPECIFICATIONS
TA = 25°C, VS = 15 V, RL = 2 kΩ, REXT1 = 10 kΩ, REXT2 = ∞, VREF = 0 V, unless otherwise noted.
Table 1.
AD628AR
Typ
AD628ARM
Typ
Parameter
Conditions
Min
Max
Min
Max
Unit
DIFFERENTIAL AND OUTPUT AMPLIFIER
Gain Equation
Gain Range
G = +0.1 (1 + REXT1/REXT2
See Figure 29
VCM = 0 V; RTI of input pins2;
output amplifier G = +1
)
V/V
V/V
mV
0.11
−1.5
100
+1.5
0.11
−1.5
100
+1.5
Offset Voltage
vs. Temperature
CMRR3
4
8
4
8
μV/°C
dB
RTI of input pins;
G = +0.1 to +100
75
75
500 Hz
75
70
75
70
dB
dB
(μV/V)/°C
dB
Minimum CMRR Over Temperature −40°C to +85°C
vs. Temperature
1
94
4
1
94
4
PSRR (RTI)
VS = 10 V to 18 V
77
77
Input Voltage Range
Common Mode
Differential
−120
−120
+120
+120
−120
−120
+120
+120
V
V
Dynamic Response
Small Signal Bandwidth −3 dB
Full Power Bandwidth
Settling Time
G = +0.1
600
5
600
5
kHz
kHz
μs
G = +0.1, to 0.01%, 100 V step
40
40
Slew Rate
0.3
0.3
V/μs
Noise (RTI)
Spectral Density
1 kHz
0.1 Hz to 10 Hz
300
15
300
15
nV/√Hz
μV p-p
DIFFERENTIAL AMPLIFIER
Gain
0.1
0.1
V/V
Error
−0.1
−1.5
+0.01 +0.1
−0.1
−1.5
+0.01 +0.1
%
vs. Temperature
Nonlinearity
vs. Temperature
Offset Voltage
vs. Temperature
Input Impedance
Differential
5
5
5
5
ppm/°C
ppm
ppm
mV
3
10
+1.5
8
3
10
+1.5
8
RTI of input pins
μV/°C
220
55
220
55
kΩ
kΩ
dB
Common Mode
CMRR4
RTI of input pins;
G = +0.1 to +100
75
75
500 Hz
75
70
75
70
dB
dB
Minimum CMRR Over Temperature −40°C to +85°C
vs. Temperature
Output Resistance
Error
1
10
4
1
10
4
(μV/V)/°C
kΩ
%
−0.1
+0.1
−0.1
+0.1
Rev. G | Page 3 of 20
AD628
AD628AR
Typ
AD628ARM
Typ
Parameter
Conditions
Min
Max
Min
Max
Unit
OUTPUT AMPLIFIER
Gain Equation
G = (1 + REXT1/REXT2
)
V/V
Nonlinearity
Offset Voltage
G = +1, VOUT = 10 V
RTI of output amp
0.5
0.5
ppm
−0.15
+0.15 −0.15
+0.15 mV
vs. Temperature
Output Voltage Swing
0.6
0.6
μV/°C
V
V
nA
nA
dB
dB
RL = 10 kΩ
RL = 2 kΩ
−14.2
−13.8
+14.1 −14.2
+13.6 −13.8
3
0.5
130
130
+14.1
+13.6
3
Bias Current
Offset Current
CMRR
Open-Loop Gain
POWER SUPPLY
Operating Range
Quiescent Current
TEMPERATURE RANGE
1.5
0.2
1.5
0.2
0.5
VCM = 13 V
VOUT = 13 V
130
130
2.25
18
1.6
+85
2.25
−40
18
1.6
V
mA
°C
−40
+85
1 To use a lower gain, see the Gain Adjustment section.
2 The addition of the difference amplifier and output amplifier offset voltage does not exceed this specification.
⎡
⎢
⎢
⎤
⎥
⎥
(0.1)(V
)
CM
75
3 Error due to common mode as seen at the output: VOUT
=
×[Output AmplifierGain] .
⎢
⎣
⎥
⎦
10 20
⎡
⎢
⎢
⎤
(0.1)(V
)
⎥
⎥
CM
75
4 Error due to common mode as seen at the output of A1: VOUT A1=
.
⎢
⎣
⎥
⎦
10 20
Rev. G | Page 4 of 20
AD628
TA = 25°C, VS = 5 V, RL = 2 kΩ, REXT1 = 10 kΩ, REXT2 = ∞, VREF = 2.5 V, unless otherwise noted.
Table 2.
AD628AR
AD628ARM
Parameter
Conditions
Min
Typ
Max
Min
Typ
Max
Unit
DIFFERENTIAL AND OUTPUT AMPLIFIER
Gain Equation
Gain Range
G = +0.1(1+ REXT1/REXT2
See Figure 29
VCM = 2.25 V; RTI of input pins2;
output amplifier G = +1
)
V/V
V/V
mV
0.11
−3.0
100
+3.0
0.11
−3.0
100
+3.0
Offset Voltage
vs. Temperature
CMRR3
6
15
6
15
μV/°C
dB
dB
dB
(μV/V)/°C
dB
RTI of input pins; G = +0.1 to +100
500 Hz
−40°C to +85°C
75
75
70
75
75
70
Minimum CMRR Over Temperature
vs. Temperature
PSRR (RTI)
1
94
4
1
94
4
VS = 4.5 V to 10 V
77
77
Input Voltage Range
Common Mode4
Differential
−12
−15
+17
+15
−12
−15
+17
+15
V
V
Dynamic Response
Small Signal Bandwidth – 3 dB
Full Power Bandwidth
Settling Time
G = +0.1
440
30
15
440
30
15
kHz
kHz
μs
G = +0.1; to 0.01%, 30 V step
Slew Rate
0.3
0.3
V/μs
Noise (RTI)
Spectral Density
1 kHz
0.1 Hz to 10 Hz
350
15
350
15
nV/√Hz
μV p-p
DIFFERENTIAL AMPLIFIER
Gain
0.1
0.1
V/V
Error
–0.1
−2.5
+0.01 +0.1
3
–0.1
−2.5
+0.01 +0.1
3
%
Nonlinearity
vs. Temperature
Offset Voltage
vs. Temperature
Input Impedance
Differential
ppm
ppm
mV
3
10
3
10
RTI of input pins
+2.5
10
+2.5
10
μV/°C
220
55
220
55
kΩ
kΩ
dB
dB
dB
(μV/V)/°C
kΩ
Common Mode
CMRR5
RTI of input pins; G = +0.1 to +100
500 Hz
−40°C to +85°C
75
75
70
75
75
70
Minimum CMRR Over Temperature
vs. Temperature
Output Resistance
Error
1
4
1
4
10
10
−0.1
+0.1
−0.1
+0.1
%
OUTPUT AMPLIFIER
Gain Equation
G = (1 + REXT1/REXT2
)
V/V
Nonlinearity
Output Offset Voltage
vs. Temperature
G = +1, VOUT = 1 V to 4 V
RTI of output amplifier
0.5
0.5
ppm
−0.15
+0.15 −0.15
0.6
4.1
4
+0.15 mV
0.6
4.1
4
μV/°C
V
V
Output Voltage Swing
RL = 10 kΩ
RL = 2 kΩ
0.9
1
0.9
1
Bias Current
Offset Current
CMRR
1.5
0.2
3
0.5
1.5
0.2
3
0.5
nA
nA
dB
dB
VCM = 1 V to 4 V
VOUT = 1 V to 4 V
130
130
130
130
Open-Loop Gain
Rev. G | Page 5 of 20
AD628
AD628AR
Typ
AD628ARM
Typ Max
Parameter
Conditions
Min
2.25
−40
Max
Min
2.25
−40
Unit
POWER SUPPLY
Operating Range
Quiescent Current
TEMPERATURE RANGE
+36
1.6
+36
1.6
V
mA
°C
+85
+85
1 To use a lower gain, see the Gain Adjustment section.
2 The addition of the difference amplifier and output amplifier offset voltage does not exceed this specification.
⎡
⎢
⎢
⎤
⎥
⎥
⎦
.
(0.1)(V
)
CM
75
3 Error due to common mode as seen at the output: VOUT
=
×[Output AmplifierGain] .
⎢
⎥
10 20
⎣
4 Greater values of voltage are possible with greater or lesser values of VREF
⎡
⎤
(0.1)(V
)
⎢
⎢
⎥
⎥
CM
75
5 Error due to common mode as seen at the output of A1: VOUT A1=
.
⎢
⎣
⎥
⎦
10 20
Rev. G | Page 6 of 20
AD628
ABSOLUTE MAXIMUM RATINGS
Table 3.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Parameter
Rating
Supply Voltage
18 V
Internal Power Dissipation
Input Voltage (Common Mode)
Differential Input Voltage
Output Short-Circuit Duration
Storage Temperature Range
Operating Temperature Range
Lead Temperature (Soldering, 10 sec)
See Figure 3
120 V1
120 V1
Indefinite
−65°C to +125°C
–40°C to +85°C
300°C
THERMAL CHARACTERISTICS
1.6
T
= 150°C
J
1 When using 12 V supplies or higher, see the Input Voltage Range section.
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
8-LEAD MSOP PACKAGE
8-LEAD SOIC PACKAGE
MSOP θ (JEDEC; 4-LAYER BOARD) = 132.54°C/W
SOIC θ (JEDEC; 4-LAYER BOARD) = 154°C/W
JA
JA
–60
–40
–20
0
20
40
60
80
100
AMBIENT TEMPERATURE (°C)
Figure 3. Maximum Power Dissipation vs. Temperature
ESD CAUTION
Rev. G | Page 7 of 20
AD628
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
1
2
3
4
8
7
6
5
–IN
+V
+IN
AD628
TOP VIEW
(Not to Scale)
–V
S
S
V
R
G
REF
C
OUT
FILT
Figure 4. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
2
3
4
5
6
7
8
+IN
−VS
VREF
CFILT
OUT
RG
+VS
Noninverting Input
Negative Supply Voltage
Reference Voltage Input
Filter Capacitor Connection
Amplifier Output
Output Amplifier Inverting Input
Positive Supply Voltage
Inverting Input
−IN
Rev. G | Page 8 of 20
AD628
TYPICAL PERFORMANCE CHARACTERISTICS
140
120
100
80
40
8440 UNITS
G = +0.1
35
30
25
20
15
10
5
–15V
+15V
60
+2.5V
40
20
0
0
0.1
1
10
100
1k
10k
100k
1M
–1.6 –1.2 –0.8 –0.4
0
0.4
0.8
1.2
1.6
2.0
INPUT OFFSET VOLTAGE (mV)
FREQUENCY (Hz)
Figure 8. PSRR vs. Frequency, Single and Dual Supplies
Figure 5. Typical Distribution of Input Offset Voltage,
VS = 15 V, SOIC_N Package
1000
25
20
15
10
5
8440 UNITS
100
0
–74
1
10
100
1k
10k
100k
–78
–82
–86
–90
–94
–98 –102 –106 –110
FREQUENCY (Hz)
CMRR (dB)
Figure 9. Voltage Noise Spectral Density, RTI, VS = 15 V
Figure 6. Typical Distribution of CMRR, SOIC_N Package
1000
130
120
110
100
90
V
= ±15V
S
80
70
V
= ±2.5V
S
60
50
40
100
30
1
10
100
1k
10k
100k
10
100
1k
FREQUENCY (Hz)
10k
100k
FREQUENCY (Hz)
Figure 10. Voltage Noise Spectral Density, RTI, VS = 2.5 V
Figure 7. CMRR vs. Frequency
Rev. G | Page 9 of 20
AD628
40
35
30
25
20
15
10
5
9638 UNITS
1s
100
90
10
0
0
0
5
10
0
1
2
3
4
5
6
7
8
9
10
TIME (Seconds)
GAIN ERROR (ppm)
Figure 14. Typical Distribution of +1 Gain Error
Figure 11. 0.1 Hz to 10 Hz Voltage Noise, RTI
150
100
60
50
UPPER CMV LIMIT
G = +100
G = +10
G = +1
40
–40°C
+85°C
30
50
0
20
V
= 0V
REF
10
+25°C
0
–40°C
–50
–100
–150
–10
–20
–30
G = +0.1
+85°C
LOWER CMV LIMIT
15
–40
100
0
5
10
(±V)
20
1k
10k
100k
1M
10M
FREQUENCY (Hz)
V
S
Figure 15. Common-Mode Operating Range vs.
Power Supply Voltage for Three Temperatures
Figure 12. Small Signal Frequency Response,
OUT = 200 mV p-p, G = +0.1, +1, +10, and +100
V
60
50
VS = ±15V
500µV
100
90
G = +100
G = +10
G = +1
RL = 1kΩ
40
30
RL = 2kΩ
RL = 10kΩ
20
10
0
10
0
–10
–20
–30
–40
G = +0.1
4.0V
10
100
1k
10k
100k
1M
OUTPUT VOLTAGE (V)
FREQUENCY (Hz)
Figure 16. Normalized Gain Error vs. VOUT, VS = 15 V
Figure 13. Large Signal Frequency Response,
OUT = 20 V p-p, G = +0.1, +1, +10, and +100
V
Rev. G | Page 10 of 20
AD628
VS = ±2.5V
100µV
500mV
RL = 1kΩ
100
90
100
90
RL = 2kΩ
RL = 10kΩ
10
0
10
0
4µs
50mV
500mV
OUTPUT VOLTAGE (V)
Figure 17. Normalized Gain Error vs. VOUT, VS = 2.5 V
Figure 20. Small Signal Pulse Response,
RL = 2 kΩ, CL = 0 pF, Top: Input, Bottom: Output
4
3
2
1
0
500mV
100
90
10
0
4µs
50mV
–40
–20
0
20
40
60
80
100
TEMPERATURE (°C)
Figure 21. Small Signal Pulse Response,
RL = 2 kΩ, CL = 1000 pF, Top: Input, Bottom: Output
Figure 18. Bias Current vs. Temperature Buffer
15
10
5
–40°C
–25°C
+85°C
100
90
10.0V
+25°C
0
–40°C
10.0V
–5
–10
–15
–25°C
10
+85°C
+25°C
0
40µs
0
5
10
15
20
25
OUTPUT CURRENT (mA)
Figure 19. Output Voltage Operating Range vs. Output Current
Figure 22. Large Signal Pulse Response,
RL = 2 kΩ, CL = 1000 pF, Top: Input, Bottom: Output
Rev. G | Page 11 of 20
AD628
100
90
100
90
5V
5V
10mV
10mV
10
0
10
0
100µs
100µs
Figure 24. Settling Time to 0.01% 0 V to −10 V Step
Figure 23. Settling Time to 0.01%, 0 V to 10 V Step
Rev. G | Page 12 of 20
AD628
TEST CIRCUITS
HP3589A
SPECTRUM ANALYZER
+V
S
7
–IN
10kΩ
10kΩ
–
8
+IN
–IN
100kΩ
FET
PROBE
5
AD829
+
OUT
–IN
G = +0.1
+IN
+IN
1
G = +100
100kΩ
AD628
10kΩ
C
R
FILT
V
G
REF
3
2
4
6
–V
S
–
OP177
+
Figure 25. CMRR vs. Frequency
SCOPE
+V
S
7
1 VAC
+15V
G = +100
G = +100
+IN
10kΩ
10kΩ
–IN
8
1
+
OUT
20Ω
100kΩ
5
AD829
–
–IN
–IN
G = +0.1
+IN
+IN
100kΩ
AD628
10kΩ
3
2
4
FILT
6
V
C
R
G
REF
–V
S
Figure 26. PSRR vs. Frequency
Rev. G | Page 13 of 20
AD628
HP3561A
SPECTRUM ANALYZER
+V
S
C
FILT
4
7
–IN
+IN
10kΩ
10kΩ
100kΩ
100kΩ
8
1
+IN
–IN
OUT
5
–IN
G = +0.1
+IN
AD628
10kΩ
3
2
6
R
V
G
REF
10kΩ
–V
S
10kΩ
Figure 27. Noise Tests
Rev. G | Page 14 of 20
AD628
THEORY OF OPERATION
The AD628 is a high common-mode voltage difference
amplifier, combined with a user-configurable output amplifier
(see Figure 28 and Figure 29). Differential mode voltages in
excess of 120 V are accurately scaled by a precision 11:1 voltage
divider at the input. A reference voltage input is available to the
user at Pin 3 (VREF). The output common-mode voltage of the
difference amplifier is the same as the voltage applied to the
reference pin. If the uncommitted amplifier is configured for
gain, connect Pin 3 to one end of the external gain resistor to
establish the output common-mode voltage at Pin 5 (OUT).
The uncommitted amplifier is a high open-loop gain, low offset,
low drift op amp, with its noninverting input connected to the
internal 10 kΩ resistor. Both inputs are accessible to the user.
Careful layout design has resulted in exceptional common-
mode rejection at higher frequencies. The inputs are connected
to Pin 1 (+IN) and Pin 8 (−IN), which are adjacent to the power
pins, Pin 2 (−VS) and Pin 7 (+VS). Because the power pins are at
ac ground, input impedance balance and, therefore, common-
mode rejection are preserved at higher frequencies.
R
G
6
The output of the difference amplifier is internally connected to
a 10 kΩ resistor trimmed to better than 0.1ꢀ absolute accuracy.
The resistor is connected to the noninverting input of the
output amplifier and is accessible at Pin 4 (CFILT). A capacitor
can be connected to implement a low-pass filter, a resistor can
be connected to further reduce the output voltage, or a clamp
circuit can be connected to limit the output swing.
100kΩ
100kΩ
10kΩ
G = +0.1
8
–IN
+IN
–IN
+IN
OUT
A2
5
–IN
10kΩ
A1
+IN
1
10kΩ
3
4
V
C
FILT
REF
Figure 28. Simplified Schematic
C
FILT
+V
S
7
4
AD628
100kΩ
10kΩ
8
–IN
+IN
G = +0.1
–IN
10kΩ
A1
+IN
OUT
5
A2
+IN
–IN
100kΩ
1
10kΩ
2
3
6
–V
V
REF
R
S
G
R
EXT3
R
R
EXT1
REFERENCE
VOLTAGE
EXT2
Figure 29. Circuit Connections
Rev. G | Page 15 of 20
AD628
APPLICATIONS INFORMATION
GAIN ADJUSTMENT
INPUT VOLTAGE RANGE
VREF and the supply voltage determine the common-mode
input voltage range. The relation is expressed by
The AD628 system gain is provided by an architecture
consisting of two amplifiers (see Figure 29). The gain of the
input stage is fixed at 0.1; the output buffer is user adjustable
as GA2 = 1 + REXT1/REXT2. The system gain is then
VCM
≤11(VS+ –1.2 V) −10 VREF
≥11(VS− +1.2 V) −10 VREF
(2)
UPPER
VCM
LOWER
⎛
⎞
⎟
⎟
⎠
REXT1
REXT2
⎜
GTOTAL = 0.1× 1+
(1)
where:
VS+ is the positive supply.
⎜
⎝
At a 2 nA maximum, the input bias current of the buffer amplifier
is very low and any offset voltage induced at the buffer amplifier
by its bias current may be neglected (2 nA × 10 kΩ = 20 μV).
However, to absolutely minimize bias current effects, select
VS− is the negative supply.
1.2 V is the headroom needed for suitable performance.
Equation 2 provides a general formula for calculating the
common-mode input voltage range. However, keep the AD628
within the maximum limits listed in Table 1 to maintain
optimal performance. This is illustrated in Figure 30 where the
maximum common-mode input voltage is limited to 120 V.
Figure 31 shows the common-mode input voltage bounds for
single-supply voltages.
REXT1 and REXT2 so that their parallel combination is 10 kΩ. If
practical resistor values force the parallel combination of REXT1
and REXT2 below 10 kΩ, add a series resistor (REXT3) to make up
for the difference. Table 5 lists several values of gain and
corresponding resistor values.
200
Table 5. Nearest Standard 1% Resistor Values for
Various Gains (see Figure 29)
150
100
50
Total Gain
(V/V)
A2 Gain
(V/V)
REXT1 (Ω)
10 k
20 k
25.9 k
49.9 k
100 k
200 k
499 k
1 M
REXT2 (Ω)
∞
20 k
18.7 k
12.4 k
11 k
REXT3 (Ω)
0.1
0.2
0.25
0.5
1
1
2
0
0
0
0
0
0
0
0
MAXIMUM INPUT COMMON-MODE
0
2.5
5
10
20
50
100
VOLTAGE WHEN V
= GND
REF
–50
–100
–150
–200
2
5
10
10.5 k
10.2 k
10.2 k
0
2
4
6
8
10
12
14
16
To set the system gain to <0.1, create an attenuator by placing
Resistor REXT4 from Pin 4 (CFILT) to the reference voltage. A
divider is formed by the 10 kΩ resistor that is in series with the
positive input of A2 and Resistor REXT4. A2 is configured for
unity gain.
SUPPLY VOLTAGE (±V)
Figure 30. Input Common-Mode Voltage vs. Supply Voltage
for Dual Supplies
100
80
Using a divider and setting A2 to unity gain yields
60
⎛
⎜
⎜
⎝
⎞
⎟
⎟
⎠
40
REXT4
10 kꢁ + REXT4
GW /DIVIDER = 0.1×
×1
20
MAXIMUM INPUT COMMON-MODE
0
–20
–40
–60
–80
VOLTAGE WHEN V
= MIDSUPPLY
REF
0
2
4
6
8
10
12
14
16
SINGLE-SUPPLY VOLTAGE (V)
Figure 31. Input Common-Mode Voltage vs.
Supply Voltage for Single Supplies
Rev. G | Page 16 of 20
AD628
The differential input voltage range is constrained to the linear
operation of the internal amplifiers, A1 and A2. The voltage
applied to the inputs of A1 and A2 should be between
VS− + 1.2 V and VS+ − 1.2 V. Similarly, the outputs of A1 and A2
should be kept between VS− + 0.9 V and VS+ − 0.9 V.
Designing such an application can be done in a few simple
steps, which includes the following:
•
Determine the required gain. For example, if the input
voltage must be changed from 10 V to +5 V, the gain now
needs to be +5/+20 or +0.25.
VOLTAGE LEVEL CONVERSION
•
Determine if the circuit common-mode voltage should be
changed. An AD7940 ADC is illustrated for this example.
When operating from a 5 V supply, the common-mode
voltage of the AD7940 is half the supply, or 2.5 V. If the
AD628 reference pin and the lower terminal of the 10 kΩ
resistor are connected to a 2.5 V voltage source, the output
common-mode voltage is 2.5 V.
Industrial signal conditioning and control applications typically
require connections between remote sensors or amplifiers and
centrally located control modules. Signal conditioners provide
output voltages of up to 10 V full scale. However, ADCs or
microprocessors operating on single 3.3 V to 5 V logic supplies
are now the norm. Thus, the controller voltages require further
reduction in amplitude and reference.
Table 6 shows resistor and reference values for commonly used
single-supply converter voltages. REXT3 is included as an option
to balance the source impedance into A2. This is described in
more detail in the Gain Adjustment section.
Furthermore, voltage potentials between locations are seldom
compatible, and power line peaks and surges can generate
destructive energy between utility grids. The AD628 offers an
ideal solution to both problems. It attenuates otherwise destruc-
tive signal voltage peaks and surges by a factor of 10 and shifts
the differential input signal to the desired output voltage.
Table 6. Nearest 1% Resistor Values for Voltage Level
Conversion Applications
ADC
Supply
Desired
Output
Conversion from voltage-driven or current-loop systems is
easily accomplished using the circuit shown in Figure 32. This
shows a circuit for converting inputs of various polarities and
amplitudes to the input of a single-supply ADC.
Input
VREF REXT1 REXT2
(kΩ) kΩ)
15 10
Voltage (V) Voltage (V) Voltage (V) (V)
10
5
5
5
5
5
3
3
3
3
2.5
2.5
2.5
0
2.5
39.7 10
39.7 10
89.8 10
+10
+5
10
2.5
To adjust common-mode output voltage, connect Pin 3 (VREF
)
2.5
0
and the lower end of the 10 kΩ resistor to the desired voltage.
The output common-mode voltage is the same as the reference
voltage.
1.25
1.25
1.25
1.25
1.25 2.49 10
5
1.25 15
10
10
+10
+5
0
0
15
39.7 10
+12V
–12V
0.1μF
10μF
0.1μF
10μF
7
2
+V
S
–V
S
–IN
8
AD628
10kꢀ
A1
100kꢀ
100kꢀ
SERIAL DATA
±10V
SCLK
4
5
6
10kꢀ
+IN
1
OUT
49.9ꢀ
AD7940
3
SDATA
A2
V
5
IN
V
CS
GND
2
DD
33nF
10kꢀ
1
V
C
FILT
REF
R
G
6
3
4
10μF
0.1μF
R
EXT1
15nF
15kꢀ
V
V
IN
OUT
+12V
2
3
REF195
4
0.1μF
10μF
R
EXT2
10kꢀ
8
5
6
2
3
AD8606
2/2
7
AD8606
1/2
1
AD628 REFERENCE VOLTAGE
4
10kꢀ
10kꢀ
Figure 32. Level Shifter
Rev. G | Page 17 of 20
AD628
CURRENT LOOP RECEIVER
MONITORING BATTERY VOLTAGES
Analog data transmitted on a 4 to 20 mA current loop can be
detected with the receiver shown in Figure 33. The AD628 is an
ideal choice for such a function because the current loop is
driven with a compliance voltage sufficient to stabilize the loop,
and the resultant common-mode voltage often exceeds commonly
used supply voltages. Note that with large shunt values, a resistance
of equal value must be inserted in series with the inverting
input to compensate for an error at the noninverting input.
Figure 34 illustrates how the AD628 is used to monitor a battery
charger. Voltages approximately eight times the power supply
voltage can be applied to the input with no damage. The resistor
divider action is well suited for the measurement of many
power supply applications, such as those found in battery
chargers or similar equipment.
For proper operation, the common-mode voltage must satisfy
the input specifications in Table 1, as well as Equation 2.
V
= 15V
+15V –15V
CM
3
7
2
4
AD628
10kꢀ
249ꢀ
100kꢀ
1
8
10kꢀ
0V TO 5V
TO ADC
5
249ꢀ
100kꢀ
10kꢀ
6
I = 4 TO 20mA
210kꢀ
100kꢀ
+2.5V
9.53kꢀ
Figure 33. Level Shifter for 4 to 20 mA Current Loop
+5V
nV
(V)
–IN
BAT
100kꢀ
100kꢀ
10kꢀ
10kꢀ
+IN
–IN
OUT
TO ADC
A2
G = +0.1
A1
R
–IN
+IN
EXT1
10kꢀ
CHARGING
CIRCUIT
+1.5V
BATTERY
R
G
+IN
OTHER
BATTERIES IN
CHARGING
CIRCUIT
10kꢀ
AD628
V
C
FILT
REF
–5V
Figure 34. Battery Voltage Monitor
Rev. G | Page 18 of 20
AD628
FILTER CAPACITOR VALUES
KELVIN CONNECTION
Connect a capacitor to Pin 4 (CFILT) to implement a low-pass
filter. The capacitor value is
In certain applications, it may be desirable to connect the
inverting input of an amplifier to a remote reference point.
This eliminates errors resulting in circuit losses in inter-
connecting wiring. The AD628 is particularly suited for this
type of connection. In Figure 35, a 10 kΩ resistor added in the
feedback matches the source impedance of A2. This is
described in more detail in the Gain Adjustment section.
C = 15.9/ft (μF)
where ft is the desired 3 dB filter frequency.
Table 7 shows several frequencies and their closest standard
capacitor values.
Table 7. Capacitor Values for Various Filter Frequencies
Frequency (Hz)
Capacitor Value (μF)
10
1.5
50
0.33
60
0.27
100
400
1 k
5 k
10 k
0.15
0.039
0.015
0.0033
0.0015
+V
S
–IN
100kꢀ
100kꢀ
10kꢀ
10kꢀ
CIRCUIT
LOSS
+IN
A2
–IN
OUT
G = +0.1
A1
–IN
+IN
10kꢀ
R
G
LOAD
+IN
10kꢀ
AD628
V
REF
C
FILT
–V
S
V
/2
S
Figure 35. Kelvin Connection
Rev. G | Page 19 of 20
AD628
OUTLINE DIMENSIONS
3.20
3.00
2.80
8
1
5
4
5.15
4.90
4.65
3.20
3.00
2.80
PIN 1
0.65 BSC
0.95
0.85
0.75
1.10 MAX
0.80
0.60
0.40
8°
0°
0.15
0.00
0.38
0.22
0.23
0.08
SEATING
PLANE
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 36. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
5.00 (0.1968)
4.80 (0.1890)
8
1
5
4
6.20 (0.2441)
5.80 (0.2284)
4.00 (0.1574)
3.80 (0.1497)
0.50 (0.0196)
0.25 (0.0099)
1.27 (0.0500)
BSC
45°
1.75 (0.0688)
1.35 (0.0532)
0.25 (0.0098)
0.10 (0.0040)
8°
0°
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
1.27 (0.0500)
0.40 (0.0157)
0.25 (0.0098)
0.17 (0.0067)
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 37. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body (R-8)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model
AD628AR
Temperature Range
−40°C to +85°C
Description
Package Option
Branding
8-Lead SOIC_N
R-8
AD628AR-REEL
AD628AR-REEL7
AD628ARZ1
AD628ARZ-RL1
AD628ARZ-R71
AD628ARM
AD628ARM-REEL
AD628ARM-REEL7
AD628ARMZ1
AD628ARMZ-RL1
AD628ARMZ-R71
AD628-EVAL
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
8-Lead SOIC_N 13" Reel
8-Lead SOIC_N 7" Reel
8-Lead SOIC_N
8-Lead SOIC_N 13" Reel
8-Lead SOIC_N 7" Reel
8-Lead MSOP
8-Lead MSOP 13" Reel
8-Lead MSOP 7" Reel
8-Lead MSOP
8-Lead MSOP 13" Reel
8-Lead MSOP 7" Reel
Evaluation Board
R-8
R-8
R-8
R-8
R-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
JGA
JGA
JGA
JGZ
JGZ
JGZ
1 Z = RoHS Compliant Part.
©2002–2007 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
C02992-0-4/07(G)
Rev. G | Page 20 of 20
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