ZL60304_07 [ZARLINK]
Parallel Fiber Optic Transceiver Parallel Fiber Optic Transceiver; 并行光纤收发器并行光纤收发器
| 型号： | ZL60304_07 |
| 厂家： | 
ZARLINK SEMICONDUCTOR INC |
| 描述： | Parallel Fiber Optic Transceiver Parallel Fiber Optic Transceiver |
| 文件： | 总6页 (文件大小：274K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ZL60304
Parallel Fiber Optic Transceiver
(4 + 4) x 3.125 Gbps
Shortform Data Sheet
March 2007
A full Data Sheet is available to qualified customers. To
register, please send an email to opto@zarlink.com.
Ordering Information
ZL60304MLDC
Transceiver
ZL60304MMDC Transceiver with EMI-clip
0°C to +80°C
•
Link reach with 50/125 µm 500 MHz. km fiber,
300-m at 2.5 Gbps and 90-m at 3.125 Gbps
Channel BER better than 10-12
Features
•
•
Industry standard MPO/MTP ribbon fiber
•
•
•
•
•
Compatible with POP4 MSA usage
4 Transmit channels and 4 Receive channels
Data rate up to 3.125 Gbps per channel
850 nm VCSEL array
connector interface
•
•
•
•
Pluggable MegArray® connector
Laser class 1 M IEC 60825-1:2001 compliant
Low power consumption, < 1 W
Power supply 3.3 V
Data I/O is CML compatible
VCCA Rx VCCB Rx VEE Rx
Rx_EN Rx_SD SQ_EN
RX0
Trans-
Impedance
and
DOUT0+
DOUT0-
RX1
PIN Array
RX2
Limiting
Amplifier
DOUT3+
DOUT3-
RX3
DIN3+
DIN3-
TX3
TX2
VCSEL
Driver
VCSEL
Array
TX1
DIN0+
DIN0-
TX0
VCSEL Driver Controller
VCC Tx
Tx_EN
Tx_DIS
RESET
FAULT
VEE TX
Figure 1 - Transceiver Block Diagram
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2007, Zarlink Semiconductor Inc. All Rights Reserved.
ZL60304
Shortform Data Sheet
Applications
•
•
•
•
•
•
•
High-speed interconnects within and between switches, routers and transport equipment
Server-Server Clusters, Super-computing interconnections
InfiniBand 4x-SX compliant
Fibre Channel connections
XAUI based interconnections
Proprietary backplanes
Interconnects rack-to-rack, shelf-to-shelf, board-to-board, board-to-optical backplane
Description
The ZL60304 is a very high-speed transceiver for parallel fiber applications. This transceiver performs E/O and O/E
conversions for data transmission over multimode fiber ribbon.
The ZL60304 provides an effective solution for XAUI transmission of optical fibre, providing advantages in terms of
power consumption, edge and board density over competing solutions.
The transmit section converts parallel electrical input signals via a laser driver and a VCSEL array into parallel
optical output signals at a wavelength of 850 nm.
The receive section converts parallel optical input signals via a PIN photodiode array and a transimpedance and
limiting amplifier, into electrical output signals.
The module is fitted with two pluggable industry-standard connectors. For the electrical interface, a 100 position
FCI MegArray® receptacle is used. For the optical interface, an industry-standard MTPTM(MPO) connector is used,
which is compliant with IEC 61754-7. This provides ease of assembly on the host board and enables provisioning of
bandwidth on demand.
Reliability assurance is based on Telcordia GR-468-CORE and the parts are compliant to the EU directive
2002/95/EC issued 27 January 2003 [RoHS].
Exemption 6 & 7
2
Zarlink Semiconductor Inc.
ZL60304
Shortform Data Sheet
Classified in accordance with IEC 60825-1/A2:2001, IEC 60825-2: 2000
Class 1 M Laser Product
Emitted wavelength: 840 nm
Module front view - MTP key up
Tx0
Tx1
Tx2
Tx3
−
−
−
−
Rx3
Rx2
Rx1
Rx0
Host printed circuit board
Table 1 - Transceiver Optical Channel Assignment
3
Zarlink Semiconductor Inc.
NOTES:-
A1
A10
n0,58
`0,05
n0,05
A B-C
j
1. All dimensions in mm.
A
C
2. Tolerancing per ASME Y14.5M-1994.
18,16
7,48
2-56 UNC-2B
n2,5
n0,15m
n0,15m
A B-C
A B-C
j
n3,63
n1,3
n0,15m
n0,15m
A
j
j
j
2-56 UNC-2B
B
3,50 Deep MIN
A B-C
36,87
27,64
FRONT VIEW ( 2 : 1 )
14,4
30,23
31,75
Projection Method
© Zarlink Semiconductor 2002. All rights reserved.
ISSUE
Package code
Drawing type
MJ
3
JS004296 rev.3
1
2
Previous package codes
JS004296R1A JS004296 rev.2
ACN
Package Drawing - Module Layout
12-JUN-03
DATE
APPRD.
24-JAN-04 24-JAN-05
Title
TD/BE MD/MA MD/MA
JS004296
17,5
14,4
(n2,69 `0,12 Hole)
n0,1 A B-C
j
Max product outline
Component keep-out area.
n1,70 `0,12 Holes
n0,1
A B-C
j
n3,00 MIN pads, Keep Out
n0,1 A B-C
j
K1
A1
n0,58 `0,05 Pads
n0,05
A B-C
j
A10
K10
n2,69 `0,12 Hole
n0,1 A
j
n4,30 MIN pads (3x), Keep Out
n0,1
A B-C
j
C
B
A
1,145
13,72
NOTES:-
1. All dimensions in mm.
2. Tolerancing per ASME Y14.5M-1994.
Projection Method
© Zarlink Semiconductor 2002. All rights reserved.
Package code
Drawing type
MJ
2
ISSUE
ACN
3
1
Previous package codes
Package Drawing,
JS004296R1A JS004296 rev.2
JS004296 rev.3
14-FEB-05
MD/MA
Host Circuit Board Footprint Layout
24-JAN-05
DATE
APPRD.
12-JUN-03
Title
TD/BE
MD/MA
JS004296
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Copyright Zarlink Semiconductor Inc. All Rights Reserved.
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