DG541 [VISHAY]
Wideband/Video T Switches; 宽带/视频T交换机型号: | DG541 |
厂家: | VISHAY |
描述: | Wideband/Video T Switches |
文件: | 总11页 (文件大小:133K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
DG540/541/542
Vishay Siliconix
Wideband/Video “T” Switches
FEATURES
BENEFITS
APPLICATIONS
D Wide Bandwidth: 500 MHz
D Low Crosstalk: –85 dB
D Flat Frequency Response
D High Color Fidelity
D RF and Video Switching
D RGB Switching
D High Off-Isolation: –80 dB @ 5 MHz
D “T” Switch Configuration
D Low Insertion Loss
D Local and Wide Area Networks
D Video Routing
D Improved System Performance
D Reduced Board Space
D Reduced Power Consumption
D Improved Data Throughput
D TTL and CMOS Logic Compatible
D Fast Switching—tON: 45 ns
D Low rDS(on): 30 W
D Fast Data Acquisition
D ATE
D Radar/FLR Systems
D Video Multiplexing
DESCRIPTION
The DG540/541/542 are high performance monolithic
wideband/video switches designed for switching RF, video
and digital signals. By utilizing a “T” switch configuration on
each channel, these devices achieve exceptionally low
crosstalk and high off-isolation. The crosstalk and off-isolation
of the DG540 are further improved by the introduction of extra
GND pins between signal pins.
To achieve TTL compatibility, low channel capacitances and
fast switching times, the DG540 family is built on the
Vishay Siliconix proprietary D/CMOS process. Each switch
conducts equally well in both directions when on.
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG540
DG540
Dual-In-Line
PLCC
IN
D
IN
D
1
2
20
19
18
17
16
15
14
13
12
11
1
2
1
2
3
2
1
20 19
GND
GND
3
4
5
6
7
8
18
17
16
S
GND
TRUTH TABLE
1
S
1
S
2
4
V–
S
2
Logic
Switch
V–
V+
5
GND
V+
0
1
OFF
ON
GND
GND
S
4
15 GND
14
6
GND
S
3
S
4
S
3
7
Logic “0” v 0.8 V
Logic “1” w 2 V
GND
GND
8
9
10 11 12 13
Top View
D
D
3
9
4
IN
4
IN
3
10
Top View
Document Number: 70055
S-00399—Rev. G, 13-Sep-99
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DG540/541/542
Vishay Siliconix
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG541
DG542
Dual-In-Line and SOIC
Dual-In-Line and SOIC
IN
D
IN
2
1
IN
D
IN
D
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1
1
1
2
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
D
2
1
2
GND
GND
S
S
2
S
1
S
2
V–
V+
V–
V+
GND
GND
S
4
S
3
S
4
S
3
GND
GND
D
4
D
3
D
4
D
3
IN
4
IN
3
Top View
Top View
TRUTH TABLE
-
DG541
TRUTH TABLE
-
DG542
Logic
Switch
Logic
SW1, SW2
SW3, SW4
0
1
OFF
ON
0
1
OFF
ON
ON
OFF
Logic “0” v 0.8 V
Logic “1” w 2 V
Logic “0” v 0.8 V
Logic “1” w 2 V
ORDERING INFORMATION
Temp Range
Package
Part Number
DG540
20-Pin Plastic DIP
20-Pin PLCC
DG540DJ
–40 to 85_C
–55 to 125_C
DG540DN
DG540AP
20-Pin Sidebraze
DG540AP/883
DG541
16-Pin Plastic DIP
DG541DJ
DG541DY
DG541AP
–40 to 85_C
16-Pin Narrow SOIC
–55 to 125_C
16-Pin Sidebraze
DG541AP/883, 5962-9076401MEA
DG542
16-Pin Plastic DIP
DG542DJ
–40 to 85_C
16-Pin Narrow SOIC
DG542DY
DG542AP
–55 to 125_C
16-Pin Sidebraze
DG542AP/883, 5962-91555201MEA
Document Number: 70055
S-00399—Rev. G, 13-Sep-99
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DG540/541/542
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
V+ to V– . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 21 V
V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 21 V
V– to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –19 V to +0.3 V
Power Dissipation (Package)a
b
16-Pin Plastic DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 470 mW
c
20-Pin Plastic DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 800 mW
d
16-Pin Narrow Body SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 640 mW
Digital Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (V–) –0.3 V to (V+) +0.3 V
or 20 mA, whichever occurs first
d
20-Pin PLCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 800 mW
e
16-, 20-Pin Sidebraze DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 900 mW
V , V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (V–) –0.3 V to (V–) +14 V
S
D
or 20 mA, whichever occurs first
Notes:
a. All leads welded or soldered to PC Board.
b. Derate 6.5 mW/_C above 25_C
c. Derate 7 mW/_C above 25_C
d. Derate 10 mW/_C above 75_C
e. Derate 12 mW/_C above 75_C
Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Current, S or D (Pulsed 1 ms, 10% duty cycle max) . . . . . . . . . . . . . . 40 mA
Storage Temperature
(AP Suffix) . . . . . . . . . . . . . . . . . . –65 to 150_C
(DJ, DN, DY Suffixes) . . . . . . . . –65 to 125_C
SCHEMATIC DIAGRAM (TYPICAL CHANNEL)
V+
GND
V
REF
S
D
–
+
IN
V–
FIGURE 1.
Document Number: 70055
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DG540/541/542
Vishay Siliconix
a
SPECIFICATIONS
Test Conditions
Unless Specified
A Suffix
–55 to 125_C
D Suffixes
–40 to 85_C
V+ = 15 V, V– = –3 V
f
Parameter
Symbol
Tempb Typc Mind Maxd Mind Maxd Unit
V
INH
= 2 V, V
= 0.8 V
INL
Analog Switch
Analog Signal Range
V
V– = –5 V, V+ = 12 V
Full
–5
5
–5
5
V
ANALOG
Drain-Source
On-Resistance
Room
Full
30
60
100
60
75
r
DS(on)
I
S
= –10 mA, V = 0 V
W
D
r
Match
Dr
Room
2
6
6
DS(on)
DS(on)
S(off)
Source Off
Leakage Current
Room
Full
–0.05
–10
–500
10
500
–10
–100
10
100
I
V
S
= 0 V, V = 10 V
D
Drain Off
Leakage Current
Room
Full
–0.05
–0.05
–10
–500
10
500
–10
–100
10
100
I
I
V
S
= 10 V, V = 0 V
nA
D(off)
D
Channel On
Leakage Current
Room
Full
–10
–1000
10
1000
–10
–100
10
100
V
S
= V = 0 V
D
D(on)
Digital Control
Input Voltage High
Input Voltage Low
V
Full
Full
2
2
INH
V
V
0.8
0.8
INL
IN
Room
Full
0.05
–1
–20
1
20
–1
–20
1
20
Input Current
I
V
IN
= GND or V+
mA
Dynamic Characteristics
e
On State Input Capacitance
C
C
C
V
= V = 0 V
Room
Room
Room
Room
14
2
20
4
20
4
S(on)
S(off)
D(off)
S
D
e
Off State Input Capacitance
V
= 0 V
= 0 V
pF
S
D
e
Off State Output Capacitance
V
2
4
4
Bandwidth
BW
R
= 50 W, See Figure 5
500
45
MHz
L
DG540
DG541
Room
Full
70
130
70
130
Turn On Time
t
ON
Room
Full
55
20
25
100
160
100
160
R
C
= 1 kW
= 35 pF
50% to 90%
See Figure 2
DG542
L
L
ns
DG540
DG541
Room
Full
50
85
50
85
Turn Off Time
Charge Injection
Off Isolation
t
OFF
Room
Full
60
85
60
85
DG542
C
= 1000 pF, V = 0 V
S
See Figure 3
L
Q
Room
–25
pC
dB
DG540
DG541
DG542
Room
Room
Room
–80
–60
–75
R
R
= 75 W
= 75 W
f = 5 MHz
IN
L
OIRR
See Figure 4
R
= 10 W, R = 75 W
L
IN
All Hostile Crosstalk
Power Supplies
Positive Supply Current
Negative Supply Current
X
Room
–85
TALK(AH)
f = 5 MHz, See Figure 6
Room
Full
3.5
6
9
6
9
I+
I–
All Channels On or Off
mA
Room
Full
–3.2
–6
–9
–6
–9
Notes:
a. Refer to PROCESS OPTION FLOWCHART.
b. Room = 25_C, Full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not subject to production test.
f.
V
IN
= input voltage to perform proper function.
Document Number: 70055
S-00399—Rev. G, 13-Sep-99
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DG540/541/542
Vishay Siliconix
TYPICAL CHARACTERISTICS (_2C5 UNLESS NOTED)
Supply Curent vs. Temperature
I
, I
vs. Temperature
D(off) S(off)
6
5
100 nA
10 nA
1 nA
4
I+
3
2
1
100 pA
10 pA
I
GND
0
–1
–2
–3
–4
–5
I–
1 pA
0.1 pA
–55 –35 –15
5
25
45
65
85 105 125
–55
–25
0
25
50
75
100
125
Temperature (_C)
Temperature (_C)
r
vs. Drain Voltage
V+ Constant
V– Constant
DS(on)
160
140
120
100
80
42
40
38
36
34
32
30
20
18
42
40
38
36
34
32
30
20
18
V+ = 10 V
V+ = 15 V
V– = –3 V
125_C
V– = –5 V
V+ = 12 V
25_C
V– = –3 V
60
V+ = 15 V
–55_C
40
V– = –1 V
20
0
–3
–1
1
3
5
7
9
11
–5 –4 –3 –2 –1
0
10 11 12 13 14 15 16
V+ – Positive Supply (V)
V
D
– Drain Voltage (V)
V– – Negative Supply (V)
On Capacitance
Off Isolation
22
20
18
16
14
12
10
8
–110
–100
R
L
= 75 W
–90
–80
–70
–60
–50
–40
–30
–20
–10
DG540
DG542
DG541
6
10
f – Frequency (MHz)
100
1
0
2
4
6
8
10
12
14
V
D
– Drain Voltage (V)
Document Number: 70055
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DG540/541/542
Vishay Siliconix
TYPICAL CHARACTERISTICS (_2C5 UNLESS NOTED)
Off Isolation vs. Frequency and Load Resistance
(DG540)
All Hostile Crosstalk
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
–110
–100
R
L
= 75 W
DG540
–90
–80
–70
–60
–50
–40
–30
–20
–10
180 W
1 kW
DG542
10 kW
DG541
10
100
1
10
f – Frequency (MHz)
100
1
f – Frequency (MHz)
Switching Times vs. Temperature
(DG540/541)
Charge Injection vs. V
S
40
30
90
80
70
60
50
40
30
20
20
10
t
ON
0
–10
–20
–30
–40
t
OFF
C
L
= 1000 pF
10
0
–3 –2 –1
0
1
2
3
4
5
6
7
8
–55
–25
0
25
50
75
100
125
V
S
– Source Voltage (V)
Temperature (_C)
Switching and Break-Before-Make Time
vs. Temperature (DG542)
Operating Supply Voltage Range
20
18
16
14
12
10
90
80
t
ON
70
60
50
40
30
20
t
BBM
Operating
Voltage
Area
t
OFF
10
0
–55
–25
0
25
50
75
100
125
0
–1
–2
–3
–4
–5
–6
Temperature (_C)
V– – Negative Supply (V)
Document Number: 70055
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DG540/541/542
Vishay Siliconix
TEST CIRCUITS
+15 V
t <20 ns
t <20 ns
f
r
3 V
V+
Logic
Input
50%
S
D
3 V
V
O
IN
C
35 pF
L
Switch
Input
R
1 kW
L
V
S
V–
GND
90%
Switch
Output
0
–3 V
(includes fixture and stray capacitance)
t
t
ON
OFF
C
L
R
L
V
O
= V
S
R
L
+ r
DS(on)
FIGURE 2. Switching Time
DV
O
+15 V
V+
R
g
V
O
S
D
V
O
IN
C
L
V
g
1000 pF
3 V
IN
ON
OFF
ON
X
V–
GND
DV = measured voltage error due to charge injection
–3 V
O
The charge injection in coulombs is DQ = C x DV
L
O
FIGURE 3. Charge Injection
+15 V
+15 V
C
C
V+
V+
V
R
V
O
O
S
D
V
S
S
D
V
S
R
= 50 W
g
R
g
= 75 W
R
L
L
75 W
IN
IN
50 W
0 V, 2.4 V
0 V, 2.4 V
GND
V–
GND
V–
C
C
–3 V
–3 V
V
V
S
Off Isolation = 20 log
C = RF Bypass
O
FIGURE 4. Off Isolation
FIGURE 5. Bandwidth
Document Number: 70055
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DG540/541/542
Vishay Siliconix
TEST CIRCUITS
C
+15 V
V+
S
1
D
1
V
O
R
75 W
L
10 W
2.4 V
IN
X
S
D
D
2
2
S
3
3
R
L
S
4
D
4
R
L
GND
V–
R
L
C
–15 V
V
OUT
X
+ 20 log
TALK(AH)
10
V
IN
FIGURE 6. All Hostile Crosstalk
APPLICATIONS
Device Description
The DG540/541/542 family of wideband switches offers true
bidirectional switching of high frequency analog or digital
signals with minimum signal crosstalk, low insertion loss, and
negligible non-linearity distortion and group delay.
attenuation effect on the analog signal – which is frequency
dependent (like an RC low-pass filter). The –3-dB bandwidth
oftheDG540istypically500MHz (into 50 W). This measured
figure of 500 MHz illustrates that the switch channel can not
be represented by a two stage RC combination. The on
capacitance of the channel is distributed along the
on-resistance, and hence becomes a more complex multi
stage network of R’s and C’s making up the total rDS(on) and
CS(on). See Application Note AN502 for more details.
Built on the Siliconix D/CMOS process, these “T” switches
provide excellent off-isolation with a bandwidth of around
500 MHz (350 MHz for DG541). Silicon-gate D/CMOS
processing also yields fast switching speeds.
An on-chip regulator circuit maintains TTL input compatibility
over the whole operating supply voltage range, easing control
logic interfacing.
Off-Isolation and Crosstalk
Circuit layout is facilitated by the interchangeability of source
and drain terminals.
Off-isolation and crosstalk are affected by the load resistance
and parasitic inter-electrode capacitances.
Higher
off-isolation is achieved with lower values of RL. However, low
values of RL increaseinsertionlossrequiringgainadjustments
down the line. Stray capacitances, even a fraction of 1 pF, can
cause a large crosstalk increase. Good layout and ground
shielding techniques can considerably improve your ac circuit
performance.
Frequency Response
A single switch on-channel exhibits both resistance [rDS(on)
and capacitance [CS(on)]. This RC combination has an
]
Document Number: 70055
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DG540/541/542
Vishay Siliconix
APPLICATIONS
Power Supplies
Suitable decoupling capacitors are 1- to 10-mF tanta-
lum bead, plus 10- to 100-nF ceramic.
A useful feature of the DG54X family is its power supply
flexibility. It can be operated from a single positive supply (V+)
if required (V– connected to ground).
+15 V
Note that the analog signal must not exceed V– by more than
–0.3 V to prevent forward biasing the substrate p-n junction.
The use of a V– supply has a number of advantages:
+
C
C
2
1
1. It allows flexibility in analog signal handling, i.e., with V– =
–5 V and V+ = 12 V; up to "5-V ac signals can be
controlled.
V+
S
1
S
2
S
3
S
4
D
1
D
2
D
3
D
4
2. The value of on capacitance [CS(on)] may be reduced. A
property known as ‘the body-effect’ on the DMOS switch
devices causes various parametric effects to occur. One
of these effects is the reduction in CS(on) for an increasing
V body–source. Note, however, that to increase V–
normally requires V+ to be reduced (since V+ to V– = 21 V
DG540
GNDs
max.). Reduction in V+ causes an increase in rDS(on)
,
V–
hence a compromise has to be achieved. It is also useful
to note that optimum video linearity performance (e.g.,
differential phase and gain) occurs when V– is around
–3 V.
C
C
2
1
C
1
C
2
= 10 mF Tantalum
= 0.1 mF Ceramic
+
3. V– eliminates the need to bias the analog signal using
potential dividers and large coupling capacitors.
–3 V
FIGURE 7. Supply Decoupling
Decoupling
It is an established RF design practice to incorporate sufficient
bypass capacitors in the circuit to decouple the power supplies
to all active devices in the circuit. The dynamic performance of
the DG54X is adversely affected by poor decoupling of power
supply pins. Also, of even more significance, since the
substrate of the device is connected to the negative supply,
adequate decoupling of this pin is essential.
Board Layout
PCB layout rules for good high frequency performance must
be observed to achieve the performance boasted by the
DG540. Some tips for minimizing stray effects are:
1. Use extensive ground planes on double sided PCB,
separating adjacent signal paths. Multilayer PCB is even
better.
Rules:
1. Decoupling capacitors should be incorporated on all
power supply pins (V+, V–). (See Figure 7.)
2. Keep signal paths as short as practically possible, with all
channel paths of near equal length.
2. They should be mounted as close as possible to the
device pins.
3. Careful arrangement of ground connections is also very
important. Star connected system grounds eliminate
signal current flowing through ground path parasitic
resistance from coupling between channels.
3. Capacitors should have good high frequency
characteristics–tantalumbeadand/ormonolithicceramic
types are adequate.
Document Number: 70055
S-00399—Rev. G, 13-Sep-99
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DG540/541/542
Vishay Siliconix
APPLICATIONS
Figure 8 shows a 4-channel video multiplexer using a DG540.
+15 V
V+
CH
1
CH
2
Si582
75 W
+
CH
75 W
3
A = 2
75 W
CH
4
–
DIS
250 W
75 W
DG540
V–
250 W
75 W
–3 V
TTL Channel Select
FIGURE 8. 4 by 1 Video Multiplexing Using the DG540
Figure 9 shows an RGB selector switch using two DG542s.
+15 V
V+
R
1
Red Out
75 W
75 W
R
2
75 W
75 W
G
1
Green Out
G
2
DG542
V–
–3 V
Si584
+15 V
V+
B
1
Blue Out
Sync Out
75 W
75 W
B
2
75 W
75 W
Sync 1
Sync 2
DG542
RGB Source Select
V–
–3 V
FIGURE 9. RGB Selector Using Two DG542s
Document Number: 70055
S-00399—Rev. G, 13-Sep-99
www.vishay.com S FaxBack 408-970-5600
4-10
Legal Disclaimer Notice
Vishay
Notice
Specifications of the products displayed herein are subject to change without notice. Vishay Intertechnology, Inc.,
or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies.
Information contained herein is intended to provide a product description only. No license, express or implied, by
estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Vishay's
terms and conditions of sale for such products, Vishay assumes no liability whatsoever, and disclaims any express
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for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications.
Customers using or selling these products for use in such applications do so at their own risk and agree to fully
indemnify Vishay for any damages resulting from such improper use or sale.
Document Number: 91000
Revision: 08-Apr-05
www.vishay.com
1
相关型号:
DG541DN-E3
IC QUAD 1-CHANNEL, SGL POLE SGL THROW SWITCH, PQCC20, PLASTIC, LCC-20, Multiplexer or Switch
VISHAY
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