TMC5160-TA_技术文档

POWER DRIVER FOR STEPPER MOTORS

INTEGRATED CIRCUITS

TMC5160 DATASHEET

Universal high voltage controller/driver for two-phase bipolar stepper motor. stealthChop™ for quiet

movement. External MOSFETs for up to 20A motor current per coil. With Step/Dir Interface and SPI.

APPLICATIONS

Robotics & Industrial Drives

Textile, Sewing Machines

Packing Machines

Factory & Lab Automation

High-speed 3D Printers

Liquid Handling

Medical

Office Automation

CCTV

ATM, Cash Recycler

Pumps and Valves

FEATURES AND BENEFITS

DESCRIPTION

2-phase stepper motors up to 20A coil current (external MOSFETs)

The TMC5160 is a high-power stepper

motor controller and driver IC with serial

communication interfaces. It combines a

flexible ramp generator for automatic

target positioning with industries’ most

advanced stepper motor driver. Using

external transistors, highly dynamic, high

torque drives can be realized. Based on

TRINAMICs sophisticated spreadCycle and

stealthChop choppers, the driver ensures

absolutely noiseless operation combined

with maximum efficiency and best motor

torque. High integration, high energy

efficiency and a small form factor enable

miniaturized and scalable systems for

cost effective solutions. The complete

solution reduces learning curve to a

minimum while giving best performance

in class.

Motion Controller with sixPoint™ramp

Step/Dir Interface with microstep interpolation microPlyer™

Voltage Range 8 … 60V DC

SPI & Single Wire UART

Encoder Interface and 2x Ref.-Switch Input

Highest Resolution 256 microsteps per full step

stealthChop2™ for quiet operation and smooth motion

Resonance Dampening for mid-range resonances

spreadCycle™ highly dynamic motor control chopper

dcStep™ load dependent speed control

stallGuard2™ high precision sensorless motor load detection

coolStep™ current control for energy savings up to 75%

Passive Braking and freewheeling mode

Full Protection & Diagnostics

Compact Size 9x9mm²TQFP48 package / 8x8mm² QFN

BLOCK DIAGRAM

Step/Dir

Ref. Switches

+V_M

1 of 2 full bridges

shown

TMC5160

Reference Switch

Processing

Interrupts

Step Multiplyer

Position

Pulse Output

Motor

C_BOOT

UART

Single Wire

SPI to

Master

SPI

Programmable

256 µStep

spreadCycle

MOTION CONTROLLER

with Linear 6 Point

RAMP Generator

C_BOOT

UART

Sequencer

MOSFET

Driver

stealthChop

Protection

& Diagnostics

Power

Supply

CLK

Oscillator / Selector

Encoder Unit

ABN

Charge

Pump

stallGuard2 coolStep

dcStep

R_SENSE

Diff. Sensing

CLK

TRINAMIC Motion Control GmbH & Co. KG

Hamburg, Germany

TMC5160 DATASHEET (Rev. 1.08 / 2018-NOV-19)

2

APPLICATION EXAMPLES: HIGH VOLTAGE – MULTIPURPOSE USE

The TMC5160 scores with complete motion controlling features, powerful external MOSFET driver stages,

and high-quality current regulation. It offers a versatility that covers a wide spectrum of applications from

battery powered, high efficiency systems up to embedded applications with 20A motor current per coil. The

TMC5160 contains the complete intelligence which is required to drive a motor. Receiving target positions

the TMC5160 manages motor movement. Based on TRINAMICs unique features stallGuard2, coolStep,

dcStep, spreadCycle, and stealthChop, the TMC5160 optimizes drive performance. It trades off velocity vs.

motor torque, optimizes energy efficiency, smoothness of the drive, and noiselessness. The small form

factor of the TMC5160 keeps costs down and allows for miniaturized layouts. Extensive support at the chip,

board, and software levels enables rapid design cycles and fast time-to-market with competitive products.

High energy efficiency and reliability deliver cost savings in related systems such as power supplies and

cooling. For smaller designs, the compatible, integrated TMC5130 driver provides 1.4A of motor current.

MINIATURIZED DESIGN FOR ONE STEPPER MOTOR

Ref.

Switches

An ABN encoder interface with scaler unit

and two reference switch inputs are used to

ensure correct motor movement. Automatic

interrupt upon deviation is available.

SPI

High-Level

Interface

M

CPU

TMC5160

Encoder

COMPACT DESIGN FOR MULTIPLE STEPPER MOTORS

An application with 2 stepper motors is

shown. Additionally, the ABN Encoder

interface and two reference switches can be

used for each motor. A single CPU controls

the whole system, as there are no real time

tasks required to move a motor. The CPU-

board and the controller / driver boards are

highly economical and space saving.

SPI or

UART

High-Level

Interface

CPU

TMC5160

M

Addr.

Chaining

with UART

TMC5160

Addr.

More TMC5160 or TMC5130 or TMC5072

The TMC5160-EVAL is part of TRINAMICs

universal evaluation board system which

provides a convenient handling of the

hardware as well as a user-friendly

software tool for evaluation. The

TMC5160 evaluation board system

consists

LANDUNGSBRÜCKE

of

three

(base

parts:

board),

ESELSBRÜCKE (connector board including

several test points), and TMC5160-EVAL.

ORDER CODES

Size [mm²]

Order code

Description

TMC5160-TA

stepper controller/driver for external MOSFETs; TQFP48

stepper controller/driver for external MOSFETs; wett. QFN8x8

-T denotes tape on reel packing (xx= TA or WA)

Evaluation board for TMC5160

Baseboard for TMC5160-EVAL and further evaluation boards.

Connector board for plug-in evaluation board system.

9 x 9

8 x 8

TMC5160-WA

TMC5160-xx-T

TMC5160-EVAL

LANDUNGSBRÜCKE

ESELSBRÜCKE

85 x 55

61 x 38

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TMC5160 DATASHEET (Rev. 1.08 / 2018-NOV-19)

3

Table of Contents

8.2

CLASSIC CONSTANT OFF TIME CHOPPER ......71

1

PRINCIPLES OF OPERATION .........................5

9

SELECTING SENSE RESISTORS....................73

VELOCITY BASED MODE CONTROL.......75

DIAGNOSTICS AND PROTECTION.........77

1.1

KEY CONCEPTS................................................6

CONTROL INTERFACES.....................................7

SOFTWARE......................................................7

MOVING AND CONTROLLING THE MOTOR........8

AUTOMATIC STANDSTILL POWER DOWN.........8

STEALTHCHOP2 & SPREADCYCLE DRIVER........8

STALLGUARD2 – MECHANICAL LOAD SENSING9

COOLSTEP – LOAD ADAPTIVE CURRENT

1.2

1.3

1.4

1.5

1.6

1.7

1.8

10

11

11.1 TEMPERATURE SENSORS................................77

11.2 SHORT PROTECTION......................................77

11.3 OPEN LOAD DIAGNOSTICS ...........................79

12

RAMP GENERATOR.....................................80

CONTROL......................................................................9

12.1 REAL WORLD UNIT CONVERSION.................80

12.2 MOTION PROFILES........................................81

12.3 VELOCITY THRESHOLDS.................................83

12.4 REFERENCE SWITCHES ..................................84

1.9

DCSTEP – LOAD DEPENDENT SPEED CONTROL..

.....................................................................10

1.10 ENCODER INTERFACE.....................................10

2

3

PIN ASSIGNMENTS.........................................11

13

STALLGUARD2 LOAD MEASUREMENT...86

2.1

2.2

PACKAGE OUTLINE........................................11

SIGNAL DESCRIPTIONS .................................12

13.1 TUNING STALLGUARD2 THRESHOLD SGT .....87

13.2 STALLGUARD2 UPDATE RATE AND FILTER ....89

13.3 DETECTING A MOTOR STALL.........................89

13.4 HOMING WITH STALLGUARD.........................89

13.5 LIMITS OF STALLGUARD2 OPERATION..........89

SAMPLE CIRCUITS..........................................15

3.1

STANDARD APPLICATION CIRCUIT ................15

EXTERNAL GATE VOLTAGE REGULATOR..........16

CHOOSING MOSFETS AND SLOPE................17

TUNING THE MOSFET BRIDGE.....................19

3.2

3.3

3.4

14

COOLSTEP OPERATION.............................90

14.1 USER BENEFITS.............................................90

14.2 SETTING UP FOR COOLSTEP ..........................90

14.3 TUNING COOLSTEP........................................92

4

5

SPI INTERFACE................................................22

4.1

4.2

4.3

SPI DATAGRAM STRUCTURE .........................22

SPI SIGNALS................................................23

TIMING .........................................................24

15

STEP/DIR INTERFACE................................93

15.1 TIMING.........................................................93

15.2 CHANGING RESOLUTION...............................94

15.3 MICROPLYER AND STAND STILL DETECTION .95

UART SINGLE WIRE INTERFACE ................25

5.1

DATAGRAM STRUCTURE.................................25

CRC CALCULATION .......................................27

UART SIGNALS ............................................27

ADDRESSING MULTIPLE SLAVES....................28

5.2

5.3

5.4

16

DIAG OUTPUTS...........................................96

16.1 STEP/DIR MODE.........................................96

16.2 MOTION CONTROLLER MODE........................96

6

7

REGISTER MAPPING.......................................30

17

DCSTEP..........................................................98

6.1

6.2

GENERAL CONFIGURATION REGISTERS ..........31

VELOCITY DEPENDENT DRIVER FEATURE

17.1 USER BENEFITS.............................................98

17.2 DESIGNING-IN DCSTEP.................................98

17.3 DCSTEP INTEGRATION WITH THE MOTION

CONTROLLER..............................................................99

17.4 STALL DETECTION IN DCSTEP MODE ............99

17.5 MEASURING ACTUAL MOTOR VELOCITY IN

DCSTEP OPERATION.................................................100

17.6 DCSTEP WITH STEP/DIR INTERFACE .........101

CONTROL REGISTER SET.............................................37

6.3

6.4

6.5

RAMP GENERATOR REGISTERS.......................39

ENCODER REGISTERS.....................................44

MOTOR DRIVER REGISTERS...........................46

STEALTHCHOP™..............................................56

7.1

AUTOMATIC TUNING.....................................56

STEALTHCHOP OPTIONS................................59

STEALTHCHOP CURRENT REGULATOR.............59

VELOCITY BASED SCALING............................62

COMBINING STEALTHCHOP AND SPREADCYCLE..

.....................................................................63

FLAGS IN STEALTHCHOP................................65

FREEWHEELING AND PASSIVE BRAKING........65

7.2

7.3

7.4

7.5

18

SINE-WAVE LOOK-UP TABLE.................104

18.1 USER BENEFITS...........................................104

18.2 MICROSTEP TABLE......................................104

19

20

EMERGENCY STOP....................................105

7.6

7.7

ABN INCREMENTAL ENCODER

INTERFACE...............................................................106

8

SPREADCYCLE AND CLASSIC CHOPPER...67

8.1 SPREADCYCLE CHOPPER ................................68

20.1 ENCODER TIMING .......................................107

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TMC5160 DATASHEET (Rev. 1.08 / 2018-NOV-19)

4

20.2 SETTING THE ENCODER TO MATCH MOTOR

RESOLUTION............................................................ 107

20.3 CLOSING THE LOOP.................................... 108

29

30

LAYOUT CONSIDERATIONS...................124

29.1 EXPOSED DIE PAD......................................124

29.2 WIRING GND............................................124

29.3 WIRING BRIDGE SUPPLY............................124

29.4 SUPPLY FILTERING......................................124

29.5 LAYOUT EXAMPLE .......................................125

21

DC MOTOR OR SOLENOID .................... 109

21.1 SOLENOID OPERATION............................... 109

QUICK CONFIGURATION GUIDE......... 110

GETTING STARTED.................................. 115

23.1 INITIALIZATION EXAMPLES......................... 115

STANDALONE OPERATION.................... 116

EXTERNAL RESET...................................... 118

CLOCK OSCILLATOR AND INPUT........ 118

22

23

PACKAGE MECHANICAL DATA..............127

30.1 DIMENSIONAL DRAWINGS TQFP48-EP.....127

30.2 DIMENSIONAL DRAWINGS QFN-WA.........129

30.3 PACKAGE CODES.........................................130

24

25

26

31

32

33

34

35

36

DESIGN PHILOSOPHY.............................131

DISCLAIMER...............................................131

ESD SENSITIVE DEVICE..........................131

TABLE OF FIGURES..................................132

REVISION HISTORY.................................133

REFERENCES ...............................................133

26.1 USING THE INTERNAL CLOCK...................... 118

26.2 USING AN EXTERNAL CLOCK....................... 118

27

28

ABSOLUTE MAXIMUM RATINGS.......... 119

ELECTRICAL CHARACTERISTICS.......... 119

28.1 OPERATIONAL RANGE ................................ 119

28.2 DC AND TIMING CHARACTERISTICS ........... 120

28.3 THERMAL CHARACTERISTICS....................... 122

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TMC5160 DATASHEET (Rev. 1.08 / 2018-NOV-19)

5

1 Principles of Operation

The TMC5160 motion controller and driver chip is an intelligent power component interfacing between

CPU and a high power stepper motor. All stepper motor logic is completely within the TMC5160. No

software is required to control the motor – just provide target positions. The TMC5160 offers a

number of unique enhancements which are enabled by the system-on-chip integration of driver and

controller. The sixPoint ramp generator of the TMC5160 uses stealthChop, dcStep, coolStep, and

stallGuard2 automatically to optimize every motor movement. The TMC5160 ideally extends the

TMC2100, TMC2130 and TMC5130 family to higher voltages and higher motor currents.

THE TMC5160 OFFERS THREE BASIC MODES OF OPERATION:

MODE 1: Full Featured Motion Controller & Driver

All stepper motor logic is completely within the TMC5160. No software is required to control the

motor – just provide target positions. Enable this mode by tying low pin SD_MODE.

MODE 2: Step & Direction Driver

An external high-performance S-ramp motion controller like the TMC4361 or a central CPU generates

step & direction signals synchronized to other components like additional motors within the system.

The TMC5160 takes care of intelligent current and mode control and delivers feedback on the state of

the motor. The microPlyer automatically smoothens motion. Tie SD_MODE high.

MODE 3: Simple Step & Direction Driver

The TMC5160 positions the motor based on step & direction signals. The microPlyer automatically

smoothens motion. No CPU interaction is required; configuration is done by hardware pins. Basic

standby current control can be done by the TMC5160. Optional feedback signals allow error detection

and synchronization. Enable this mode by tying pin SPI_MODE low and SD_MODE high.

+V_M

22n

100V

100n

16V

100n

C_E

+V_M

VSA

12VOUT

5VOUT

CB2

C_B

HB2

CB1

TMC5160

470n

charge pump

HS

11.5V Voltage

regulator

Ref. switch

processing

100n

2.2µ

5V Voltage

regulator

HB1

BMB1

R_G

2R2

&

o

Step &

Direction pulse

generation

p

VCC

e

h

r

t

o

linear 6 point

RAMP generator

S

l

o

BMB2

LB1

o

c

p

470n

h

r

C

l

a

e

t

s

r

e

l

LS

v

o

r

t

i

R_G

d

n

o

c

t

o

n

o

CSN

SCK

SDI

m

i

LB2

t

o

M

SRBH

SPI interface

47R

spreadCycle &

stealthChop

Chopper

R_S

N

stepper

motor

SDO

SRBL

programmable

sine table

4*256 entry

e

c

S

a

Control register

set

f

r

x

e

t

n

I

+V_M

C_B

DIAG / INT out

and

Stepper driver

B.Dwersteg, ©

CA2

DIAG1/SWP

DIAG0/SWN

B.Dwersteg,

©

_TRP_INro_At_Me_Ic_Cti₂o₀n₁₄

TRINAMIC 2014

Single wire

interface

& diagnostics

HA2

CA1

470n

HS

C_B

R_G

HA1

BMA1

coolStep™

R_G

opt. ext. clock

12-16MHz

CLK_IN

VCC_IO

stallGuard2™

BMA2

LA1

dcStep™

+V_IO

LS

3.3V or 5V

I/O voltage

R_G

LA2

100n

Encoder

unit

SRAH

47R

mode selection

A

B

N

R_S

SRAL

pd

Encoder input /

dcStep control in S/D

mode

+V_IO

Both GND: UART mode

+V_IO

opt. driver enable

Figure 1.1 TMC5160 basic application block diagram (motion controller)

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TMC5160 DATASHEET (Rev. 1.08 / 2018-NOV-19)

6

+V_M

22n

100V

100n

16V

100n

C_E

+V_M

VSA

CB2

C_B

HB2

CB1

TMC5160

470n

charge pump

HS

12VOUT

5VOUT

11.5V Voltage

regulator

step multiplier

microPlyer™

100n

2.2µ

5V Voltage

regulator

HB1

BMB1

R_G

Standstill

current

reduction

2R2

&

p

e

h

r

l

c

C

h

t

VCC

y

C

d

a

BMB2

LB1

e

r

s

470n

p

s

o

i

e

c

a

f

l

r

a

e

t

e

t

r

n

e

LS

I

v

R_G

d

r

o

t

o

CSN

SCK

SDI

m

LB2

SRBH

SPI interface

47R

spreadCycle &

stealthChop

Chopper

R_S

N

stepper

motor

SDO

SRBL

programmable

sine table

4*256 entry

S

Control register

set

x

+V_M

C_B

DIAG / INT out

and

Single wire

interface

Stepper driver

B.Dwersteg, ©

CA2

DIAG1

DIAG0

B.Dwersteg,

©

_TRP_INro_At_Me_Ic_Cti₂o₀n₁₄

TRINAMIC 2014

& diagnostics

HA2

CA1

470n

HS

C_B

R_G

HA1

BMA1

coolStep™

R_G

opt. ext. clock

12-16MHz

CLK_IN

VCC_IO

stallGuard2™

BMA2

LA1

dcStep™

+V_IO

LS

3.3V or 5V

I/O voltage

R_G

LA2

100n

SRAH

47R

mode selection

R_S

SRAL

pd

+V_IO+V_IO

dcStep control

opt. driver enable

Figure 1.2 TMC5160 STEP/DIR application diagram

+V_M

22n

100V

100n

16V

100n

C_E

+V_M

VSA

12VOUT

5VOUT

CB2

C_B

HB2

CB1

HB1

TMC5160

n

470n

charge pump

HS

11.5V Voltage

regulator

step multiplier

microPlyer™

100n

2.2µ

5V Voltage

regulator

R_G

Standstill

current

reduction

2R2

BMB1

BMB2

LB1

&

p

v

e

h

r

l

c

C

VCC

o

i

t

y

C

d

a

f

r

a

u

e

g

r

s

i

f

470n

p

n

I

s

o

i

o

C

e

c

h

t

l

a

e

t

r

e

t

n

LS

R_G

d

r

CFG0

CFG1

CFG2

CFG3

CFG4

CFG5

CFG6

o

t

o

Microstep Resolution

8 / 16 / 32 / 64

m

LB2

SRBH

47R

spreadCycle &

stealthChop

Chopper

Configuration

interface

(GND or VCC_IO

level)

Run Current Setting

16 / 18 / 20 / 22 /

24 / 26 / 28 / 31

R_S

N

stepper

motor

SRBL

Control register

set (default

values)

programmable

sine table

4*256 entry

S

x

pd

47R

+V_M

C_B

Stepper driver

CA2

spreadCycle (GND) /

stealthChop (VCC_IO)

Current Reduction

Enable (VCC_IO)

B.Dwersteg,

& diagno²s⁰ti¹c⁴s

©

B.Dwersteg,

©

_TRP_INro_At_Me_Ic_Ction

TRINAMIC 2014

HA2

CA1

B.Dwersteg,

©

470n

HS

TRINAMIC 2014

C_B

R_G

DIAG1

DIAG0

HA1

BMA1

Index pulse

Driver error

R_G

Status out

(open drain)

OTP

opt. ext. clock

12-16MHz

BMA2

LA1

CLK_IN

LS

R_G

+V_IO

3.3V or 5V

I/O voltage

VCC_IO

LA2

SRAH

100n

47R

mode selection

R_S

SRAL

pd

+V_IO

Standalone mode

dcStep control

opt. driver enable

Figure 1.3 TMC5160 standalone driver application diagram

1.1 Key Concepts

The TMC5160 implements advanced features which are exclusive to TRINAMIC products. These features

contribute toward greater precision, greater energy efficiency, higher reliability, smoother motion, and

cooler operation in many stepper motor applications.

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TMC5160 DATASHEET (Rev. 1.08 / 2018-NOV-19)

7

stealthChop2™ No-noise, high-precision chopper algorithm for inaudible motion and inaudible

standstill of the motor. Allows faster motor acceleration and deceleration than

stealthChop™ and extends stealthChop to low stand still motor currents.

spreadCycle™ High-precision chopper algorithm for highly dynamic motion and absolutely clean

current wave. Low noise, low resonance and low vibration chopper.

dcStep™

Load dependent speed control. The motor moves as fast as possible and never loses

a step.

stallGuard2™

coolStep™

Sensorless stall detection and mechanical load measurement.

Load-adaptive current control reducing energy consumption by as much as 75%.

microPlyer™

Microstep interpolator for obtaining full 256 microstep smoothness with lower

resolution step inputs starting from fullstep

In addition to these performance enhancements, TRINAMIC motor drivers offer safeguards to detect

and protect against shorted outputs, output open-circuit, overtemperature, and undervoltage

conditions for enhancing safety and recovery from equipment malfunctions.

1.2 Control Interfaces

The TMC5160 supports both, an SPI interface and a UART based single wire interface with CRC

checking. Additionally, a standalone mode is provided for pure STEP/DIR operation without use of the

serial interface. Selection of the actual interface is done via the configuration pins SPI_MODE and

SD_MODE, which can be hardwired to GND or VCC_IO depending on the desired interface.

1.2.1 SPI Interface

The SPI interface is a bit-serial interface synchronous to a bus clock. For every bit sent from the bus

master to the bus slave another bit is sent simultaneously from the slave to the master.

Communication between an SPI master and the TMC5160 slave always consists of sending one 40-bit

command word and receiving one 40-bit status word.

The SPI command rate typically is a few commands per complete motor motion.

1.2.2 UART Interface

The single wire interface allows differential operation similar to RS485 (using SWP and SWN) or single

wire interfacing (leaving open SWN). It can be driven by any standard UART. No baud rate

configuration is required.

1.3 Software

From a software point of view the TMC5160 is a peripheral with a number of control and status

registers. Most of them can either be written only or read only. Some of the registers allow both read

and write access. In case read-modify-write access is desired for a write only register, a shadow

register can be realized in master software.

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TMC5160 DATASHEET (Rev. 1.08 / 2018-NOV-19)

8

1.4 Moving and Controlling the Motor

1.4.1 Integrated Motion Controller

The integrated 32 bit motion controller automatically drives the motor to target positions, or

accelerates to target velocities. All motion parameters can be changed on the fly. The motion

controller recalculates immediately. A minimum set of configuration data consists of acceleration and

deceleration values and the maximum motion velocity. A start and stop velocity is supported as well

as a second acceleration and deceleration setting. The integrated motion controller supports

immediate reaction to mechanical reference switches and to the sensorless stall detection stallGuard2.

Benefits are:

Flexible ramp programming

Efficient use of motor torque for acceleration and deceleration allows higher machine throughput

Immediate reaction to stop and stall conditions

1.4.2 STEP/DIR Interface

The motor can optionally be controlled by a step and direction input. In this case, the motion

controller remains unused. Active edges on the STEP input can be rising edges or both rising and

falling edges as controlled by another mode bit (dedge). Using both edges cuts the toggle rate of the

STEP signal in half, which is useful for communication over slow interfaces such as optically isolated

interfaces. On each active edge, the state sampled from the DIR input determines whether to step

forward or back. Each step can be a fullstep or a microstep, in which there are 2, 4, 8, 16, 32, 64, 128,

or 256 microsteps per fullstep. A step impulse with a low state on DIR increases the microstep

counter and a high decreases the counter by an amount controlled by the microstep resolution. An

internal table translates the counter value into the sine and cosine values which control the motor

current for microstepping.

1.5 Automatic Standstill Power Down

An automatic current reduction drastically reduces application power dissipation and cooling

requirements. Modify stand still current, delay time and decay via register settings. Automatic

freewheeling and passive motor braking are provided as an option for stand still. Passive braking

reduces motor standstill power consumption to zero, while still providing effective dampening and

braking! An option for faster detection of standstill is provided for both, ramp generator and STEP/DIR

operation.

STEP

Standstill flag

(stst)

CURRENT

IRUN

IHOLD

t

standstill delay TPOWERDOWN IHOLDDELAY

2^20 / 2^18 clocks power down power down

RMS motor current trace

(faststandstill)

delay time

ramp time

Figure 1.4 Automatic Motor Current Power Down

1.6 stealthChop2 & spreadCycle Driver

stealthChop is a voltage chopper based principle. It especially guarantees that the motor is absolutely

quiet in standstill and in slow motion, except for noise generated by ball bearings. Unlike other

voltage mode choppers, stealthChop2 does not require any configuration. It automatically learns the

best settings during the first motion after power up and further optimizes the settings in subsequent

motions. An initial homing sequence is sufficient for learning. Optionally, initial learning parameters

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TMC5160 DATASHEET (Rev. 1.08 / 2018-NOV-19)

9

can be pre-configured via the interface. stealthChop2 allows high motor dynamics, by reacting at once

to a change of motor velocity.

For highest dynamic applications, spreadCycle is an option to stealthChop2. It can be enabled via

input pin (standalone mode) or via SPI or UART interface. stealthChop2 and spreadCycle may even be

used in a combined configuration for the best of both worlds: stealthChop2 for no-noise stand still,

silent and smooth performance, spreadCycle at higher velocity for high dynamics and highest peak

velocity at low vibration.

spreadCycle is an advanced cycle-by-cycle chopper mode. It offers smooth operation and good

resonance dampening over a wide range of speed and load. The spreadCycle chopper scheme

automatically integrates and tunes fast decay cycles to guarantee smooth zero crossing performance.

Benefits of using stealthChop2:

-

Significantly improved microstepping with low cost motors

Motor runs smooth and quiet

Absolutely no standby noise

Reduced mechanical resonance yields improved torque

1.7 stallGuard2 – Mechanical Load Sensing

stallGuard2 provides an accurate measurement of the load on the motor. It can be used for stall

detection as well as other uses at loads below those which stall the motor, such as coolStep load-

adaptive current reduction. This gives more information on the drive allowing functions like

sensorless homing and diagnostics of the drive mechanics.

1.8 coolStep – Load Adaptive Current Control

coolStep drives the motor at the optimum current. It uses the stallGuard2 load measurement

information to adjust the motor current to the minimum amount required in the actual load situation.

This saves energy and keeps the components cool.

Benefits are:

-

Energy efficiency

Motor generates less heat

Less or no cooling

power consumption decreased up to 75%

improved mechanical precision

improved reliability

Use of smaller motor

less torque reserve required → cheaper motor does the job

Figure 1.5 shows the efficiency gain of a 42mm stepper motor when using coolStep compared to

standard operation with 50% of torque reserve. coolStep is enabled above 60RPM in the example.

0,9

Efficiency with coolStep

0,8

0,7

0,6

0,5

0,4

0,3

0,2

0,1

0

Efficiency with 50% torque reserve

Efficiency

0

50

100

150

200

250

300

350

Velocity [RPM]

Figure 1.5 Energy efficiency with coolStep (example)

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1.9 dcStep – Load Dependent Speed Control

dcStep allows the motor to run near its load limit and at its velocity limit without losing a step. If the

mechanical load on the motor increases to the stalling load, the motor automatically decreases

velocity so that it can still drive the load. With this feature, the motor will never stall. In addition to

the increased torque at a lower velocity, dynamic inertia will allow the motor to overcome mechanical

overloads by decelerating. dcStep directly integrates with the ramp generator, so that the target

position will be reached, even if the motor velocity needs to be decreased due to increased

mechanical load. A dynamic range of up to factor 10 or more can be covered by dcStep without any

step loss. By optimizing the motion velocity in high load situations, this feature further enhances

overall system efficiency.

Benefits are:

-

Motor does not loose steps in overload conditions

Application works as fast as possible

Highest possible acceleration automatically

Highest energy efficiency at speed limit

Highest possible motor torque using fullstep drive

Cheaper motor does the job

1.10 Encoder Interface

The TMC5160 provides an encoder interface for external incremental encoders. The encoder provides

automatic checking for step loss and can be used for homing of the motion controller (alternatively to

reference switches). A programmable prescaler allows the adaptation of the encoder resolution to the

motor resolution. A 32 bit encoder counter is provided.

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2 Pin Assignments

2.1 Package Outline

36

35

34

33

32

31

30

29

28

27

26

25

1

HB1

HA2

2

CB1

CA2

3

12VOUT

VCP

4

VSA

VS

5

5VOUT

CPI

6

TMC5160-TA

GNDA

CPO

7

SRAL

GNDD

TQFP-48

8

SRAH

VCC

9

SRBH

DRV_ENN

DIAG1_SWP

DIAG0_SWN

ENCN_DCO_CFG6

10

SRBL

PAD = GNDD, GNDP

11

12

TST_MODE

CLK

Figure 2.1 TMC5160-TA package and pinning TQFP-EP 48 (7x7mm² body, 9x9mm² with leads)

37

36

35

BMB1

HB1

1

2

3

BMA2

HA2

CB1

CA2

34

33

32

12VOUT

VSA

4

5

VCP

VS

_{B. Dwe}T_rstM_egC_{, T}5_RI1_NA6_M0_IC-W₂₀₁A₂

QFN56 8mm x 8mm

0.5 pitch

CPI

31

30

29

28

27

26

6

7

5VOUT

GNDA

SRAL

SRAH

SRBH

SRBL

CPO

VCC

8

DRV_ENN

DIAG1_SWP

DIAG0_SWN

ENCN_DCO_CFG6

9

10

11

PAD = GNDD, GNDP

Figure 2.2 TMC5160-WA package and pinning QFN-WA (8x8mm²)

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2.2 Signal Descriptions

TQFP QFN

Type Function

High side gate driver output.

Bootstrap capacitor positive connection.

HB1

CB1

1

2

3

Output of internal 11.5V gate voltage regulator and supply pin

of low side gate drivers. Attach 2.2µF to 10µF ceramic

capacitor to GND plane near to pin for best performance. Use

at least 10 times more capacity than for bootstrap capacitors.

In case an external gate voltage supply is available, tie VSA

and 12VOUT to the external supply.

12VOUT

VSA

3

4

5

Analog supply voltage for 11.5V and 5V regulator. Normally

tied to VS. Provide a 100nF filtering capacitor.

Output of internal 5V regulator. Attach 2.2µF to 10µF ceramic

capacitor to GNDA near to pin for best performance. Output

for VCC supply of the chip.

5VOUT

GNDA

SRAL

5

6

7

6

7

8

Analog GND. Connect to GND plane near pin.

Sense resistor GND connection for phase A. Connect to the

GND side of the sense resistor in order to compensate for

voltage drop on the GND interconnection.

Sense resistor for phase A. Connect to the upper side of the

sense resistor. A Kelvin connection is preferred with high

motor currents. Symmetrical RC-Filtering may be added for

SRAL and SRAH to eliminate high frequency switching spikes

from other drives or switching of coil B.

Sense resistor for phase B. Connect to the upper side of the

sense resistor. A Kelvin connection is preferred with high

motor currents. Symmetrical RC-Filtering may be added for

SRBL and SRBH to eliminate high frequency switching spikes

from other drives or switching of coil A.

AI

SRAH

SRBH

8

9

10

AI

Sense resistor GND connection for phase B. Connect to the

GND side of the sense resistor in order to compensate for

voltage drop on the GND interconnection.

SRBL

10

11

12

11

12

13

AI

DI

TST_MODE

CLK

Test mode input. Tie to GND using short wire.

CLK input. Tie to GND using short wire for internal clock or

supply external clock. Internal clock-fail over circuit protects

against loss of external clock signal.

SPI chip select input (negative active) (SPI_MODE=1) or

Configuration input (SPI_MODE=0)

SPI serial clock input (SPI_MODE=1) or

CSN_CFG3

SCK_CFG2

13

14

15

DI

Configuration input (SPI_MODE=0)

SPI data input (SPI_MODE=1) or

SDI_CFG1

SDO_CFG0

15

16

17

DI

Configuration input (SPI_MODE=0) or

Next address input (NAI) for single wire interface.

SPI data output (tristate) (SPI_MODE=1) or

Configuration input (SPI_MODE=0) or

DIO

Next address output (NAO) for single wire interface.

Left reference input (for internal ramp generator) or

STEP input when (SD_MODE=1).

Right reference input (for internal ramp generator) or

DIR input (SD_MODE=1).

REFL_STEP

REFR_DIR

17

18

19

DI

19,

30

20

25,

Pad

20

Digital GND. Connect to GND plane near pin.

GNDD

VCC_IO

3.3V to 5V IO supply voltage for all digital pins.

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TQFP QFN

Type Function

Mode selection input. When tied low, the internal ramp

generator generates step pulses. When tied high, the STEP/DIR

inputs control the driver. SD_MODE=0 and SPI_MODE=0 enable

UART operation.

Mode selection input. When tied low with SD_MODE=1, the

chip is in standalone mode and pins have their CFG functions.

When tied high, the SPI interface is enabled. Integrated pull

down resistor.

SD_MODE

21

22

21

22

DI

(pd)

SPI_MODE

Encoder B-channel input (when using internal ramp generator)

or

dcStep enable input (SD_MODE=1, SPI_MODE=1) – leave open

or tie to GND for normal operation in this mode (no dcStep).

Configuration input (SPI_MODE=0)

ENCB_DCEN_

CFG4

DI

(pd)

23

Encoder A-channel input (when using internal ramp generator)

or

dcStep gating input for axis synchronization (SD_MODE=1,

SPI_MODE=1) or

Configuration input (SPI_MODE=0)

Encoder N-channel input (SD_MODE=0) or

dcStep ready output (SD_MODE=1).

ENCA_DCIN_

CFG5

DI

(pd)

24

25

24

26

ENCN_DCO_

CFG6

DIO

With SD_MODE=0, pull to GND or VCC_IO, if the pin is not used

for an encoder.

Diagnostics output DIAG0.

Interrupt or STEP output for motion controller (SD_MODE=0,

SPI_MODE=1).

Use external pullup resistor with 47k or less in open drain

mode.

DIO

(pu+

pd)

DIAG0_SWN

DIAG1_SWP

26

27

28

Single wire I/O (negative) (only with SD_MODE=0 and

SPI_MODE=0)

Diagnostics output DIAG1.

Position compare or DIR output for motion controller

(SD_MODE=0, SPI_MODE=1).

Use external pullup resistor with 47k or less in open drain

mode.

DIO

(pd)

Single wire I/O (positive) (only with SD_MODE=0 and

SPI_MODE=0)

Enable input. The power stage becomes switched off (all

motor outputs floating) when this pin becomes driven to a

high level.

5V supply input for digital circuitry within chip. Provide 100nF

or bigger capacitor to GND (GND plane) near pin. Shall be

supplied by 5VOUT. A 2.2 or 3.3 Ohm resistor is recommended

for decoupling noise from 5VOUT. When using an external

supply, make sure, that VCC comes up before or in parallel to

5VOUT or VCC_IO, whichever comes up later!

Charge pump capacitor output.

DRV_ENN

VCC

28

29

30

DI

CPO

CPI

31

32

31

32

Charge pump capacitor input. Tie to CPO using 22nF 100V

capacitor.

Motor supply voltage. Provide filtering capacity near pin with

short loop to GND plane. Must be tied to the positive bridge

supply voltage.

VS

33

VCP

CA2

HA2

34

35

36

34

35

36

Charge pump voltage. Tie to VS using 100nF capacitor.

Bootstrap capacitor positive connection.

High side gate driver output.

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TQFP QFN

Type Function

Bridge Center and bootstrap capacitor negative connection.

BMA2

LA2

LA1

BMA1

HA1

CA1

CB2

HB2

BMB2

LB2

LB1

37

38

39

40

41

42

43

44

45

46

47

48

37

38

39

40

41

42

43

44

45

46

47

1

Low side gate driver output.

Bridge Center and bootstrap capacitor negative connection.

High side gate driver output.

Bootstrap capacitor positive connection.

High side gate driver output.

Bridge Center and bootstrap capacitor negative connection.

Low side gate driver output.

BMB1

Bridge Center and bootstrap capacitor negative connection.

Connect the exposed die pad to a GND plane. Provide as many

as possible vias for heat transfer to GND plane. Serves as GND

pin for the low side gate drivers. Ensure low loop inductivity

to sense resistor GND.

Exposed die

pad

-

*(pd) denominates a pin with pulldown resistor

* All digital pins DI, DIO and DO use VCC_IO level and contain protection diodes to GND and VCC_IO

* All digital inputs DI and DIO have internal Schmitt-Triggers

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15

3 Sample Circuits

The following sample circuits show the required external components in different operation and

supply modes. The connection of the bus interface and further digital signals are left out for clarity.

3.1 Standard Application Circuit

+V_M

Optional use lower

voltage down to 12V

22n

100V

100n

16V

100n

C_E

+V_M

VSA

12VOUT

5VOUT

CB2

C_B

HB2

CB1

470n

charge pump

HS

11.5V Voltage

regulator

reference switch

processing

100n

2.2µ

5V Voltage

regulator

HB1

BMB1

R_G

2R2

VCC

BMB2

LB1

470n

TMC5160

LS

R_G

CSN

SCK

SDI

LB2

SRBH

SPI interface

47R

R_S

N

stepper

motor

SDO

SRBL

S

Controller

Chopper

+V_M

C_B

DIAG / INT out

and

Single wire

interface

CA2

B.Dwersteg, ©

TRINAMIC 2014

DIAG1/SWP

DIAG0/SWN

HA2

CA1

470n

HS

C_B

R_G

HA1

BMA1

R_G

opt. ext. clock

12-16MHz

CLK_IN

VCC_IO

BMA2

LA1

+V_IO

LS

Keep inductivity of the fat

interconnections as small

as possible to avoid

3.3V or 5V

I/O voltage

R_G

LA2

100n

undershoot of BM <-5V!

Encoder

unit

B

SRAH

47R

Use low inductivity SMD

type, e.g. 1210 or 2512

mode selection

A

N

R_S

SRAL

resistor for R_S

!

pd

Bootstrap capacitors C_B

:

220nF for MOSFETs with Q_G<20nC, 470nF for larger Q_G

Slope control resistors R_G: Adapt to MOSFET to yield slopes of roughly

100ns. Slope must be slower than bulk diode recovery time.

Encoder input /

dcStep control in S/D

mode

+V_IO

Both GND: UART mode

+V_IO

opt. driver enable

Figure 3.1 Standard application circuit

The standard application circuit uses a minimum set of additional components. Eight MOSFETs are

selected for the desired current, voltage and package type. Two sense resistors set the motor coil

current. See chapter 9 to choose the right value for sense resistors. Use low ESR capacitors for

filtering the power supply. A minimum capacity of 100µF per ampere of coil current near to the power

bridge is recommended for best performance. The capacitors need to cope with the current ripple

caused by chopper operation. Current ripple in the supply capacitors also depends on the power

supply internal resistance and cable length. VCC_IO can be supplied from 5VOUT, or from an external

source, e.g. a 3.3V regulator. In order to minimize linear voltage regulator power dissipation of the

internal 5V and 11.5V voltage regulators in applications where VM is high, a different (lower) supply

voltage should be used for VSA (see chapter 0).

Basic layout hints

Place sense resistors and all filter capacitors as close as possible to the power MOSFETs. Place the

TMC5160 near to the MOSFETs and use short interconnection lines in order to minimize parasitic trace

inductance. Use a solid common GND for all GND, GNDA and GNDD connections, also for sense

resistor GND. Connect 5VOUT filtering capacitor directly to 5VOUT and GNDA pin. See layout hints for

more details. Low ESR electrolytic capacitors are recommended for VS filtering.

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16

Attention

In case VSA is supplied by a different voltage source, make sure that VSA does not drop out during

motor operation. The motor driver should be disabled in case VSA becomes switched off before VS.

Hard switching edges on VSA might result in bridge cross-conduction otherwise. It is safest to derive

VSA voltage from VS supply.

3.2 External Gate Voltage Regulator

At high supply voltages like 48V, the internal gate voltage regulator and the internal 5V regulator

have considerable power dissipation, especially with high MOSFET gate charges, high chopper

frequency or high system clock frequency >12MHz. A good thermal coupling of the heat slug to the

system PCB GND plane is required to dissipate heat. Still, the thermal thresholds will be lowered

significantly by self-heating. To reduce power dissipation, supply an external gate driver voltage to the

TMC5160. Figure 3.2 shows the required connection. The internal gate voltage regulator becomes

disabled in this constellation. 12V +/-1V are recommended for best results.

12V Gate Voltage

+V_G

VSA

12VOUT

5VOUT

11.5V Voltage

regulator

2.2µ

5V Voltage

regulator

2.2µ

2R2

VCC

470n

Figure 3.2 External gate voltage supply

Hint

With MOSFETs above 50nC of total gate charge, chopper frequency >40kHz, or at clock frequency

>12MHz, it is recommended to use a VSA supply not higher than 40V.

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3.3 Choosing MOSFETs and Slope

The selection of power MOSFETs depends on a number of factors, like package size, on-resistance,

voltage rating and supplier. It is not true, that larger, lower RDSon MOSFETs will always be better, as

a larger device also has higher capacitances and may add more ringing in trace inductance and power

dissipation in the gate drive circuitry. Adapt the MOSFETs to the required motor voltage (adding 5-10V

of reserve to the peak supply voltage) and to the desired maximum current, in a way that resistive

power dissipation still is low for the thermal capabilities of the chosen MOSFET package. The TMC5160

drives the MOSFET gates with roughly 10V, so normal, 10V specified types are sufficient. Logic level

FETs (4.5V specified RDSon) will also work, but may be more critical with regard to bridge cross-

conduction due to lower V_GS(th)

.

The gate drive current and MOSFET gate resistors R_G(optional) determine switching behavior and

should basically be adapted to the MOSFET gate-drain charge (Miller charge). Figure 3.3 shows the

influence of the Miller charge on the switching event. Figure 3.4 additionally shows the switching

events in different load situations (load pulling the output up or down), and the required bridge

brake-before-make time.

The following table shall serve as a thumb rule for programming the MOSFET driver current

(DRVSTRENGTH setting) and the selection of gate resistors:

MOSFET MILLER CHARGE VS. DRVSTRENGTH AND R_G

Miller Charge

[nC] (typ.)

<10

10…20

20…40

DRVSTRENGTH

setting

0

0 or 1

1 or 2

2 or 3

3

Value of R_G[Ω]

≤ 15

≤ 10

≤ 7.5

≤ 5

40…60

>60

≤ 2.7

The TMC5160 provides increased gate-off drive current to avoid bridge cross-conduction induced by

high dV/dt. This protection will be less efficient with gate resistors exceeding the values given in the

table. Therefore, for larger values of R_G, a parallel diode may be required to ensure keeping the

MOSFET safely off during switching events.

MOSFET gate charge vs. switching event

10

8

25

V_M

20

15

10

5

6

4

2

0

25

0

5

10

Q_MILLER

15

20

Q_G– Total gate charge (nC)

Figure 3.3 Miller charge determines switching slope

Hints

-

Choose modern MOSFETs with fast and soft recovery bulk diode and low reverse recovery charge.

A small, SMD MOSFET package allows compacter routing and reduces parasitic inductance effects.

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V_12VOUT

Miller plateau

Lx

0V

V_VM

Output

slope

Output

slope

BMx

0V

-1.2V

V_VM+V_12VOUT

V_VM

Hx

0V

V_CX-V_BMx

Miller plateau

Hx-

BMx

0V

t_BBM

Effective break-before-make time

Load pulling BMx down

Load pulling BMx up

Figure 3.4 Slopes, Miller plateau and blank time

The following DRV_CONF parameters allow adapting the driver to the MOSFET bridge:

Parameter

Description

Setting Comment

BBMTIME

Break-before-make time setting to ensure non- 0…24

overlapping switching of high-side and low-side

MOSFETs. BBMTIME allows fine tuning of times in

increments shorter than a clock period.

time[ns]

100ns*32/(32-BBMTIME)

Ensure ~30% headroom

Reset Default: 0

0: off

For higher times, use BBMCLKS.

BBMCLKS

Like BBMTIME, but in multiple of a clock cycle.

The longer setting rules (BBMTIME vs. BBMCLKS).

0…15

Reset Default: OTP 4 or 2

DRV_

STRENGTH

Selection of gate driver current. Adapts the gate 0…3

driver current to the gate charge of the external

MOSFETs.

Reset Default = 2

FILT_ISENSE Filter time constant of sense amplifier to suppress 0…3

ringing and coupling from second coil operation

Hint: Increase setting if motor chopper noise

occurs due to cross-coupling of both coils.

(Reset Default = %00)

00: ~100ns (reset default)

01: ~200ns

10: ~300ns

11: ~400ns

DRV_CONF Parameters

Use the lowest gate driver strength setting DRVSTRENGTH giving favorable switching slopes, before

increasing the value of the gate series resistors. A slope time of nominal 40ns to 80ns is absolutely

sufficient and will normally be covered by the shortest possible Break-Before-Make time setting

(BBMTIME=0, BBMCLKS=0).

In case slower slopes have to be used, e.g. with large MOSFETs, ensure that the break-before-make

time (BBMTIME, optionally use BBMCLKS for times >200ns) sufficiently covers the switching event, in

order to avoid bridge cross conduction. The shortest break-before-make time, safely covering the

switching event, gives best results. Add roughly 30% of reserve, to cover production stray of MOSFETs

and driver.

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3.4 Tuning the MOSFET Bridge

A clean switching event is favorable to ensure low power dissipation and good EMC behavior.

Unsuitable layout or components endanger stable operation of the circuit. Therefore, it is important to

understand the effect of parasitic trace inductivity and MOSFET reverse recovery.

Stray inductance in power routing will cause ringing whenever the opposite MOSFET is in diode

conduction prior to switching on a low-side or high-side MOSFET. Diode conduction occurs during

break-before make time whenever the load current is inverse to the following bridge polarity. The

MOSFET bulk diode has a certain, type specific reverse recovery time and charge. This time typically is

in the range of a few 10ns. During reverse recovery time, the bulk diode will cause high current flow

across the bridge. This current is taken from the power supply filter capacitors (see thick lines Figure

3.5). Once the diode opens parasitic inductance tries to keep the current flowing. A high, fast slope

results and leads to ringing in all parasitic inductivities (see Figure 3.6). This may lead to bridge

voltage undershooting the GND level as well as fast pulses on VS and all MOSFET connections. It

must be ensured, that the driver IC does not see spikes on its BM pins to GND going below -5V.

Severe VS ripple might overload the charge-pump circuitry. Measure the voltage directly at the driver

pins to driver GND. The amount of undershooting depends on energy stored in parasitic inductivities

from low side drain to low side source and via the sense resistor RS to GND.

When using relatively small MOSFETs, a soft slope control requires a high gate series resistance. This

endangers safe MOSFET switch off. Add additional diodes to ensure safe MOSFET off conditions with

slow switch-on slopes (shown for right MOSFET pair in Figure 3.5).

Figure 3.7 shows performance of the basic circuit after adapting switching slope and adding 1nF

bridge output capacitors.

R_G: Reduce slope and protect the driver against ringing in the

interconnections between MOSFET and driver

+V_M

VS

R_G ꢀꢁAdditional position for high side slope control resistor. In case,

1R

220nF

severe undershooting < -5V of BM occurs at BM terminal, R_Gꢂꢁwill

Optional RC filter

protect the driver.

against VS ringing

C_B

LOW-

ESR

4.7µF

CA2

Filter capacitors placed near bridge

HA2

HS

CA1

Optional gate diodes in combination

with very high value of R_G

C_B

HA1

HS

R_G

BMA1

Coil

out

BMA2

LA1

R_G

470pF to a few nF output

capacitors close to bridge

and / or output reduce

LS

1n,

100V

1n,

100V

R_G

LA2

ringing and improve EMC

SRAH

47R

2n2

Capacitor reduces

ringing on sense resistor.

R_S

100n

SRAL

47R

RC-Filter protects SRAH /

SRAL and reduces spikes

seen by the chopper

Additional 1A type Schottky Diodes (selected for full VM range) in

combination with R_Gꢂꢁꢃꢄꢅꢆꢁto 4.7 Ohm) eliminate undershooting of BM.

Decide use and value of the additional components based on measurements of the actual circuit using the final layout!

Figure 3.5 Bridge protection options for power routing inductivity

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ENSURE RELIABLE OPERATION

-

Use SMD MOSFETs and short interconnections

Provide sufficient power filtering capacity close to the bridge and close to VS pin

Tune MOSFET switching slopes (measure switch-on event at MOSFET gate) to be slower than the

MOSFET bulk diode reverse recovery time. This will reduce cross conduction.

-

Add optional gate resistors close to MOSFET gate and output capacitors to ensure clean switching

and reliable operation by minimizing ringing. Figure 3.5 shows the options plus some variations.

Some MOSFETs eliminate reverse recovery charge by integrating a fast diode from source to drain.

Figure 3.6 Ringing of output (blue) and Gate voltages (Yellow, Cyan) with untuned brige

Figure 3.7 Switching event with optimized components (without / after bulk diode conduction)

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BRIDGE OPTIMIZATION EXAMPLE

A stepper driver for 6A of motor current has been designed using the MOSFET AOD4126 in the

standard schematic.

The MOSFETs have a low gate capacitance and offer roughly 50ns slope time at the lowest driver

strength setting. At lowest driver strength setting, switching quality is best (Figure 3.6), but still

shows a lot of ringing. Low side gate resistors have been added to slightly increase switching slope

time following high-side bulk diode conduction by increasing the effect of Gate-Drain (Miller) charge.

High side gate resistors have been added for symmetry. Tests showed, that 1nF output capacitors

dramatically reduce ringing of the power bridge following bulk diode conduction (Figure 3.7). Figure

3.8 shows the actual components and values after optimization.

+V_M

470n

CA2

HA2

4.7µF

HS

CA1

4x AOD4126

470n

HA1

10R

BMA1

Coil

out

BMA2

LA1

LS

1n,

100V

1n,

100V

LA2

SRAH

47R

50m,

2512

SRAL

Figure 3.8 Example for bridge with tuned components (see scope shots)

BRIDGE LAYOUT CONSIDERATIONS

-

Tune the bridge layout for minimum loop inductivity. A compact layout is best.

Keep MOSFET gate connections short and straight and avoid loop inductivity between BM and

corresponding HS driver pin. Loop inductance is minimized with parallel traces, or adjacent traces

on adjacent layers. A wider trace reduces inductivity (don’t use minimum trace width).

Minimize the length of the sense resistor connection to low-side MOSFET source, and place the

TMC5160 near the sense resistor’s GND connection, with its GND connections directly connected to

the same GND plane.

-

Optimize switching behavior by tuning gate current setting and gate resistors. Add MOSFET bridge

output capacitors (470pF to a few nF) to reduce ringing.

Measure the performance of the bridge by probing BM pins directly at the bridge or at the

TMC5160 using a short GND tip on the scope probe rather than a GND cable, if available.

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TMC5160 DATASHEET (Rev. 1.08 / 2018-NOV-19)

22

4 SPI Interface

4.1 SPI Datagram Structure

The TMC5160 uses 40 bit SPI™ (Serial Peripheral Interface, SPI is Trademark of Motorola) datagrams

for communication with a microcontroller. Microcontrollers which are equipped with hardware SPI are

typically able to communicate using integer multiples of 8 bit. The NCS line of the device must be

handled in a way, that it stays active (low) for the complete duration of the datagram transmission.

Each datagram sent to the device is composed of an address byte followed by four data bytes. This

allows direct 32 bit data word communication with the register set. Each register is accessed via 32

data bits even if it uses less than 32 data bits.

For simplification, each register is specified by a one-byte address:

-

For a read access the most significant bit of the address byte is 0.

For a write access the most significant bit of the address byte is 1.

Most registers are write-only registers, some can be read additionally, and there are also some read

only registers.

SPI DATAGRAM STRUCTURE

MSB (transmitted first)

40 bit

LSB (transmitted last)

... 0

39 ...

→ 8 bit address

 8 bit SPI status

39 ... 32

 → 32 bit data

31 ... 0

→ to TMC5160

RW + 7 bit address

8 bit data

31 ... 24

8 bit data

23 ... 16

8 bit data

15 ... 8

8 bit data

7 ... 0

 from TMC5160

8 bit SPI status

39 / 38 ... 32

W

38...32

31...28

27...24

23...20

19...16

15...12

11...8

7...4

3...0

3 3 3 3 3 3 3 3 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1

9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0

9 8 7 6 5 4 3 2 1 0

4.1.1 Selection of Write / Read (WRITE_notREAD)

The read and write selection is controlled by the MSB of the address byte (bit 39 of the SPI

datagram). This bit is 0 for read access and 1 for write access. So, the bit named W is a

WRITE_notREAD control bit. The active high write bit is the MSB of the address byte. So, 0x80 has to

be added to the address for a write access. The SPI interface always delivers data back to the master,

independent of the W bit. The data transferred back is the data read from the address which was

transmitted with the previous datagram, if the previous access was a read access. If the previous

access was a write access, then the data read back mirrors the previously received write data. So, the

difference between a read and a write access is that the read access does not transfer data to the

addressed register but it transfers the address only and its 32 data bits are dummies, and, further the

following read or write access delivers back the data read from the address transmitted in the

preceding read cycle.

A read access request datagram uses dummy write data. Read data is transferred back to the master

with the subsequent read or write access. Hence, reading multiple registers can be done in a

pipelined fashion.

Whenever data is read from or written to the TMC5160, the MSBs delivered back contain the SPI

status, SPI_STATUS, a number of eight selected status bits.

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Example:

For a read access to the register (XACTUAL) with the address 0x21, the address byte has to

be set to 0x21 in the access preceding the read access. For a write access to the register

(VACTUAL), the address byte has to be set to 0x80 + 0x22 = 0xA2. For read access, the data

bit might have any value (-). So, one can set them to 0.

action

data sent to TMC5160 data received from TMC5160

read XACTUAL

write VMAX:= 0x00ABCDEF

write VMAX:= 0x00123456

→ 0x2100000000

→ 0xA700ABCDEF

→ 0xA700123456

 0xSS & unused data

 0xSS & XACTUAL

 0xSS00ABCDEF

*)S: is a placeholder for the status bits SPI_STATUS

4.1.2 SPI Status Bits Transferred with Each Datagram Read Back

New status information becomes latched at the end of each access and is available with the next SPI

transfer.

SPI_STATUS – status flags transmitted with each SPI access in bits 39 to 32

Bit Name

Comment

7

status_stop_r

RAMP_STAT[1] – 1: Signals stop right switch status (motion controller

only)

6

5

4

3

2

1

0

status_stop_l

position_reached

velocity_reached

standstill

sg2

driver_error

reset_flag

RAMP_STAT[0] – 1: Signals stop left switch status (motion controller only)

RAMP_STAT[9] – 1: Signals target position reached (motion controller only)

RAMP_STAT[8] – 1: Signals target velocity reached (motion controller only)

DRV_STATUS[31] – 1: Signals motor stand still

DRV_STATUS[24] – 1: Signals stallGuard flag active

GSTAT[1] – 1: Signals driver 1 driver error (clear by reading GSTAT)

GSTAT[0] – 1: Signals, that a reset has occurred (clear by reading GSTAT)

4.1.3 Data Alignment

All data are right aligned. Some registers represent unsigned (positive) values, some represent integer

values (signed) as two’s complement numbers, single bits or groups of bits are represented as single

bits respectively as integer groups.

4.2 SPI Signals

The SPI bus on the TMC5160 has four signals:

-

SCK – bus clock input

SDI – serial data input

SDO – serial data output

CSN – chip select input (active low)

The slave is enabled for an SPI transaction by a low on the chip select input CSN. Bit transfer is

synchronous to the bus clock SCK, with the slave latching the data from SDI on the rising edge of SCK

and driving data to SDO following the falling edge. The most significant bit is sent first. A minimum

of 40 SCK clock cycles is required for a bus transaction with the TMC5160.

If more than 40 clocks are driven, the additional bits shifted into SDI are shifted out on SDO after a

40-clock delay through an internal shift register. This can be used for daisy chaining multiple chips.

CSN must be low during the whole bus transaction. When CSN goes high, the contents of the internal

shift register are latched into the internal control register and recognized as a command from the

master to the slave. If more than 40 bits are sent, only the last 40 bits received before the rising edge

of CSN are recognized as the command.

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4.3 Timing

The SPI interface is synchronized to the internal system clock, which limits the SPI bus clock SCK to

half of the system clock frequency. If the system clock is based on the on-chip oscillator, an additional

10% safety margin must be used to ensure reliable data transmission. All SPI inputs as well as the

ENN input are internally filtered to avoid triggering on pulses shorter than 20ns. Figure 4.1 shows the

timing parameters of an SPI bus transaction, and the table below specifies their values.

CSN

t_CC

t_CL

t_CH

t_CC

SCK

SDI

t_DU

t_DH

bit39

bit38

bit0

t_DO

t_ZC

bit39

bit38

SDO

Figure 4.1 SPI timing

Hint

Usually this SPI timing is referred to as SPI MODE 3

SPI interface timing

AC-Characteristics

clock period: t_CLK

Parameter

Symbol Conditions

Min

Typ

Max

Unit

SCK valid before or after change

of CSN

t_CC

10

ns

*) Min time is for

synchronous CLK

with SCK high one

t_CHbefore CSN high

only

*)

CSN high time

t_CSH

t_CLK

>2t_CLK+10

ns

*) Min time is for

synchronous CLK

only

*) Min time is for

synchronous CLK

only

*)

SCK low time

SCK high time

t_CL

t_CLK

>t_CLK+10

ns

*)

t_CH

t_CLK

assumes minimum

OSC frequency

SCK frequency using internal

clock

SCK frequency using external

16MHz clock

SDI setup time before rising

edge of SCK

SDI hold time after rising edge

of SCK

f_SCK

t_DU

4

8

MHz

ns

assumes

synchronous CLK

10

t_DH

ns

no capacitive load

on SDO

Data out valid time after falling

SCK clock edge

SDI, SCK and CSN filter delay

time

t_DO

t_FILT

t_FILT+5

30

ns

rising and falling

edge

12

20

ns

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5 UART Single Wire Interface

The UART single wire interface allows the control of the TMC5160 with any microcontroller UART. It

shares transmit and receive line like an RS485 based interface. Data transmission is secured using a

cyclic redundancy check, so that increased interface distances (e.g. over cables between two PCBs) can

be bridged without the danger of wrong or missed commands even in the event of electro-magnetic

disturbance. The automatic baud rate detection and an advanced addressing scheme make this

interface easy and flexible to use.

5.1 Datagram Structure

5.1.1 Write Access

UART WRITE ACCESS DATAGRAM STRUCTURE

each byte is LSB…MSB, highest byte transmitted first

0 … 63

8 bit slave

address

8…15

RW + 7 bit

register addr.

16…23

sync + reserved

32 bit data

CRC

56…63

CRC

0…7

24…55

data bytes 3, 2, 1, 0

(high to low byte)

Reserved (don’t cares

but included in CRC)

register

1

0

1

0

SLAVEADDR

1

address

A sync nibble precedes each transmission to and from the TMC5160 and is embedded into the first

transmitted byte, followed by an addressing byte. Each transmission allows a synchronization of the

internal baud rate divider to the master clock. The actual baud rate is adapted and variations of the

internal clock frequency are compensated. Thus, the baud rate can be freely chosen within the valid

range. Each transmitted byte starts with a start bit (logic 0, low level on SWP) and ends with a stop

bit (logic 1, high level on SWP). The bit time is calculated by measuring the time from the beginning

of start bit (1 to 0 transition) to the end of the sync frame (1 to 0 transition from bit 2 to bit 3). All

data is transmitted byte wise. The 32 bit data words are transmitted with the highest byte first.

A minimum baud rate of 9000 baud is permissible, assuming 20 MHz clock (worst case for low baud

rate). Maximum baud rate is f_CLK/16 due to the required stability of the baud clock.

The slave address is determined by the register SLAVEADDR. If the external address pin NEXTADDR is

set, the slave address becomes incremented by one.

The communication becomes reset if a pause time of longer than 63 bit times between the start bits

of two successive bytes occurs. This timing is based on the last correctly received datagram. In this

case, the transmission needs to be restarted after a failure recovery time of minimum 12 bit times of

bus idle time. This scheme allows the master to reset communication in case of transmission errors.

Any pulse on an idle data line below 16 clock cycles will be treated as a glitch and leads to a timeout

of 12 bit times, for which the data line must be idle. Other errors like wrong CRC are also treated the

same way. This allows a safe re-synchronization of the transmission after any error conditions.

Remark, that due to this mechanism an abrupt reduction of the baud rate to less than 15 percent of

the previous value is not possible.

Each accepted write datagram becomes acknowledged by the receiver by incrementing an internal

cyclic datagram counter (8 bit). Reading out the datagram counter allows the master to check the

success of an initialization sequence or single write accesses. Read accesses do not modify the

counter.

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5.1.2 Read Access

UART READ ACCESS REQUEST DATAGRAM STRUCTURE

each byte is LSB…MSB, highest byte transmitted first

RW + 7 bit register

sync + reserved

8 bit slave address

8…15

CRC

24…31

CRC

address

16…23

0...7

Reserved (don’t cares

but included in CRC)

1

0

1

0

SLAVEADDR

register address

0

The read access request datagram structure is identical to the write access datagram structure, but

uses a lower number of user bits. Its function is the addressing of the slave and the transmission of

the desired register address for the read access. The TMC5160 responds with the same baud rate as

the master uses for the read request.

In order to ensure a clean bus transition from the master to the slave, the TMC5160 does not

immediately send the reply to a read access, but it uses a programmable delay time after which the

first reply byte becomes sent following a read request. This delay time can be set in multiples of

eight bit times using SENDDELAY time setting (default=8 bit times) according to the needs of the

master. In a multi-slave system, set SENDDELAY to min. 2 for all slaves. Otherwise a non-addressed

slaves might detect a transmission error upon read access to a different slave.

UART READ ACCESS REPLY DATAGRAM STRUCTURE

each byte is LSB…MSB, highest byte transmitted first

0 ...... 63

8 bit slave

address

8…15

RW + 7 bit

register addr.

16…23

sync + reserved

32 bit data

CRC

56…63

CRC

0…7

24…55

data bytes 3, 2, 1, 0

(high to low byte)

register

1

0

1

0

reserved (0)

0xFF

0

address

The read response is sent to the master using address code %1111. The transmitter becomes switched

inactive four bit times after the last bit is sent.

Address %11111111 is reserved for read accesses going to the master. A slave cannot use this

address.

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5.2 CRC Calculation

An 8 bit CRC polynomial is used for checking both read and write access. It allows detection of up to

eight single bit errors. The CRC8-ATM polynomial with an initial value of zero is applied LSB to MSB,

including the sync- and addressing byte. The sync nibble is assumed to always be correct. The

TMC5160 responds only to correctly transmitted datagrams containing its own slave address. It

increases its datagram counter for each correctly received write access datagram.

퐶푅퐶 = 푥⁸+ 푥²+ 푥¹+ 푥⁰

SERIAL CALCULATION EXAMPLE

CRC = (CRC << 1) OR (CRC.7 XOR CRC.1 XOR CRC.0 XOR [new incoming bit])

C-CODE EXAMPLE FOR CRC CALCULATION

void swuart_calcCRC(UCHAR* datagram, UCHAR datagramLength)

{

int i,j;

UCHAR* crc = datagram + (datagramLength-1); // CRC located in last byte of message

UCHAR currentByte;

*crc = 0;

for (i=0; i<(datagramLength-1); i++) {

currentByte = datagram[i];

// Execute for all bytes of a message

// Retrieve a byte to be sent from Array

for (j=0; j<8; j++) {

if ((*crc >> 7) ^ (currentByte&0x01))

// update CRC based result of XOR operation

{

*crc = (*crc << 1) ^ 0x07;

}

else

{

*crc = (*crc << 1);

}

currentByte = currentByte >> 1;

} // for CRC bit

} // for message byte

}

5.3 UART Signals

The UART interface on the TMC5160 comprises four signals:

TMC5160 UART INTERFACE SIGNALS

SWP

SWN

Non-inverted data input and output

Inverted data input and output for use in differential transmission. Can be left open

in a 5V IO voltage system. Tie to the half IO level voltage for best performance in a

3.3V single wire non-differential application.

SDI_CFG1

(NAI)

Address increment pin for chained sequential addressing scheme

SDO_CFG0

(NAO)

Next address output pin for chained sequential addressing scheme (reset default=

high)

In UART mode (SPI_MODE low and SD_MODE low) the slave checks the single wire SWP and SWN for

correctly received datagrams with its own address continuously. Both signals are switched as input

during this time. It adapts to the baud rate based on the sync nibble, as described before. In case of

a read access, it switches on its output drivers on SWP and SWN and sends its response using the

same baud rate.

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5.4 Addressing Multiple Slaves

ADDRESSING ONE OR TWO SLAVES

If only one or two TMC5160 are addressed by a master using a single UART interface, a hardware

address selection can be done by setting the NAI pins of both devices to different levels.

ADDRESSING UP TO 255 SLAVES

A different approach can address any number of devices by using the input NAI as a selection pin.

Addressing up to 255 units is possible.

TMC5160

#1

TMC5160

#2

TMC5160

#3

NAI

NAO

+V_IO

R_IDLE

Master CPU

(µC with UART,

software

switches TXD to

hi-Z for

TXD

RXD

R_IDLEforces stop bit level in idle conditions,

3k3 is sufficient with 14 slaves

receiving)

EXAMPLE FOR ADDRESSING UP TO 255 TMC5160

Addressing phase 1:

Addressing phase 2:

Addressing phase 3:

Addressing phase 4:

Addressing phase X:

address 0, NAO is high

address 1

address 0, NAO is high

address 1

program to address 254 & set NAO low

address 254

address 1

program to address 253 & set NAO low

address 253

address 0

address 254

program to address 252 & set NAO low

continue procedure

Figure 5.1 Addressing multiple TMC5160 via single wire interface using chaining

PROCEED AS FOLLOWS:

-

Tie the NAI pin of your first TMC5160 to GND.

Interconnect NAO output of the first TMC5160 to the next drivers NAI pin. Connect further

drivers in the same fashion.

-

Now, the first driver responds to address 0. Following drivers are set to address 1.

Program the first driver to its dedicated slave address. Note: once a driver is initialized with

its slave address, its NAO output, which is tied to the next drivers NAI has to be programmed

to logic 0 in order to differentiate the next driver from all following devices.

Now, the second driver is accessible and can get its slave address. Further units can be

programmed to their slave addresses sequentially.

-

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TMC5160 DATASHEET (Rev. 1.08 / 2018-NOV-19)

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TMC5160

#2

TMC5160

#3

NAI

#1

NAO

R_FILT

C_FILT

+V_IO

1k

A

B

Master CPU

(µC with RS485

tranceiver)

R_TERM

EXAMPLE FOR ADDRESSING UP TO 255 TMC5160

Addressing phase 1:

Addressing phase 2:

Addressing phase 3:

Addressing phase 4:

Addressing phase X:

address 0, NAO high

address 1

address 0, NAO high

address 1

program to address 254 & set NAO low

address 254

address 1

program to address 253 & set NAO low

address 253

address 0, NAO high

address 254

program to address 252 & set NAO low

continue procedure

Figure 5.2 Addressing multiple TMC5160 via the differential interface, additional filtering for NAI

A different scheme (not shown) uses bus switches (like 74HC4066) to connect the bus to the next unit

in the chain without using the NAI input. The bus switch can be controlled in the same fashion, using

the NAO output to enable it (low level shall enable the bus switch). Once the bus switch is enabled it

allows addressing the next bus segment. As bus switches add a certain resistance, the maximum

number of nodes will be reduced.

It is possible to mix different styles of addressing in a system. For example, a system using two

boards with each two TMC5160 can have both devices on a board with a different level on NEXTADDR,

while the next board is chained using analog switches separating the bus until the drivers on the first

board have been programmed.

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6 Register Mapping

This chapter gives an overview of the complete register set. Some of the registers bundling a number

of single bits are detailed in extra tables. The functional practical application of the settings is detailed

in dedicated chapters.

Note

- All registers become reset to 0 upon power up, unless otherwise noted.

- Add 0x80 to the address Addr for write accesses!

NOTATION OF HEXADECIMAL AND BINARY NUMBERS

0x

%

precedes a hexadecimal number, e.g. 0x04

precedes a multi-bit binary number, e.g. %100

NOTATION OF R/W FIELD

R

Read only

W

Write only

R/W

R+C

Read- and writable register

Clear upon read

OVERVIEW REGISTER MAPPING

REGISTER

DESCRIPTION

General Configuration Registers

These registers contain

-

global configuration

global status flags

interface configuration

and I/O signal configuration

Ramp Generator Motion Control Register Set

This register set offers registers for

-

choosing a ramp mode

choosing velocities

homing

acceleration and deceleration

target positioning

reference switch and stallGuard2 event

configuration

-

ramp and reference switch status

Velocity Dependent Driver Feature Control Register This register set offers registers for

Set

-

driver current control

setting thresholds for coolStep operation

setting thresholds for different chopper modes

setting thresholds for dcStep operation

Encoder Register Set

The encoder register set offers all registers needed for

proper ABN encoder operation.

Motor Driver Register Set

This register set offers registers for

-

setting / reading out microstep table and

counter

-

chopper and driver configuration

coolStep and stallGuard2 configuration

dcStep configuration

reading out stallGuard2 values and driver error

flags

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6.1 General Configuration Registers

GENERAL CONFIGURATION REGISTERS (0X00…0X0F)

R/W

Addr

n

Register

Description / bit names

Bit GCONF – Global configuration flags

recalibrate

1: Zero crossing recalibration during driver disable

(via ENN or via TOFF setting)

0

1

faststandstill

Timeout for step execution until standstill detection:

1:

Short time: 2^18 clocks

0:

Normal time: 2^20 clocks

2

3

en_pwm_mode

1: stealthChop voltage PWM mode enabled

(depending on velocity thresholds). Switch from

off to on state while in stand-still and at IHOLD=

nominal IRUN current, only.

multistep_filt

1:

Enable step input filtering for stealthChop

optimization with external step source (default=1)

4

5

shaft

1:

Inverse motor direction

diag0_error (only with SD_MODE=1)

1:

Enable DIAG0 active on driver errors:

Over temperature (ot), short to GND (s2g),

undervoltage chargepump (uv_cp)

DIAG0 always shows the reset-status, i.e. is active low

during reset condition.

6

7

diag0_otpw (only with SD_MODE=1)

RW

0x00

17

GCONF

1:

Enable DIAG0 active on driver over temperature

prewarning (otpw)

diag0_stall (with SD_MODE=1)

1:

Enable DIAG0 active on motor stall (set

TCOOLTHRS before using this feature)

diag0_step (with SD_MODE=0)

0:

1:

DIAG0 outputs interrupt signal

Enable DIAG0 as STEP output (dual edge

triggered steps) for external STEP/DIR driver

8

9

diag1_stall (with SD_MODE=1)

1:

Enable DIAG1 active on motor stall (set

TCOOLTHRS before using this feature)

diag1_dir (with SD_MODE=0)

0:

1:

DIAG1 outputs position compare signal

Enable DIAG1 as DIR output for external STEP/DIR

driver

diag1_index (only with SD_MODE=1)

1:

Enable DIAG1 active on index position (microstep

look up table position 0)

10 diag1_onstate (only with SD_MODE=1)

1:

Enable DIAG1 active when chopper is on (for the

coil which is in the second half of the fullstep)

11 diag1_steps_skipped (only with SD_MODE=1)

1:

Enable output toggle when steps are skipped in

dcStep mode (increment of LOST_STEPS). Do not

enable in conjunction with other DIAG1 options.

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GENERAL CONFIGURATION REGISTERS (0X00…0X0F)

R/W

Addr

n

Register

Description / bit names

12 diag0_int_pushpull

0:

1:

SWN_DIAG0 is open collector output (active low)

Enable SWN_DIAG0 push pull output (active high)

13 diag1_poscomp_pushpull

0:

SWP_DIAG1 is open collector output (active low)

1:

Enable SWP_DIAG1 push pull output (active high)

14 small_hysteresis

0:

1:

Hysteresis for step frequency comparison is 1/16

Hysteresis for step frequency comparison is 1/32

15 stop_enable

0:

Normal operation

1:

Emergency stop: ENCA_DCIN stops the sequencer

when tied high (no steps become executed by

the sequencer, motor goes to standstill state).

16 direct_mode

0:

Normal operation

1:

Motor coil currents and polarity directly

programmed via serial interface: Register XTARGET

(0x2D) specifies signed coil A current (bits 8..0)

and coil B current (bits 24..16). In this mode, the

current is scaled by IHOLD setting. Velocity based

current regulation of stealthChop is not available

in this mode. The automatic stealthChop current

regulation will work only for low stepper motor

velocities.

17 test_mode

0:

1:

Normal operation

Enable analog test output on pin ENCN_DCO.

IHOLD[1..0] selects the function of ENCN_DCO:

0…2: T120, DAC, VDDH

Hint: Not for user, set to 0 for normal operation!

Bit

GSTAT – Global status flags

(Re-Write with ‘1’ bit to clear respective flags)

reset

0

1

1:

Indicates that the IC has been reset. All registers

have been cleared to reset values.

drv_err

1:

Indicates, that the driver has been shut down

R+

WC

0x01

3

GSTAT

due to overtemperature or short circuit detection.

Read DRV_STATUS for details. The flag can only

be cleared when the temperature is below the

limit again.

2

uv_cp

1:

Indicates an undervoltage on the charge pump.

The driver is disabled during undervoltage. This

flag is latched for information.

Interface transmission counter. This register becomes

incremented with each successful UART interface write access.

It can be read out to check the serial transmission for lost

data. Read accesses do not change the content. Disabled in SPI

operation. The counter wraps around from 255 to 0.

R

0x02

0x03

8

IFCNT

W

SLAVECONF

Bit

SLAVECONF

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TMC5160 DATASHEET (Rev. 1.08 / 2018-NOV-19)

33

GENERAL CONFIGURATION REGISTERS (0X00…0X0F)

R/W

Addr

n

+

Register

Description / bit names

7..0 SLAVEADDR:

4

These eight bits set the address of unit for the UART

interface. The address becomes incremented by one

when the external address pin NEXTADDR is active.

Range: 0-253 (254 cannot be incremented), default=0

11..8 SENDDELAY:

0, 1: 8 bit times (not allowed with multiple slaves)

2, 3:

4, 5:

6, 7:

8, 9:

3*8 bit times

5*8 bit times

7*8 bit times

9*8 bit times

10, 11: 11*8 bit times

12, 13: 13*8 bit times

14, 15: 15*8 bit times

INPUT

Bit

Reads the state of all input pins available

0 REFL_STEP

1 REFR_DIR

2 ENCB_DCEN_CFG4

3 ENCA_DCIN_CFG5

4 DRV_ENN

5 ENC_N_DCO_CFG6

6 SD_MODE (1=External step and dir source)

8

+

8

R

0x04

IOIN

7 SWCOMP_IN (Shows voltage difference of SWN and

SWP. Bring DIAG outputs to high level with pushpull

disabled to test the comparator.)

31.. VERSION: 0x30=first version of the IC

24 Identical numbers mean full digital compatibility.

Bit

OUTPUT

Sets the IO output pin polarity in UART mode

0

In UART mode, SDO_CFG0 is an output. This bit

programs the output polarity of this pin. Its main

purpose it to use SDO_CFG0 as NAO next address

output signal for chain addressing of multiple ICs.

Hint: Reset Value is 1 for use as NAO to next IC in

single wire chain

W

0x04

1

OUTPUT

Position comparison register for motion controller position

strobe. The Position pulse is available on output SWP_DIAG1.

W

0x05

0x06

32 X_COMPARE

XACTUAL = X_COMPARE:

-

Output signal PP (position pulse) becomes high. It

returns to a low state, if the positions mismatch.

OTP_PROGRAM – OTP programming

Bit

Write access programs OTP memory (one bit at a time),

Read access refreshes read data from OTP after a write

2..0 OTPBIT

Selection of OTP bit to be programmed to the selected

byte location (n=0..7: programs bit n to a logic 1)

5..4 OTPBYTE

Set to 00

OTP_PROG

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TMC5160 DATASHEET (Rev. 1.08 / 2018-NOV-19)

34

GENERAL CONFIGURATION REGISTERS (0X00…0X0F)

R/W

Addr

n

Register

Description / bit names

15..8 OTPMAGIC

Set to 0xbd to enable programming. A programming

time of minimum 10ms per bit is recommended (check

by reading OTP_READ).

Bit

OTP_READ (Access to OTP memory result and update)

See separate table!

R

0x07

0x08

OTP_READ

7..0 OTP0 byte 0 read data

4..0 FCLKTRIM (Reset default: OTP)

0…31: Lowest to highest clock frequency. Check at

charge pump output. The frequency span is not

guaranteed, but it is tested, that tuning to 12MHz

internal clock is possible. The devices come preset to

12MHz clock frequency by OTP programming.

(Reset Default: OTP)

FACTORY_

CONF

RW

5

Bit

SHORT_CONF

3..0 S2VS_LEVEL:

Short to VS detector level for lowside FETs. Checks for

voltage drop in LS MOSFET and sense resistor.

4 (highest sensitivity) … 15 (lowest sensitivity)

Hint: Settings from 1 to 3 will trigger during normal

operation due to voltage drop on sense resistor.

(Reset Default: OTP 6 or 12)

11..8 S2G_LEVEL:

Short to GND detector level for highside FETs. Checks

for voltage drop on high side MOSFET

2 (highest sensitivity) … 15 (lowest sensitivity)

Attention: Settings below 6 not recommended at >52V

operation – false detection might result

SHORT_

CONF

W

0x09

19

(Reset Default: OTP 6 or 12)

17..16 SHORTFILTER:

Spike filtering bandwidth for short detection

0 (lowest, 100ns), 1 (1µs), 2 (2µs) 3 (3µs)

Hint: A good PCB layout will allow using setting 0.

Increase value, if erroneous short detection occurs.

(Reset Default = %01)

18 shortdelay: Short detection delay

0=750ns: normal, 1=1500ns: high

The short detection delay shall cover the bridge

switching time. 0 will work for most applications.

(Reset Default = 0)

Bit

DRV_CONF

4..0 BBMTIME:

Break-Before make delay

0=shortest (100ns) … 16 (200ns) … 24=longest (375ns)

>24 not recommended, use BBMCLKS instead

W

0x0A

22 DRV_CONF

Hint: Choose the lowest setting safely covering the

switching event in order to avoid bridge cross-

conduction. Add roughly 30% of reserve.

(Reset Default = 0)

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TMC5160 DATASHEET (Rev. 1.08 / 2018-NOV-19)

35

GENERAL CONFIGURATION REGISTERS (0X00…0X0F)

R/W

Addr

n

Register

Description / bit names

11..8 BBMCLKS:

0..15: Digital BBM time in clock cycles (typ. 83ns).

The longer setting rules (BBMTIME vs. BBMCLKS).

(Reset Default: OTP 4 or 2)

17..16 OTSELECT:

Selection of over temperature level for bridge disable,

switch on after cool down to 120°C / OTPW level.

00: 150°C

01: 143°C

10: 136°C (not recommended when VSA > 24V)

11: 120°C (not recommended, no hysteresis)

Hint: Adapt overtemperature threshold as required to

protect the MOSFETs or other components on the PCB.

(Reset Default = %00)

19..18 DRVSTRENGTH:

Selection of gate driver current. Adapts the gate driver

current to the gate charge of the external MOSFETs.

00: weak

01: weak+TC (medium above OTPW level)

10: medium

11: strong

Hint: Choose the lowest setting giving slopes <100ns.

(Reset Default = %10)

21..20 FILT_ISENSE:

Filter time constant of sense amplifier to suppress

ringing and coupling from second coil operation

00: low – 100ns

01:

10:

– 200ns

– 300ns

11: high– 400ns

Hint: Increase setting if motor chopper noise occurs

due to cross-coupling of both coils.

(Reset Default = %00)

7..0 Global scaling of Motor current. This value is multiplied

to the current scaling in order to adapt a drive to a

certain motor type. This value should be chosen before

tuning other settings, because it also influences

chopper hysteresis.

GLOBAL

SCALER

W

0x0B

0x0C

8

0:

Full Scale (or write 256)

Not allowed for operation

1 … 31:

32 … 255: 32/256 … 255/256 of maximum current.

Hint: Values >128 recommended for best results

(Reset Default = 0)

15..8 Offset calibration result phase A (signed)

7..0 Offset calibration result phase B (signed)

OFFSET_

READ

R

16

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TMC5160 DATASHEET (Rev. 1.08 / 2018-NOV-19)

36

6.1.1 OTP_READ – OTP configuration memory

The OTP memory holds power up defaults for certain registers. All OTP memory bits are cleared to 0

by default. Programming only can set bits, clearing bits is not possible. Factory tuning of the clock

frequency affects otp0.0 to otp0.4. The state of these bits therefore may differ between individual ICs.

0X07: OTP_READ – OTP MEMORY MAP

Bit Name

Function

Comment

7

6

5

otp0.7

otp0.6

otp0.5

otp_TBL

Reset default for TBL:

0: TBL=%10 (~3µs)

1: TBL=%01 (~2µs)

Reset default for DRVCONF.BBMCLKS

0: BBMCLKS=4

otp_BBM

1: BBMCLKS=2

otp_S2_LEVEL

OTP_FCLKTRIM

Reset default for Short detection Levels:

0: S2G_LEVEL = S2VS_LEVEL = 6

1: S2G_LEVEL = S2VS_LEVEL = 12

Reset default for FCLKTRIM

4

3

2

1

0

otp0.4

otp0.3

otp0.2

otp0.1

otp0.0

0: lowest frequency setting

31: highest frequency setting

Attention: This value is pre-programmed by factory clock

trimming to the default clock frequency of 12MHz and

differs between individual ICs! It should not be altered.

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TMC5160 DATASHEET (Rev. 1.08 / 2018-NOV-19)

37

6.2 Velocity Dependent Driver Feature Control Register Set

VELOCITY DEPENDENT DRIVER FEATURE CONTROL REGISTER SET (0X10…0X1F)

R/W

Addr

n

Register

Description / bit names

Bit IHOLD_IRUN – Driver current control

4..0 IHOLD

Standstill current (0=1/32…31=32/32)

In combination with stealthChop mode, setting

IHOLD=0 allows to choose freewheeling or coil

short circuit for motor stand still.

12..8 IRUN

Motor run current (0=1/32…31=32/32)

5

+

Hint: Choose sense resistors in a way, that normal

W

0x10

5

IHOLD_IRUN

IRUN is 16 to 31 for best microstep performance.

+

4

19..16 IHOLDDELAY

Controls the number of clock cycles for motor

power down after a motion as soon as standstill is

detected (stst=1) and TPOWERDOWN has expired.

The smooth transition avoids a motor jerk upon

power down.

0:

instant power down

1..15:

Delay per current reduction step in multiple

of 2^18 clocks

TPOWERDOWN sets the delay time after stand still (stst) of the

motor to motor current power down. Time range is about 0 to

4 seconds.

Attention: A minimum setting of 2 is required to allow

automatic tuning of stealthChop PWM_OFFS_AUTO.

Reset Default = 10

TPOWER

DOWN

W

0x11

8

0…((2^8)-1) * 2^18 t_CLK

Actual measured time between two 1/256 microsteps derived

from the step input frequency in units of 1/fCLK. Measured

value is (2^20)-1 in case of overflow or stand still.

All TSTEP related thresholds use a hysteresis of 1/16 of the

compare value to compensate for jitter in the clock or the step

frequency. The flag small_hysteresis modifies the hysteresis to

a smaller value of 1/32.

(Txxx*15/16)-1 or

(Txxx*31/32)-1 is used as a second compare value for each

comparison value.

R

0x12

20 TSTEP

This means, that the lower switching velocity equals the

calculated setting, but the upper switching velocity is higher as

defined by the hysteresis setting.

When working with the motion controller, the measured TSTEP

for a given velocity V is in the range

(2²⁴/ V) ≤ TSTEP ≤ 2²⁴/ V - 1.

In dcStep mode TSTEP will not show the mean velocity of the

motor, but the velocities for each microstep, which may not be

stable and thus does not represent the real motor velocity in

case it runs slower than the target velocity.

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TMC5160 DATASHEET (Rev. 1.08 / 2018-NOV-19)

38

VELOCITY DEPENDENT DRIVER FEATURE CONTROL REGISTER SET (0X10…0X1F)

R/W

Addr

n

Register

Description / bit names

This is the upper velocity for stealthChop voltage PWM mode.

TSTEP ≥ TPWMTHRS

W

0x13

20 TPWMTHRS

-

stealthChop PWM mode is enabled, if configured

dcStep is disabled

-

This is the lower threshold velocity for switching on smart

energy coolStep and stallGuard feature. (unsigned)

Set this parameter to disable coolStep at low speeds, where it

cannot work reliably. The stop on stall function (enable with

sg_stop when using internal motion controller) and the stall

output signal become enabled when exceeding this velocity. In

non-dcStep mode, it becomes disabled again once the velocity

falls below this threshold.

W

0x14

20 TCOOLTHRS

TCOOLTHRS ≥ TSTEP ≥ THIGH:

-

coolStep is enabled, if configured

-

stealthChop voltage PWM mode is disabled

TCOOLTHRS ≥ TSTEP

-

Stop on stall is enabled, if configured

Stall output signal (DIAG0/1) is enabled, if configured

This velocity setting allows velocity dependent switching into

a different chopper mode and fullstepping to maximize torque.

(unsigned)

The stall detection feature becomes switched off for 2-3

electrical periods whenever passing THIGH threshold to

compensate for the effect of switching modes.

TSTEP ≤ THIGH:

W

0x15

20 THIGH

-

coolStep is disabled (motor runs with normal current

scale)

-

stealthChop voltage PWM mode is disabled

If vhighchm is set, the chopper switches to chm=1

with TFD=0 (constant off time with slow decay, only).

If vhighfs is set, the motor operates in fullstep mode

and the stall detection becomes switched over to

dcStep stall detection.

-

Microstep velocity time reference t for velocities: TSTEP = f_CLK/ f_STEP

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TMC5160 DATASHEET (Rev. 1.08 / 2018-NOV-19)

39

6.3 Ramp Generator Registers

6.3.1 Ramp Generator Motion Control Register Set

RAMP GENERATOR MOTION CONTROL REGISTER SET (0X20…0X2D)

R/W

Addr

n

Register

Description / bit names

Range [Unit]

RAMPMODE:

0…3

0:

1:

2:

3:

Positioning mode (using all A, D and V

parameters)

Velocity mode to positive VMAX (using

AMAX acceleration)

Velocity mode to negative VMAX (using

AMAX acceleration)

Hold mode (velocity remains unchanged,

unless stop event occurs)

RW

0x20

2

RAMPMODE

Actual motor position (signed)

-2^31…

+(2^31)-1

Hint: This value normally should only be

modified, when homing the drive. In

positioning mode, modifying the register

content will start a motion.

Actual motor velocity from ramp generator +-(2^23)-1

(signed)

RW

0x21

0x22

32 XACTUAL

24 VACTUAL

[µsteps / t]

R

The sign matches the motion direction. A

negative sign means motion to lower

XACTUAL.

Motor start velocity (unsigned)

0…(2^18)-1

[µsteps / t]

W

0x23

0x24

0x25

18 VSTART

16 A1

For universal use, set VSTOP ≥ VSTART. This is

not required if the motion distance is sufficient

to ensure deceleration from VSTART to VSTOP.

First acceleration between VSTART and V1 0…(2^16)-1

(unsigned)

[µsteps / ta²]

First acceleration

/

deceleration phase 0…(2^20)-1

threshold velocity (unsigned)

[µsteps / t]

20 V1

0: Disables A1 and D1 phase, use AMAX, DMAX

only

Second acceleration between V1 and VMAX 0…(2^16)-1

(unsigned)

[µsteps / ta²]

W

0x26

16 AMAX

This is the acceleration and deceleration value

for velocity mode.

Motion ramp target velocity (for positioning 0…(2^23)-512

ensure VMAX ≥ VSTART) (unsigned)

[µsteps / t]

W

0x27

0x28

0x2A

23 VMAX

16 DMAX

16 D1

This is the target velocity in velocity mode. It

can be changed any time during a motion.

Deceleration between VMAX and V1 (unsigned) 0…(2^16)-1

[µsteps / ta²]

Deceleration

(unsigned)

between

V1

and

VSTOP 1…(2^16)-1

[µsteps / ta²]

Attention: Do not set 0 in positioning mode,

even if V1=0!

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TMC5160 DATASHEET (Rev. 1.08 / 2018-NOV-19)

40

RAMP GENERATOR MOTION CONTROL REGISTER SET (0X20…0X2D)

R/W

Addr

n

Register

Description / bit names

Range [Unit]

Motor stop velocity (unsigned)

1…(2^18)-1

[µsteps / t]

Hint: Set VSTOP ≥ VSTART to allow positioning Reset

W

0x2B

18 VSTOP

for short distances

Default=1

Attention: Do not set 0 in positioning mode,

minimum 10 recommend!

Defines the waiting time after ramping down 0…(2^16)-1 *

to zero velocity before next movement or 512 t_CLK

direction inversion can start. Time range is

about 0 to 2 seconds.

W

0x2C

16 TZEROWAIT

This setting avoids excess acceleration e.g.

from VSTOP to -VSTART.

Target position for ramp mode (signed). Write -2^31…

a new target position to this register in order +(2^31)-1

to activate the ramp generator positioning in

RAMPMODE=0.

Initialize

all

velocity,

acceleration and deceleration parameters

before.

Hint: The position is allowed to wrap around,

thus, XTARGET value optionally can be treated

as an unsigned number.

RW

0x2D

32 XTARGET

Hint: The maximum possible displacement is

+/-((2^31)-1).

Hint: When increasing V1, D1 or DMAX during

a motion, rewrite XTARGET afterwards in order

to trigger a second acceleration phase, if

desired.

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TMC5160 DATASHEET (Rev. 1.08 / 2018-NOV-19)

41

6.3.2 Ramp Generator Driver Feature Control Register Set

RAMP GENERATOR DRIVER FEATURE CONTROL REGISTER SET (0X30…0X36)

R/W

Addr

n

Register

Description / bit names

Automatic commutation dcStep becomes enabled above

velocity VDCMIN (unsigned) (only when using internal ramp

generator, not for STEP/DIR interface – in STEP/DIR mode,

dcStep becomes enabled by the external signal DCEN)

In this mode, the actual position is determined by the sensor-

less motor commutation and becomes fed back to XACTUAL. In

case the motor becomes heavily loaded, VDCMIN also is used

as the minimum step velocity. Activate stop on stall (sg_stop)

to detect step loss.

W

0x33

23 VDCMIN

0: Disable, dcStep off

|VACT| ≥ VDCMIN ≥ 256:

-

Triggers the same actions as exceeding THIGH setting.

-

Switches on automatic commutation dcStep

Hint: Also set DCCTRL parameters in order to operate dcStep.

(Only bits 22… 8 are used for value and for comparison)

Switch mode configuration

See separate table!

SW_MODE

RW

0x34

0x35

12

R+

WC

RAMP_STAT Ramp status and switch event status

14

See separate table!

Ramp generator latch position, latches XACTUAL upon a

programmable switch event (see SW_MODE).

R

0x36

32 XLATCH

Hint: The encoder position can be latched to ENC_LATCH

together with XLATCH to allow consistency checks.

Time reference t for velocities: t = 2^24 / f_CLK

Time reference ta² for accelerations: ta² = 2^41 / (f_CLK)²

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TMC5160 DATASHEET (Rev. 1.08 / 2018-NOV-19)

42

6.3.2.1 SW_MODE – Reference Switch & stallGuard2 Event Configuration Register

0X34: SW_MODE – REFERENCE SWITCH AND STALLGUARD2 EVENT CONFIGURATION REGISTER

Bit Name

Comment

11 en_softstop

0: Hard stop

1: Soft stop

The soft stop mode always uses the deceleration ramp settings DMAX, V1,

D1, VSTOP and TZEROWAIT for stopping the motor. A stop occurs when

the velocity sign matches the reference switch position (REFL for negative

velocities, REFR for positive velocities) and the respective switch stop

function is enabled.

A hard stop also uses TZEROWAIT before the motor becomes released.

Attention: Do not use soft stop in combination with stallGuard2. Use soft

stop for stealthChop operation at high velocity. In this case, hard stop

must be avoided, as it could result in severe overcurrent.

10 sg_stop

1: Enable stop by stallGuard2 (also available in dcStep mode). Disable to

release motor after stop event. Program TCOOLTHRS for velocity threshold.

Hint: Do not enable during motor spin-up, wait until the motor velocity

exceeds a certain value, where stallGuard2 delivers a stable result. This

velocity threshold should be programmed using TCOOLTHRS.

1: Latch encoder position to ENC_LATCH upon reference switch event.

1: Activates latching of the position to XLATCH upon an inactive going

edge on the right reference switch input REFR. The active level is defined

by pol_stop_r.

9

8

en_latch_encoder

latch_r_inactive

7

latch_r_active

1: Activates latching of the position to XLATCH upon an active going edge

on the right reference switch input REFR.

Hint: Activate latch_r_active to detect any spurious stop event by reading

status_latch_r.

6

5

latch_l_inactive

latch_l_active

1: Activates latching of the position to XLATCH upon an inactive going

edge on the left reference switch input REFL. The active level is defined

by pol_stop_l.

1: Activates latching of the position to XLATCH upon an active going edge

on the left reference switch input REFL.

Hint: Activate latch_l_active to detect any spurious stop event by reading

status_latch_l.

4

3

swap_lr

pol_stop_r

1: Swap the left and the right reference switch input REFL and REFR

Sets the active polarity of the right reference switch input

0=non-inverted, high active: a high level on REFR stops the motor

1=inverted, low active: a low level on REFR stops the motor

Sets the active polarity of the left reference switch input

0=non-inverted, high active: a high level on REFL stops the motor

1=inverted, low active: a low level on REFL stops the motor

1: Enables automatic motor stop during active right reference switch input

2

1

0

pol_stop_l

stop_r_enable

stop_l_enable

Hint: The motor restarts in case the stop switch becomes released.

1: Enables automatic motor stop during active left reference switch input

Hint: The motor restarts in case the stop switch becomes released.

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TMC5160 DATASHEET (Rev. 1.08 / 2018-NOV-19)

43

6.3.2.2 RAMP_STAT – Ramp & Reference Switch Status Register

0X35: RAMP_STAT – RAMP AND REFERENCE SWITCH STATUS REGISTER

R/W

Bit Name

Comment

R

13

status_sg

1: Signals an active stallGuard2 input from the coolStep driver or

from the dcStep unit, if enabled.

Hint: When polling this flag, stall events may be missed – activate

sg_stop to be sure not to miss the stall event.

1: Signals that the automatic ramp required moving back in the

opposite direction, e.g. due to on-the-fly parameter change

(Write ‘1’ to clear)

R+

WC

12

11

second_move

R

t_zerowait_

active

1: Signals, that TZEROWAIT is active after a motor stop. During this

time, the motor is in standstill.

R

10

9

vzero

1: Signals, that the actual velocity is 0.

1: Signals, that the target position is reached.

This flag becomes set while XACTUAL and XTARGET match.

1: Signals, that the target velocity is reached.

This flag becomes set while VACTUAL and VMAX match.

1: Signals, that the target position has been reached

(position_reached becoming active).

position_

reached

velocity_

reached

event_pos_

reached

R

8

7

R+

WC

(Write ‘1’ to clear flag and interrupt condition)

This bit is ORed to the interrupt output signal.

R+

WC

6

5

event_stop_

sg

1: Signals an active StallGuard2 stop event.

Reading the register will clear the stall condition and the motor may

re-start motion, unless the motion controller has been stopped.

(Write ‘1’ to clear flag and interrupt condition)

This bit is ORed to the interrupt output signal.

R

event_stop_r

1: Signals an active stop right condition due to stop switch.

The stop condition and the interrupt condition can be removed by

setting RAMP_MODE to hold mode or by commanding a move to the

opposite direction. In soft_stop mode, the condition will remain

active until the motor has stopped motion into the direction of the

stop switch. Disabling the stop switch or the stop function also

clears the flag, but the motor will continue motion.

This bit is ORed to the interrupt output signal.

4

event_stop_l

1: Signals an active stop left condition due to stop switch.

The stop condition and the interrupt condition can be removed by

setting RAMP_MODE to hold mode or by commanding a move to the

opposite direction. In soft_stop mode, the condition will remain

active until the motor has stopped motion into the direction of the

stop switch. Disabling the stop switch or the stop function also

clears the flag, but the motor will continue motion.

This bit is ORed to the interrupt output signal.

R+

WC

3

2

status_latch_r

status_latch_l

1: Latch right ready

(enable position latching using SW_MODE settings

latch_r_active or latch_r_inactive)

(Write ‘1’ to clear)

1: Latch left ready

(enable position latching using SW_MODE settings

latch_l_active or latch_l_inactive)

(Write ‘1’ to clear)

R

1

0

status_stop_r

status_stop_l

Reference switch right status (1=active)

Reference switch left status (1=active)

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TMC5160 DATASHEET (Rev. 1.08 / 2018-NOV-19)

44

6.4 Encoder Registers

ENCODER REGISTER SET (0X38…0X3C)

R/W

Addr

n

Register

Description / bit names

Range [Unit]

Encoder configuration and use of N channel

See separate table!

Actual encoder position (signed)

RW

0x38

11 ENCMODE

32 X_ENC

-2^31…

+(2^31)-1

binary:

± [µsteps/2^16]

±(0 …

RW

W

0x39

0x3A

Accumulation constant (signed)

16 bit integer part, 16 bit fractional part

X_ENC accumulates

+/- ENC_CONST / (2^16*X_ENC) (binary)

or

32767.999847)

decimal:

32 ENC_CONST

±(0.0 …

32767.9999)

+/-ENC_CONST / (10^4*X_ENC) (decimal)

reset default =

ENCMODE bit enc_sel_decimal switches 1.0 (=65536)

between decimal and binary setting.

Use the sign, to match rotation direction!

Encoder status information

bit 0: n_event

bit 1: deviation_warn

1: Event detected.

R+

WC

To clear the status bit, write with a 1 bit at

the corresponding position.

0x3B

2

ENC_STATUS

Deviation_warn cannot be cleared while a

warning still persists. Set ENC_DEVIATION

zero to disable.

Both bits are ORed to the interrupt output

signal.

Encoder position X_ENC latched on N event

R

0x3C

0x3D

32 ENC_LATCH

Maximum number of steps deviation

between encoder counter and XACTUAL for

deviation warning

ENC_

20

W

DEVIATION

Result in flag ENC_STATUS.deviation_warn

0=Function is off.

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TMC5160 DATASHEET (Rev. 1.08 / 2018-NOV-19)

45

6.4.1 ENCMODE – Encoder Register

0X38: ENCMODE – ENCODER REGISTER

Bit Name

Comment

10 enc_sel_decimal

0

Encoder prescaler divisor binary mode:

Counts ENC_CONST(fractional part) /65536

Encoder prescaler divisor decimal mode:

Counts in ENC_CONST(fractional part) /10000

1

9

8

latch_x_act

clr_enc_x

1: Also latch XACTUAL position together with X_ENC.

Allows latching the ramp generator position upon an N channel event as

selected by pos_edge and neg_edge.

0

1

Upon N event, X_ENC becomes latched to ENC_LATCH only

Latch and additionally clear encoder counter X_ENC at N-event

7

6

neg_edge

pos_edge

n p N channel event sensitivity

0 0 N channel event is active during an active N event level

0 1 N channel is valid upon active going N event

1 0 N channel is valid upon inactive going N event

1 1 N channel is valid upon active going and inactive going N event

1: Latch or latch and clear X_ENC on the next N event following the write

access

1: Always latch or latch and clear X_ENC upon an N event (once per

revolution, it is recommended to combine this setting with edge sensitive

N event)

5

4

clr_once

clr_cont

3

ignore_AB

0

An N event occurs only when polarities given by

pol_N, pol_A and pol_B match.

1

Ignore A and B polarity for N channel event

2

1

0

pol_N

pol_B

pol_A

Defines active polarity of N (0=low active, 1=high active)

Required B polarity for an N channel event (0=neg., 1=pos.)

Required A polarity for an N channel event (0=neg., 1=pos.)

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TMC5160 DATASHEET (Rev. 1.08 / 2018-NOV-19)

46

6.5 Motor Driver Registers

MICROSTEPPING CONTROL REGISTER SET (0X60…0X6B)

R/W

Addr

n

Register

Description / bit names

Range [Unit]

MSLUT[0]

Each bit gives the difference between entry x 32x 0 or 1

and entry x+1 when combined with the cor- reset default=

W

0x60

32 microstep

responding MSLUTSEL W bits:

sine wave

table

table entries 0: W= %00: -1

0…31

%01: +0

%10: +1

7x

%11: +2

32x 0 or 1

reset default=

sine wave

table

1: W= %00: +0

%01: +1

%10: +2

%11: +3

MSLUT[1...7]

0x61

…

7

x

This is the differential coding for the first

W

microstep

0x67

32 table entries quarter of a wave. Start values for CUR_A and

CUR_B are stored for MSCNT position 0 in

START_SIN and START_SIN90.

ofs31, ofs30, …, ofs01, ofs00

…

32…255

ofs255, ofs254, …, ofs225, ofs224

This register defines four segments within 0<X1<X2<X3

each quarter MSLUT wave. Four 2 bit entries reset default=

determine the meaning of a 0 and a 1 bit in sine wave

W

0x68

0x69

32 MSLUTSEL

the corresponding segment of MSLUT.

table

See separate table!

bit 7… 0:

bit 23… 16: START_SIN90

START_SIN

reset default

START_SIN gives the absolute current at =0

microstep table entry 0.

8

+

8

MSLUTSTART START_SIN90 gives the absolute current for START_SIN90

microstep table entry at positions 256. reset default

Start values are transferred to the microstep =247

registers CUR_A and CUR_B, whenever the

reference position MSCNT=0 is passed.

Microstep counter. Indicates actual position 0…1023

in the microstep table for CUR_A. CUR_B uses

an offset of 256 (2 phase motor).

Hint: Move to a position where MSCNT is

zero before re-initializing MSLUTSTART or

MSLUT and MSLUTSEL.

R

0x6A

0x6B

10 MSCNT

bit 8… 0:

CUR_A (signed):

+/-0...255

Actual microstep current for

motor phase A as read from

MSLUT (not scaled by current)

9

+

MSCURACT

bit 24… 16: CUR_B (signed):

9

Actual microstep current for

motor phase B as read from

MSLUT (not scaled by current)

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TMC5160 DATASHEET (Rev. 1.08 / 2018-NOV-19)

47

DRIVER REGISTER SET (0X6C…0X7F)

R/W

Addr

n

Register

Description / bit names

chopper and driver configuration

See separate table!

Range [Unit]

reset default=

0x10410150

RW

0x6C

32 CHOPCONF

coolStep smart current control register

and stallGuard2 configuration

See separate table!

W

0x6D

25 COOLCONF

dcStep

(DC)

automatic

commutation

configuration register (enable via pin DCEN

or via VDCMIN):

bit 9… 0:

DC_TIME: Upper PWM on time

limit for commutation (DC_TIME *

1/f_CLK). Set slightly above effective

blank time TBL.

bit 23… 16: DC_SG: Max. PWM on time for

step loss detection using dcStep

stallGuard2 in dcStep mode.

(DC_SG * 16/f_CLK)

W

0x6E

24 DCCTRL

Set

slightly

higher

than

DC_TIME/16

0=disable

Hint: Using a higher microstep resolution or

interpolated operation, dcStep delivers a

better stallGuard signal.

DC_SG is also available above VHIGH if

vhighfs is activated. For best result also set

vhighchm.

DRV_

32

stallGuard2 value and driver error flags

See separate table!

Voltage PWM mode chopper configuration

See separate table!

R

0x6F

0x70

STATUS

reset default=

0xC40C001E

W

22 PWMCONF

Results of stealthChop amplitude regulator.

These values can be used to monitor

automatic PWM amplitude scaling (255=max.

voltage).

bit 7… 0

PWM_SCALE_SUM:

0…255

Actual PWM duty cycle. This

value is used for scaling the

values CUR_A and CUR_B read

from the sine wave table.

R

0x71

9+8 PWM_SCALE

bit 24… 16 PWM_SCALE_AUTO:

signed

9 Bit signed offset added to the -255…+255

calculated PWM duty cycle. This

is the result of the automatic

amplitude regulation based on

current measurement.

These automatically generated values can be

read out in order to determine a default /

power up setting for PWM_GRAD and

PWM_OFS.

R

0x72

8+8 PWM_AUTO

bit 7… 0

PWM_OFS_AUTO:

Automatically determined offset

value

0…255

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TMC5160 DATASHEET (Rev. 1.08 / 2018-NOV-19)

48

DRIVER REGISTER SET (0X6C…0X7F)

R/W

Addr

n

Register

Description / bit names

bit 23… 16 PWM_GRAD_AUTO:

Automatically

Range [Unit]

0…255

determined

gradient value

Number of input steps skipped due to higher

load in dcStep operation, if step input does

not stop when DC_OUT is low. This counter

wraps around after 2^20 steps. Counts up or

down depending on direction. Only with

SDMODE=1.

R

0x73

20 LOST_STEPS

MICROSTEP TABLE CALCULATION FOR A SINE WAVE EQUIVALENT TO THE POWER ON DEFAULT

푖

푃퐼

푟표푢푛푑 (ꢀ4ꢁ ∗ 푠푖푛 ꢂꢀ ∗ 푃퐼 ∗

+

)ꢅ − ꢃ

ꢃꢄꢀ4 ꢃꢄꢀ4

-

i:[0… 255] is the table index

The amplitude of the wave is 248. The resulting maximum positive value is 247 and the

maximum negative value is -248.

-

The round function rounds values from 0.5 to 1.4999 to 1

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TMC5160 DATASHEET (Rev. 1.08 / 2018-NOV-19)

49

6.5.1 MSLUTSEL – Look up Table Segmentation Definition

0X68: MSLUTSEL – LOOK UP TABLE SEGMENTATION DEFINITION

Bit Name

Function

Comment

31 X3

30

29

28

LUT segment 3 start

The sine wave look up table can be divided into up to

four segments using an individual step width control

entry Wx. The segment borders are selected by X1, X2

and X3.

27

26

25

24

23 X2

22

21

Segment 0 goes from 0 to X1-1.

Segment 1 goes from X1 to X2-1.

Segment 2 goes from X2 to X3-1.

Segment 3 goes from X3 to 255.

LUT segment 2 start

For defined response the values shall satisfy:

0<X1<X2<X3

20

19

18

17

16

15 X1

14

LUT segment 1 start

13

12

11

10

9

8

7

6

5

4

3

2

1

0

W3

W2

W1

W0

LUT width select from

ofs(X3) to ofs255

Width control bit coding W0…W3:

%00:

%01:

%10:

%11:

MSLUT entry 0, 1 select: -1, +0

MSLUT entry 0, 1 select: +0, +1

MSLUT entry 0, 1 select: +1, +2

MSLUT entry 0, 1 select: +2, +3

LUT width select from

ofs(X2) to ofs(X3-1)

LUT width select from

ofs(X1) to ofs(X2-1)

LUT width select from

ofs00 to ofs(X1-1)

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TMC5160 DATASHEET (Rev. 1.08 / 2018-NOV-19)

50

6.5.2 CHOPCONF – Chopper Configuration

0X6C: CHOPCONF – CHOPPER CONFIGURATION

Bit Name

Function

Comment

31 diss2vs

short to supply

protection disable

short to GND

protection disable

enable double edge

step pulses

0: Short to VS protection is on

1: Short to VS protection is disabled

0: Short to GND protection is on

30 diss2g

29 dedge

28 intpol

1: Short to GND protection is disabled

1: Enable step impulse at each step edge to reduce step

frequency requirement.

1: The actual microstep resolution (MRES) becomes

extrapolated to 256 microsteps for smoothest motor

operation (useful for STEP/DIR operation, only)

%0000:

Native 256 microstep setting. Normally use this setting

with the internal motion controller.

%0001 … %1000:

interpolation to 256

microsteps

27 mres3

26 mres2

25 mres1

24 mres0

MRES

micro step resolution

128, 64, 32, 16, 8, 4, 2, FULLSTEP

Reduced microstep resolution esp. for STEP/DIR operation.

The resolution gives the number of microstep entries per

sine quarter wave.

The driver automatically uses microstep positions which

result in a symmetrical wave, when choosing a lower

microstep resolution.

step width=2^MRES [microsteps]

23 tpfd3

22 tpfd2

21 tpdf1

20 tpfd0

TPFD

TPFD allows dampening of motor mid-range resonances.

passive fast decay time Passive fast decay time setting controls duration of the

fast decay phase inserted after bridge polarity change

N_CLK= 128*TPFD

%0000: Disable

%0001 … %1111: 1 … 15

This bit enables switching to chm=1 and fd=0, when VHIGH

is exceeded. This way, a higher velocity can be achieved.

Can be combined with vhighfs=1. If set, the TOFF setting

automatically becomes doubled during high velocity

operation in order to avoid doubling of the chopper

frequency.

19 vhighchm high velocity chopper

mode

18 vhighfs

high velocity fullstep

selection

This bit enables switching to fullstep, when VHIGH is

exceeded. Switching takes place only at 45° position.

The fullstep target current uses the current value from

the microstep table at the 45° position.

17

-

reserved

reserved, set to 0

16 tbl1

15 tbl0

TBL

%00 … %11:

blank time select

Set comparator blank time to 16, 24, 36 or 54 clocks

Hint: %01 or %10 is recommended for most applications

14 chm

chopper mode

0

1

Standard mode (spreadCycle)

Constant off time with fast decay time.

Fast decay time is also terminated when the

negative nominal current is reached. Fast decay is

after on time.

13

-

reserved

Reserved, set to 0

12 disfdcc

fast decay mode

chm=1:

disfdcc=1 disables current comparator usage for termi-

nation of the fast decay cycle

chm=1:

11 fd3

TFD [3]

MSB of fast decay time setting TFD

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TMC5160 DATASHEET (Rev. 1.08 / 2018-NOV-19)

51

0X6C: CHOPCONF – CHOPPER CONFIGURATION

Bit Name

Function

Comment

10 hend3

HEND

chm=0

%0000 … %1111:

hysteresis low value

OFFSET

sine wave offset

Hysteresis is -3, -2, -1, 0, 1, …, 12

9

8

7

hend2

hend1

hend0

(1/512 of this setting adds to current setting)

This is the hysteresis value which becomes

used for the hysteresis chopper.

%0000 … %1111:

chm=1

chm=0

Offset is -3, -2, -1, 0, 1, …, 12

This is the sine wave offset and 1/512 of the

value becomes added to the absolute value

of each sine wave entry.

6

5

4

hstrt2

hstrt1

hstrt0

HSTRT

hysteresis start value

added to HEND

%000 … %111:

Add 1, 2, …, 8 to hysteresis low value HEND

(1/512 of this setting adds to current setting)

Attention: Effective HEND+HSTRT ≤ 16.

Hint: Hysteresis decrement is done each 16

clocks

TFD [2..0]

fast decay time setting

chm=1

Fast decay time setting (MSB: fd3):

%0000 … %1111:

Fast decay time setting TFD with

N_CLK= 32*TFD (%0000: slow decay only)

3

2

1

0

toff3

toff2

toff1

toff0

TOFF off time

and driver enable

Off time setting controls duration of slow decay phase

N_CLK= 12 + 32*TOFF

%0000: Driver disable, all bridges off

%0001: 1 – use only with TBL ≥ 2

%0010 … %1111: 2 … 15

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TMC5160 DATASHEET (Rev. 1.08 / 2018-NOV-19)

52

6.5.3 COOLCONF – Smart Energy Control coolStep and stallGuard2

0X6D: COOLCONF – SMART ENERGY CONTROL COOLSTEP AND STALLGUARD2

Bit Name

Function

Comment

…

-

reserved

set to 0

24 sfilt

stallGuard2 filter

enable

0

Standard mode, high time resolution for

stallGuard2

1

Filtered mode, stallGuard2 signal updated for each

four fullsteps (resp. six fullsteps for 3 phase motor)

only to compensate for motor pole tolerances

23

-

reserved

set to 0

22 sgt6

21 sgt5

20 sgt4

19 sgt3

18 sgt2

17 sgt1

16 sgt0

15 seimin

stallGuard2 threshold

value

This signed value controls stallGuard2 level for stall

output and sets the optimum measurement range for

readout. A lower value gives a higher sensitivity. Zero is

the starting value working with most motors.

-64 to +63: A higher value makes stallGuard2 less

sensitive and requires more torque to

indicate a stall.

minimum current for

smart current control

current down step

speed

0: 1/2 of current setting (IRUN)

1: 1/4 of current setting (IRUN)

14 sedn1

13 sedn0

%00: For each 32 stallGuard2 values decrease by one

%01: For each 8 stallGuard2 values decrease by one

%10: For each 2 stallGuard2 values decrease by one

%11: For each stallGuard2 value decrease by one

set to 0

12

-

reserved

11 semax3

10 semax2

stallGuard2 hysteresis

value for smart current (SEMIN+SEMAX+1)*32, the motor current becomes

control

If the stallGuard2 result is equal to or above

decreased to save energy.

%0000 … %1111: 0 … 15

set to 0

Current increment steps per measured stallGuard2 value

%00 … %11: 1, 2, 4, 8

set to 0

9

8

7

6

5

4

3

2

1

0

semax1

semax0

-

seup1

seup0

-

semin3

semin2

semin1

semin0

reserved

current up step width

reserved

minimum stallGuard2

value for smart current current becomes increased to reduce motor load angle.

control and

If the stallGuard2 result falls below SEMIN*32, the motor

%0000: smart current control coolStep off

%0001 … %1111: 1 … 15

smart current enable

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TMC5160 DATASHEET (Rev. 1.08 / 2018-NOV-19)

53

6.5.4 PWMCONF – Voltage PWM Mode stealthChop

0X70: PWMCONF – VOLTAGE MODE PWM STEALTHCHOP

Bit Name

Function

Comment

31 PWM_LIM

PWM automatic scale

amplitude limit when

switching on

Limit for PWM_SCALE_AUTO when switching back from

spreadCycle to stealthChop. This value defines the upper

limit for bits 7 to 4 of the automatic current control

when switching back. It can be set to reduce the current

jerk during mode change back to stealthChop.

It does not limit PWM_GRAD or PWM_GRAD_AUTO offset.

(Default = 12)

30

29

28

27 PWM_REG Regulation loop

User defined maximum PWM amplitude change per half

wave when using pwm_autoscale=1. (1…15):

1: 0.5 increments (slowest regulation)

2: 1 increment

gradient

26

25

24

3: 1.5 increments

4: 2 increments (Reset default))

…

8: 4 increments

...

15: 7.5 increments (fastest regulation)

23

22

21

20

-

reserved

Allows different

set to 0

freewheel1

freewheel0 standstill modes

Stand still option when motor current setting is zero

(I_HOLD=0).

%00: Normal operation

%01: Freewheeling

%10: Coil shorted using LS drivers

%11: Coil shorted using HS drivers

19 pwm_

autograd

PWM automatic

gradient adaptation

0

Fixed value for PWM_GRAD

(PWM_GRAD_AUTO = PWM_GRAD)

1

Automatic tuning (only with pwm_autoscale=1)

(Reset default)

PWM_GRAD_AUTO is initialized with PWM_GRAD

while pwm_autograd=0 and becomes optimized

automatically during motion.

Preconditions

1. PWM_OFS_AUTO has been automatically

initialized. This requires standstill at IRUN for

>130ms in order to a) detect standstill b) wait >

128 chopper cycles at IRUN and c) regulate

PWM_OFS_AUTO so that

-1 < PWM_SCALE_AUTO < 1

2. Motor running and 1.5 * PWM_OFS_AUTO <

PWM_SCALE_SUM < 4* PWM_OFS_AUTO and

PWM_SCALE_SUM < 255.

Time required for tuning PWM_GRAD_AUTO

About 8 fullsteps per change of +/-1.

Also enables use of reduced chopper frequency for

tuning PWM_OFS_AUTO.

18 pwm_

autoscale

PWM automatic

amplitude scaling

0

1

User defined feed forward PWM amplitude. The

current settings IRUN and IHOLD have no influence!

The resulting PWM amplitude (limited to 0…255) is:

PWM_OFS * ((CS_ACTUAL+1) / 32)

+ PWM_GRAD * 256 / TSTEP

Enable automatic current control (Reset default)

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TMC5160 DATASHEET (Rev. 1.08 / 2018-NOV-19)

54

0X70: PWMCONF – VOLTAGE MODE PWM STEALTHCHOP

Bit Name

Function

Comment

pwm_freq1

pwm_freq0

17

16

PWM frequency

selection

%00: f_PWM=2/1024 f_CLK(Reset default)

%01: f_PWM=2/683 f_CLK

%10: f_PWM=2/512 f_CLK

%11: f_PWM=2/410 f_CLK

15 PWM_

User defined amplitude Velocity dependent gradient for PWM amplitude:

gradient PWM_GRAD * 256 / TSTEP

GRAD

14

13

12

11

10

9

This value is added to PWM_AMPL to compensate for

the velocity-dependent motor back-EMF.

Use PWM_GRAD as initial value for automatic scaling to

speed up the automatic tuning process. To do this, set

PWM_GRAD to the determined, application specific value,

8

with

pwm_autoscale=0.

Only

afterwards,

set

pwm_autoscale=1. Enable stealthChop when finished.

Hint:

After initial tuning, the required initial value can be read

out from PWM_GRAD_AUTO.

7

6

5

4

3

2

1

0

PWM_

OFS

User defined amplitude User defined PWM amplitude offset (0-255) related to full

(offset)

motor current (CS_ACTUAL=31) in stand still.

(Reset default=30)

Use PWM_OFS as initial value for automatic scaling to

speed up the automatic tuning process. To do this, set

PWM_OFS to the determined, application specific value,

with

pwm_autoscale=0.

Only

afterwards,

set

pwm_autoscale=1. Enable stealthChop when finished.

PWM_OFS = 0 will disable scaling down motor current

below a motor specific lower measurement threshold.

This setting should only be used under certain

conditions, i.e. when the power supply voltage can vary

up and down by a factor of two or more. It prevents

the motor going out of regulation, but it also prevents

power down below the regulation limit.

PWM_OFS > 0 allows automatic scaling to low PWM duty

cycles even below the lower regulation threshold. This

allows low (standstill) current settings based on the

actual (hold) current scale (register IHOLD_IRUN).

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TMC5160 DATASHEET (Rev. 1.08 / 2018-NOV-19)

55

6.5.5 DRV_STATUS – stallGuard2 Value and Driver Error Flags

0X6F: DRV_STATUS – STALLGUARD2 VALUE AND DRIVER ERROR FLAGS

Bit Name

31 stst

Function

standstill indicator

Comment

This flag indicates motor stand still in each operation mode.

This occurs 2^20 clocks after the last step pulse.

1: Open load detected on phase A or B.

30 olb

open load indicator

phase B

open load indicator

phase A

Hint: This is just an informative flag. The driver takes no action

upon it. False detection may occur in fast motion and

standstill. Check during slow motion, only.

29 ola

1: Short to GND detected on phase A or B. The driver becomes

disabled. The flags stay active, until the driver is disabled by

software (TOFF=0) or by the ENN input.

28 s2gb

27 s2ga

26 otpw

short to ground

indicator phase B

short to ground

indicator phase A

overtemperature pre-

warning flag

1: Overtemperature pre-warning threshold is exceeded.

The overtemperature pre-warning flag is common for both

bridges.

1: Overtemperature limit has been reached. Drivers become

disabled until otpw is also cleared due to cooling down of the

25 ot

overtemperature flag

IC.

The overtemperature flag is common for both bridges.

1: Motor stall detected (SG_RESULT=0) or dcStep stall in dcStep

mode.

24 stallGuard stallGuard2 status

Ignore these bits

23

22

21

-

reserved

Actual current control scaling, for monitoring smart energy

current scaling controlled via settings in register COOLCONF, or

for monitoring the function of the automatic current scaling.

20 CS

actual motor current /

smart energy current

ACTUAL

19

18

17

16

1: Indicates that the driver has switched to fullstep as defined

by chopper mode settings and velocity thresholds.

15 fsactive

full step active

indicator

1: Driver operates in stealthChop mode

14 stealth

13 s2vsb

stealthChop indicator

short to supply

indicator phase B

short to supply

indicator phase A

reserved

1: Short to supply detected on phase A or B. The driver

becomes disabled. The flags stay active, until the driver is

disabled by software (TOFF=0) or by the ENN input. Sense

resistor voltage drop is included in the measurement!

12 s2vsa

Ignore this bit

Mechanical load measurement:

The stallGuard2 result gives a means to measure mechanical

motor load. A higher value means lower mechanical load. A

value of 0 signals highest load. With optimum SGT setting,

this is an indicator for a motor stall. The stall detection

compares SG_RESULT to 0 in order to detect a stall. SG_RESULT

is used as a base for coolStep operation, by comparing it to a

programmable upper and a lower limit. It is not applicable in

stealthChop mode.

11

10

9

-

reserved

SG_

RESULT

stallGuard2 result

respectively PWM on

time for coil A in stand

still for motor

8

7

6

5

4

3

2

temperature detection

1

stallGuard2 works best with microstep operation or dcStep.

0

Temperature measurement:

In standstill, no stallGuard2 result can be obtained. SG_RESULT

shows the chopper on-time for motor coil A instead. Move the

motor to a determined microstep position at a certain current

setting to get a rough estimation of motor temperature by a

reading the chopper on-time. As the motor heats up, its coil

resistance rises and the chopper on-time increases.

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TMC5160 DATASHEET (Rev. 1.08 / 2018-NOV-19)

56

7 stealthChop™

stealthChop is an extremely quiet mode of operation for stepper motors. It is based on a

voltage mode PWM. In case of standstill and at low velocities, the motor is absolutely

noiseless. Thus, stealthChop operated stepper motor applications are very suitable for

indoor or home use. The motor operates absolutely free of vibration at low velocities.

With stealthChop, the motor current is applied by driving a certain effective voltage into the coil,

using a voltage mode PWM. With the enhanced stealthChop2, the driver automatically adapts to the

application for best performance. No more configurations are required. Optional configuration allows

for tuning the setting in special cases, or for storing initial values for the automatic adaptation

algorithm. For high velocity drives spreadCycle should be considered in combination with stealthChop.

Figure 7.1 Motor coil sine wave current with stealthChop (measured with current probe)

7.1 Automatic Tuning

stealthChop2 integrates an automatic tuning procedure (AT), which adapts the most important

operating parameters to the motor automatically. This way, stealthChop2 allows high motor dynamics

and supports powering down the motor to very low currents. Just two steps have to be respected by

the motion controller for best results: Start with the motor in standstill, but powered with nominal

run current (AT#1). Move the motor at a medium velocity, e.g. as part of a homing procedure (AT#2).

Figure 7.2 shows the tuning procedure.

Border conditions for AT#1 and AT#2 are shown in the following table:

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TMC5160 DATASHEET (Rev. 1.08 / 2018-NOV-19)

57

AUTOMATIC TUNING TIMING AND BORDER CONDITIONS

Step Parameter

AT#1 PWM_

OFS_AUTO

Conditions

Required Duration

≤ 2^20+2*2^18 t_CLK,

≤ 130ms

- Motor in standstill and actual current scale (CS) is

identical to run current (IRUN).

- If standstill reduction is enabled, an initial step

pulse switches the drive back to run current, or set

IHOLD to IRUN.

(with internal clock)

- Pin VS at operating level.

Attention: Driver may reduce chopper frequency during

AT#1. Use reduced standstill current IHOLD<IRUN to

prevent extended periods of time at lower chopper

frequency

- Move motor at a velocity, where a significant 8 fullsteps are required

AT#2 PWM_

amount of back EMF is generated and where the full for a change of +/-1.

GRAD_AUTO

run current can be reached. Conditions:

For a typical motor with

- 1.5 * PWM_OFS_AUTO

4 * PWM_OFS_AUTO

<

PWM_SCALE_SUM

<

PWM_GRAD_AUTO

optimum at 50 or less, up

to 400 fullsteps are

required when starting

from default value 0.

-

PWM_SCALE_SUM < 255.

Hint: A typical range is 60-300 RPM.

Hint:

Determine best conditions for automatic tuning with the evaluation board.

Use application specific parameters for PWM_GRAD and PWM_OFS for initialization in firmware to provide

initial tuning parameters.

Monitor PWM_SCALE_AUTO going down to zero during the constant velocity phase in AT#2 tuning. This

indicates a successful tuning.

Attention:

Operating in stealthChop without proper tuning can lead to high motor currents during a deceleration

ramp, especially with low resistive motors and fast deceleration settings. Follow the automatic tuning

process and check optimum tuning conditions using the evaluation board. It is recommended to use

an initial value for settings PWM_OFS and PWM_GRAD determined per motor type.

Protect the power stage and supply by additionally tuning the overcurrent protection.

Known Limitations:

Successful completion of AT#1 tuning phase is not safely detected by the TMC5160. It will require

multiple motor start / stop events to safely detect completion.

Successful determination is mandatory for AT#2: Tuning of PWM_GRAD will not start when AT#1 has

not completed.

Successful completion of AT#1 and AT#2 only can be checked by monitoring PWM_SCALE_AUTO

approaching 0 during AT#2 motion.

Solution a):

Complete automatic tuning phase AT#1 process, by using a slow-motion sequence which leads to

standstill detection in between of each two steps. Use a velocity of 8 (6 Hz) or lower and execute

minimum 10 steps during AT#1 phase.

Solution b):

Store initial parameters for PWM_GRAD_AUTO for the application. Therefore, use the motor and

operating conditions determined for the application and do a complete automatic tuning sequence

(refer to a)). Store the resulting PWM_GRAD_AUTO value and use it for initialization of PWM_GRAD.

With this, tuning of AT#2 phase is not mandatory in the application and can be skipped. Automatic

tuning will further optimize settings during operation. Combine with a) if desired.

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Power Up

PWM_GRAD_AUTO becomes

initialized upon power up

Driver Enabled?

Y

N

Driver Enabled?

Y

N

Y

Issue (at least) a single step

pulse and stop again, to

power motor to run current

Standstill re-

duction enabled?

stealthChop2 regulates to nominal

current and stores result to

PWM_OFS_AUTO

AT#1

(Requires stand still for >130ms)

Stand still

PWM_

GRAD_AUTO

initialized from

CPU?

Y

N

Move the motor, e.g. for homing.

Include a constant, medium velocity

ramp segment.

AT#2

Homing

stealthChop2 regulates to nominal

current and optimizes PWM_GRAD_AUTO

(requires 8 fullsteps per change of 1,

typically a few 100 fullsteps in sum)

Store PWM_GRAD_AUTO to

CPU memory for faster

tuning procedure

stealthChop2 settings are optimized!

Option with interface

Ready

stealthChop2 keeps tuning during

subsequent motion and stand still periods

adapting to motor heating, supply

variations, etc.

Figure 7.2 stealthChop2 automatic tuning procedure

Attention

Modifying GLOBALSCALER or VS voltage invalidates the result of the automatic tuning process. Motor

current regulation cannot compensate significant changes until next AT#1 phase. Automatic tuning

adapts to changed conditions whenever AT#1 and AT#2 conditions are fulfilled in the later operation.

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7.2 stealthChop Options

In order to match the motor current to a certain level, the effective PWM voltage becomes scaled

depending on the actual motor velocity. Several additional factors influence the required voltage level

to drive the motor at the target current: The motor resistance, its back EMF (i.e. directly proportional

to its velocity) as well as the actual level of the supply voltage. Two modes of PWM regulation are

provided: The automatic tuning mode (AT) using current feedback (pwm_autoscale = 1, pwm_autograd

= 1) and a feed forward velocity controlled mode (pwm_autoscale = 0). The feed forward velocity

controlled mode will not react to a change of the supply voltage or to events like a motor stall, but it

provides very stable amplitude. It does not use nor require any means of current measurement. This

is perfect when motor type and supply voltage are well known. Therefore we recommend the

automatic mode, unless current regulation is not satisfying in the given operating conditions.

It is recommended to use application specific initial tuning parameters, fitting the motor type and

supply voltage. Additionally, operate in automatic tuning mode in order to respond to parameter

change, e.g. due to motor heat-up or change of supply voltage.

Non-automatic mode (pwm_autoscale=0) should be taken into account only with well-known motor

and operating conditions. In this case, careful programming via the interface is required. The

operating parameters PWM_GRAD and PWM_OFS can be determined in automatic tuning mode

initially.

The stealthChop PWM frequency can be chosen in four steps in order to adapt the frequency divider

to the frequency of the clock source. A setting in the range of 20-50kHz is good for most applications.

It balances low current ripple and good higher velocity performance vs. dynamic power dissipation.

CHOICE OF PWM FREQUENCY FOR STEALTHCHOP

Clock frequency

f_CLK

18MHz

PWM_FREQ=%00

f_PWM=2/1024 f_CLK

35.2kHz

PWM_FREQ=%01

f_PWM=2/683 f_CLK

52.7kHz

PWM_FREQ=%10

f_PWM=2/512 f_CLK

70.3kHz

PWM_FREQ=%11

f_PWM=2/410 f_CLK

87.8kHz

16MHz

31.3kHz

46.9kHz

62.5kHz

78.0kHz

12MHz (internal)

10MHz

23.4kHz

19.5kHz

35.1kHz

29.3kHz

46.9kHz

39.1kHz

58.5kHz

48.8kHz

8MHz

15.6kHz

23.4kHz

31.2kHz

39.0kHz

Table 7.1 Choice of PWM frequency – green / light green: recommended

7.3 stealthChop Current Regulator

In stealthChop voltage PWM mode, the autoscaling function (pwm_autoscale = 1, pwm_auto_grad = 1)

regulates the motor current to the desired current setting. Automatic scaling is used as part of the

automatic tuning process (AT), and for subsequent tracking of changes within the motor parameters.

The driver measures the motor current during the chopper on time and uses a proportional regulator

to regulate PWM_SCALE_AUTO in order match the motor current to the target current. PWM_REG is the

proportionality coefficient for this regulator. Basically, the proportionality coefficient should be as

small as possible in order to get a stable and soft regulation behavior, but it must be large enough to

allow the driver to quickly react to changes caused by variation of the motor target current (e.g.

change of VREF). During initial tuning step AT#2, PWM_REG also compensates for the change of motor

velocity. Therefore, a high acceleration during AT#2 will require a higher setting of PWM_REG. With

careful selection of homing velocity and acceleration, a minimum setting of the regulation gradient

often is sufficient (PWM_REG=1). PWM_REG setting should be optimized for the fastest required

acceleration and deceleration ramp (compare Figure 7.3 and Figure 7.4). The quality of the setting

PWM_REG in phase AT#2 and the finished automatic tuning procedure (or non-automatic settings for

PWM_OFS and PWM_GRAD) can be examined when monitoring motor current during an acceleration

phase Figure 7.5.

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60

Figure 7.3 Scope shot: good setting for PWM_REG

Figure 7.4 Scope shot: too small setting for PWM_REG during AT#2

Motor Current

PWM scale

Motor Velocity

PWM reaches max. amplitude

255

P

)

k

W

k

o

RMS current constant

o

M

2

)

_

#

(IRUN)

O

G

T

Nominal Current

(sine wave RMS)

T

R

A

U

E

A

g

A

D

_

n

(

i

(

r

_

D

u

A

d

U

R

Current may drop due

to high velocity

T

G

O

_

)

R

M

IHOLD

_

o

W

M

W

k

P

Stand still

PWM scale

PWM_OFS_(AUTO)⁽^Pok

PWM_OFS_(AUTO) ok

0

Time

Figure 7.5 Successfully determined PWM_GRAD(_AUTO) and PWM_OFS(_AUTO)

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61

Quick Start

For a quick start, see the Quick Configuration Guide in chapter 22.

7.3.1 Lower Current Limit

The stealthChop current regulator imposes a lower limit for motor current regulation. As the coil

current can be measured in the shunt resistor during chopper on phase only, a minimum chopper

duty cycle allowing coil current regulation is given by the blank time as set by TBL and by the

chopper frequency setting. Therefore, the motor specific minimum coil current in stealthChop

autoscaling mode rises with the supply voltage and with the chopper frequency. A lower blanking

time allows a lower current limit. It is important for the correct determination of PWM_OFS_AUTO,

that in AT#1 the run current set by the sense resistor, GLOBALSCALER and IRUN is well within the

regulation range. Lower currents (e.g. for standstill power down) are automatically realized based on

PWM_OFS_AUTO and PWM_GRAD_AUTO respectively based on PWM_OFS and PWM_GRAD with non-

automatic current scaling. The freewheeling option allows going to zero motor current.

Lower motor coil current limit for stealthChop2 automatic tuning:

푉_푀

퐼_{퐿ꢆ푤푒ꢇ 퐿ꢈ푚ꢈ푡}= ꢉ_{퐵퐿퐴푁퐾}∗ 푓

∗

ꢊ푊푀

푅_ꢋ푂ꢌ퐿

With V_Mthe motor supply voltage and R_COILthe motor coil resistance.

I_{Lower Limit}can be treated as a thumb value for the minimum nominal IRUN motor current setting. In

case the lower current limit is not sufficient to reach the desired setting, the driver will retry with a

lower chopper frequency in step AT#1, only.

f_PWMis the chopper frequency as determined by setting PWM_FREQ. In AT#1, the driver tries a lower,

(roughly half frequency), in case it cannot reach the current. The frequency will remain active in

standstill, while currentscale CS=IRUN. With automatic standstill reduction, this is a short moment.

EXAMPLE:

A motor has a coil resistance of 5Ω, the supply voltage is 24V. With TBL=%01 and PWM_FREQ=%00,

t_BLANKis 24 clock cycles, f_PWMis 2/(1024 clock cycles):

ꢀ

ꢀ4푉

ꢀ4 ꢀ4푉

∗ = ꢀꢀ5ꢍꢎ

퐼_{퐿ꢆ푤푒ꢇ 퐿ꢈ푚ꢈ푡}= ꢀ4 ꢉ_ꢋ퐿퐾

∗

=

ꢃꢄꢀ4 ꢉ_ꢋ퐿퐾5Ω

5ꢃꢀ 5Ω

This means, the motor target current for automatic tuning must be 225mA or more, taking into

account all relevant settings. This lower current limit also applies for modification of the motor

current via the GLOBALSCALER.

Attention

For automatic tuning, a lower coil current limit applies. The motor current in automatic tuning phase

AT#1 must exceed this lower limit. I_{LOWER LIMIT}can be calculated or measured using a current probe.

Setting the motor run-current or hold-current below the lower current limit during operation by

modifying IRUN and IHOLD is possible after successful automatic tuning.

The lower current limit also limits the capability of the driver to respond to changes of

GLOBALSCALER.

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62

7.4 Velocity Based Scaling

Velocity based scaling scales the stealthChop amplitude based on the time between each two steps,

i.e. based on TSTEP, measured in clock cycles. This concept basically does not require a current

measurement, because no regulation loop is necessary. A pure velocity-based scaling is available via

programming, only, when setting pwm_autoscale = 0. The basic idea is to have a linear approximation

of the voltage required to drive the target current into the motor. The stepper motor has a certain coil

resistance and thus needs a certain voltage amplitude to yield a target current based on the basic

formula I=U/R. With R being the coil resistance, U the supply voltage scaled by the PWM value, the

current I results. The initial value for PWM_OFS can be calculated:

374 ∗ 푅_ꢋ푂ꢌ퐿∗ 퐼_ꢋ푂ꢌ퐿

푃ꢏꢐ_ꢑ퐹푆 =

푉_푀

With V_Mthe motor supply voltage and I_COILthe target RMS current

The effective PWM voltage U_PWM(1/SQRT(2) x peak value) results considering the 8 bit resolution and

248 sine wave peak for the actual PWM amplitude shown as PWM_SCALE:

푃ꢏꢐ_푆퐶ꢎꢒ퐸 ꢀ4ꢁ

ꢃ

푃ꢏꢐ_푆퐶ꢎꢒ퐸

374

푈_ꢊ푊푀= 푉_푀∗

∗

= 푉_푀∗

ꢀ56

√

ꢀ

With rising motor velocity, the motor generates an increasing back EMF voltage. The back EMF voltage

is proportional to the motor velocity. It reduces the PWM voltage effective at the coil resistance and

thus current decreases. The TMC5160 provides a second velocity dependent factor (PWM_GRAD) to

compensate for this. The overall effective PWM amplitude (PWM_SCALE_SUM) in this mode

automatically is calculated in dependence of the microstep frequency as:

푓

ꢓ푇ꢔꢊ

푃ꢏꢐ_푆퐶ꢎꢒ퐸_푆푈ꢐ = 푃ꢏꢐ_ꢑ퐹푆 + 푃ꢏꢐ_퐺푅ꢎ퐷 ∗ ꢀ56 ∗

푓

ꢋ퐿퐾

With f_STEPbeing the microstep frequency for 256 microstep resolution equivalent

and f_CLKthe clock frequency supplied to the driver or the actual internal frequency

As a first approximation, the back EMF subtracts from the supply voltage and thus the effective current

amplitude decreases. This way, a first approximation for PWM_GRAD setting can be calculated:

푉

푓

∗ ꢃ.46

ꢋ퐿퐾

푃ꢏꢐ_퐺푅ꢎ퐷 = 퐶_퐵ꢔ푀ꢕ

[

] ∗ ꢀ휋 ∗

푟푎푑

푠

푉_푀∗ ꢐ푆푃푅

C_BEMFis the back EMF constant of the motor in Volts per radian/second.

MSPR is the number of microsteps per rotation, e.g. 51200 = 256µsteps multiplied by 200 fullsteps for

a 1.8° motor.

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TMC5160 DATASHEET (Rev. 1.08 / 2018-NOV-19)

Motor current

63

PWM scaling

(PWM_SCALE_SUM)

PWM reaches

max. amplitude

255

D

A

R

G

Constant motor

RMS current

_

M

W

P

Nominal current

(e.g. sine wave RMS)

PWM_OFS

0

V_PWMMAX

Velocity

Figure 7.6 Velocity based PWM scaling (pwm_autoscale=0)

Hint

The values for PWM_OFS and PWM_GRAD can easily be optimized by tracing the motor current with a

current probe on the oscilloscope. Alternatively, automatic tuning determines these values and they

can be read out from PWM_OFS_AUTO and PWM_GRAD_AUTO.

UNDERSTANDING THE BACK EMF CONSTANT OF A MOTOR

The back EMF constant is the voltage a motor generates when turned with a certain velocity. Often

motor datasheets do not specify this value, as it can be deducted from motor torque and coil current

rating. Within SI units, the numeric value of the back EMF constant C_BEMFhas the same numeric value

as the numeric value of the torque constant. For example, a motor with a torque constant of 1 Nm/A

would have a C_BEMFof 1V/rad/s. Turning such a motor with 1 rps (1 rps = 1 revolution per second =

6.28 rad/s) generates a back EMF voltage of 6.28V. Thus, the back EMF constant can be calculated as:

ꢚ

ꢜ

푉

퐻표푙푑푖푛푔ꢘ표푟푞푢ꢙ ꢛꢍ

퐶_퐵ꢔ푀ꢕ

ꢖ

ꢗ =

푟푎푑/푠

ꢀ ∗ 퐼_{ꢋ푂ꢌ퐿푁푂푀}ꢚꢎꢜ

I_COILNOMis the motor’s rated phase current for the specified holding torque

HoldingTorque is the motor specific holding torque, i.e. the torque reached at I_COILNOMon both coils.

The torque unit is [Nm] where 1Nm = 100Ncm = 1000mNm.

The voltage is valid as RMS voltage per coil, thus the nominal current is multiplied by 2 in this

formula, since the nominal current assumes a full step position, with two coils operating.

7.5 Combining stealthChop and spreadCycle

For applications requiring high velocity motion, spreadCycle may bring more stable operation in the

upper velocity range. To combine no-noise operation with highest dynamic performance, the TMC5160

allows combining stealthChop and spreadCycle based on a velocity threshold (Figure 7.7). With this,

stealthChop is only active at low velocities.

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64

Chopper mode

stealthChop

spreadCycle

option

v

TSTEP < TPWMTHRS*16/16

TSTEP > TPWMTHRS

0

t

current

I_RUN

I_HOLD

VACTUAL

~1/TSTEP

RMS current

TRINAMIC, B. Dwersteg, 14.3.14

Figure 7.7 TPWMTHRS for optional switching to spreadCycle

As a first step, both chopper principles should be parameterized and optimized individually. In a next

step, a transfer velocity has to be fixed. For example, stealthChop operation is used for precise low

speed positioning, while spreadCycle shall be used for highly dynamic motion. TPWMTHRS determines

the transition velocity. Read out TSTEP when moving at the desired velocity and program the

resulting value to TPWMTHRS. Use a low transfer velocity to avoid a jerk at the switching point.

A jerk occurs when switching at higher velocities, because the back-EMF of the motor (which rises

with the velocity) causes a phase shift of up to 90° between motor voltage and motor current. So

when switching at higher velocities between voltage PWM and current PWM mode, this jerk will occur

with increased intensity. A high jerk may even produce a temporary overcurrent condition (depending

on the motor coil resistance). At low velocities (e.g. 1 to a few 10 RPM), it can be completely

neglected for most motors. Therefore, consider the switching jerk when choosing TPWMTHRS. Set

TPWMTHRS zero if you want to work with stealthChop only.

When enabling the stealthChop mode the first time using automatic current regulation, the motor

must be at stand still in order to allow a proper current regulation. When the drive switches to

stealthChop at a higher velocity, stealthChop logic stores the last current regulation setting until the

motor returns to a lower velocity again. This way, the regulation has a known starting point when

returning to a lower velocity, where stealthChop becomes re-enabled. Therefore, neither the velocity

threshold nor the supply voltage must be considerably changed during the phase while the chopper

is switched to a different mode, because otherwise the motor might lose steps or the instantaneous

current might be too high or too low.

A motor stall or a sudden change in the motor velocity may lead to the driver detecting a short

circuit or to a state of automatic current regulation, from which it cannot recover. Clear the error flags

and restart the motor from zero velocity to recover from this situation.

Hint

Start the motor from standstill when switching on stealthChop the first time and keep it stopped for

at least 128 chopper periods to allow stealthChop to do initial standstill current control.

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7.6 Flags in stealthChop

As stealthChop uses voltage mode driving, status flags based on current measurement respond

slower, respectively the driver reacts delayed to sudden changes of back EMF, like on a motor stall.

Attention

A motor stall, or abrupt stop of the motion during operation in stealthChop can lead to a overcurrent

condition. Depending on the previous motor velocity, and on the coil resistance of the motor, it

significantly increases motor current for a time of several 10ms. With low velocities, where the back

EMF is just a fraction of the supply voltage, there is no danger of triggering the short detection.

Hint

Tune low side driver overcurrent detection to safely trigger upon motor stall, when using stealthChop.

This will avoid high peak current draw from the power supply.

7.6.1 Open Load Flags

In stealthChop mode, status information is different from the cycle-by-cycle regulated spreadCycle

mode. OLA and OLB show if the current regulation sees that the nominal current can be reached on

both coils.

-

A flickering OLA or OLB can result from asymmetries in the sense resistors or in the motor

coils.

-

An interrupted motor coil leads to a continuously active open load flag for the coil.

One or both flags are active, if the current regulation did not succeed in scaling up to the full

target current within the last few fullsteps (because no motor is attached or a high velocity

exceeds the PWM limit).

If desired, do an on-demand open load test using the spreadCycle chopper, as it delivers the safest

result. With stealthChop, PWM_SCALE_SUM can be checked to detect the correct coil resistance.

7.6.2 PWM_SCALE_SUM Informs about the Motor State

Information about the motor state is available with automatic scaling by reading out

PWM_SCALE_SUM. As this parameter reflects the actual voltage required to drive the target current into

the motor, it depends on several factors: motor load, coil resistance, supply voltage, and current

setting. Therefore, an evaluation of the PWM_SCALE_SUM value allows checking the motor operation

point. When reaching the limit (255), the current regulator cannot sustain the full motor current, e.g.

due to a drop in supply volage.

7.7 Freewheeling and Passive Braking

stealthChop provides different options for motor standstill. These options can be enabled by setting

the standstill current IHOLD to zero and choosing the desired option using the FREEWHEEL setting.

The desired option becomes enabled after a time period specified by TPOWERDOWN and IHOLDDELAY.

Current regulation becomes frozen once the motor target current is at zero current in order to ensure

a quick startup. With the freewheeling options, both freewheeling and passive braking can be

realized. Passive braking is an effective eddy current motor braking, which consumes a minimum of

energy, because no active current is driven into the coils. However, passive braking will allow slow

turning of the motor when a continuous torque is applied.

Hint

Operate the motor within your application when exploring stealthChop. Motor performance often is

better with a mechanical load, because it prevents the motor from stalling due mechanical oscillations

which can occur without load.

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66

PARAMETERS RELATED TO STEALTHCHOP

Parameter

en_spread_ General disable for use of stealthChop (register 1

cycle GCONF).

TPWMTHRS Specifies the upper velocity for operation in 0 …

Description

Setting Comment

Do not use stealthChop

stealthChop enabled

0

stealthChop is disabled if

stealthChop. Entry the TSTEP reading (time 1048575 TSTEP falls TPWMTHRS

between two microsteps) when operating at the

desired threshold velocity.

PWM_LIM

Limiting value for limiting the current jerk when 0 … 15

switching from spreadCycle to stealthChop. Reduce

the value to yield a lower current jerk.

Upper four bits of 8 bit

amplitude limit

(Default=12)

pwm_

autoscale

Enable automatic current scaling using current 0

Forward controlled mode

Automatic scaling with

current regulator

disable, use PWM_GRAD

from register instead

enable

measurement. If off, use forward controlled

1

0

1

velocity-based mode.

pwm_

autograd

Enable automatic tuning of PWM_GRAD_AUTO

PWM_FREQ PWM frequency selection. Use the lowest setting 0

f_PWM=2/1024 f_CLK

f_PWM=2/683 f_CLK

f_PWM=2/512 f_CLK

f_PWM=2/410 f_CLK

giving good results. The frequency measured at

1

2

3

each of the chopper outputs is half of the

effective chopper frequency f_PWM

.

PWM_REG

PWM_OFS

User defined PWM amplitude regulation loop P- 1 … 15

coefficient. A higher value leads to a higher

adaptation speed when pwm_autoscale=1.

Results in 0.5 to 7.5 steps

for PWM_SCALE_AUTO

regulator per fullstep

User defined PWM amplitude (offset) for velocity 0 … 255 PWM_OFS=0 disables

based scaling and initialization value for automatic

tuning of PWM_OFFS_AUTO.

linear current scaling

based on current setting

PWM_GRAD User defined PWM amplitude (gradient) for 0 … 255

velocity based scaling and initialization value for

automatic tuning of PWM_GRAD_AUTO.

FREEWHEEL Stand still option when motor current setting is 0

Normal operation

zero (I_HOLD=0). Only available with stealthChop

enabled. The freewheeling option makes the

motor easy movable, while both coil short options

realize a passive brake.

1

2

3

Freewheeling

Coil short via LS drivers

Coil short cia HS drivers

PWM_SCALE Read back of the actual stealthChop voltage PWM -255 …

(read only) Scaling value

becomes frozen when

operating in spreadCycle

_AUTO

scaling correction as determined by the current 255

regulator. Shall regulate close to 0 during tuning.

PWM_GRAD Allow monitoring of the automatic tuning and 0 … 255 (read only)

_AUTO

PWM_OFS

_AUTO

TOFF

determination of initial values for PWM_OFS and

PWM_GRAD.

General enable for the motor driver, the actual 0

value does not influence stealthChop

Comparator blank time. This time needs to safely 0

Driver off

Driver enabled

16 t_CLK

1 … 15

TBL

cover the switching event and the duration of the

ringing on the sense resistor. Choose a setting of

1 or 2 for typical applications. For higher

capacitive loads, 3 may be required. Lower

settings allow stealthChop to regulate down to

lower coil current values.

1

2

3

24 t_CLK

36 t_CLK

54 t_CLK

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67

8 spreadCycle and Classic Chopper

While stealthChop is a voltage mode PWM controlled chopper, spreadCycle is a cycle-by-cycle current

control. Therefore, it can react extremely fast to changes in motor velocity or motor load. The currents

through both motor coils are controlled using choppers. The choppers work independently of each

other. In Figure 8.1 the different chopper phases are shown.

+V_M

I_COIL

R_SENSE

On Phase:

Fast Decay Phase:

current flows in

opposite direction

of target current

Slow Decay Phase:

current re-circulation

current flows in

direction of target

current

Figure 8.1 Chopper phases

Although the current could be regulated using only on phases and fast decay phases, insertion of the

slow decay phase is important to reduce electrical losses and current ripple in the motor. The

duration of the slow decay phase is specified in a control parameter and sets an upper limit on the

chopper frequency. The current comparator can measure coil current during phases when the current

flows through the sense resistor, but not during the slow decay phase, so the slow decay phase is

terminated by a timer. The on phase is terminated by the comparator when the current through the

coil reaches the target current. The fast decay phase may be terminated by either the comparator or

another timer.

When the coil current is switched, spikes at the sense resistors occur due to charging and discharging

parasitic capacitances. During this time, typically one or two microseconds, the current cannot be

measured. Blanking is the time when the input to the comparator is masked to block these spikes.

There are two cycle-by-cycle chopper modes available: a new high-performance chopper algorithm

called spreadCycle and a proven constant off-time chopper mode. The constant off-time mode cycles

through three phases: on, fast decay, and slow decay. The spreadCycle mode cycles through four

phases: on, slow decay, fast decay, and a second slow decay.

The chopper frequency is an important parameter for a chopped motor driver. A too low frequency

might generate audible noise. A higher frequency reduces current ripple in the motor, but with a too

high frequency magnetic losses may rise. Also power dissipation in the driver rises with increasing

frequency due to the increased influence of switching slopes causing dynamic dissipation. Therefore, a

compromise needs to be found. Most motors are optimally working in a frequency range of 16 kHz to

30 kHz. The chopper frequency is influenced by a number of parameter settings as well as by the

motor inductivity and supply voltage.

Hint

A chopper frequency in the range of 16 kHz to 30 kHz gives a good result for most motors when

using spreadCycle. A higher frequency leads to increased switching losses.

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Three parameters are used for controlling both chopper modes:

Parameter

Description

Setting Comment

Sets the slow decay time (off time). This setting also

limits the maximum chopper frequency.

TOFF

0

chopper off

off time setting N_CLK= 12 +

32*TOFF

(1 will work with minimum

blank time of 24 clocks)

1…15

For operation with stealthChop, this parameter is not

used, but it is required to enable the motor. In case of

operation with stealthChop only, any setting is OK.

Setting this parameter to zero completely disables all

driver transistors and the motor can free-wheel.

Selects the comparator blank time. This time needs to

safely cover the switching event and the duration of the

ringing on the sense resistor. For most applications, a

setting of 1 or 2 is good. For highly capacitive loads, 2

e.g. when filter networks are used, a setting of 2 or 3

TBL

0

1

16 t_CLK

24 t_CLK

36 t_CLK

54 t_CLK

3

will be required.

Selection of the chopper mode

chm

0

1

spreadCycle

classic const. off time

Fast decay time in multiple

of 128 clocks (128 clocks

are roughly 10µs)

TPFD

Adds passive fast decay time after bridge polarity

change. Starting from 0, increase value, in case the 0…15

motor suffers from mid-range resonances.

8.1 spreadCycle Chopper

The spreadCycle (patented) chopper algorithm is a precise and simple to use chopper mode which

automatically determines the optimum length for the fast-decay phase. The spreadCycle will provide

superior microstepping quality even with default settings. Several parameters are available to

optimize the chopper to the application.

Each chopper cycle is comprised of an on phase, a slow decay phase, a fast decay phase and a

second slow decay phase (see Figure 8.3). The two slow decay phases and the two blank times per

chopper cycle put an upper limit to the chopper frequency. The slow decay phases typically make up

for about 30%-70% of the chopper cycle in standstill and are important for low motor and driver

power dissipation.

Calculation of a starting value for the slow decay time TOFF:

EXAMPLE:

Target Chopper frequency: 25kHz.

Assumption: Two slow decay cycles make up for 50% of overall chopper cycle time

ꢃ

5ꢄ

ꢃ

ꢀ

ꢉ_푂ꢕꢕ

=

∗

= ꢃꢄµ푠

ꢀ5푘퐻푧 ꢃꢄꢄ

For the TOFF setting this means:

ꢘꢑ퐹퐹 = ꢝꢉ_푂ꢕꢕ∗ 푓 − ꢃꢀꢞ/3ꢀ

ꢋ퐿퐾

With 12 MHz clock this gives a setting of TOFF=3.4, i.e. 3 or 4.

With 16 MHz clock this gives a setting of TOFF=4.6, i.e. 4 or 5.

The hysteresis start setting forces the driver to introduce a minimum amount of current ripple into

the motor coils. The current ripple must be higher than the current ripple which is caused by resistive

losses in the motor in order to give best microstepping results. This will allow the chopper to

precisely regulate the current both for rising and for falling target current. The time required to

introduce the current ripple into the motor coil also reduces the chopper frequency. Therefore, a

higher hysteresis setting will lead to a lower chopper frequency. The motor inductance limits the

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ability of the chopper to follow a changing motor current. Further the duration of the on phase and

the fast decay must be longer than the blanking time, because the current comparator is disabled

during blanking.

It is easiest to find the best setting by starting from a low hysteresis setting (e.g. HSTRT=0, HEND=0)

and increasing HSTRT, until the motor runs smoothly at low velocity settings. This can best be

checked when measuring the motor current either with a current probe or by probing the sense

resistor voltages (see Figure 8.2). Checking the sine wave shape near zero transition will show a small

ledge between both half waves in case the hysteresis setting is too small. At medium velocities (i.e.

100 to 400 fullsteps per second), a too low hysteresis setting will lead to increased humming and

vibration of the motor.

Figure 8.2 No ledges in current wave with sufficient hysteresis (magenta: current A, yellow &

blue: sense resistor voltages A and B)

A too high hysteresis setting will lead to reduced chopper frequency and increased chopper noise but

will not yield any benefit for the wave shape.

Quick Start

For a quick start, see the Quick Configuration Guide in chapter 22.

For detail procedure see Application Note AN001 - Parameterization of spreadCycle

As experiments show, the setting is quite independent of the motor, because higher current motors

typically also have a lower coil resistance. Therefore choosing a low to medium default value for the

hysteresis (for example, effective hysteresis = 4) normally fits most applications. The setting can be

optimized by experimenting with the motor: A too low setting will result in reduced microstep

accuracy, while a too high setting will lead to more chopper noise and motor power dissipation.

When measuring the sense resistor voltage in motor standstill at a medium coil current with an

oscilloscope, a too low setting shows a fast decay phase not longer than the blanking time. When

the fast decay time becomes slightly longer than the blanking time, the setting is optimum. You can

reduce the off-time setting, if this is hard to reach.

The hysteresis principle could in some cases lead to the chopper frequency becoming too low, e.g.

when the coil resistance is high when compared to the supply voltage. This is avoided by splitting

the hysteresis setting into a start setting (HSTRT+HEND) and an end setting (HEND). An automatic

hysteresis decrementer (HDEC) interpolates between both settings, by decrementing the hysteresis

value stepwise each 16 system clocks. At the beginning of each chopper cycle, the hysteresis begins

with a value which is the sum of the start and the end values (HSTRT+HEND), and decrements during

the cycle, until either the chopper cycle ends or the hysteresis end value (HEND) is reached. This way,

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the chopper frequency is stabilized at high amplitudes and low supply voltage situations, if the

frequency gets too low. This avoids the frequency reaching the audible range.

I

H

D

E

C

target current + hysteresis start

target current + hysteresis end

target current

target current - hysteresis end

target current - hysteresis start

on

sd

fd

sd

t

Figure 8.3 spreadCycle chopper scheme showing coil current during a chopper cycle

Two parameters control spreadCycle mode:

Parameter

Description

Setting Comment

HSTRT

Hysteresis start setting. This value is an offset 0…7

from the hysteresis end value HEND.

HSTRT=1…8

This value adds to HEND.

HEND

Hysteresis end setting. Sets the hysteresis end

value after a number of decrements. The sum

HSTRT+HEND must be ≤16. At a current setting of

max. 30 (amplitude reduced to 240), the sum is

not limited.

0…2

3

-3…-1: negative HEND

0: zero HEND

4…15

1…12: positive HEND

With HSTRT=0 and HEND=0, the hysteresis is 0 (off).

EXAMPLE:

A hysteresis of 4 has been chosen. You might decide to not use hysteresis decrement. In this case

set:

HEND=6

HSTRT=0

(sets an effective end value of 6-3=3)

(sets minimum hysteresis, i.e. 1: 3+1=4)

In order to take advantage of the variable hysteresis, we can set most of the value to the HSTRT, i.e.

4, and the remaining 1 to hysteresis end. The resulting configuration register values are as follows:

HEND=0

HSTRT=6

(sets an effective end value of -3)

(sets an effective start value of hysteresis end +7: 7-3=4)

Hint

Highest motor velocities sometimes benefit from setting TOFF to 2 or 3 and a short TBL of 2 or 1.

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8.2 Classic Constant Off Time Chopper

The classic constant off time chopper is an alternative to spreadCycle. Perfectly tuned, it also gives

good results. Also, the classic constant off time chopper (automatically) is used in combination with

fullstepping in dcStep operation.

The classic constant off-time chopper uses a fixed-time fast decay following each on phase. While the

duration of the on phase is determined by the chopper comparator, the fast decay time needs to be

long enough for the driver to follow the falling slope of the sine wave, but it should not be so long

that it causes excess motor current ripple and power dissipation. This can be tuned using an

oscilloscope or evaluating motor smoothness at different velocities. A good starting value is a fast

decay time setting similar to the slow decay time setting.

I

target current + offset

mean value = target current

on

sd

fd

sd

fd

t

Figure 8.4 Classic const. off time chopper with offset showing coil current

After tuning the fast decay time, the offset should be tuned for a smooth zero crossing. This is

necessary because the fast decay phase makes the absolute value of the motor current lower than the

target current (see Figure 8.5). If the zero offset is too low, the motor stands still for a short moment

during current zero crossing. If it is set too high, it makes a larger microstep. Typically, a positive

offset setting is required for smoothest operation.

Target current

Coil current

Target current

Coil current

I

t

Coil current does not have optimum shape

Target current corrected for optimum shape of coil current

Figure 8.5 Zero crossing with classic chopper and correction using sine wave offset

Three parameters control constant off-time mode:

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Parameter

Description

Setting Comment

TFD

Fast decay time setting. With CHM=1, these bits 0

slow decay only

(fd3

HSTRT)

& control the portion of fast decay for each chopper

cycle.

1…15

duration of fast decay

phase

OFFSET

(HEND)

Sine wave offset. With CHM=1, these bits control 0…2

negative offset: -3…-1

no offset: 0

the sine wave offset. A positive offset corrects for

zero crossing error.

3

4…15

positive offset 1…12

disfdcc

Selects usage of the current comparator for 0

termination of the fast decay cycle. If current

comparator is enabled, it terminates the fast decay

enable comparator

termination of fast decay

cycle

cycle in case the current reaches a higher negative

value than the actual positive value.

1

end by time only

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9 Selecting Sense Resistors

The TMC5160 provides several means to set the motor current: Sense resistors, GLOBALSCALER and

currentscale CS. To adapt a drive to the motor, choose a sense-resistor value fitting or slightly

exceeding the maximum desired current at 100% settings of the scalers. Fine-tune the current to the

specific motor via the 8 bit GLOBALSCALER. Situation specific motor current adaptation is done by 5

bit scalers (actual scale can be read via CS), controlled by coolStep, run- and hold current (IRUN,

IHOLD). This makes the CS control compatible to other TRINAMIC ICs.

Set the desired maximum motor current by selecting an appropriate value for the sense resistor. The

following table shows the RMS current values which are reached using standard resistors.

CHOICE OF R_SENSEAND RESULTING MAX. MOTOR CURRENT

WITH GLOBALSCALER=255

R_SENSE[Ω]

RMS current [A]

(CS=31)

Sine wave peak

current [A] (CS=31)

0.22

0.15

0.12

0.10

0.075

0.066

0.050

0.033

0.022

1.1

1.6

2.0

2.3

3.1

3.5

4.7

7.1

1.5

2.2

2.8

3.3

4.4

5.0

6.6

10.0

15.0

10.6

Sense resistors should be carefully selected. The full motor current flows through the sense resistors.

Due to chopper operation the sense resistors see pulsed current from the MOSFET bridges. Therefore,

a low-inductance type such as film or composition resistors is required to prevent voltage spikes

causing ringing on the sense voltage inputs leading to unstable measurement results. Also, a low-

inductance, low-resistance PCB layout is essential. A massive ground plane is best. Please also refer to

layout considerations in chapter 29.

The sense resistor sets the upper current which can be set by software settings IRUN, IHOLD and

GLOBALSCALER. Choose the sense resistor value so that the maximum desired current (or slightly

more) flows at the maximum current setting (GLOBALSCALER = 0 and IRUN = 31).

CALCULATION OF RMS CURRENT

퐺ꢒꢑꢠꢎꢒ푆퐶ꢎꢒ퐸푅 퐶푆 + ꢃ

푉

ꢃ

ꢕꢓ

퐼_ꢟ푀ꢓ

=

∗

ꢀ56

3ꢀ

푅_{ꢓꢔ푁ꢓꢔ}

ꢀ

√

The momentary motor current is calculated by:

퐶푈푅_퐴/퐵

ꢀ4ꢁ

퐺ꢒꢑꢠꢎꢒ푆퐶ꢎꢒ퐸푅

퐶푆 + ꢃ

3ꢀ

푉

ꢕꢓ

퐼_푀푂푇

=

∗

ꢀ56

푅_{ꢓꢔ푁ꢓꢔ}

GLOBALSCALER is the global current scaler. A setting of 0 is treated as full scale (256).

CS is the current scale setting as set by the IHOLD and IRUN and coolStep.

V_FSis the full scale voltage (please refer to electrical characteristics, V_SRT).

CUR_A/Bis the actual value from the internal sine wave table.

248 is the amplitude of the internal sine wave table.

The sense resistor needs to be able to conduct the peak motor coil current in motor standstill

conditions, unless standby power is reduced. Under normal conditions, the sense resistor conducts

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74

less than the coil RMS current, because no current flows through the sense resistor during the slow

decay phases.

CALCULATION OF PEAK SENSE RESISTOR POWER DISSIPATION

2

푃_{ꢟꢓ푀퐴푋}= 퐼_ꢋ푂ꢌ퐿∗ 푅_{ꢓꢔ푁ꢓꢔ}

Hint

For best precision of current setting, it is advised to measure and fine tune the current in the

application. Choose the sense resistors to the next value covering the desired motor current. Set IRUN

to 31 corresponding 100% of the desired motor current and fine-tune motor current using

GLOBALSCALER.

Attention

Be sure to use a symmetrical sense resistor layout and short and straight sense resistor traces of

identical length. Well matching sense resistors ensure best performance.

A compact layout with massive ground plane is best to avoid parasitic resistance effects.

Parameter

Description

Setting Comment

IRUN

Current scale when motor is running. Scales coil 0 … 31

current values as taken from the internal sine

wave table. For high precision motor operation,

work with a current scaling factor in the range 16

to 31, because scaling down the current values

reduces the effective microstep resolution by

making microsteps coarser. This setting also

controls the maximum current value set by

coolStep.

scaling factor

1/32, 2/32, … 32/32

IHOLD

DELAY

Identical to IRUN, but for motor in stand still.

Allows smooth current reduction from run current 0

to hold current. IHOLDDELAY controls the number

of clock cycles for motor power down after

TZEROWAIT in increments of 2^18 clocks: 0=instant

power down, 1..15: Current reduction delay per

current step in multiple of 2^18 clocks.

instant IHOLD

1 … 15 1*2¹⁸… 15*2¹⁸

clocks per current

decrement

Example: When using IRUN=31 and IHOLD=16, 15

current steps are required for hold current

reduction. A IHOLDDELAY setting of 4 thus results

in a power down time of 4*15*2^18 clock cycles,

i.e. roughly one second at 16MHz.

GLOBAL

SCALER

Allows fine control of the motor current range

setting

0 … 255 scales in 1/256 steps

0=full scale

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10 Velocity Based Mode Control

The TMC5160 allows the configuration of different chopper modes and modes of operation for

optimum motor control. Depending on the motor load, the different modes can be optimized for

lowest noise & high precision, highest dynamics, or maximum torque at highest velocity. Some of the

features like coolStep or stallGuard2 are useful in a limited velocity range. A number of velocity

thresholds allow combining the different modes of operation within an application requiring a wide

velocity range.

Chopper mode

stealthChop

spreadCycle

const. Toff

option

v

VHIGH+Δ

VHIGH

VCOOLTHRS+Δ

VCOOLTHRS

VPWMTHRS+Δ

VPWMTHRS

0

t

current

I_RUN

I_HOLD

VACTUAL

~1/TSTEP

RMS current

TRINAMIC, B. Dwersteg, 14.3.14

coolStep current reduction

Figure 10.1 Choice of velocity dependent modes

Figure 10.1 shows all available thresholds and the required ordering. VPWMTHRS, VHIGH and

VCOOLTHRS are determined by the settings TPWMTHRS, THIGH and TCOOLTHRS. The velocity is

described by the time interval TSTEP between each two step pulses. This allows determination of the

velocity when an external step source is used. TSTEP always becomes normalized to 256

microstepping. This way, the thresholds do not have to be adapted when the microstep resolution is

changed. The thresholds represent the same motor velocity, independent of the microstep settings.

TSTEP becomes compared to these threshold values. A hysteresis of 1/16 TSTEP resp. 1/32 TSTEP is

applied to avoid continuous toggling of the comparison results when a jitter in the TSTEP

measurement occurs. The upper switching velocity is higher by 1/16, resp. 1/32 of the value set as

threshold. The stealthChop threshold TPWMTHRS is not shown. It can be included with VPWMTHRS <

VCOOLTHRS. The motor current can be programmed to a run and a hold level, dependent on the

standstill flag stst.

Using automatic velocity thresholds allows tuning the application for different velocity ranges.

Features like coolStep will integrate completely transparently in your setup. This way, once

parameterized, they do not require any activation or deactivation via software.

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Parameter

Description

Setting Comment

This flag indicates motor stand still in each operation

mode. This occurs 2^20 clocks after the last step pulse.

stst

0/1

Status bit, read only

TPOWER

DOWN

This is the delay time after stand still (stst) of the 0…255

motor to motor current power down. Time range

is about 0 to 4 seconds.

Time in multiples of 2^18

t_CLK

TSTEP

Actual measured time between two 1/256 0…

microsteps derived from the step input frequency 1048575 Actual measured step time

Status register, read only.

in units of 1/fCLK. Measured value is (2^20)-1 in

case of overflow or stand still.

in multiple of t_CLK

TPWMTHRS TSTEP ≥ TPWMTHRS

0…

Setting to control the

-

stealthChop PWM mode is enabled, if 1048575 upper velocity threshold

configured

dcStep is disabled

for operation in

stealthChop

-

TCOOLTHRS TCOOLTHRS ≥ TSTEP ≥ THIGH:

0…

Setting to control the

-

coolStep is enabled, if configured

1048575 lower velocity threshold

-

stealthChop voltage PWM mode is

disabled

for operation with

coolStep and stallGuard

TCOOLTHRS ≥ TSTEP

Stop on stall and stall output signal is

enabled, if configured

TSTEP ≤ THIGH:

-

THIGH

0…

Setting to control the

-

coolStep is disabled (motor runs with 1048575 upper threshold for

normal current scale)

operation with coolStep

and stallGuard as well as

optional high velocity step

mode

stealthChop voltage PWM mode is

disabled

If vhighchm is set, the chopper switches

to chm=1 with TFD=0 (constant off time

with slow decay, only).

-

If vhighfs is set, the motor operates in

fullstep mode and the stall detection

becomes switched over to dcStep stall

detection.

small_

hysteresis

Hysteresis for step frequency comparison based 0

Hysteresis is 1/16

Hysteresis is 1/32

on TSTEP (lower velocity threshold) and

(TSTEP*15/16)-1 respectively (TSTEP*31/32)-1 (upper

velocity threshold)

1

vhighfs

This bit enables switching to fullstep, when VHIGH 0

No switch to fullstep

is exceeded. Switching takes place only at 45°

1

Fullstep at high velocities

position. The fullstep target current uses the

current value from the microstep table at the 45°

position.

This bit enables switching to chm=1 and fd=0, when

VHIGH is exceeded. This way, a higher velocity can

be achieved. Can be combined with vhighfs=1. If set,

the TOFF setting automatically becomes doubled

during high velocity operation in order to avoid

doubling of the chopper frequency.

vhighchm

0

1

No change of chopper

mode

Classic const. Toff chopper

at high velocities

en_pwm_

mode

stealthChop voltage PWM enable flag (depending 0

No stealthChop

on velocity thresholds). Switch from off to on

1

StealthChop below

VPWMTHRS

state while in stand still, only.

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11 Diagnostics and Protection

The TMC5160 supplies a complete set of diagnostic and protection capabilities, like short circuit

protection and undervoltage detection. Open load detection allows testing if a motor coil connection

is interrupted. See the DRV_STATUS table for details.

11.1 Temperature Sensors

The driver integrates a four level temperature sensor (120°C pre-warning and selectable 136°C / 143°C /

150°C thermal shutdown) for diagnostics and for protection of the IC and the power MOSFETs and

adjacent components against excess heat. Choose the overtemperature level to safely cover error

conditions like missing heat convection. Heat is mainly generated by the power MOSFETs, and, at

increased voltage, by the internal voltage regulators. For many applications, already the

overtemperature pre-warning will indicate an abnormal operation situation and can be used to initiate

user warning or power reduction measures like motor current reduction. The thermal shutdown is

just an emergency measure and temperature rising to the shutdown level should be prevented by

design.

After triggering the overtemperature sensor (ot flag), the driver remains switched off until the system

temperature falls below the pre-warning level (otpw) to avoid continuous heating to the shutdown

level.

11.2 Short Protection

The TMC5160 protects the MOSFET power stages against a short circuit or overload condition by

monitoring the voltage drop in the high-side MOSFETs, as well as the voltage drop in sense resistor

and low-side MOSFETs (Figure 11.1). A programmable short detection delay (shortdelay) allows

adjusting the detector to work with very slow switching slopes. Additionally, the short detector

allows filtering of the signal. This helps to prevent spurious triggering caused by effects of PCB

layout, or long, adjacent motor cables (SHORTFILTER). All control bits are available via register

SHORT_CONF. Additionally, the short detection is protected against single events, e.g. caused by ESD

discharges, by retrying three times before switching off the motor continuously.

Parameter

Description

Setting Comment

S2VS_LEVEL Short or overcurrent detector level for lowside 4…15

FETs. Checks for voltage drop in LS MOSFET and

sense resistor.

4 (highest sensitivity) …

15 (lowest sensitivity)

(Reset Default:

Hint: 6 to 8 recommended, down to 4 at low

current scale

OTP 6 or 12)

S2G_LEVEL

S2G_LEVEL:

2…15

2 (highest sensitivity) …

15 (lowest sensitivity)

(Reset Default:

Short to GND detector level for highside FETs.

Checks for voltage drop on high side MOSFET.

Hint: 6 to 14 recommended (minimum 12 if the

bridge supply voltage can exceed 52V)

Spike filtering bandwidth for short detection

Hint: A good PCB layout will allow using setting 0.

Increase value, if erroneous short detection

occurs.

OTP 6 or 12)

SHORT_

FILTER

0…3

0 (lowest, 100ns),

1 (1µs) (Reset Default),

2 (2µs),

3 (3µs)

shortdelay

shortdelay: Short detection delay

The short detection delay shall cover the bridge

0/1

0=750ns: normal,

1=1500ns: high

switching time. 0 will work for most applications.

CHOPCONF. Allows to disable short to VS protection.

diss2vs

CHOPCONF. Allows to disable short to GND protection.

diss2g

0/1

Leave detection enabled

for normal use (0).

Leave detection enabled

for normal use (0).

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Internal low-side

driver enable

1

0

Internal high-side

driver enable

1

0

V_S

V_S-V_BM

S2G level

No-short

area

Short to GND

detected

LS short

detection

(S2VS)

Output

floating

BMx

(coil output

voltage)

HS short

detection

(S2G)

S2VS level

V_BM

No-short

area

0V

t_SD

1

0

Driver disable

inactive

Short detected

Internal Error Flag

short

delay

detection

active

inactive

detection active

Short to VS monitor phase

Short to GND monitor phase

short

delay

short

delay

inactive

Figure 11.1 Short detection

As the low-side short detection includes the sense resistor, it can be set to a high sensitivity and

provides good precision of current detection. This way, it will safely cover most overcurrent

conditions, i.e. when the motor stalls, or is abruptly stopped in stealthChop mode.

Hint

Once a short condition is safely detected, the corresponding driver bridge (A or B) becomes switched

off, and the s2ga or s2gb flag, respectively s2vsa or s2vsb becomes set.

To restart the motor, disable and re-enable the driver.

Attention

Short protection cannot protect the system and the power stages for all possible short events, as a

short event is rather undefined and a complex network of external components may be involved.

Therefore, short circuits should basically be avoided.

Hint

Set low-side short protection (S2VS) to sensitively detect an overcurrent condition (at 150 to 200% of

nominal peak current). Especially with low resistive motors an overcurrent can easily be triggered by

false settings, or motor stall when using stealthChop. Therefore, a sensitive short to VS setting will

protect the power stage.

Attention

High-side short detection (S2G) sensitivity may increase at voltages of 52V and above. Therefore, a

higher setting is required if motor supply voltage can overshoot up to 55V. We recommend a setting

of 12 to 15 in this case. For fine tuning of overcurrent detection, trim the S2VS detector threshold.

High-side short detection may falsely trigger if motor supply voltage overshoots 55V.

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11.3 Open Load Diagnostics

Interrupted cables are a common cause for systems failing, e.g. when connectors are not firmly

plugged. The TMC5160 detects open load conditions by checking, if it can reach the desired motor coil

current. This way, also undervoltage conditions, high motor velocity settings or short and

overtemperature conditions may cause triggering of the open load flag, and inform the user, that

motor torque may suffer. In motor stand still, open load cannot be measured, as the coils might

eventually have zero current.

Open load detection is provided for system debugging.

In order to safely detect an interrupted coil connection, read out the open load flags at low or

nominal motor velocity operation, only. If possible, use spreadCycle for testing, as it provides the

most accurate test. However, the ola and olb flags have just informative character and do not cause

any action of the driver.

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12 Ramp Generator

The ramp generator allows motion based on target position or target velocity. It automatically

calculates the optimum motion profile taking into account acceleration and velocity settings. The

TMC5160 integrates a new type of ramp generator, which offers faster machine operation compared to

the classical linear acceleration ramps. The sixPoint ramp generator allows adapting the acceleration

ramps to the torque curves of a stepper motor and uses two different acceleration settings each for

the acceleration phase and for the deceleration phase. See Figure 12.2.

12.1 Real World Unit Conversion

The TMC5160 uses its internal or external clock signal as a time reference for all internal operations.

Thus, all time, velocity and acceleration settings are referenced to f_CLK. For best stability and

reproducibility, it is recommended to use an external quartz oscillator as a time base, or to provide a

clock signal from a microcontroller.

The units of a TMC5160 register content are written as register[5160].

PARAMETER VS. UNITS

Parameter / Symbol

Unit

calculation / description / comment

f_CLK[Hz]

s

[Hz]

[s]

clock frequency of the TMC5160 in [Hz]

second

US

µstep

FS

fullstep

µsteps / s

µsteps / s^2

µstep velocity v[Hz]

µstep acceleration a[Hz/s]

v[Hz] = v[5160] * ( f_CLK[Hz]/2 / 2^23 )

a[Hz/s] = a[5160] * f_CLK[Hz]^2 / (512*256) / 2^24

microstep resolution in number of microsteps

(i.e. the number of microsteps between two

fullsteps – normally 256)

USC microstep count

counts

v[rps] = v[µsteps/s] / USC / FSC

rotations per second v[rps]

rps acceleration a[rps/s^2]

rotations / s

FSC: motor fullsteps per rotation, e.g. 200

a[rps/s^2] = a[µsteps/s^2] / USC / FSC

rs = (v[5160])^2 / a[5160] / 2^8

rotations / s^2

ramp steps[µsteps] = rs

µsteps

microsteps during linear acceleration ramp

(assuming acceleration from 0 to v)

TSTEP = f_CLK/ f_STEP

The time reference for velocity thresholds is

referred to the actual microstep frequency of

the clock input respectively velocity v[Hz].

TSTEP, T…THRS

-

In rare cases, the upper acceleration limit might impose a limitation to the application, e.g. when

working with a reduced clock frequency or high gearing and low load on the motor. In order to

increase the effective acceleration possible, the microstep resolution of the sequencer input may be

decreased. Setting the CHOPCONF options intpol=1 and MRES=%0001 will double the motor velocity for

the same speed setting and thus also double effective acceleration and deceleration. The motor will

have the same smoothness, but half position resolution with this setting.

Quick Start

For a quick start, see the Quick Configuration Guide in chapter 22.

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12.2 Motion Profiles

For the ramp generator register set, please refer to the chapter 6.3.

12.2.1 Ramp Mode

The ramp generator delivers two phase acceleration and two phase deceleration ramps with

additional programmable start and stop velocities (see Figure 12.1).

Note

The start velocity can be set to zero, if not used.

The stop velocity can be set to ten (or down to one), if not used.

Take care to set VSTOP identical to or above VSTART. This ensures that even a short motion can

be terminated successfully at the target position.

The two different sets of acceleration and deceleration can be combined freely. A common transition

speed V1 allows for velocity dependent switching between both acceleration and deceleration

settings. A typical use case will use lower acceleration and deceleration values at higher velocities, as

the motors torque declines at higher velocity. When considering friction in the system, it becomes

clear, that typically deceleration of the system is quicker than acceleration. Thus, deceleration values

can be higher in many applications. This way, operation speed of the motor in time critical

applications can be maximized.

As target positions and ramp parameters may be changed any time during the motion, the motion

controller will always use the optimum (fastest) way to reach the target, while sticking to the

constraints set by the user. This way it might happen, that the motion becomes automatically

stopped, crosses zero and drives back again. This case is flagged by the special flag second_move.

12.2.2 Start and Stop Velocity

When using increased levels of start- and stop velocity, it becomes clear, that a subsequent move into

the opposite direction would provide a jerk identical to VSTART+VSTOP, rather than only VSTART. As

the motor probably is not able to follow this, you can set a time delay for a subsequent move by

setting TZEROWAIT. An active delay time is flagged by the flag t_zerowait_active. Once the target

position is reached, the flag position_reached becomes active.

motor

stop

acceleration

phase

v

acceleration phase

deceleration phase

VMAX

D

M

A

X

A

M

A

V1

D

1

A

VSTOP

VSTART

0

t

-

A

1

VACTUAL

Figure 12.1 Ramp generator velocity trace showing consequent move in negative direction

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torque

high deceleration

2xM_FRICT

reduced decel.

reduced accel.

m

o

M_MAX

t

o

r

t

o

r

q

u

e

high acceleration

M_NOM1

M_NOM2

Torque available for acceleration A1

Torque available for

AMAX

M_FRICT

Torque required

for static loads

0

velocity [RPM]

M_FRICTPortion of torque required for friction and static load within the system

M_MAXMotor pull-out torque at v=0

M_NOM1/2Torque available at V1 resp. VMAX

Motor torque used in acceleration phase

Overall torque usable for deceleration

Figure 12.2 Illustration of optimized motor torque usage with TMC5160 ramp generator

12.2.3 Velocity Mode

For the ease of use, velocity mode movements do not use the different acceleration and deceleration

settings. You need to set VMAX and AMAX only for velocity mode. The ramp generator always uses

AMAX to accelerate or decelerate to VMAX in this mode.

In order to decelerate the motor to stand still, it is sufficient to set VMAX to zero. The flag vzero

signals standstill of the motor. The flag velocity_reached always signals, that the target velocity has

been reached.

12.2.4 Early Ramp Termination

In cases where users can interact with a system, some applications require terminating a motion by

ramping down to zero velocity before the target position has been reached.

OPTIONS TO TERMINATE MOTION USING ACCELERATION SETTINGS:

a) Switch to velocity mode, set VMAX=0 and AMAX to the desired deceleration value. This will stop

the motor using a linear ramp.

b) For a stop in positioning mode, set VSTART=0 and VMAX=0. VSTOP is not used in this case. The

driver will use AMAX and A1 (as determined by V1) for going to zero velocity.

c) For a stop using D1, DMAX and VSTOP, trigger the deceleration phase by copying XACTUAL to

XTARGET. Set TZEROWAIT sufficiently to allow the CPU to interact during this time. The driver will

decelerate and eventually come to a stop. Poll the actual velocity to terminate motion during

TZEROWAIT time using option a) or b).

d) Activate a stop switch. This can be done by means of the hardware input, e.g. using a wired 'OR'

to the stop switch input. If you do not use the hardware input and have tied the REFL and REFR

to a fixed level, enable the stop function (stop_l_enable, stop_r_enable) and use the inverting

function (pol_stop_l, pol_stop_r) to simulate the switch activation.

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12.2.5 Application Example: Joystick Control

Applications like surveillance cameras can be optimally enhanced using the motion controller: while

joystick commands operate the motor at a user defined velocity, the target ramp generator ensures

that the valid motion range never is left.

REALIZE JOYSTICK CONTROL

1. Use positioning mode in order to control the motion direction and to set the motion limit(s).

2. Modify VMAX at any time in the range VSTART to your maximum value. With VSTART=0, you can

also stop motion by setting VMAX=0. The motion controller will use A1 and AMAX as determined

by V1 to adapt velocity for ramping up and ramping down.

3. In case you do not modify the acceleration settings, you do not need to rewrite XTARGET, just

modify VMAX.

4. DMAX, D1 and VSTOP only become used when the ramp controller slows down due to reaching

the target position, or when the target position has been modified to point to the other direction.

12.3 Velocity Thresholds

The ramp generator provides a number of velocity thresholds coupled with the actual velocity

VACTUAL. The different ranges allow programming the motor to the optimum step mode, coil current

and acceleration settings. Most applications will not require all of the thresholds, but in principle all

modes can be combined as shown in Figure 12.1. VHIGH and VCOOLTHRS are determined by the

settings THIGH and TCOOLTHRS in order to allow determination of the velocity when an external step

source is used. TSTEP becomes compared to these threshold values. A hysteresis of 1/16 TSTEP resp.

1/32 TSTEP is applied to avoid continuous toggling of the comparison results when a jitter in the

TSTEP measurement occurs. The upper switching velocity is higher by 1/16, resp. 1/32 of the value set

as threshold. The stealthChop threshold TPWMTHRS is not shown. It can be included with VPWMTHRS

< VCOOLTHRS.

v

VMAX

VHIGH

D

X

M

A

M

A

X

V1

D

1

A

VCOOLTHRS

VSTOP

VSTART

0

t

current

I_RUN

I_HOLD

VACTUAL

RMS current

coolStep current reduction

Figure 12.3 Ramp generator velocity dependent motor control

The velocity thresholds for the different chopper modes and sensorless operation features are coupled

to the time between each two microsteps TSTEP.

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12.4 Reference Switches

Prior to normal operation of the drive an absolute reference position must be set. The reference

position can be found using a mechanical stop which can be detected by stall detection, or by a

reference switch.

In case of a linear drive, the mechanical motion range must not be left. This can be ensured also for

abnormal situations by enabling the stop switch functions for the left and the right reference switch.

Therefore, the ramp generator responds to a number of stop events as configured in the SW_MODE

register. There are two ways to stop the motor:

-

It can be stopped abruptly, when a switch is hit. This is useful in an emergency case and for

stallGuard based homing.

-

Or the motor can be softly decelerated to zero using deceleration settings (DMAX, V1, D1).

Hint

Latching of the ramp position XACTUAL to the holding register XLATCH upon a switch event gives a

precise snapshot of the position of the reference switch.

+VCC_IO

10k

REFL

REFR

Motor

22k

1nF

Negative

direction

Traveler

Positive

direction

Optional RC filter

(example)

Figure 12.4 Using reference switches (example)

Normally open or normally closed switches can be used by programming the switch polarity or

selecting the pullup or pull-down resistor configuration. A normally closed switch is failsafe with

respect to an interrupt of the switch connection. Switches which can be used are:

-

mechanical switches,

photo interrupters, or

hall sensors.

Be careful to select reference switch resistors matching your switch requirements!

In case of long cables additional RC filtering might be required near the TMC5160 reference inputs.

Adding an RC filter will also reduce the danger of destroying the logic level inputs by wiring faults,

but it will add a certain delay which should be considered with respect to the application.

IMPLEMENTING A HOMING PROCEDURE

1. Make sure, that the home switch is not pressed, e.g. by moving away from the switch.

2. Activate position latching upon the desired switch event and activate motor (soft) stop upon

active switch. stallGuard based homing requires using a hard stop (en_softstop=0).

3. Start a motion ramp into the direction of the switch. (Move to a more negative position for a left

switch, to a more positive position for a right switch). You may timeout this motion by using a

position ramping command.

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4. As soon as the switch is hit, the position becomes latched and the motor is stopped. Wait until

the motor is in standstill again by polling the actual velocity VACTUAL or checking vzero or the

standstill flag.

5. Switch the ramp generator to hold mode and calculate the difference between the latched

position and the actual position. For stallGuard based homing or when using hard stop, XACTUAL

stops exactly at the home position, so there is no difference (0).

6. Write the calculated difference into the actual position register. Now, homing is finished. A move

to position 0 will bring back the motor exactly to the switching point. In case stallGuard was

used for homing, read and write back RAMP_STAT to clear the stallGuard stop event event_stop_sg

and release the motor from the stop condition.

HOMING WITH A THIRD SWITCH

Some applications use an additional home switch, which operates independently of the mechanical

limit switches. The encoder functionality of the TMC5160 provides an additional source for position

latching. It allows using the N channel input to snapshot XACTUAL with a rising or falling edge event,

or both. This function also provides an interrupt output.

1. Activate the latching function (ENCMODE: Set ignoreAB, clr_cont, neg_edge or pos_edge and

latch_x_act). The latching function can then trigger the interrupt output (check by reading n_event

in ENC_STATUS when interrupt is signaled at DIAG0).

2. Move to the direction, where the N channel switch should be. In case the motor hits a stop

switch (REFL or REFR) before the home switch is detected, reverse the motion direction.

3. Read out XLATCH once the switch has been triggered. It gives the position of the switch event.

4. After detection of the switch event, stop the motor, and subtract XLATCH from the actual position.

Read and write back ENC_STAT to clear the status flags. (A detailed description of the required

steps is in the homing procedure above.)

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13 stallGuard2 Load Measurement

stallGuard2 provides an accurate measurement of the load on the motor. It can be used for stall

detection as well as other uses at loads below those which stall the motor, such as coolStep load-

adaptive current reduction. The stallGuard2 measurement value changes linearly over a wide range of

load, velocity, and current settings, as shown in Figure 13.1. At maximum motor load, the value goes

to zero or near to zero. This corresponds to a load angle of 90° between the magnetic field of the

coils and magnets in the rotor. This also is the most energy-efficient point of operation for the motor.

1000

900

stallGuard2

Start value depends

on motor and

operating conditions

800

700

600

500

400

300

200

100

0

reading

stallGuard value reaches zero

and indicates danger of stall.

This point is set by stallGuard

threshold value SGT.

Motor stalls above this point.

Load angle exceeds 90° and

available torque sinks.

10

20

30

40

50

60

70

80

90 100

motor load

(% max. torque)

Figure 13.1 Function principle of stallGuard2

Parameter

Description

Setting Comment

SGT

This signed value controls the stallGuard2 0

threshold level for stall detection and sets the

optimum measurement range for readout. A

lower value gives a higher sensitivity. Zero is the

starting value working with most motors. A

higher value makes stallGuard2 less sensitive and

requires more torque to indicate a stall.

indifferent value

+1… +63 less sensitivity

-1… -64 higher sensitivity

sfilt

Enables the stallGuard2 filter for more precision 0

standard mode

of the measurement. If set, reduces the

measurement frequency to one measurement per

electrical period of the motor (4 fullsteps).

1

filtered mode

Status word Description

SG_RESULT

Range

Comment

This is the stallGuard2 result. A higher reading 0… 1023 0: highest load

indicates less mechanical load. A lower reading

indicates a higher load and thus a higher load

angle. Tune the SGT setting to show a SG_RESULT

reading of roughly 0 to 100 at maximum load

before motor stall.

low value: high load

high value: less load

Hint

In order to use stallGuard2 and coolStep, the stallGuard2 sensitivity should first be tuned using the

SGT setting!

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13.1 Tuning stallGuard2 Threshold SGT

The stallGuard2 value SG_RESULT is affected by motor-specific characteristics and application-specific

demands on load and velocity. Therefore the easiest way to tune the stallGuard2 threshold SGT for a

specific motor type and operating conditions is interactive tuning in the actual application.

INITIAL PROCEDURE FOR TUNING STALLGUARD SGT

1. Operate the motor at the normal operation velocity for your application and monitor SG_RESULT.

2. Apply slowly increasing mechanical load to the motor. If the motor stalls before SG_RESULT

reaches zero, decrease SGT. If SG_RESULT reaches zero before the motor stalls, increase SGT. A

good SGT starting value is zero. SGT is signed, so it can have negative or positive values.

3. Set TCOOLTHRS to a value above TSTEP and enable sg_stop to enable the stop on stall feature.

Make sure, that the motor is safely stopped whenever it is stalled. Increase SGT if the motor

becomes stopped before a stall occurs. Restart the motor by disabling sg_stop or by reading and

writing back the RAMP_STAT register (write+clear function).

4. The optimum setting is reached when SG_RESULT is between 0 and roughly 100 at increasing load

shortly before the motor stalls, and SG_RESULT increases by 100 or more without load. SGT in

most cases can be tuned for a certain motion velocity or a velocity range. Make sure, that the

setting works reliable in a certain range (e.g. 80% to 120% of desired velocity) and also under

extreme motor conditions (lowest and highest applicable temperature).

OPTIONAL PROCEDURE ALLOWING AUTOMATIC TUNING OF SGT

The basic idea behind the SGT setting is a factor, which compensates the stallGuard measurement for

resistive losses inside the motor. At standstill and very low velocities, resistive losses are the main

factor for the balance of energy in the motor, because mechanical power is zero or near to zero. This

way, SGT can be set to an optimum at near zero velocity. This algorithm is especially useful for tuning

SGT within the application to give the best result independent of environment conditions, motor

stray, etc.

1. Operate the motor at low velocity < 10 RPM (i.e. a few to a few fullsteps per second) and target

operation current and supply voltage. In this velocity range, there is not much dependence of

SG_RESULT on the motor load, because the motor does not generate significant back EMF.

Therefore, mechanical load will not make a big difference on the result.

2. Switch on sfilt. Now increase SGT starting from 0 to a value, where SG_RESULT starts rising. With

a high SGT, SG_RESULT will rise up to the maximum value. Reduce again to the highest value,

where SG_RESULT stays at 0. Now the SGT value is set as sensibly as possible. When you see

SG_RESULT increasing at higher velocities, there will be useful stall detection.

The upper velocity for the stall detection with this setting is determined by the velocity, where the

motor back EMF approaches the supply voltage and the motor current starts dropping when further

increasing velocity.

SG_RESULT goes to zero when the motor stalls and the ramp generator can be programmed to stop

the motor upon a stall event by enabling sg_stop in SW_MODE. Set TCOOLTHRS to match the lower

velocity threshold where stallGuard delivers a good result in order to use sg_stop.

The power supply voltage also affects SG_RESULT, so tighter voltage regulation results in more

accurate values. stallGuard measurement has a high resolution, and there are a few ways to enhance

its accuracy, as described in the following sections.

Quick Start

For a quick start, see the Quick Configuration Guide in chapter 22.

For detail procedure see Application Note AN002 - Parameterization of stallGuard2 & coolStep

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13.1.1 Variable Velocity Limits TCOOLTHRS and THIGH

The SGT setting chosen as a result of the previously described SGT tuning can be used for a certain

velocity range. Outside this range, a stall may not be detected safely, and coolStep might not give the

optimum result.

good operation

range with single

1000

900

800

700

600

500

400

300

200

100

0

20

18

16

14

12

10

8

SGT setting

stallGuard2

reading at

no load

optimum

SGT setting

6

4

2

0

50

100

150

200

250

300

350

400

450

500

550

600

Motor RPM

(200 FS motor)

lower limit for stall

detection

back EMF reaches

supply voltage

Figure 13.2 Example: optimum SGT setting and stallGuard2 reading with an example motor

In many applications, operation at or near a single operation point is used most of the time and a

single setting is sufficient. The driver provides a lower and an upper velocity threshold to match this.

The stall detection is disabled outside the determined operation point, e.g. during acceleration phases

preceding a sensorless homing procedure when setting TCOOLTHRS to a matching value. An upper

limit can be specified by THIGH.

In some applications, a velocity dependent tuning of the SGT value can be expedient, using a small

number of support points and linear interpolation.

13.1.2 Small Motors with High Torque Ripple and Resonance

Motors with a high detent torque show an increased variation of the stallGuard2 measurement value

SG with varying motor currents, especially at low currents. For these motors, the current dependency

should be checked for best result.

13.1.3 Temperature Dependence of Motor Coil Resistance

Motors working over a wide temperature range may require temperature correction, because motor

coil resistance increases with rising temperature. This can be corrected as a linear reduction of SGT at

increasing temperature, as motor efficiency is reduced.

13.1.4 Accuracy and Reproducibility of stallGuard2 Measurement

In a production environment, it may be desirable to use a fixed SGT value within an application for

one motor type. Most of the unit-to-unit variation in stallGuard2 measurements results from manu-

facturing tolerances in motor construction. The measurement error of stallGuard2 – provided that all

other parameters remain stable – can be as low as:

|

푠ꢉ푎푙푙퐺푢푎푟푑 ꢍꢙ푎푠푢푟ꢙꢍꢙ푛ꢉ ꢙ푟푟표푟 = ±ꢍ푎푥ꢝꢃ, 푆퐺ꢘ ꢞ

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13.2 stallGuard2 Update Rate and Filter

The stallGuard2 measurement value SG_RESULT is updated with each full step of the motor. This is

enough to safely detect a stall, because a stall always means the loss of four full steps. In a practical

application, especially when using coolStep, a more precise measurement might be more important

than an update for each fullstep because the mechanical load never changes instantaneously from

one step to the next. For these applications, the sfilt bit enables a filtering function over four load

measurements. The filter should always be enabled when high-precision measurement is required. It

compensates for variations in motor construction, for example due to misalignment of the phase A to

phase B magnets. The filter should be disabled when rapid response to increasing load is required

and for best results of sensorless homing using stallGuard.

13.3 Detecting a Motor Stall

For best stall detection, work without stallGuard filtering (sfilt=0). To safely detect a motor stall the

stall threshold must be determined using a specific SGT setting. Therefore, the maximum load needs

to be determined, which the motor can drive without stalling. At the same time, monitor the

SG_RESULT value at this load, e.g. some value within the range 0 to 100. The stall threshold should be

a value safely within the operating limits, to allow for parameter stray. The response at an SGT

setting at or near 0 gives some idea on the quality of the signal: Check the SG value without load and

with maximum load. They should show a difference of at least 100 or a few 100, which shall be large

compared to the offset. If you set the SGT value in a way, that a reading of 0 occurs at maximum

motor load, the stall can be automatically detected by the motion controller to issue a motor stop. In

the moment of the step resulting in a step loss, the lowest reading will be visible. After the step loss,

the motor will vibrate and show a higher SG_RESULT reading.

13.4 Homing with stallGuard

The homing of a linear drive requires moving the motor into the direction of a hard stop. As

stallGuard needs a certain velocity to work (as set by TCOOLTHRS), make sure that the start point is far

enough away from the hard stop to provide the distance required for the acceleration phase. After

setting up SGT and the ramp generator registers, start a motion into the direction of the hard stop

and activate the stop on stall function (set sg_stop in SW_MODE). Once a stall is detected, the ramp

generator stops motion and sets VACTUAL zero, stopping the motor. The stop condition also is

indicated by the flag stallGuard in DRV_STATUS. After setting up new motion parameters in order to

prevent the motor from restarting right away, stallGuard can be disabled, or the motor can be re-

enabled by reading and writing back RAMP_STAT. The write and clear function of the event_stop_sg

flag in RAMP_STAT restarts the motor after expiration of TZEROWAIT in case the motion parameters

have not been modified. Best results are yielded at 30% to 70% of nominal motor current and

typically 1 to 5 RPS (motors smaller than NEMA17 may require higher velocities).

13.5 Limits of stallGuard2 Operation

stallGuard2 does not operate reliably at extreme motor velocities: Very low motor velocities (for many

motors, less than one revolution per second) generate a low back EMF and make the measurement

unstable and dependent on environment conditions (temperature, etc.). The automatic tuning

procedure described above will compensate for this. Other conditions will also lead to extreme

settings of SGT and poor response of the measurement value SG_RESULT to the motor load.

Very high motor velocities, in which the full sinusoidal current is not driven into the motor coils also

leads to poor response. These velocities are typically characterized by the motor back EMF reaching

the supply voltage.

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14 coolStep Operation

coolStep is an automatic smart energy optimization for stepper motors based on the motor

mechanical load, making them “green”.

14.1 User Benefits

Energy efficiency

–

consumption decreased up to 75%

improved mechanical precision

for motor and driver

Motor generates less heat

Less cooling infrastructure

Cheaper motor

does the job!

coolStep allows substantial energy savings, especially for motors which see varying loads or operate

at a high duty cycle. Because a stepper motor application needs to work with a torque reserve of 30%

to 50%, even a constant-load application allows significant energy savings because coolStep

automatically enables torque reserve when required. Reducing power consumption keeps the system

cooler, increases motor life, and allows reducing cost in the power supply and cooling components.

Reducing motor current by half results in reducing power by a factor of four.

14.2 Setting up for coolStep

coolStep is controlled by several parameters, but two are critical for understanding how it works:

Parameter

Description

Range

Comment

SEMIN

4-bit unsigned integer that sets a lower threshold. 0

disable coolStep

threshold is SEMIN*32

If SG goes below this threshold, coolStep

increases the current to both coils. The 4-bit

SEMIN value is scaled by 32 to cover the lower

half of the range of the 10-bit SG value. (The

name of this parameter is derived from

smartEnergy, which is an earlier name for

coolStep.)

1…15

SEMAX

4-bit unsigned integer that controls an upper 0…15

threshold. If SG is sampled equal to or above this

threshold enough times, coolStep decreases the

current to both coils. The upper threshold is

(SEMIN + SEMAX + 1)*32.

threshold is

(SEMIN+SEMAX+1)*32

Figure 14.1 shows the operating regions of coolStep:

-

The black line represents the SG measurement value.

The blue line represents the mechanical load applied to the motor.

The red line represents the current into the motor coils.

When the load increases, SG_RESULT falls below SEMIN, and coolStep increases the current. When the

load decreases, SG_RESULT rises above (SEMIN + SEMAX + 1) * 32, and the current is reduced.

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motor current reduction area

current setting I_RUN

(upper limit)

SEMAX+SEMIN+1

SEMIN

½ or ¼ I_RUN

motor current increment area

stall possible

(lower limit)

0=maximum load

Zeit

load

angle

load angle optimized

optimized

Figure 14.1 coolStep adapts motor current to the load

Five more parameters control coolStep and one status value is returned:

Parameter

Description

Range

Comment

SEUP

Sets the current increment step. The current 0…3

becomes incremented for each measured

stallGuard2 value below the lower threshold.

Sets the number of stallGuard2 readings above the 0…3

upper threshold necessary for each current

decrement of the motor current.

step width is

1, 2, 4, 8

SEDN

number of stallGuard2

measurements per

decrement:

32, 8, 2, 1

SEIMIN

Sets the lower motor current limit for coolStep 0

0: 1/2 of IRUN

1: 1/4 of IRUN

operation by scaling the IRUN current setting.

1

TCOOL

THRS

Lower velocity threshold for switching on 1…

coolStep and stop on stall. Below this velocity 2^20-1

coolStep becomes disabled (not used in STEP/DIR

mode). Adapt to the lower limit of the velocity

range where stallGuard2 gives a stable result.

Specifies lower coolStep

velocity by comparing

the threshold value to

TSTEP

Hint: May be adapted to disable coolStep during

acceleration and deceleration phase by setting

identical to VMAX.

THIGH

Upper velocity threshold value for coolStep and 1…

stop on stall. Above this velocity coolStep 2^20-1

becomes disabled. Adapt to the velocity range

where stallGuard2 gives a stable result.

Also controls additional

functions like switching

to fullstepping.

Status

word

Description

Range

Comment

This status value provides the actual motor

current scale as controlled by coolStep. The value

goes up to the IRUN value and down to the

portion of IRUN as specified by SEIMIN.

CSACTUAL

0…31

1/32, 2/32, … 32/32

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14.3 Tuning coolStep

Before tuning coolStep, first tune the stallGuard2 threshold level SGT, which affects the range of the

load measurement value SG_RESULT. coolStep uses SG_RESULT to operate the motor near the

optimum load angle of +90°.

The current increment speed is specified in SEUP, and the current decrement speed is specified in

SEDN. They can be tuned separately because they are triggered by different events that may need

different responses. The encodings for these parameters allow the coil currents to be increased much

more quickly than decreased, because crossing the lower threshold is a more serious event that may

require a faster response. If the response is too slow, the motor may stall. In contrast, a slow

response to crossing the upper threshold does not risk anything more serious than missing an

opportunity to save power.

coolStep operates between limits controlled by the current scale parameter IRUN and the seimin bit.

14.3.1 Response Time

For fast response to increasing motor load, use a high current increment step SEUP. If the motor load

changes slowly, a lower current increment step can be used to avoid motor oscillations. If the filter

controlled by sfilt is enabled, the measurement rate and regulation speed are cut by a factor of four.

Hint

The most common and most beneficial use is to adapt coolStep for operation at the typical system

target operation velocity and to set the velocity thresholds according. As acceleration and

decelerations normally shall be quick, they will require the full motor current, while they have only a

small contribution to overall power consumption due to their short duration.

14.3.2 Low Velocity and Standby Operation

Because coolStep is not able to measure the motor load in standstill and at very low RPM, a lower

velocity threshold is provided in the ramp generator. It should be set to an application specific

default value. Below this threshold the normal current setting via IRUN respectively IHOLD is valid. An

upper threshold is provided by the VHIGH setting. Both thresholds can be set as a result of the

stallGuard2 tuning process.

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15 STEP/DIR Interface

The STEP and DIR inputs provide a simple, standard interface compatible with many existing motion

controllers. The microPlyer STEP pulse interpolator brings the smooth motor operation of high-

resolution microstepping to applications originally designed for coarser stepping. In case an external

step source is used, the complete integrated motion controller can be switched off. The only motion

controller registers remaining active in this case are the current settings in register IHOLD_IRUN.

15.1 Timing

Figure 15.1 shows the timing parameters for the STEP and DIR signals, and the table below gives

their specifications. When the dedge mode bit in the CHOPCONF register is set, both edges of STEP

are active. If dedge is cleared, only rising edges are active. STEP and DIR are sampled and

synchronized to the system clock. An internal analog filter removes glitches on the signals, such as

those caused by long PCB traces. If the signal source is far from the chip, and especially if the signals

are carried on cables, the signals should be filtered or differentially transmitted.

+VCC_IO

DIR

SchmittTrigger

t_SH

t_SL

t_DSH

t_DSU

STEP

or DIR

Input

83k

0.56 VCC_IO

0.44 VCC_IO

STEP

Internal

Signal

C

Input filter

R*C = 20ns +-30%

Figure 15.1 STEP and DIR timing, Input pin filter

STEP and DIR interface timing

Parameter

AC-Characteristics

clock period is t_CLK

Symbol Conditions

Min

Typ

Max

Unit

step frequency (at maximum

microstep resolution)

f_STEP

dedge=0

½ f_CLK

dedge=1

¼ f_CLK

fullstep frequency

STEP input low time *)

f_FS

t_SL

f_CLK/512

max(t_FILTSD

t_CLK+20)

max(t_FILTSD

t_CLK+20)

,

100

ns

STEP input high time *)

t_SH

DIR to STEP setup time

DIR after STEP hold time

STEP and DIR spike filtering time

*)

t_DSU

t_DSH

t_FILTSD

20

13

ns

rising and falling

edge

20

30

STEP and DIR sampling relative

to rising CLK input

t_SDCLKHI

before rising edge

of CLK input

t_FILTSD

ns

*) These values are valid with full input logic level swing, only. Asymmetric logic levels will increase

filtering delay t_FILTSD, due to an internal input RC filter.

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15.2 Changing Resolution

The TMC5160 includes an internal microstep table with 1024 sine wave entries to generate sinusoidal

motor coil currents. These 1024 entries correspond to one electrical revolution or four fullsteps. The

microstep resolution setting determines the step width taken within the table. Depending on the DIR

input, the microstep counter is increased (DIR=0) or decreased (DIR=1) with each STEP pulse by the

step width. The microstep resolution determines the increment respectively the decrement. At

maximum resolution, the sequencer advances one step for each step pulse. At half resolution, it

advances two steps. Increment is up to 256 steps for fullstepping. The sequencer has special

provision to allow seamless switching between different microstep rates at any time. When switching

to a lower microstep resolution, it calculates the nearest step within the target resolution and reads

the current vector at that position. This behavior especially is important for low resolutions like

fullstep and halfstep, because any failure in the step sequence would lead to asymmetrical run when

comparing a motor running clockwise and counterclockwise.

EXAMPLES:

Fullstep:

Cycles through table positions: 128, 384, 640 and 896 (45°, 135°, 225° and 315° electrical

position, both coils on at identical current). The coil current in each position

corresponds to the RMS-Value (0.71 * amplitude). Step size is 256 (90° electrical)

Half step:

The first table position is 64 (22.5° electrical), Step size is 128 (45° steps)

Quarter step: The first table position is 32 (90°/8=11.25° electrical), Step size is 64 (22.5° steps)

This way equidistant steps result and they are identical in both rotation directions. Some older drivers

also use zero current (table entry 0, 0°) as well as full current (90°) within the step tables. This kind of

stepping is avoided because it provides less torque and has a worse power dissipation in driver and

motor.

Step position

table position

64

current coil A

38.3%

current coil B

92.4%

Half step 0

Full step 0

Half step 1

Half step 2

Full step 1

Half step 3

Half step 4

Full step 2

Half step 5

Half step 6

Full step 3

Half step 7

128

192

320

384

448

576

640

704

832

896

960

70.7%

92.4%

70.7%

38.3%

-38.3%

-70.7%

-92.4%

-70.7%

-38.3%

70.7%

38.3%

-38.3%

-70.7%

-92.4%

-70.7%

-38.3%

38.3%

70.7%

92.4%

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15.3 microPlyer and Stand Still Detection

For each active edge on STEP, microPlyer produces microsteps at 256x resolution, as shown in Figure

15.2. It interpolates the time in between of two step impulses at the step input based on the last

step interval. This way, from 2 microsteps (128 microstep to 256 microstep interpolation) up to 256

microsteps (full step input to 256 microsteps) are driven for a single step pulse.

Enable microPlyer by setting the intpol bit in the CHOPCONF register.

GCONF.faststandstill allows reduction of standstill detection time to 2^18 clocks (~20ms)

The step rate for the interpolated 2 to 256 microsteps is determined by measuring the time interval of

the previous step period and dividing it into up to 256 equal parts. The maximum time between two

microsteps corresponds to 2²⁰(roughly one million system clock cycles), for an even distribution of

256 microsteps. At 12 MHz system clock frequency, this results in a minimum step input frequency of

12 Hz for microPlyer operation (50 Hz with faststandstill = 1). A lower step rate causes the STST bit to

be set, which indicates a standstill event. At that frequency, microsteps occur at a rate of (system

clock frequency)/2¹⁶~ 256 Hz. When a stand still is detected, the driver automatically switches the

motor to holding current IHOLD.

Hint

microPlyer only works perfectly with a stable STEP frequency. Do not use the dedge option if the STEP

signal does not have a 50% duty cycle.

STEP

Interpolated

0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66

microstep

Motor

angle

2^20 t_CLK

STANDSTILL

(stst) active

Figure 15.2 microPlyer microstep interpolation with rising STEP frequency (Example: 16 to 256)

In Figure 15.2, the first STEP cycle is long enough to set the standstill bit stst. This bit is cleared on

the next STEP active edge. Then, the external STEP frequency increases. After one cycle at the higher

rate microPlyer adapts the interpolated microstep rate to the higher frequency. During the last cycle at

the slower rate, microPlyer did not generate all 16 microsteps, so there is a small jump in motor

angle between the first and second cycles at the higher rate. With the flag GCONF.faststandstill

enabled, standstill detection is after 2^18 clocks (rather than 2^20 clocks) without step pulse. This

allows faster current reduction for energy saving in drives with short stand still times.

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16 DIAG Outputs

16.1 STEP/DIR Mode

Operation with an external motion controller often requires quick reaction to certain states of the

stepper motor driver. Therefore, the DIAG outputs supply a configurable set of different real time

information complementing the STEP/DIR interface.

Both, the information available at DIAG0 and DIAG1 can be selected as well as the type of output

(low active open drain – default setting, or high active push-pull). In order to determine a reset of the

driver, DIAG0 always shows a power-on reset condition by pulling low during a reset condition.

Figure 16.1 shows the available signals and control bits.

Power-on reset

Driver error

diag0_pushpull

diag0_error

PMD

DIAG0

Overtemp. prewarning

diag0_otpw

Stall

diag0_stall

PDD=100k pulldown

PMD=50k to VCC/2

diag1_stall

Sequencer microstep 0 index

diag1_pushpull

diag1_index

PDD

DIAG1

Chopper on-state

diag1_onstate

dcStep steps skipped

diag1_steps_skipped

Figure 16.1 DIAG outputs in STEP/DIR mode

The stall output signal allows stallGuard2 to be handled by the external motion controller like a stop

switch. The index output signals the microstep counter zero position, to allow the application to

reference the drive to a certain current pattern. Chopper on-state shows the on-state of both coil

choppers (alternating) when working in spreadCycle or constant off time in order to determine the

duty cycle. The dcStep skipped information is an alternative way to find out when dcStep runs with a

velocity below the step velocity. It toggles with each step not taken by the sequencer.

Attention

The duration of the index pulse corresponds to the duration of the microstep. When working without

interpolation at less than 256 microsteps, the index time goes down to two CLK clock cycles.

16.2 Motion Controller Mode

In motion controller mode, the DIAG outputs deliver a position compare signal to allow exact

triggering of external logic, and an interrupt signal in order to trigger software to certain conditions

within the motion ramp. Either an open drain (active low) output signal can be chosen (default), or an

active high push-pull output signal. When using the open drain output, an external pull up resistor in

the range 4.7kΩ to 33kΩ is required. DIAG0 also becomes driven low upon a reset condition. However

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the end of the reset condition cannot be determined by monitoring DIAG0 in this configuration,

because event_pos_reached flag also becomes active upon reset and thus the pin stays actively low

after the reset condition. In order to safely determine a reset condition, monitor the reset flag by SPI

or read out any register to confirm that the chip is powered up.

Power-on reset

diag0_pushpull

PMD

DIAG0

Toggle upon each step

event_pos_reached

event_stop_r

diag0_step

event_stop_sg

event_stop_l

deviation_warn

Interrupt-signal

N_event

PDD=100k pulldown

PMD=50k to VCC/2

diag1_pushpull

PDD

Direction

DIAG1

diag1_dir

Position compare

XACTUAL = X_COMPARE

Figure 16.2 DIAG outputs with SD_MODE=0

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17 dcStep

dcStep is an automatic commutation mode for the stepper motor. It allows the stepper to run with

its target velocity as commanded by the ramp generator as long as it can cope with the load. In case

the motor becomes overloaded, it slows down to a velocity, where the motor can still drive the load.

This way, the stepper motor never stalls and can drive heavy loads as fast as possible. Its higher

torque available at lower velocity, plus dynamic torque from its flywheel mass allow compensating

for mechanical torque peaks. In case the motor becomes completely blocked, the stall flag becomes

set.

17.1 User Benefits

Motor

–

never loses steps

Application

Acceleration

Energy efficiency

Cheaper motor

works as fast as possible

automatically as high as possible

highest at speed limit

does the job!

17.2 Designing-In dcStep

In a classical application, the operation area is limited by the maximum torque required at maximum

application velocity. A safety margin of up to 50% torque is required, in order to compensate for

unforeseen load peaks, torque loss due to resonance and aging of mechanical components. dcStep

allows using up to the full available motor torque. Even higher short time dynamic loads can be

overcome using motor and application flywheel mass without the danger of a motor stall. With

dcStep the nominal application load can be extended to a higher torque only limited by the safety

margin near the holding torque area (which is the highest torque the motor can provide).

Additionally, maximum application velocity can be increased up to the actually reachable motor

velocity.

torque

M_MAX

microstep

operation

dcStep operation - no step loss can occur

additional flywheel mass torque reserve

m

a

x

.

m

o

t

o

r

t

s

a

f

o

r

q

e

t

y

m

a

r

g

i

n

u

e

M_NOM2

dcStep extended

application area

M_NOM1

Classic operation area

with safety margin

0

velocity [RPM]

M_NOM: Nominal torque required by application

M_MAX: Motor pull-out torque at v=0

Safety margin: Classical application operation area is limited by a certain

percentage of motor pull-out torque

Figure 17.1 dcStep extended application operation area

Quick Start

For a quick start, see the Quick Configuration Guide in chapter 22.

For detail configuration procedure see Application Note AN003 - dcStep

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17.3 dcStep Integration with the Motion Controller

dcStep requires only a few settings. It directly feeds back motor motion to the ramp generator, so

that it becomes seamlessly integrated into the motion ramp, even if the motor becomes overloaded

with respect to the target velocity. dcStep operates the motor in fullstep mode at the ramp generator

target velocity VACTUAL or at reduced velocity if the motor becomes overloaded. It requires setting

the minimum operation velocity VDCMIN. VDCMIN shall be set to the lowest operating velocity where

dcStep gives a reliable detection of motor operation. The motor never stalls unless it becomes braked

to a velocity below VDCMIN. In case the velocity should fall below this value, the motor would restart

once its load is released, unless the stall detection becomes enabled (set sg_stop). Stall detection is

covered by stallGuard2.

v

dcStep active

VMAX

D

X

M

overload

A

M

A

X

A

V1

D

1

A

VDCMIN

0

t

Nominal ramp profile

Ramp profile with torque overload and same target position

Figure 17.2 Velocity profile with impact by overload situation

Hint

dcStep requires that the phase polarity of the sine wave is positive within the MSCNT range 768 to

255 and negative within 256 to 767. The cosine polarity must be positive from 0 to 511 and negative

from 512 to 1023. A phase shift by 1 would disturb dcStep operation. Therefore it is advised to work

with the default wave. Please refer chapter 18.2 for an initialization with the default table.

17.4 Stall Detection in dcStep Mode

While dcStep is able to decelerate the motor upon overload, it cannot avoid a stall in every operation

situation. Once the motor is blocked, or it becomes decelerated below a motor dependent minimum

velocity where the motor operation cannot safely be detected any more, the motor may stall and

loose steps. In order to safely detect a step loss and avoid restarting of the motor, the stop on stall

can be enabled (set flag sg_stop). In this case VACTUAL becomes set to zero once the motor is stalled.

It remains stopped until reading the RAMP_STAT status flags. The flag event_stop_sg shows the active

stop condition. A stallGuard2 load value also is available during dcStep operation. The range of values

is limited to 0 to 255, in certain situations up to 511 will be read out. In order to enable stallGuard,

also set TCOOLTHRS corresponding to a velocity slightly above VDCMIN or up to VMAX.

Stall detection in this mode may trigger falsely due to resonances, when flywheel loads are loosely

coupled to the motor axis.

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Parameter

vhighfs

&

Description

Range Comment

set to 1 for dcStep

These chopper configuration flags in CHOPCONF 0 / 1

need to be set for dcStep operation. As soon as

VDCMIN becomes exceeded, the chopper becomes

switched to fullstepping.

vhighchm

TOFF

dcStep often benefits from an increased off time 2… 15

value in CHOPCONF. Settings >2 should be

preferred.

Settings 8…15 do not make

any difference to setting 8

for dcStep operation.

VDCMIN

This is the lower threshold for dcStep operation 0… 2^22 0: Disable dcStep

when using internal ramp generator. Below this

threshold, the motor operates in normal microstep

mode. In dcStep operation, the motor operates at

minimum VDCMIN, even when it is completely

blocked. Tune together with DC_TIME setting.

Set to the lower velocity

limit for dcStep operation.

Activation of stealthChop also disables dcStep.

DC_TIME

This setting controls the reference pulse width for 0… 1023 Lower limit for the setting

dcStep load measurement. It must be optimized

for robust operation with maximum motor torque.

A higher value allows higher torque and higher

velocity, a lower value allows operation down to

a lower velocity as set by VDCMIN.

is: t_BLANK(as defined by

TBL) in clock cycles + n

with n in the range 1 to

100 (for a typical motor)

Check best setting under nominal operation

conditions, and re-check under extreme operating

conditions (e.g. lowest operation supply voltage,

highest motor temperature, and highest supply

voltage, lowest motor temperature).

DC_SG

This setting controls stall detection in dcStep 0… 255 Set slightly higher than

mode. Increase for higher sensitivity.

DC_TIME / 16

A stall can be used as an error condition by

issuing a hard stop for the motor. Enable sg_stop

flag for stopping the motor upon a stall event.

This way the motor will be stopped once it stalls.

17.5 Measuring Actual Motor Velocity in dcStep Operation

dcStep has the ability to reduce motor velocity in case the motor becomes slower than the target

velocity due to mechanical load. VACTUAL shows the ramp generator target velocity. It is not

influenced by dcStep. Measuring dcStep velocity is possible based on the position counter XACTUAL.

Therefore take two snapshots of the position counter with a known time difference:

ꢝ

ꢞ

ꢝ

ꢞ

ꢢꢎ퐶ꢘ푈ꢎꢒ ꢉ푖ꢍꢙꢀ − ꢢꢎ퐶ꢘ푈ꢎꢒ ꢉ푖ꢍꢙꢃ

ꢀ^2ꢣ

푉ꢎ퐶ꢘ푈ꢎꢒ_{ꢡꢋꢓ푇ꢔꢊ}

=

∗

ꢉ푖ꢍꢙꢀ − ꢉ푖ꢍꢙꢃ

푓

ꢋ퐿퐾

Example:

At 16.0 MHz clock frequency, a 0.954 second measurement delay would directly yield in the

velocity value, a 9.54 ms delay would yield in 1/100 of the actual dcStep velocity.

To grasp the time interval as precisely as possible, snapshot a timer each time the transmission of

XACTUAL from the IC starts or ends. The rising edge of NCS for SPI transmission provides the most

exact time reference.

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17.6 dcStep with STEP/DIR Interface

The TMC5160 provides two ways to use dcStep when interfaced to an external motion controller. The

first way gives direct control of the dcStep step execution to the external motion controller, which

must react to motor overload and is allowed to override a blocked motor situation. The second way

assumes that the external motion controller cannot directly react to dcStep signals. The TMC5160

automatically reduces the motor velocity or stops the motor upon overload. In order to allow the

motion controller to react to the reduced real motor velocity in this mode, the counter LOST_STEPS

gives the number of steps which have been commanded, but not taken by the motor controller. The

motion controller can later on read out LOST_STEPS and drive any missing number of steps. In case of

a blocked motor it tries moving it with the minimum velocity as programmed by VDCMIN.

Enabling dcStep automatically sets the chopper to constant TOFF mode with slow decay only. This

way, no re-configuration is required when switching from microstepping mode to dcStep and back.

dcStep operation is controlled by three pins in STEP and DIR mode:

- DCEN – Forces the driver to dcStep operation if high. A velocity based activation of dcStep is

controlled by TPWMTHRS when using stealthChop operation for low velocity settings.

In this case, dcStep is disabled while in stealthChop mode, i.e. at velocities below the

stealthChop switching velocity.

- DCO – Informs the motion controller when motor is not ready to take a new step (low level).

The motion controller shall react by delaying the next step until DCO becomes high.

The sequencer can buffer up to the effective number of microsteps per fullstep to allow

the motion controller to react to assertion of DCO. In case the motor is blocked this

wait situation can be terminated after a timeout by providing a long > 1024 clock STEP

input, or via the internal VDCMIN setting.

- DCIN – Commands the driver to wait with step execution and to disable DCO. This input can be

used for synchronization of multiple drivers operating with dcStep.

17.6.1 Using LOST_STEPS for dcStep Operation

This is the simplest possibility to integrate dcStep with an external motion controller: The external

motion controller enables dcStep using DCEN or the internal velocity threshold. The TMC5160 tries to

follow the steps. In case it needs to slow down the motor, it counts the difference between incoming

steps on the STEP signal and steps going to the motor. The motion controller can read out the

difference and compensate for the difference after the motion or on a cyclic basis. Figure 17.3 shows

the principle (simplified).

In case the motor driver needs to postpone steps due to detection of a mechanical overload in

dcStep, and the motion controller does not react to this by pausing the step generation, LOST_STEPS

becomes incremented or decremented (depending on the direction set by DIR) with each step which

is not taken. This way, the number of lost steps can be read out and executed later on or be

appended to the motion. As the driver needs to slow down the motor while the overload situation

persists, the application will benefit from a high microstepping resolution, because it allows more

seamless acceleration or deceleration in dcStep operation. In case the application is completely

blocked, VDCMIN sets a lower limit to the step execution. If the motor velocity falls below this limit,

however an unknown number of steps is lost and the motor position is not exactly known any more.

DCIN allows for step synchronization of two drivers: it stops the execution of steps if low and sets

DCO low.

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Light motor overload reduces

effective motor velocity

Actual motor velocity

VTARGET

VDCMIN

Steps from STEP input

skipped by the driver due

to light motor overload

0

Theoretical sine

wave

corresponding to

fullstep pattern

+IMAX

Phase

Current

(one phase

shown)

0

-IMAX

STEP

LOSTSTEPS would count down if

motion direction is negative

LOSTSTEPS

0

2

4

8

12

16

20

22

24

dcStep enabled continuosly

DC_EN

DC_OUT

DCO signals that the driver is not ready for new steps. In this case, the controller does not react to this information.

Figure 17.3 Motor moving slower than STEP input due to light overload. LOSTSTEPS incremented

17.6.2 DCO Interface to Motion Controller

In STEP/DIR mode, DCEN enables dcStep. It is up to the external motion controller to enable dcStep

either, once a minimum step velocity is exceeded within the motion ramp, or to use the automatic

threshold VDCMIN for dcStep enable.

The STEP/DIR interface works in microstep resolution, even if the internal step execution is based on

fullstep. This way, no switching to a different mode of operation is required within the motion

controller. The dcStep output DCO signals if the motor is ready for the next step based on the dcStep

measurement of the motor. If the motor has not yet mechanically taken the last step, this step cannot

be executed, and the driver stops automatically before execution of the next fullstep. This situation is

signaled by DCO. The external motion controller shall stop step generation if DCOUT is low and wait

until it becomes high again. Figure 17.5 shows this principle. The driver buffers steps during the

waiting period up to the number of microstep setting minus one. In case, DCOUT does not go high

within the lower step limit time e.g. due to a severe motor overload, a step can be enforced: override

the stop status by a long STEP pulse with min. 1024 system clocks length. When using internal clock,

a pulse length of minimum 125µs is recommended.

DIR

STEP

µC or Motion

TMC5160

Controller

DCEN

DCO

DCIN

Optional axis

synchronization

Figure 17.4 Full signal interconnection for dcStep

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Increasing mechanical load forces slower motion

Theoretical sine

wave

corresponding to

+IMAX

Phase

Current

(one phase

shown)

fullstep pattern

0

-IMAX

Long pulse = override motor block

situation

STEP

∆2

STEP_FILT_INTERN

DCEN

INTCOM

DCO

DC_OUT TIMEOUT

(in controller)

TIMOUT

counter in

controller

∆2 = MRES (number of microsteps per fullstep)

Figure 17.5 DCO Interface to motion controller – step generator stops when DCO is asserted

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18 Sine-Wave Look-up Table

The TMC5160 driver provides a programmable look-up table for storing the microstep current wave. As

a default, the table is pre-programmed with a sine wave, which is a good starting point for most

stepper motors. Reprogramming the table to a motor specific wave allows drastically improved

microstepping especially with low-cost motors.

18.1 User Benefits

Microstepping

Motor

Torque

–

extremely improved with low cost motors

runs smooth and quiet

reduced mechanical resonances yields improved torque

18.2 Microstep Table

In order to minimize required memory and the amount of data to be programmed, only a quarter of

the wave becomes stored. The internal microstep table maps the microstep wave from 0° to 90°. It

becomes symmetrically extended to 360°. When reading out the table the 10-bit microstep counter

MSCNT addresses the fully extended wave table. The table is stored in an incremental fashion, using

each one bit per entry. Therefore only 256 bits (ofs00 to ofs255) are required to store the quarter

wave. These bits are mapped to eight 32 bit registers. Each ofs bit controls the addition of an

inclination Wx or Wx+1 when advancing one step in the table. When Wx is 0, a 1 bit in the table at

the actual microstep position means “add one” when advancing to the next microstep. As the wave

can have a higher inclination than 1, the base inclinations Wx can be programmed to -1, 0, 1, or 2

using up to four flexible programmable segments within the quarter wave. This way even negative

inclination can be realized. The four inclination segments are controlled by the position registers X1

to X3. Inclination segment 0 goes from microstep position 0 to X1-1 and its base inclination is

controlled by W0, segment 1 goes from X1 to X2-1 with its base inclination controlled by W1, etc.

When modifying the wave, care must be taken to ensure a smooth and symmetrical zero transition

when the quarter wave becomes expanded to a full wave. The maximum resulting swing of the wave

should be adjusted to a range of -248 to 248, in order to give the best possible resolution while

leaving headroom for the hysteresis based chopper to add an offset.

y

256

248

START_SIN90

0

X1 X2 X3

255 256

START_SIN

512

768

0

MSCNT

LUT stores

entries 0 to 255

-248

Figure 18.1 LUT programming example

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When the microstep sequencer advances within the table, it calculates the actual current values for

the motor coils with each microstep and stores them to the registers CUR_A and CUR_B. However the

incremental coding requires an absolute initialization, especially when the microstep table becomes

modified. Therefore CUR_A and CUR_B become initialized whenever MSCNT passes zero.

Two registers control the starting values of the tables:

-

As the starting value at zero is not necessarily 0 (it might be 1 or 2), it can be programmed

into the starting point register START_SIN.

-

In the same way, the start of the second wave for the second motor coil needs to be stored

in START_SIN90. This register stores the resulting table entry for a phase shift of 90° for a 2-

phase motor.

Hint

Refer chapter 6.5 for the register set and for the default table function stored in the drivers. The

default table is a good base for realizing an own table.

The TMC5160-EVAL comes with a calculation tool for own waves.

Initialization example for the default microstep table:

MSLUT[0]= %10101010101010101011010101010100 = 0xAAAAB554

MSLUT[1]= %01001010100101010101010010101010 = 0x4A9554AA

MSLUT[2]= %00100100010010010010100100101001 = 0x24492929

MSLUT[3]= %00010000000100000100001000100010 = 0x10104222

MSLUT[4]= %11111011111111111111111111111111 = 0xFBFFFFFF

MSLUT[5]= %10110101101110110111011101111101 = 0xB5BB777D

MSLUT[6]= %01001001001010010101010101010110 = 0x49295556

MSLUT[7]= %00000000010000000100001000100010 = 0x00404222

MSLUTSEL= 0xFFFF8056:

X1=128, X2=255, X3=255

W3=%01, W2=%01, W1=%01, W0=%10

MSLUTSTART= 0x00F70000:

START_SIN_0= 0, START_SIN90= 247

19 Emergency Stop

The driver provides a negative active enable pin ENN to safely switch off all power MOSFETs. This

allows putting the motor into freewheeling. Further, it is a safe hardware function whenever an

emergency-stop not coupled to software is required. Some applications may require the driver to be

put into a state with active holding current or with a passive braking mode. This is possible by

programming the pin ENCA_DCIN to act as a step disable function. Set GCONF flag stop_enable to

activate this option. Whenever ENCA_DCIN becomes pulled up, the motor will stop abruptly and go to

the power down state, as configured via IHOLD, IHOLDDELAY and stealthChop standstill options.

Disabling the driver via ENN will require three clock cycles to safely switch off the driver.

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20 ABN Incremental Encoder Interface

The TMC5160 is equipped with an incremental encoder interface for ABN encoders. The encoder inputs

are multiplexed with other signals in order to keep the pin count of the device low. The basic

selection of the peripheral configuration is set by the register GCONF. The use of the N channel is

optional, as some applications might use a reference switch or stall detection rather than an encoder

N channel for position referencing. The encoders give positions via digital incremental quadrature

signals (usually named A and B) and a clear signal (usually named N for null or Z for zero).

N SIGNAL

The N signal can be used to clear the position counter or to take a snapshot. To continuously monitor

the N channel and trigger clearing of the encoder position or latching of the position, where the N

channel event has been detected, set the flag clr_cont. Alternatively it is possible to react to the next

encoder N channel event only, and automatically disable the clearing or latching of the encoder

position after the first N signal event (flag clr_once). This might be desired because the encoder gives

this signal once for each revolution.

Some encoders require a validation of the N signal by a certain configuration of A and B polarity. This

can be controlled by pol_A and pol_B flags in the ENCMODE register. For example, when both pol_A

and pol_B are set, an active N-event is only accepted during a high polarity of both, A and B channel.

For clearing the encoder position ENC_POS with the next active N event set clr_enc_x = 1 and

clr_once = 1 or clr_cont = 1.

-4 -3 -2 -1

0

1

2

3

4

5

6

7

Position

A

B

N

t

Figure 20.1 Outline of ABN signals of an incremental encoder

THE ENCODER CONSTANT ENC_CONST

The encoder constant ENC_CONST is added to or subtracted from the encoder counter on each polarity

change of the quadrature signals AB of the incremental encoder. The encoder constant ENC_CONST

represents a signed fixed point number (16.16) to facilitate the generic adaption between motors and

encoders. In decimal mode, the lower 16 bits represent a number between 0 and 9999. For stepper

motors equipped with incremental encoders the fixed number representation allows very comfortable

parameterization. Additionally, mechanical gearing can easily be taken into account. Negating the sign

of ENC_CONST allows inversion of the counting direction to match motor and encoder direction.

Examples:

-

Encoder factor of 1.0: ENC_CONST = 0x0001.0x0000 = FACTOR.FRACTION

Encoder factor of -1.0: ENC_CONST = 0xFFFF.0x0000. This is the two’s complement of 0x00010000.

It equals (2^16-(FACTOR+1)).(2^16-FRACTION)

-

Decimal mode encoder factor 25.6: 00025.6000 = 0x0019.0x1770 = FACTOR.DECIMALS

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-

Decimal mode encoder factor -25.6: 0xFFE6.4000 = 0xFFE6.0x0FAO. This equals (2^16-

(FACTOR+1)).(10000-DECIMALS)

THE ENCODER COUNTER X_ENC

The encoder counter X_ENC holds the current encoder position ready for read out. Different modes

concerning handling of the signals A, B, and N take into account active low and active high signals

found with different types of encoders. For more details please refer to the register mapping in

section 6.4.

THE REGISTER ENC_STATUS

The register ENC_STATUS holds the status concerning the event of an encoder clear upon an N

channel signals. The register ENC_LATCH stores the actual encoder position on an N signal event.

20.1 Encoder Timing

The encoder inputs use analog and digital filtering to ensure reliable operation even with increased

cable length. The maximum continuous counting rate is limited by input filtering to 2/3 of f_CLK.

Encoder interface timing

AC-Characteristics

clock period is t_CLK

Parameter

Symbol Conditions

Min

Typ

Max

Unit

Encoder counting frequency

A/B/N input low time

A/B/N input high time

A/B/N spike filtering time

f_CNT

<2/3 f_CLK

f_CLK

3 t_CLK+20

t_ABNL

t_ABNH

t_FILTABN

ns

Rising and falling

edge

3 t_CLK

20.2 Setting the Encoder to Match Motor Resolution

Encoder example settings for motor parameters: USC=256 µsteps, 200 fullstep motor

Factor = FSC*USC / encoder resolution

ENCODER EXAMPLE SETTINGS FOR A 200 FULLSTEP MOTOR WITH 256 MICROSTEPS

Encoder resolution

Required encoder factor

256

Comment

200

360

142.2222

No exact match possible!

= 9320675.5555 / 2^16

= 1422222.2222 / 10000

102.4

= 6710886.4 / 2^16

= 1024000 / 10000

51.2

500

Exact match with decimal setting

1000

1024

4000

4096

50

12.8

12.5

3.125

Exact match with decimal setting

16384

Example:

The encoder constant register shall be programmed to 51.2 in decimal mode. Therefore, set

퐸ꢛ퐶_퐶ꢑꢛ푆ꢘ = 5ꢃ ∗ ꢀ^1ꢤ+ ꢄ.ꢀ ∗ ꢃꢄꢄꢄꢄ

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20.3 Closing the Loop

Depending on the application, an encoder can be used for different purposes. Medical applications

often require an additional and independent monitoring to detect hard or soft failure. Upon failure,

the machine can be stopped and restarted manually. Use ENC_DEVIATION setting and interrupt to

safely detect a step loss failure / mismatch between motor and encoder.

Less critical applications may use the encoder to detect failure, stop the motors upon step loss and

restart automatically. A different use of the encoder allows increased positioning precision by

positioning directly to encoder positions. The application can modify target positions based on the

deviation, or even regularly update the actual position with the encoder position.

To realize a directly encoder based commutation, TRINAMIC offers the new S-ramp closed loop motion

controller TMC4361.

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21 DC Motor or Solenoid

The TMC5160 can drive one or two DC motors using one coil output per DC motor. Either a torque

limited operation, or a voltage based velocity control with optional torque limit is possible.

CONFIGURATION AND CONTROL

Set the flag direct_mode in the GCONF register. In direct mode, the coil current polarity and coil

current, respectively the PWM duty cycle become controlled by register XTARGET (0x2D). Bits 8..0

control motor A and Bits 24..16 control motor B PWM. Additionally to this setting, the current limit is

scaled by IHOLD. The STEP/DIR inputs and the motion controller are not used in this mode.

PWM DUTY CYCLE VELOCITY CONTROL

In order to operate the motor at different velocities, use the stealthChop voltage PWM mode in the

following configuration:

en_pwm_mode = 1, pwm_autoscale = 0, PWM_AMPL = 255, PWM_GRAD = 4, IHOLD = 31

Set TOFF > 0 to enable the driver.

In this mode the driver behaves like a 4-quadrant power supply. The direct mode setting of PWM A

and PWM B using XTARGET controls motor voltage, and thus the motor velocity. Setting the

corresponding PWM bits between -255 and +255 (signed, two’s complement numbers) will vary motor

voltage from -100% to 100%. With pwm_autoscale = 0, current sensing is not used and the sense

resistors should be eliminated or 150mΩ or less to avoid excessive voltage drop when the motor

becomes heavily loaded up to 2.5A. Especially for higher current motors, make sure to slowly

accelerate and decelerate the motor in order to avoid overcurrent or triggering driver overcurrent

detection.

To activate optional motor freewheeling, set IHOLD = 0 and FREEWHEEL = %01.

ADDITIONAL TORQUE LIMIT

In order to additionally take advantage of the motor current limitation (and thus torque controlled

operation) in stealthChop mode, use automatic current scaling (pwm_autoscale = 1). The actual current

limit is given by IHOLD and scaled by the respective motor PWM amplitude, e.g. PWM = 128 yields in

50% motor velocity and 50% of the current limit set by IHOLD. In case two DC motors are driven in

voltage PWM mode, note that the automatic current regulation will work only for the motor which

has the higher absolute PWM setting. The PWM of the second motor also will be scaled down in case

the motor with higher PWM setting reaches its current limitation.

PURELY TORQUE LIMITED OPERATION

For a purely torque limited operation of one or two motors, spread cycle chopper individually

regulates motor current for both full bridge motor outputs. When using spreadCycle, the upper motor

velocity is limited by the supply voltage only (or as determined by the load on the motor).

21.1 Solenoid Operation

The same way, one or two solenoids (i.e. magnetic coil actuators) can be operated using spreadCycle

chopper. For solenoids, it is often desired to have an increased current for a short time after

switching on, and reduce the current once the magnetic element has switched. This is automatically

possible by taking advantage of the automatic current scaling (IRUN, IHOLD, IHOLDDELAY and

TPOWERDOWN). The current scaling in direct_mode is still active, but will not be triggered if no step

impulse is supplied. Therefore, a step impulse must be given to the STEP input whenever one of the

coils shall be switched on. This will increase the current for both coils at the same time.

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22 Quick Configuration Guide

This guide is meant as a practical tool to come to a first configuration and do a minimum set of

measurements and decisions for tuning the driver. It does not cover all advanced functionalities, but

concentrates on the basic function set to make a motor run smoothly. Once the motor runs, you may

decide to explore additional features, e.g. freewheeling and further functionality in more detail. A

current probe on one motor coil is a good aid to find the best settings, but it is not a must.

CURRENT SETTING AND FIRST STEPS WITH STEALTHCHOP

stealthChop

Current Setting

Configuration

Check hardware

GCONF

setup and motor

set en_pwm_mode

RMS current

Set GLOBALSCALER as

PWMCONF

required to reach

set pwm_autoscale,

maximum motor current

set pwm_autograd

at I_RUN=31

PWMCONF

Set I_RUN as desired up

to 31, I_HOLD 70% of

I_RUN or lower

Set I_HOLD_DELAY to 1

to 15 for smooth

standstill current decay

select PWM_FREQ with

regard to fCLK for 20-

40kHz PWM frequency

CHOPCONF

Set TPOWERDOWN up

to 255 for delayed

standstill current

reduction

Enable chopper using basic

config., e.g.: TOFF=5, TBL=2,

HSTART=4, HEND=0

Execute

automatic

tuning

Configure Chopper to

test current settings

procedure AT

Move the motor by

slowly accelerating

from 0 to VMAX

operation velocity

Select a velocity

threshold for switching

to spreadCycle chopper

and set TPWMTHRS

Is performance

good up to VMAX?

N

Y

SC2

Figure 22.1 Current setting and first steps with stealthChop

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TUNING STEALTHCHOP AND SPREADCYCLE

spreadCycle

Configuration

SC2

Try motion above

TPWMTRHRS, if

used

GCONF

en_pwm_mode=0

CHOPCONF

Coil current

overshoot upon

deceleration?

PWMCONF

decrease PWM_LIM (do

not go below about 5)

Enable chopper using basic

config.: TOFF=5, TBL=2,

HSTART=0, HEND=0

Y

N

Move the motor by

slowly accelerating

from 0 to VMAX

Go to motor stand

still and check

motor current at

IHOLD=IRUN

operation velocity

Monitor sine wave motor

coil currents with current

probe at low velocity

CHOPCONF, PWMCONF

decrease TBL or PWM

frequency and check

Stand still current

too high?

Y

impact on motor motion

N

Current zero

crossing smooth?

CHOPCONF

increase HEND (max. 15)

N

Optimize spreadCycle

configuration if TPWMTHRS

used

Y

Move motor very slowly or

try at stand still

CHOPCONF

Audible Chopper

noise?

decrease TOFF (min. 2),

try lower / higher TBL or

reduce motor current

Y

N

Move motor at medium

velocity or up to max.

velocity

CHOPCONF

decrease HEND and

increase HSTART (max.

7)

Audible Chopper

noise?

Y

Finished or enable

coolStep

Figure 22.2 Tuning stealthChop and spreadCycle

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MOVING THE MOTOR USING THE MOTION CONTROLLER

Configure Ramp

Parameters

Move Motor

Move to Target

Start Velocity

RAMPMODE

set velocity_positive

RAMPMODE

set position

Set VSTART=0. Higher

velcoity for abrupt start

(limited by motor).

Stop Velocity

Set AMAX=1000, set

VMAX=100000 or

different values

Configure ramp

parameters

Set VSTOP=10, but not

below VSTART. Higher

velocity for abrupt stop.

Set TZEROWAIT to allow

Motor moves, change

VMAX as desired

Is VSTOP relevant

(>>10)?

motor to recover from

jump VSTOP to 0, before

going to VSTART

Set XTARGET

Y

N

New on-the-fly

target?

Set TPOWERDOWN time

not smaller than TZERO-

WAIT time. Min. value is

TZEROWAIT/512

Set acceleration A1 as

desired by application

N

Determine velocity,

where max. motor

torque or current sinks

appreciably, write to V1

Set motion

parameter as

desired

Change of any

parameter desired?

N

Y

N

Set desired maximum

velocity to VMAX

Event_POS_

reached active?

AMAX: Set lower

acceleration than A1 to

allow motor to

Y

accelerate up to VMAX

Target is reached

DMAX: Use same value

as AMAX or higher

D1: Use same value as

A1 or higher

Ready to Move to

Target

Figure 22.3 Moving the motor using the motion controller

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ENABLING COOLSTEP (ONLY IN COMBINATION WITH SPREADCYCLE)

Enable coolStep

C2

Move the motor by

slowly accelerating

from 0 to VMAX

Monitor CS_ACTUAL and

motor torque during rapid

mechanical load increment

within application limits

operation velocity

Is coil current sine-

shaped at VMAX?

Does CS_ACTUAL reach

IRUN with load before

motor stall?

N

Decrease VMAX

N

Increase SEUP

Y

Set THIGH

To match TSTEP at

VMAX for upper

Finished

coolStep velocity limit

Monitor SG_RESULT value

during medium velocity and

check response with

mechanical load

Does SG_RESULT go down

Y

Increase SGT

to 0 with load?

N

Set TCOOLTHRS

slightly above TSTEP at

the selected velocity for

lower velocity limit

COOLCONF

Enable coolStep basic config.:

SEMIN=1, all other 0

Monitor CS_ACTUAL during

motion in velocity range

and check response with

mechanical load

Does CS_ACTUAL reach

IRUN with load before

motor stall?

Increase SEMIN or

choose narrower

velocity limits

N

C2

Figure 22.4 Enabling coolStep (only in combination with spreadCycle)

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SETTING UP DCSTEP

114

Configure dcStep Stall

Detection

Enable dcStep

CHOPCONF

DCCTRL

Set DC_SG to 1 + 1/16

the value of DC_TIME

Make sure, that TOFF is not less

than 3. Use lowest good TBL.

Set vhighfs and vhighchm

Set VDCMIN

to about 5% to 20% of

the desired operation

velocity

Set TCOOLTHRS

to match TSTEP at a velocity

slightly above VDCMIN for lower

stallGuard velocity limit

DCCTRL

Set DC_TIME depending on TBL:

%00: 17; %01: 25

SW_MODE

Enable sg_stop to stop

the motor upon stall

detection

%10: 37; %11: 55

Start the motor at the

targeted velocity VMAX and

try to apply load

Read out RAMP_STAT to

clear event_stop_sg and

restart the motor

Does the motor reach

VMAX and have good

N

Increase DC_TIME

Accelerate the motor from

torque?

0 to VMAX

Y

Decrease

Does the motor stop during

acceleration?

TCOOLTHRS to raise

the lower velocity

for stallGuard

Restart the motor and try to

slow it down to VDCMIN by

applying load

Y

N

Decrease DC_TIME

or increase TOFF

or increase VDCMIN

Slow down the motor to

VDCMIN by applying load.

Further increase load to

stall the motor.

Does the motor reach

VDCMIN without step loss?

N

Y

Finished or configure

dcStep stall detection

Does the motor stop upon

the first stall?

N

Increase DC_SG

Y

Finished

Figure 22.5 Setting up dcStep

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23 Getting Started

Please refer to the TMC5160 evaluation board to allow a quick start with the device, and in order to

allow interactive tuning of the device setup in your application. Chapter 22 will guide you through the

process of correctly setting up all registers.

23.1 Initialization Examples

SPI datagram example sequence to enable the driver for step and direction operation and initialize

the chopper for spreadCycle operation and for stealthChop at <30 RPM @ 12MHz clock:

SPI send: 0xEC000100C3; // CHOPCONF: TOFF=3, HSTRT=4, HEND=1, TBL=2, CHM=0 (spreadCycle)

SPI send: 0x9000061F0A; // IHOLD_IRUN: IHOLD=10, IRUN=31 (max. current), IHOLDDELAY=6

SPI send: 0x910000000A; // TPOWERDOWN=10: Delay before power down in stand still

SPI send: 0x8000000004; // EN_PWM_MODE=1 enables stealthChop (with default PWM_CONF)

SPI send: 0x93000001F4; // TPWM_THRS=500 yields a switching velocity about 35000 = ca. 30RPM

SPI sample sequence to enable and initialize the motion controller and move one rotation (51200

microsteps) using the ramp generator. A read access querying the actual position is also shown.

SPI send: 0xA4000003E8; // A1

SPI send: 0xA50000C350; // V1

SPI send: 0xA6000001F4; // AMAX

SPI send: 0xA700030D40; // VMAX

SPI send: 0xA8000002BC; // DMAX

SPI send: 0xAA00000578; // D1

= 1 000 First acceleration

= 50 000 Acceleration threshold velocity V1

= 500 Acceleration above V1

= 200 000

= 700 Deceleration above V1

= 1400 Deceleration below V1

SPI send: 0xAB0000000A; // VSTOP = 10 Stop velocity (Near to zero)

SPI send: 0xA000000000; // RAMPMODE = 0 (Target position move)

// Ready to move!

SPI send: 0xADFFFF3800; // XTARGET = -51200 (Move one rotation left (200*256 microsteps)

// Now motor 1 starts rotating

SPI send: 0x2100000000; // Query XACTUAL – The next read access delivers XACTUAL

SPI read;

// Read XACTUAL

For UART based operation it is important to make sure that the CRC byte is correct. The following

example shows initialization for the driver with slave address 1 (NAI pin high). It programs the driver

to spreadCycle mode and programs the motion controller for a constant velocity move and then read

accesses the position and actual velocity registers:

UART write: 0x05 0x01 0xEC 0x00 0x01 0x00 0xC5 0xD3; // TOFF=5, HEND=1, HSTR=4,

// TBL=2, MRES=0, CHM=0

UART write: 0x05 0x01 0x90 0x00 0x01 0x14 0x05 0xD8; // IHOLD=5, IRUN=20, IHOLDDELAY=1

UART write: 0x05 0x01 0xA6 0x00 0x00 0x13 0x88 0xB4; // AMAX=5000

UART write: 0x05 0x01 0xA7 0x00 0x00 0x4E 0x20 0x85; // VMAX=20000

UART write: 0x05 0x01 0xA0 0x00 0x00 0x00 0x01 0xA3; // RAMPMODE=1 (positive velocity)

// Now motor should start rotating

UART write: 0x05 0x01 0x21 0x6B;

UART read 8 bytes;

// Query XACTUAL

UART write: 0x05 0x01 0x22 0x25;

UART read 8 bytes;

// Query VACTUAL

Hint

Tune the configuration parameters for your motor and application for optimum performance.

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24 Standalone Operation

For standalone operation, no SPI interface is required to configure the TMC5160. All pins with suffix

CFG0 to CFG6 have a special meaning in this mode and can bei tied either to VCC_IO or to GND.

+V_M

Optional use lower

voltage down to 12V

22n

100V

100n

16V

100n

C_E

+V_M

VSA

12VOUT

5VOUT

CB2

C_B

HB2

CB1

470n

charge pump

HS

11.5V Voltage

regulator

Step&Dir input

with microPlyer

100n

2.2µ

5V Voltage

regulator

HB1

BMB1

R_G

2R2

VCC

BMB2

LB1

470n

TMC5160

LS

R_G

CFG0

CFG1

CFG2

CFG3

CFG4

CFG5

CFG6

Microstep Resolution

8 / 16 / 32 / 64

LB2

SRBH

47R

Configuration

interface

(GND or VCC_IO

level)

Run Current Setting

16 / 18 / 20 / 22 /

24 / 26 / 28 / 31

R_S

N

stepper

motor

SRBL

S

Controller

Chopper

+V_M

C_B

CA2

spreadCycle (GND) /

stealthChop (VCC_IO)

Current Reduction

Enable (VCC_IO)

B.Dwersteg, ©

TRINAMIC 2014

HA2

CA1

B.Dwersteg, ©

TRINAMIC 2014

470n

HS

C_B

R_G

DIAG1

DIAG0

HA1

BMA1

Index pulse

Driver error

R_G

Status out

(open drain)

opt. ext. clock

12-16MHz

BMA2

LA1

CLK_IN

LS

Keep inductivity of the fat

interconnections as small

as possible to avoid

R_G

+V_IO

3.3V or 5V

I/O voltage

VCC_IO

LA2

undershoot of BM <-5V!

SRAH

100n

47R

Use low inductivity SMD

type, e.g. 1210 or 2512

mode selection

R_S

SRAL

resistor for R_S

!

pd

Bootstrap capacitors C_B

:

220nF for MOSFETs with Q_G<20nC, 470nF for larger Q_G

Slope control resistors R_G: Adapt to MOSFET to yield slopes of roughly

100ns. Slope must be slower than bulk diode recovery time.

+V_IO

Standalone mode

opt. driver enable

Figure 24.1 Standalone operation with TMC5160 (pins shown with their standalone mode names)

To activate standalone mode, tie pin SPI_MODE to GND and pin SD_MODE high. In this mode, the

driver acts as a pure STEP and DIR driver. SPI and single wire are off. The driver works in spreadCycle

mode or stealthChop mode. With regard to the register set, the following settings are activated:

GCONF settings:

GCONF.diag0_error = 1: DIAG0 works in open drain mode and signals driver error.

GCONF.diag1_index = 1: DIAG1 works in open drain mode and signals microstep table index position.

The following settings are affected by the CFG pins in order to ensure correct configuration:

CFG0/CFG1: CONFIGURATION OF MICROSTEP RESOLUTION FOR STEP INPUT

CFG1

GND

CFG0

GND

Microstep Setting

8 microsteps, MRES=5

VCC_IO 16 microsteps, MRES=4

32 microsteps, MRES=3

VCC_IO GND

VCC_IO VCC_IO 64 microsteps, MRES=2

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CFG4/CFG3/CFG2: CONFIGURATION OF RUN CURRENT

CFG4

GND

CFG3

GND

CFG2

GND

IRUN Setting

IRUN=16

VCC_IO IRUN=18

IRUN=20

VCC_IO VCC_IO IRUN=22

VCC_IO GND

VCC_IO VCC_IO GND

GND

VCC_IO IRUN=26

IRUN=28

IRUN=24

VCC_IO VCC_IO VCC_IO IRUN=31

CFG5: SELECTION OF CHOPPER MODE

CFG5

GND

VCC_IO

Chopper Setting

spreadCycle operation. (TOFF=3)

stealthChop operation. (GCONF.en_PWM_mode=1)

CFG6: CONFIGURATION OF HOLD CURRENT REDUCTION

CFG6*)

GND

VCC_IO

Chopper Setting

No hold current reduction. IHOLD=IRUN

Reduction to 50%. IHOLD=1/2 IRUN

Hint

Be sure to allow the motor to rest for at least 100ms (assuming a minimum of 10MHz f_CLK) before

starting a motion using stealthChop. This will allow the current regulation to set the initial motor

current.

*) CFG6: Attention

CFG6 pin draws significant current (20mA) when driven to a different level than CFG5, because the

output driver tries to make CFG6 level equal to CFG5. Therefore, a 0 Ohm resistor is required to pull

up/down CFG6. Due to this, setting CFG6 different from CFG5 is only recommended with external

VCC_IO supply at 3.3V level.

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25 External Reset

The chip is loaded with default values during power on via its internal power-on reset. In order to

reset the chip to power on defaults, any of the supply voltages monitored by internal reset circuitry

(VSA, +5VOUT or VCC_IO) must be cycled. VCC is not monitored. Therefore VCC must not be switched

off during operation of the chip. As +5VOUT is the output of the internal voltage regulator, it cannot

be cycled via an external source except by cycling VSA. It is easiest and safest to cycle VCC_IO in order

to completely reset the chip. Also, current consumed from VCC_IO is low and therefore it has simple

driving requirements. Due to the input protection diodes not allowing the digital inputs to rise above

VCC_IO level, all inputs must be driven low during this reset operation. When this is not possible, an

input protection resistor may be used to limit current flowing into the related inputs.

In case, VCC becomes supplied by an external source, make sure that VCC is at a stable value above

the lower operation limit once the reset ends. This normally is satisfied when generating a 3.3V

VCC_IO from the +5V supply supplying the VCC pin, because it will then come up with a certain delay.

26 Clock Oscillator and Input

The clock is the timing reference for all functions: the chopper, the velocity, the acceleration control,

etc. Many parameters are scaled with the clock frequency, thus a precise reference allows a more

deterministic result. The factory-trimmed on-chip clock oscillator provides timing in case no external

clock is easily available.

26.1 Using the Internal Clock

Directly tie the CLK input to GND near to the IC if the internal clock oscillator is to be used. It will be

sufficient for applications, where a velocity precision of roughly +-4% is tolerable.

26.2 Using an External Clock

When an external clock is available, a frequency of 10 MHz to 16 MHz is recommended for optimum

performance. The duty cycle of the clock signal is uncritical, as long as minimum high or low input

time for the pin is satisfied (refer to electrical characteristics). Up to 18 MHz can be used, when the

clock duty cycle is 50%. Make sure, that the clock source supplies clean CMOS output logic levels and

steep slopes when using a high clock frequency. The external clock input is enabled with the second

positive polarity seen on the CLK input.

Hint

Switching off the external clock frequency prevents the driver from operating normally. Therefore an

internal watchdog switches back to internal clock in case the external signal is missing for more than

roughly 32 internal clock cycles.

26.2.1 Considerations on the Frequency

A higher frequency allows faster step rates, faster SPI operation and higher chopper frequencies. On

the other hand, it causes more power dissipation in the TMC5160 digital core and 5V voltage

regulator. Generally a frequency of 10 MHz to 12 MHz should be sufficient for most applications. At

higher clock frequency, the VSA supply voltage should be connected to a lower voltage for

applications working at more than 24V nominal supply voltage. For reduced requirements concerning

the motor dynamics, a clock frequency of down to 8 MHz (or even lower) can be considered.

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27 Absolute Maximum Ratings

The maximum ratings may not be exceeded under any circumstances. Operating the circuit at or near

more than one maximum rating at a time for extended periods shall be avoided by application

design.

Parameter

Symbol

Min

Max

Unit

Supply voltage operating with inductive load

Supply and bridge voltage short time peak (limited by

peak voltage on charge pump output and Cxx pins*)

VSA when different from VS

Peak voltages on Cxx bootstrap pins and VCP

Supply voltage V12

Peak voltages on BM pins (due to stray inductivity)

Peak voltages on Cxx bootstrap pins relative to BM

I/O supply voltage on VCC_IO

digital VCC supply voltage (normally supplied by 5VOUT)

Logic input voltage

V_VS, V_VSA

-0.5

60

64

V

V_VSMAX

V_VSAMAX

V_CxCP

V_12VOUT

V_BMx

V_CxBMx

V_VIO

V_VCC

V_I

I_IO

-0.5

60

76

14

V_VS+6

16

5.5

V_VIO+0.5

+/-500

V

mA

-0.5

-6

-0.5

Maximum current to / from digital pins

and analog low voltage I/Os (short time peak current)

5V regulator output current (internal plus external load)

I_5VOUT

30

1

mA

W

5V regulator continuous power dissipation (V_VSA-5V) * I_5VOUTP_5VOUT

12V regulator output current (internal plus external load)

12V regulator cont. power dissipation (V_VM-12V) * I_12VOUT

Junction temperature

Storage temperature

ESD-Protection for interface pins (Human body model,

HBM)

I_12VOUT

P_12VOUT

T_J

T_STG

V_ESDAP

20

0.5

150

4

mA

W

°C

kV

-50

-55

ESD-Protection for handling (Human body model, HBM)

V_ESD

1

kV

*) Stray inductivity of power routing will lead to ringing of the supply voltage when driving an

inductive load. This ringing results from the fast switching slopes of the driver outputs in

combination with reverse recovery of the body diodes of the output driver MOSFETs. Even small trace

inductivities as well as stray inductivity of sense resistors can easily generate a few volts of ringing

leading to temporary voltage overshoot. This should be considered when working near the maximum

voltage.

28 Electrical Characteristics

28.1 Operational Range

Parameter

Junction temperature

Supply voltage for motor and bridge

Supply voltage VSA

Symbol

T_J

V_VS

Min

Max

125

55

50

13

Unit

°C

V

-40

10

V_VSA

Supply voltage for VSA and 12OUT (internal gate voltage V_12VOUT

,

regulator bridged)

V_VSA

Lower Supply voltage (reduced spec, short to GND

protection not functional), lower limit depending on V_VS

MOSFETs gate threshold voltage and load current

I/O supply voltage on VCC_IO

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8

V

V_VIO

3.00

5.25

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28.2 DC and Timing Characteristics

DC characteristics contain the spread of values guaranteed within the specified supply voltage range

unless otherwise specified. Typical values represent the average value of all parts measured at +25°C.

Temperature variation also causes stray to some values. A device with typical values will not leave

Min/Max range within the full temperature range.

Power supply current

DC-Characteristics

V_VS= V_VSA= 24.0V

Parameter

Total supply current, driver

disabled I_VS+ I_VSA

Symbol Conditions

Min

Typ

18

Max Unit

24 mA

I_S

f_CLK=12MHz / internal

clock

VSA supply current (VS and VSA I_VSA

separated)

f_CLK=12MHz / internal

clock, driver disabled

f_CLK=12MHz, 23.4kHz

chopper, no load

f_CLK=12MHz

15

25

mA

µA

Total supply current, operating,

MOSFETs AOD4126, I_VS+ I_VSA

Internal current consumption

from 5V supply on VCC pin

Internal current consumption

from 5V supply on VCC pin

IO supply current on VCC_IO

(typ. at 5V)

I_S

I_VCC

I_VIO

10

f_CLK=16MHz

12.5

15

no load on outputs,

inputs at V_IOor GND

Excludes pullup /

30

pull-down resistors

Motor driver section

Parameter

DC- and Timing-Characteristics

V_VS= 24.0V; Tj=50°C

Symbol Conditions

Min

Typ

Max Unit

RDS_ONlowside off driver

RDS_ONhighside off driver

Gate drive current low side

MOSFET turning on at 2V V_GS

R_ONL

R_ONH

Gate off

1.8

2.2

3

3.5

Ω

I_SLPON0

I_SLPON2

I_SLPON3

I_SLPON0

I_SLPON2

I_SLPON3

DRVSTRENGTH=0

DRVSTRENGTH=2

DRVSTRENGTH=3

DRVSTRENGTH=0

DRVSTRENGTH=2

DRVSTRENGTH=3

BBMCLKS=0

200

400

600

150

300

450

100

mA

ns

Gate drive current high side

MOSFET turning on at 2V V_GS

BBM time via internal delay (start t_BBM0

of gate switching off to start of

75

BBMTIME=0

gate switching on)

t_BBM16

BBMTIME=16

BBMTIME=24

200

375

ns

500

Charge pump

DC-Characteristics

Parameter

Symbol Conditions

Min

Typ

Max Unit

Charge pump output voltage

V_VCP-V_VS

f_CP

operating

V_12VOUT- V_12VOUT

-

V

2

1

Charge pump voltage threshold

for undervoltage detection

Charge pump frequency

rising, using internal

5V regulator voltage

4.5

5

6.5

V

1/16

f_CLKOSC

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Linear regulator

DC-Characteristics

V_VS= V_VSA= 24.0V

Parameter

Symbol Conditions

Min

Typ

5.0

Max Unit

Output voltage

V_5VOUT

T_J= 25°C

4.80

5.20

V

Deviation of output voltage over V_5VOUT(DEV)drivers disabled

the full temperature range

+/-30

+/-100

mV

T_J= full range

Deviation of output voltage over V_5VOUT(DEV)drivers disabled,

+/-50

12.2

mV /

10V

the full supply voltage range

internal clock

T_A= 25°C

V_VSA= 10V to 30V

Output voltage

V_12VOUT

operating, internal

clock

10.8

11.5

V

T_J= 25°C

Clock oscillator and input

Parameter

Clock oscillator frequency

(factory calibrated)

Timing-Characteristics

Symbol Conditions

Min

Typ

11.7

12.0

12.1

10-16

Max Unit

MHz

f_CLKOSC

f_CLK

t_J=-50°C

t_J=50°C

t_J=150°C

11.5

4

12.5

MHz

External clock frequency

(operating)

18

External clock high / low level

time

External clock timeout detection t_CLKH1

in cycles of internal f_CLKOSC

t_CLKH

t_CLKL

/

CLK driven to

0.1 V_VIO/ 0.9 V_VIO

CLK driven high

10

32

ns

48

cycles

f_CLKOSC

Short detection

Parameter

DC-Characteristics

Symbol Conditions

Min

Typ

Max Unit

Short to GND / Short to VS

detector delay (Start of gate

switch on to short detected)

Including 100ns filtering time

Short detector level S2VS

(measurement includes drop in

sense resistor)

t_SD0

FILT_ISENSE=0

S2xx_LEVEL=6

shortdelay=0

shortdelay=1

S2VS_LEVEL=15

S2VS_LEVEL=6

0.5

0.85

1.1

µs

t_SD1

V_BM

1.1

1.4

0.55

1.6

1.56

0.625

2.2

1.72

0.70

µs

V

Short detector level S2G

V_S- V_BM

S2G_LEVEL=15;

VS<52V

S2G_LEVEL=15;

VS<55V

S2G_LEVEL=6;

VS<50V

1.2

1.56

1.9

V

0.85

0.46

0.625

0.80

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Detector levels

Parameter

DC-Characteristics

Symbol Conditions

Min

Typ

Max Unit

V_VSAundervoltage threshold for

RESET

V_{UV_VSA}

V_VSArising

3.6

4

4.6

V

V_5VOUTundervoltage threshold for V_{UV_5VOUT}

RESET

V_{VCC_IO}undervoltage threshold for V_{UV_VIO}

RESET

V_5VOUTrising

3.5

2.5

V

V_{VCC_IO}rising (delay

typ. 10µs)

2.0

3.0

V

V_{VCC_IO}undervoltage detector

hysteresis

V_{UV_VIOHYST}

0.3

V

Overtemperature prewarning

120°C

Overtemperature shutdown

136 °C

Overtemperature shutdown

143 °C

Overtemperature shutdown

150 °C

T_OTPW

Temperature rising

100

120

136

143

150

140

°C

T_OT136

T_OT143

T_OT150

135

170

Sense resistor voltage levels

DC-Characteristics

f_CLK=16MHz

Parameter

Symbol Conditions

Min

Typ

325

Max Unit

mV

Sense input peak threshold

voltage (low sensitivity)

(V_SRxH-V_SRxL)

V_SRT

GLOBALSCALER=0

csactual=31

sin_x=248

Hyst.=0; I_BRxy=0

Sense input tolerance / motor

current full scale tolerance

-using internal reference

I_COIL

GLOBALSCALER=0

-5

+5

%

Digital pins

DC-Characteristics

Parameter

Symbol Conditions

Min

-0.3

0.7 V_VIO

Typ

Max Unit

Input voltage low level

Input voltage high level

Input Schmitt trigger hysteresis

V_INLO

V_INHI

V_INHYST

0.3 V_VIO

V_VIO+0.3

V

0.12

V_VIO

Output voltage low level

Output voltage high level

Input leakage current

Pullup / pull-down resistors

Digital pin capacitance

V_OUTLO

V_OUTHI

I_ILEAK

R_PU/R_PD

C

I_OUTLO= 2mA

I_OUTHI= -2mA

0.2

V

µA

kΩ

pF

V_VIO-0.2

-10

132

10

200

166

3.5

28.3 Thermal Characteristics

The following table shall give an idea on the thermal resistance of the package. The thermal

resistance for a four layer board will provide a good idea on a typical application. Actual thermal

characteristics will depend on the PCB layout, PCB type and PCB size. The thermal resistance will

benefit from thicker CU (inner) layers for spreading heat horizontally within the PCB. Also, air flow will

reduce thermal resistance.

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Parameter

Symbol Conditions

Typ

Unit

Typical power dissipation

P_D

stealthChop or spreadCycle, 40 or

20kHz chopper, 24V, internal supply

regulators

0.6

W

Thermal resistance junction to

ambient on a multilayer board

R_TMJA

Dual signal and two internal power

plane board (2s2p) as defined in

JEDEC EIA JESD51-5 and JESD51-7

(FR4, 35µm CU, 70mm x 133mm,

d=1.5mm)

21

K/W

Thermal resistance junction to

board

R_TJB

R_TJC

PCB temperature measured within

1mm distance to the package leads

8

3

K/W

Thermal resistance junction to

case

Junction temperature to heat slug of

package

Table 28.1 Thermal characteristics TQFP48-EP

The thermal resistance in an actual layout can be tested by checking for the heat up caused by the

standby power consumption of the chip. When no motor is attached, all power seen on the power

supply is dissipated within the chip.

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29 Layout Considerations

29.1 Exposed Die Pad

The TMC5160 uses its die attach pad to dissipate heat from the gate drivers and the linear regulator to

the board. For best electrical and thermal performance, use a reasonable amount of solid, thermally

conducting vias between the die attach pad and the ground plane. The printed circuit board should

have a solid ground plane spreading heat into the board and providing for a stable GND reference.

29.2 Wiring GND

All signals of the TMC5160 are referenced to their respective GND. Directly connect all GND pins under

the device to a common ground area (GND, GNDP, GNDA and die attach pad). The GND plane right

below the die attach pad should be treated as a virtual star point. For thermal reasons, the PCB top

layer shall be connected to a large PCB GND plane spreading heat within the PCB.

Attention

Place the TMC5160 near to the MOSFET bridge and sense resistor GND in order to avoid ringing

leading to GND differences and to dangerous inductive peak voltages.

29.3 Wiring Bridge Supply

The power bridge will draw the full coil current in pulses with extremely high dI/dt. Thus, any

inductivity between VS supply filtering and the MOSFETs can lead to severe voltage spikes. This has to

be avoided. Avoid any bend in the supply traces between filtering capacitors and MOSFET switches,

and keep distance as small as possible. Especially for high current, use a separate plane for the supply

voltage, and a sufficient number and capacity for supply filtering. Use an additional capacitor for the

IC VS pin, as additional ripple voltage would cause severe current spikes on the charge pump

capacitor. A tiny series resistor can be added to avoid this.

Attention

Keep supply voltage ripple low, by using sufficient filtering capacity close to the MOSFET bridge.

29.4 Supply Filtering

The 5VOUT output voltage ceramic filtering capacitor (2.2 to 4.7 µF recommended) should be placed as

close as possible to the 5VOUT pin, with its GND return going directly to the GNDA pin. This ground

connection shall not be shared with other loads or additional vias to the GND plane. Use as short and

as thick connections as possible. For best microstepping performance and lowest chopper noise an

additional filtering capacitor should be used for the VCC pin to GND, to avoid digital part ripple

influencing motor current regulation. Therefore, place a ceramic filtering capacitor (470nF

recommended) as close as possible (1-2mm distance) to the VCC pin with GND return going to the

ground plane. VCC can be coupled to 5VOUT using a 2.2 Ω or 3.3 Ω resistor in order to supply the

digital logic from 5VOUT while keeping ripple away from this pin. A 100 nF filtering capacitor should

be placed as close as possible to the VSA pin to ground plane. Make sure, that VS does not see

excessive voltage spikes caused by bridge operation and place a 100 nF or larger filter capacitor to

GND close to the VS pin.

Please carefully read chapters 3.3 and 3.4 to understand the special considerations with regard to

layout and component selection for the external MOSFET power bridges.

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29.5 Layout Example

Schematic (TMC5160+MOSFETs shown)

1- Top Layer (assembly side)

2- Inner Layer (GND)

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126

3- Inner Layer (supply VS)

4- Bottom Layer

Components

Figure 29.1 Layout example

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30 Package Mechanical Data

30.1 Dimensional Drawings TQFP48-EP

Drawings not to scale.

Figure 30.1 Dimensional drawings TQFP48-EP

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TMC5160 DATASHEET (Rev. 1.08 / 2018-NOV-19)

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Parameter

total thickness

stand off

mold thickness

lead width (plating)

lead width

lead frame thickness

(plating)

Ref

A

A1

A2

b

b1

c

Min

Nom

Max

1.2

0.15

1.05

0.27

0.23

0.2

-

1

0.22

0.2

-

0.05

0.95

0.17

0.09

lead frame thickness

body size X (over pins)

body size Y (over pins)

body size X

body size Y

lead pitch

c1

D

E

D1

E1

e

L

L1



1

2

3

R1

R2

S

0.09

-

9.0

7.0

0.5

0.6

1 REF

3.5°

-

12°

-

0.16

lead

footprint

0.45

0.75

0°

7°

-

13°

-

11°

0.08

0.2

4.9

0.2

-

exposed die pad size X

exposed die pad size Y

package edge tolerance

lead edge tolerance

coplanarity

M

N

5

5.1

0.2

0.08

0.05

aaa

bbb

ccc

ddd

eee

lead offset

mold flatness

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129

30.2 Dimensional Drawings QFN-WA

Figure 30.2 Dimensional drawings wettable QFN

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130

Parameter

total thickness

stand off

mold thickness

lead frame thickness

lead width

Ref

A

A1

A2

A3

b

Min

0.8

Nom

Max

0.9

0.05

0.85

0.035

0.65

0.203

0.25

8.0

0

0.2

0.3

body size X

D

body size Y

E

8.0

lead pitch

e

0.5

exposed die pad size X

exposed die pad size Y

lead length

J

K

L

L1

aaa

bbb

ccc

ddd

eee

R

6.15

0.35

0.3

6.25

0.4

0.1

0.08

0.1

6.35

0.45

lead length

package edge tolerance

mold flatness

coplanarity

lead offset

exposed pad offset

half-cut depth

0.1

0.075

S

0.075

30.3 Package Codes

Type

Package

Temperature range

-40°C ... +125°C

Code & marking

TMC5160-TA

TMC5160-WA

…-T

TQFP-EP48 (RoHS)

QFN8x8 wettable

-40°C ... +125°C

TMC5160-WA

-T denotes tape on reel packing (order option)

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31 Design Philosophy

The TMC50XX and TMC51XX family brings premium functionality, reliability and coherence previously

reserved to costly motion control units to smart applications. Integration at street level cost was

possible by squeezing know-how into a few mm² of layout using one of the most modern smart

power processes. The ICs comprise all the knowledge gained from designing motion controller and

driver chips and complex motion control systems for more than 20 years. We are often asked if our

motion controllers contain software – they definitely do not. The reason is that sharing resources in

software leads to complex timing constraints and can create interrelations between parts which

should not be related. This makes debugging of software so difficult. Therefore, the IC is completely

designed as a hardware solution, i.e. each internal calculation uses a specially designed dedicated

arithmetic unit. The basic philosophy is to integrate all real-time critical functionality in hardware, and

to leave additional starting points for highest flexibility. Parts of the design go back to previous ICs,

starting from the TMC453 motion controller developed in 1997. Our deep involvement, practical testing

and the stable team ensure a high level of confidence and functional safety.

Bernhard Dwersteg, CTO and founder

32 Disclaimer

TRINAMIC Motion Control GmbH & Co. KG does not authorize or warrant any of its products for use in

life support systems, without the specific written consent of TRINAMIC Motion Control GmbH & Co.

KG. Life support systems are equipment intended to support or sustain life, and whose failure to

perform, when properly used in accordance with instructions provided, can be reasonably expected to

result in personal injury or death.

Information given in this data sheet is believed to be accurate and reliable. However no responsibility

is assumed for the consequences of its use nor for any infringement of patents or other rights of

third parties which may result from its use.

Specifications are subject to change without notice.

All trademarks used are property of their respective owners.

33 ESD Sensitive Device

The TMC5160 is an ESD sensitive CMOS device sensitive to electrostatic discharge. Take special care to

use adequate grounding of personnel and machines in manual handling. After soldering the devices

to the board, ESD requirements are more relaxed. Failure to do so can result in defect or decreased

reliability.

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TMC5160 DATASHEET (Rev. 1.08 / 2018-NOV-19)

132

34 Table of Figures

FIGURE 1.1 TMC5160 BASIC APPLICATION BLOCK DIAGRAM (MOTION CONTROLLER).................................................................5

FIGURE 1.2 TMC5160 STEP/DIR APPLICATION DIAGRAM.........................................................................................................6

FIGURE 1.3 TMC5160 STANDALONE DRIVER APPLICATION DIAGRAM.........................................................................................6

FIGURE 1.4 AUTOMATIC MOTOR CURRENT POWER DOWN..........................................................................................................8

FIGURE 1.5 ENERGY EFFICIENCY WITH COOLSTEP (EXAMPLE)......................................................................................................9

FIGURE 2.1 TMC5160-TA PACKAGE AND PINNING TQFP-EP 48 (7X7MM² BODY, 9X9MM² WITH LEADS)...............................11

FIGURE 2.2 TMC5160-WA PACKAGE AND PINNING QFN-WA (8X8MM²) ...............................................................................11

FIGURE 3.1 STANDARD APPLICATION CIRCUIT...........................................................................................................................15

FIGURE 3.2 EXTERNAL GATE VOLTAGE SUPPLY...........................................................................................................................16

FIGURE 3.3 MILLER CHARGE DETERMINES SWITCHING SLOPE ....................................................................................................17

FIGURE 3.4 SLOPES, MILLER PLATEAU AND BLANK TIME ...........................................................................................................18

FIGURE 3.5 BRIDGE PROTECTION OPTIONS FOR POWER ROUTING INDUCTIVITY.........................................................................19

FIGURE 3.6 RINGING OF OUTPUT (BLUE) AND GATE VOLTAGES (YELLOW, CYAN) WITH UNTUNED BRIGE...................................20

FIGURE 3.7 SWITCHING EVENT WITH OPTIMIZED COMPONENTS (WITHOUT / AFTER BULK DIODE CONDUCTION)........................20

FIGURE 3.8 EXAMPLE FOR BRIDGE WITH TUNED COMPONENTS (SEE SCOPE SHOTS)...................................................................21

FIGURE 4.1 SPI TIMING............................................................................................................................................................24

FIGURE 5.1 ADDRESSING MULTIPLE TMC5160 VIA SINGLE WIRE INTERFACE USING CHAINING................................................28

FIGURE 5.2 ADDRESSING MULTIPLE TMC5160 VIA THE DIFFERENTIAL INTERFACE, ADDITIONAL FILTERING FOR NAI..............29

FIGURE 7.1 MOTOR COIL SINE WAVE CURRENT WITH STEALTHCHOP (MEASURED WITH CURRENT PROBE)..................................56

FIGURE 7.2 STEALTHCHOP2 AUTOMATIC TUNING PROCEDURE....................................................................................................58

FIGURE 7.3 SCOPE SHOT: GOOD SETTING FOR PWM_REG.......................................................................................................60

FIGURE 7.4 SCOPE SHOT: TOO SMALL SETTING FOR PWM_REG DURING AT#2.......................................................................60

FIGURE 7.5 SUCCESSFULLY DETERMINED PWM_GRAD(_AUTO) AND PWM_OFS(_AUTO)...................................................60

FIGURE 7.6 VELOCITY BASED PWM SCALING (PWM_AUTOSCALE=0).........................................................................................63

FIGURE 7.7 TPWMTHRS FOR OPTIONAL SWITCHING TO SPREADCYCLE...................................................................................64

FIGURE 8.1 CHOPPER PHASES ...................................................................................................................................................67

FIGURE 8.2 NO LEDGES IN CURRENT WAVE WITH SUFFICIENT HYSTERESIS (MAGENTA: CURRENT A, YELLOW & BLUE: SENSE

RESISTOR VOLTAGES A AND B).........................................................................................................................................69

FIGURE 8.3 SPREADCYCLE CHOPPER SCHEME SHOWING COIL CURRENT DURING A CHOPPER CYCLE ............................................70

FIGURE 8.4 CLASSIC CONST. OFF TIME CHOPPER WITH OFFSET SHOWING COIL CURRENT..........................................................71

FIGURE 8.5 ZERO CROSSING WITH CLASSIC CHOPPER AND CORRECTION USING SINE WAVE OFFSET..........................................71

FIGURE 10.1 CHOICE OF VELOCITY DEPENDENT MODES.............................................................................................................75

FIGURE 11.1 SHORT DETECTION................................................................................................................................................78

FIGURE 12.1 RAMP GENERATOR VELOCITY TRACE SHOWING CONSEQUENT MOVE IN NEGATIVE DIRECTION ................................81

FIGURE 12.2 ILLUSTRATION OF OPTIMIZED MOTOR TORQUE USAGE WITH TMC5160 RAMP GENERATOR...................................82

FIGURE 12.3 RAMP GENERATOR VELOCITY DEPENDENT MOTOR CONTROL...................................................................................83

FIGURE 12.4 USING REFERENCE SWITCHES (EXAMPLE)..............................................................................................................84

FIGURE 13.1 FUNCTION PRINCIPLE OF STALLGUARD2...............................................................................................................86

FIGURE 13.2 EXAMPLE: OPTIMUM SGT SETTING AND STALLGUARD2 READING WITH AN EXAMPLE MOTOR................................88

FIGURE 14.1 COOLSTEP ADAPTS MOTOR CURRENT TO THE LOAD...............................................................................................91

FIGURE 15.1 STEP AND DIR TIMING, INPUT PIN FILTER .........................................................................................................93

FIGURE 15.2 MICROPLYER MICROSTEP INTERPOLATION WITH RISING STEP FREQUENCY (EXAMPLE: 16 TO 256)......................95

FIGURE 16.1 DIAG OUTPUTS IN STEP/DIR MODE ..................................................................................................................96

FIGURE 16.2 DIAG OUTPUTS WITH SD_MODE=0...................................................................................................................97

FIGURE 17.1 DCSTEP EXTENDED APPLICATION OPERATION AREA...............................................................................................98

FIGURE 17.2 VELOCITY PROFILE WITH IMPACT BY OVERLOAD SITUATION .................................................................................99

FIGURE 17.3 MOTOR MOVING SLOWER THAN STEP INPUT DUE TO LIGHT OVERLOAD. LOSTSTEPS INCREMENTED................102

FIGURE 17.4 FULL SIGNAL INTERCONNECTION FOR DCSTEP ....................................................................................................102

FIGURE 17.5 DCO INTERFACE TO MOTION CONTROLLER – STEP GENERATOR STOPS WHEN DCO IS ASSERTED........................103

FIGURE 18.1 LUT PROGRAMMING EXAMPLE ............................................................................................................................104

FIGURE 20.1 OUTLINE OF ABN SIGNALS OF AN INCREMENTAL ENCODER................................................................................106

FIGURE 22.1 CURRENT SETTING AND FIRST STEPS WITH STEALTHCHOP...................................................................................110

FIGURE 22.2 TUNING STEALTHCHOP AND SPREADCYCLE.........................................................................................................111

FIGURE 22.3 MOVING THE MOTOR USING THE MOTION CONTROLLER.......................................................................................112

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TMC5160 DATASHEET (Rev. 1.08 / 2018-NOV-19)

133

FIGURE 22.4 ENABLING COOLSTEP (ONLY IN COMBINATION WITH SPREADCYCLE)..................................................................113

FIGURE 22.5 SETTING UP DCSTEP...........................................................................................................................................114

FIGURE 24.1 STANDALONE OPERATION WITH TMC5160 (PINS SHOWN WITH THEIR STANDALONE MODE NAMES)..................116

FIGURE 29.1 LAYOUT EXAMPLE ...............................................................................................................................................126

FIGURE 30.1 DIMENSIONAL DRAWINGS TQFP48-EP.............................................................................................................127

FIGURE 30.2 DIMENSIONAL DRAWINGS WETTABLE QFN........................................................................................................129

35 Revision History

Version

Date

Author

Description

BD= Bernhard Dwersteg

First version of datasheet based on datasheet TMC5130 V1.13.

Added QFN package and product picture

Added new EVAL layout screenshots

Adapted pinning for QFN wettable package (47 pins!), added

preliminary package dimensions

V0.14

V0.15

V0.9

2017-APR-13

2017-APR-28

2017-MAY-04

2017-MAY-15

BD

V0.91

Added hints for automatic tuning process.

Some text enhancements, higher operating voltage limit

UV VCCIO → 2V min.

Link corrected, OTP read table addr. corr.

Reduced peak operation voltage limits

Added some Attention boxes or converted to Hint

S2G detector thresholds fixed for final product, Corrected TPFD time

formula

V0.92

V0.93

V0.94

V1.00

2017-MAY-31

2017-SEP-07

2017-SEP-14

2017-NOV-18

BD

V1.01

2017-NOV-29

BD

SWIOP/N → SWP/N, CFG6 errata

Exchanged Title graphics for -WA, minor fixes of text.

Added errata / limitations for initial tuning of AT#1 / AT#2 phase

Corrected 52V and 55V limits for S2GND detector, minor corrections

Added hints for tuning MOSFET bridge, added wiring bridge supply

V1.02

V1.04

V1.06

V1.07

V1.08

2017-DEZ-14

2018-MAY-02

2018-JUN-06

2018-OCT-18

2018-NOV-19

BD

Table 35.1 Document Revisions

36 References

[TMC5160-EVAL] TMC5160-EVAL Manual

[AN001]Trinamic Application Note 001 - Parameterization of spreadCycle™, www.trinamic.com

[AN002]Trinamic Application Note 002 - Parameterization of stallGuard2™ & coolStep™,

www.trinamic.com

[AN003] Trinamic Application Note 003 - dcStep™, www.trinamic.com

Calculation sheet TMC5160_Calculations.xlsx

www.trinamic.com


型号：	TMC5160-TA
厂家：	TRINAMIC MOTION CONTROL GMBH & CO. KG.
描述：	Universal high voltage controller/driver for two-phase bipolar stepper motor. 电动机控制
文件：	总133页 (文件大小：2799K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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