TMC57750 [TI]
1/4-INCH RS-170 TIMER; 四分之一英寸的RS - 170定时器
| 型号： | TMC57750 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 1/4-INCH RS-170 TIMER |
| 文件： | 总14页 (文件大小：200K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TMC57750
1/4-INCH RS-170 TIMER
SOCS041 – JUNE 1994
•
•
•
•
•
EIA-170 Timing Operation
Solid-State Reliability
•
•
•
Auto-Iris Capability
Electronic-Windowing Options
Fixed Electronic-Shutter Options
Random Shutter-Mode
Horizontal and Vertical Resets for External
Synchronization
•
Double-Speed Readout Option
Flicker-Compensation Mode
48 4746 45 44 43 42 4140 39 38 37 36 35 34 33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
49
50
51
52
53
54
55
56
SRGSEL
PHSEL1
PHSEL2
VACT
SHTCOM
HR
VR
SSEL3
DSEL
SRM
SRG
GND
SAG
IAG2
IAG1
SSEL2
V
CC
SSEL1
CPOB2
CPOB1
GND
57
58
59
60
61
62
63
64
V
CC
ABM
ABG
ABGSEL
FSSEL
DSSEL
CSYNC
CBLK
TEST4
EU
ED
1
2 3 4 5 6 7 8 9 10 1112 13 14 1516
description
The TMC57750 is a monolithic integrated circuit designed to supply timing signals for the Texas
Instruments (TI ) 4-mm TC255 monochrome CCD image sensor. The TMC57750 supplies both CCD drive
signals and EIA-170 television-synchronization signals at standard video rates. It requires a single 5-V supply
voltage and a 25-MHz timing crystal or crystal oscillator. The TMC57750 provides the user with several options
including antiblooming-frequency selection, external synchronization, fixed electronic-shutter selection,
electronic auto-iris, and window selection.
The TMC57750 is designed to drive the TC255 CCD image sensor through an intermediary level-shifting device
such as the TI TMC57253 serial and parallel driver. It supplies sampling, clamping, and synchronizing signals
for the TI SN76121OFR video processor. The TMC57750 EIA-170 synchronization signals include composite
sync, composite blank, and field indicator.
The TMC57750 is supplied in a 64-pin plastic flat package and is characterized for operation from –20°C
to 45°C.
TI is a trademark of Texas Instruments Incorporated.
Copyright 1994, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TMC57750
1/4-INCH RS-170 TIMER
SOCS041 – JUNE 1994
functional block diagram
13, 26, 45, 59
V
CC
4, 22, 36, 55
GND
42
39
41
40
50
51
52
30
29
17
18
62
64
9
37
38
CLKIN
Divide by 4
Divide by 2
MCLK/4
MCLK/2
XSEL
XIN
25-MHz
Oscillator
35
54
34
53
Serial Counter
CDS
SRG
S/H
XOUT
PHSEL1
PHSEL2
DSEL
HR
Mode
Select
SRM
61
60
20
23
24
21
448
46
58
57
56
33
32
47
16
VR
Horizontal
Counter
ABG
ED
EU
ABM
CBLK
CPOB1
CPOB2
CSYNC
FI
ABGSEL
DSSEL
EFSEL1
EFSEL2
EFSEL3
FSSEL
MINSEL
SHTCOM
SRGSEL
SSEL1
Vertical
Counter
10
11
63
12
31
49
25
27
28
14
15
44
Iris
Counter
Decoder
HD
IAG1
IAG2
Mode
Select
Iris
Controller
SAG
SHTMON
VACT
VD
SSEL2
SSEL3
WINDOW
WSEL1
WSEL2
PUC
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TMC57750
1/4-INCH RS-170 TIMER
SOCS041 – JUNE 1994
Terminal Functions
TERMINAL
NAME
I/O
DESCRIPTION
NO.
61
ABG
ABM
O
O
Antiblooming gate
Antiblooming gate mid-level
60
Antiblooming-gateselect. ABGSEL selects the frequency of the antiblooming gate. When ABGSEL
is high, the standard frequency of 6.25 MHz is selected. When low, the double frequency of 12.5
MHz is selected.
ABGSEL
62
I
CLKIN
CBLK
42
20
23
24
21
35
I
Clock in
O
O
O
O
O
Composite blank
CPOB1
CPOB2
CSYNC
CDS
Optical black clamp one
Optical black clamp two
Composite sync
Co9rrelated double sampling
Delay select. DSEL selects the delay of CDS and S/H with respect to SRG. When DSEL is high,
a standard delay is selected. When low, an additional delay of 5 ns is selected.
DSEL
52
I
Display-scanselect. DSSELselectsthedisplay-scanningmode.WhenDSSELishigh,theinterlace
mode is selected. When low, the noninterlace mode is selected. In the interlace mode, one field is
262.5 horizontal lines and one frame is 525 horizontal lines. In the noninterlace mode, one field is
262 horizontal lines and one frame is 524 horizontal lines.
DSSEL
64
I
ED
EU
17
18
I
I
Exposure down. ED decreases the integration of the CCD sensor.
Exposure up. EU increases the integration of the CCD sensor.
EFSEL1,
EFSEL2,
EFSEL3
Electronic-function select. EFSEL1, EFSEL2, and EFSEL3 selects the operational modes (see
Table 1 and Figure 4).
9, 10, 11
I
FI
49
63
O
I
Field index
Frame-shift select. FSSEL selects the parallel-transfer frequency. When FSSEL is high, the
standardfrequency of 12.5 MHz is selected. When low, the double frequency of 25 MHz is selected.
FSSEL
4, 22, 36,
55
GND
Ground
HD
46
30
58
57
37
38
O
I
Horizontal drive
HR
Horizontal reset
IAG1
IAG2
MCLK/4
MCLK/2
O
O
O
O
Image-area gate 1
Image-area gate 2
Master clock divided by 4
Master clock divided by 2
Minimumexposure-timeselect. MINSELselectstheminimumexposuretimefortheauto-irismode.
When high, the exposure time of 1/50000 second is selected. When low, the exposure time of
1/8000 second is selected.
MINSEL
12
I
MON1, MON2,
MON3, MON4
5, 6,
7, 8
MON1, MON2, MON3, and MON4 are test-monitoring terminals and are not used in normal
operation.
O
Phase select. PHSEL1 and PHSEL2 determine the timing relation of S/H and CDS with respect
to SRG.
PHSEL1
PHSEL2
OPERATION
MODE1
MODE2
MODE3
MODE4
H
L
H
L
H
H
L
PHSEL1,
PHSEL2
50, 51
I
L
MODES1, 2, 3, and 4 are shown in Figure 3.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TMC57750
1/4-INCH RS-170 TIMER
SOCS041 – JUNE 1994
Terminal Functions (Continued)
TERMINAL
I/O
DESCRIPTION
NAME
NO.
44
56
43
31
54
53
PUC
SAG
I
Power-up clear
O
Storage-area gate
SCAN
SHTCOM
SRG
SCAN is a test point and is not used in normal operation.
Shutter command
I
O
O
Serial-register gate
SRM
Serial-register gate mid-level
Serial-register gate select. SRGSEL selects the readout frequency. When SRGSEL is high, the
standard frequency of 6.25 MHz is selected. When low, the double frequency of 12.5 MHz is
selected.
SRGSEL
49
I
SHTMON
S/H
33
34
O
O
Shutter monitor
Sample and hold
SEL1,
SEL2,
SEL3
Shutter-speed select. SEL1, SEL2, and SEL3 selects the fixed shutter times in horizontal TV lines.
This selection sets the exposure times if either the manual-shutter or random-shutter modes are
selected (see Table 2).
25, 27, 28
I
TEST1, TEST2,
TEST3, TEST4
1, 2,
3, 19
TEST1, TEST2, TEST3, and TEST4 are test points and are not used in normal operation.
VACT
32
O
Video active
Supply voltage
Vertical drive
Vertical reset
13, 26,
45, 59
V
CC
VD
47
29
O
I
VR
Window. WINDOW is high as defined by WSEL1 and WSEL2 at the times in TV lines and horizontal
pixels (see Table 3).
WINDOW
16
O
Window select. WSEL1 and WSEL2 selects the output mode of WINDOW. These inputs are
normally used with the auto-iris mode in selecting the desired region to optimize the exposure of
the best image (see Table 3).
WSEL1,
WSEL2
14, 15
I
WSEL1
WSEL2
OPERATION
MODE1
MODE2
MODE3
MODE4
H
L
H
L
H
H
L
L
Crystal-oscillator select. XSEL selects the inputs used as the master clock. When XSEL is high, a
25-MHz crystal is connected between XIN and XOUT. When XSEL is low, a 25-MHz crystal
oscillator is required and its output connected to CLKIN.
XSEL
39
I
XIN
41
40
Crystal in
XOUT
Crystal out
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 6 V
CC
Input voltage range, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
+ 0.5 V
+ 0.5 V
I
CC
CC
Output voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
O
Operating free-air temperature range, T
Storage temperature range, T
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –20°C to 45°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
A
STG
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TMC57750
1/4-INCH RS-170 TIMER
SOCS041 – JUNE 1994
recommended operating conditions
MIN
4.5
2
NOM
MAX
UNIT
V
V
Supply voltage
5
5.5
V
CC
TTL
V
V
CC
High-level input voltage
V
V
IH
CMOS
TTL
0.7V
CC
CC
GND
GND
0
0.8
0.2V
V
IL
Low-level input voltage
CMOS
TTL
CC
25
25
45
t , t
r f
Input rise and fall times
ns
CMOS
0
T
A
Operating free-air temperature
–20
°C
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
PARAMETER
High-level output voltage
Low-level output voltage
Schmitt-trigger input hysteresis, TTL
Schmitt-trigger input hysteresis, CMOS
High-level input current
TEST CONDITIONS
= Rated current
MIN
V –0.8
CC
MAX
UNIT
V
V
V
V
V
I
I
OH
OL
T+
T–
OH
= Rated current
0.5
V
OL
0.3
0.2V
V
= 5 V
V
CC
CC
I
I
I
I
V = V
1
–1
µA
µA
µA
µA
IH
I
CC
Low-level input current
V = GND
IL
I
Output current
V
= V or GND
CC
±10
60
O
O
Quiescent current
V = V
I CC
CCQ
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TMC57750
1/4-INCH RS-170 TIMER
SOCS041 – JUNE 1994
Table 1. Electronic-Function Select
EFSEL1
EFSEL2
EFSEL3
MODE
†
261H
Auto-iris
Random shutter
Flickerless
Manual shutter
STD
L
H
L
H
L
H
L
H
L
L
H
H
L
L
H
H
L
L
L
‡
§
L
H
H
H
H
STD
STD
†
‡
For the 261H mode, see Figure 4.
The maximum range of the auto-iris integration times is 1/50000 second to 1/60
second.
Theflickerlessmodehasafixedshutterof1/100second. Ithasaneffectonlywhen
50-Hz pwer systems are in use.
§
Table 2. Shutter-Speed Select
FIXED
SHUTTER TIMES
SEL1
SEL2
SEL3
L
H
L
H
L
H
L
H
L
L
H
H
L
L
H
H
L
L
L
1H
2H
4H
L
8H
H
H
H
H
16H
32H
64H
128H
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TMC57750
1/4-INCH RS-170 TIMER
SOCS041 – JUNE 1994
Table 3. WINDOW Modes
PIXEL
MODE
130–294
295–624
625–789
MODE1
Lines 22–81, 285–344
Lines 82–141, 345–404
Lines 142–201, 405–464
Lines 202–261, 465–525
MODE2
H
H
H
H
H
H
H
H
H
H
H
H
Lines 22–81, 285–344
Lines 82–141, 345–404
Lines 142–201, 405–464
Lines 202–261 465–525
MODE3
L
L
L
L
L
H
H
H
L
L
L
L
Lines 22–81, 285–344
Lines 82–141, 345–404
Lines 142–201, 405–464
Lines 202–261 465–525
MODE4
L
L
L
L
L
L
L
H
H
L
H
H
Lines 22–81, 285–344
Lines 82–141, 345–404
Lines 142–201, 405–464
Lines 202–261, 465–525
L
L
L
L
L
L
L
L
L
H
H
H
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TMC57750
1/4-INCH RS-170 TIMER
SOCS041 – JUNE 1994
(525)
260
262.5
270
280
0
10
20
30
Vertical
Scale
0
†
FI
VD
HD
262.5
271.5
0
9
CSYNC
CBLK
20
262.5
282.5
CPOB
SRG
SRM
S/H, CDS
IAG1, 2
15
15
277
277
SAG
ABG
281
ABM
†
One TV frame = 33.3 ms = 525 intervals
Figure 1. Vertical Timing
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TMC57750
1/4-INCH RS-170 TIMER
SOCS041 – JUNE 1994
714
794
0
300
400
500
600
100
200
Horizontal
†
Scale
24
24
53
421 450
CSYNC
‡
(case 1)
760
363
CSYNC
‡
(case 2)
82
82
CSYNC
‡
(case 3)
0
0
148
§
CBLK
HD
FI
§
§
0
0
397
§
§
397
VD
4
127
ABG
ABM,
IAG1, 2
109 111
112
SAG
4
4
110
117
117
SRG
SH
4
117
CDS
132 140
CPOB1
128
138
CPOB2
†
‡
One horizontal-scan line = 63.52 µs = 794 intervals
CSYNC varies depending on which horizontal-scan line of a 262.5-line TV field is being examined.
• Case 1 depicts the equalization pulses that occur during horizontal-scan lines 1, 2, 3, 7, 8, and 9.
• Case 2 depicts the vertical serration pulses that occur during horizontal-scan lines 4, 5, and 6.
• Case 3 applies to all remaining horizontal-scan lines.
CBLK makes 1/2 line transitions only on lines 262.5 and 268.5. FI makes a high-to-low transition only on line 525 and a low-to-high transition
only on line 262.5. VD makes high to low transitions only on lines 525 and 262.5. It makes low-to-high transitions only on lines 9 and 271.5.
§
Figure 2. Horizontal Timing
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TMC57750
1/4-INCH RS-170 TIMER
SOCS041 – JUNE 1994
160 ns
SRG
SRM
CDS
DSEL High
†
5 ns
S/H
MODE1
†
5 ns
CDS
DSEL Low
S/H
CDS
DSEL High
S/H
MODE2
CDS
DSEL Low
S/H
CDS
DSEL High
S/H
MODE3
CDS
DSEL Low
S/H
CDS
DSEL High
S/H
MODE4
CDS
DSEL Low
S/H
†
In all four modes, the selection of DSEL low results in an additional 5-ns delay of CDS and S/H with respect to SRG.
Figure 3. Phase-Select-Mode Timing
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TMC57750
1/4-INCH RS-170 TIMER
SOCS041 – JUNE 1994
261 Horizontal Lines
261 Horizontal Lines
16 17
278
280
16
17
IAG1, 2
SAG
Figure 4. 261H Mode
VD
SHTCOM
SHTMON
VACT
IAG1, 2
SAG
Video Out
Figure 5. Random-Shutter-Mode Timing
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TMC57750
1/4-INCH RS-170 TIMER
SOCS041 – JUNE 1994
794
300
400
500
600
0
100
200
Horizontal
†
Scale
AB
ABM
792
4
134
‡
395
401
531
‡
527
252 Clocks
252 Clocks
130
IAG1, 2
SAG
Location A
Location B
†
‡
One horizontal-scan line = 63.52 µs = 794 intervals
The clear sequence must take place at Location A if the iris controller determines that it is to be executed on any of the lines 21–262 of TV field 1
or lines 284–525 of TV field 2. The clear sequence can take place at either Location A or Location B if the iris controller determines that it is to
be executed on any of the lines 1–20 (excluding line 16) of TV field 1 or lines 263–283 (excluding line 278) of TV field 2. The frequency of the
clear sequence is 25 MHz.
Figure 6. Clear Timing
794
300
400
500
600
0
100
200
Horizontal
†
Scale
AB
2
268
ABM
244 Clocks
‡
IAG1, 2
244 Clocks
244 Clocks
‡
‡
SAG
SRG
IAG1, 2
SAG
SRG
†
‡
One horizontal-scan line = 63.52 µs = 794 intervals
The frequency of the parallel transfer is 12.5 MHz.
Figure 7. Parallel-Transfer Timing
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TMC57750
1/4-INCH RS-170 TIMER
SOCS041 – JUNE 1994
MECHANICAL DATA
LQFP
PLASTIC QUAD FLATPACK
0,58
0,42
0,27
M
0,08
0,18
0,15
48
33
32
49
0,132
64
17
0,127
0,125
1,6
1,3
1
16
7,50 TYP
10,10
SQ
9,90
12,10
SQ
11,90
0°–10°
0,7
0,3
Seating Plane
0,1
1,70
1,50
0,10
1/1/95
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
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Copyright 1998, Texas Instruments Incorporated
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