VSP1900DBTR [TI]

SPECIALTY CONSUMER CIRCUIT, PDSO30, GREEN, PLASTIC, TSSOP-30;
VSP1900DBTR
型号: VSP1900DBTR
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

SPECIALTY CONSUMER CIRCUIT, PDSO30, GREEN, PLASTIC, TSSOP-30

光电二极管 商用集成电路
文件: 总11页 (文件大小:125K)
中文:  中文翻译
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VSP1900  
SLES062 – MARCH 2003  
CCD VERTICAL DRIVER  
FOR DIGITAL CAMERAS  
D
Power Supply:  
– VDD  
– VL  
– VM  
– VH  
FEATURES  
2.7 V to 5.5 V  
–5 V to –9 V  
GND  
D
CCD Vertical Driver:  
– Three Field CCD Support  
– Two Field CCD Support  
11.5V to 15.5 V  
D
Output Drivers:  
APPLICATIONS  
– 3 Levels Driver (V-Transfer) x 5  
– 2 Levels Driver (V-Transfer) x 3  
– 2 Levels Driver (E-Shutter) x 1  
D
Digital Camera  
Video Camera  
D
D
D
Drive Capability:  
– 450 pF to 1890 pF With 60 to 240 Ω  
DESCRIPTION  
Input Phase:  
The VSP1900 is a CCD vertical clock driver with electric-  
shutter support. This device is composed of eight vertical  
transfer channels, which support both 3-field CCD and  
2-field CCD operation. The VSP1900 contributes low  
power consumption and parts number reduction in the  
system.  
– 3 State (V-Transfer) x 5  
– 2 State (V-Transfer) x 3  
– 2 State (E-Shutter) x 1  
D
Portable Operation:  
– Input Interface: 2.7 V to 5.5 V  
Pleasebe aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments  
semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date. Products  
conform to specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all parameters.  
Copyright 2003, Texas Instruments Incorporated  
VSP1900  
www.ti.com  
SLES062 MARCH 2003  
Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoamduring  
storageor handling to prevent electrostatic damage to the MOS gates.  
ORDERING INFORMATION  
PACKAGE  
DESIGNATOR  
OPERATING  
TEMPERATURE RANGE  
PACKAGE  
MARKING  
ORDERING  
NUMBER  
PRODUCT  
PACKAGE  
TRANSPORT MEDIA  
Tube (60 units/tube)  
Tape and reel  
VSP1900  
TSSOP30  
DBT  
25°C to 85°C  
VSP1900  
VSP1900  
(1)  
For the most current specification and package information, refer to our web site at www.ti.com.  
ABSOLUTE MAXIMUM RATINGS  
overoperating free-air temperature range unless otherwise noted  
(1)  
UNITS  
GND 0.3 V to 7 V  
GND to 10 V  
VL + 26 V  
VDD  
VL  
Supplyvoltage  
Input voltage, V  
VH  
GND 0.3 V to (VDD + 0.3 V)  
25°C to 85°C  
55°C to 150°C  
150°C  
IN  
Ambienttemperatureunderbias  
Storagetemperature,T  
stg  
Junctiontemperature  
Package temperature (IR reflow, peak)  
235°C  
(1)  
Stressesbeyondthoselistedunderabsolutemaximumratingsmaycausepermanentdamagetothedevice. Thesearestressratingsonly,and  
functionaloperation of the device at these or any other conditions beyond those indicated under recommended operating conditionsis not  
implied.Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
RECOMMENDED OPERATING CONDITIONS  
free-airtemperature range unless otherwise noted  
MIN  
2.7  
NOM  
MAX UNIT  
Supply voltage, VDD  
Supply voltage, VL  
Supply voltage, VH  
5.5  
9  
V
V
V
5  
11.5  
15.5  
GND 0.3  
to  
Input voltage, VIN  
V
(VDD + 0.3)  
TRUTH TABLE  
INPUT  
OUTPUT  
V1N  
CH1N  
CH2N  
CH3N  
CH4N  
CH5N  
V1  
V3AN  
V3BN  
V5AN  
V5BN  
V3A  
V3B  
V5A  
V5B  
V2N  
V4N  
V6N  
V2  
V4  
V6  
SUBN  
SUB  
X
L
L
L
H
L
X
X
X
X
L
X
X
X
X
X
X
L
VH  
VM  
Z
X
X
X
H
H
X
X
X
X
X
X
H
X
X
X
X
VL  
X
X
X
VM  
VL  
X
X
H
X
X
X
X
X
VH  
VL  
H
X
X
:
NOTE Z = High impedance  
X = Dont care  
2
VSP1900  
www.ti.com  
SLES062 MARCH 2003  
ELECTRICAL CHARACTERISTICS  
all specifications at T = 25°C (unless otherwise noted)  
A
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
5.3  
MAX  
UNIT  
mW  
DC power consumption  
Switchingpowerconsumption  
DC CHARACTERISTICS  
VSP2267 (TG) with loading diagram  
550  
mW  
V
V
High-levelinputvoltage  
Low-levelinputvoltage  
Inputcurrent  
0.7VDD  
V
V
IH  
0.2VDD  
10  
IL  
I
IN  
V
V
= GND to 5 V (without pullup / pulldown resistor)  
= GND to 5 V (pullup / pulldown resistor)  
10  
0
0
IN  
µA  
625  
625  
IN  
I
I
I
I
I
I
I
I
I
0.1  
1
0.2  
H
Operating supply current  
mA  
DD  
L
0.125  
V1, V2, V3A, V3B, V4, V5A, V5B, V6 = 8.1 V  
V1, V2, V3A, V3B, V4, V5A, V5B, V6 = 0.2 V  
V1, V3A, V3B, V5A, V5B = 0.2 V  
V1, V3A, V3B, V5A, V5B = 14.55 V  
SUB = 8.1 V  
10  
5
OL  
5  
7.2  
4  
OM1  
OM2  
OH  
OSL  
OSH  
Outputcurrent  
mA  
5.4  
SUB = 14.55 V  
SWITCHING CHARACTERISTICS  
all specifications at T = 25°C (unless otherwise noted)  
A
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
15  
MAX  
100  
100  
100  
50  
UNIT  
t
t
t
t
t
t
t
t
t
t
t
t
d(PLM)  
d(PMH)  
d(PLH)  
d(PML)  
d(PHM)  
d(PHL)  
r(TLM)  
r(TMH)  
r(TLH)  
f(TML)  
f(THM)  
f(THL)  
20  
20  
Propagationdelaytime  
ns  
15  
30  
50  
30  
50  
VL VM  
VM VH  
VL VH  
VM VL  
VH VM  
VH VL  
300  
300  
300  
300  
300  
300  
Rise time  
Falltime  
ns  
ns  
V
V
V
V
V
n(CLH)  
n(CLL)  
n(CMH)  
n(CML)  
n(CHL)  
Output noise voltage  
2
V
3
VSP1900  
www.ti.com  
SLES062 MARCH 2003  
PIN ASSIGNMENTS  
DBT PACKAGE  
(TOP VIEW)  
1
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
GND  
SUBN  
V2N  
V4N  
V6N  
DVDD  
V5BN  
CH5N  
CH1N  
V1N  
CH2N  
V3AN  
V5AN  
CH3N  
GND  
GND  
GND  
SUB  
V2  
V4  
V6  
V5B  
VH  
V1  
V3A  
V5A  
V3B  
VL  
CH4N  
V3BN  
2
3
4
5
6
7
8
9
10  
11  
12  
13  
14  
15  
Terminal Functions  
TERMINAL  
TYPE  
DESCRIPTIONS  
NAME  
NO.  
1
GND  
P
DI  
DI  
DI  
DI  
P
Ground  
SUBN  
V2N  
V4N  
V6N  
DVDD  
V5BN  
CH5N  
CH1N  
V1N  
CH2N  
V3AN  
V5AN  
CH3N  
GND  
V3BN  
CH4N  
VL  
2
CCD substrate clock SUB input  
Vertical transfer clock 2 input  
Vertical transfer clock 4 input  
Vertical transfer clock 6 input  
Digital power supply  
3
4
5
6
7
DI  
DI  
DI  
DI  
DI  
DI  
DI  
DI  
P
Vertical transfer clock 5B input  
Read out clock 5 input  
8
9
Read out clock 1 input  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
Vertical transfer clock 1 input  
Read out clock 2 input  
Vertical transfer clock 3A input  
Vertical transfer clock 5A input  
Read out clock 3 input  
Ground  
DI  
DI  
P
Vertical transfer clock 3B input  
Read out clock 4 input  
Digital power supply  
V3B  
DO  
DO  
DO  
DO  
P
Vertical transfer clock 3B output  
Vertical transfer clock 5A output  
Vertical transfer clock 3A output  
Vertical transfer clock 1 output  
Digital power supply  
V5A  
V3A  
V1  
VH  
V5B  
DO  
DO  
DO  
DO  
DO  
P
Vertical transfer clock 5B output  
Vertical transfer clock 6 output  
Vertical transfer clock 4 output  
Vertical transfer clock 2 output  
CCD substrate clock SUB output  
Ground  
V6  
V4  
V2  
SUB  
GND  
GND  
P
Ground  
4
VSP1900  
www.ti.com  
SLES062 MARCH 2003  
FUNCTIONAL BLOCK DIAGRAM  
GND  
1
2
30  
29  
GND  
GND  
SUBN  
LevelShifter  
V2N  
V4N  
3
4
28  
27  
SUB  
V2  
LevelShifter  
LevelShifter  
LevelShifter  
V6N  
5
6
26  
25  
V4  
V6  
DVDD  
LevelShifter  
V5BN  
CH5N  
CH1N  
7
8
9
24  
23  
22  
V5B  
VH  
V1  
3-State  
Driver  
LevelShifter  
LevelShifter  
3-State  
Driver  
V1N  
10  
11  
12  
13  
14  
15  
LevelShifter  
LevelShifter  
LevelShifter  
LevelShifter  
LevelShifter  
21  
20  
19  
18  
17  
16  
V3A  
V5A  
V3B  
VL  
CH2N  
V3AN  
V5AN  
CH3N  
GND  
3-State  
Driver  
3-State  
Driver  
CH4N  
V3BN  
LevelShifter  
LevelShifter  
3-State  
Driver  
5
VSP1900  
www.ti.com  
SLES062 MARCH 2003  
SWITCHING WAVEFORM  
VM  
VL  
VH  
VM  
VH  
VM  
Noise on a waveform  
V
V
(CMH)  
(CMH)  
V
(CMH)  
V
(CHL)  
V
(CLH)  
V
(CML)  
V
(CML)  
V
(CLL)  
6
VSP1900  
www.ti.com  
SLES062 MARCH 2003  
LOADING DIAGRAM  
Vertical clock series resistor  
R1, R2, R4, R6  
R3A, R5A  
60 Ω  
240 Ω  
80 Ω  
R3B, R5B  
CΦV1  
1280 pF  
640 pF  
640 pF  
400 pF  
510 pF  
50 pF  
CΦV3A, CΦV3B  
CΦV5A, CΦV5B  
CΦV2, CΦV4, CΦV6  
CΦV12  
Vertical clock to GND  
Between vertical clock  
CΦV23A, CΦV23B  
CΦV45A, CΦV45B  
CΦV3A4, CΦV3B4  
CΦV5A6, CΦV5B6  
CΦV61  
50 pF  
260 pF  
260 pF  
100 pF  
1000 pF  
18 Ω  
Substrate clock to GND  
CΦVSUB  
Vertical clock GND resistor  
R GND  
VΦ1  
VΦ6  
VΦ2  
VΦ5B  
VΦ3A  
SUB  
VΦ5A  
VΦ3B  
1000 pF  
VΦ4  
Figure 1. VSP1900 Loading Diagram  
7
VSP1900  
www.ti.com  
SLES062 MARCH 2003  
DESCRIPTION  
The VSP1900 is a CCD vertical clock driver with electric shutter. The VSP1900 is composed of five 3-state and three  
2-state vertical transfer channels, which support both 3 field and 2 field CCD operation. The VSP1900 contributes  
low power consumption and parts number reduction in the system.  
OPERATION  
Power On/Off Sequence  
This is the same as the CCD power up sequence, when power on, VDD powers on first VH, VM power on second,  
and VL powers on later. When powering off, VL powers off first, VH, VM power of second, and VDD powers off later.  
Vertical Transfer Signal  
The VSP1900 receives signals from TG (CCD timing generator). The input signal is converted into CCD operation  
voltage level by the level shifter. The level shifter circuits connect to a 2-state or 3-state driver, which is connected  
to the CCD input pin. While using a 2-field CCD, one of the 3-state drivers is used as a 2-state driver. The CH#N pin  
is pulled up internally, so that the VH level does not appear on the output pin.  
CCD Drain Bias  
TG  
VSP1900  
CCD  
SUB  
SUBN  
SUB  
V#  
V#  
V#N  
V#  
CH#  
CH#N  
SUB  
100 1000 pF  
1 MΩ  
Figure 2. FVSP1900 Circuit Application  
8
VSP1900  
www.ti.com  
SLES062 MARCH 2003  
MECHANICAL DATA  
DBT (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE PACKAGE  
30 PINS SHOWN  
0,27  
0,17  
M
0,08  
0,50  
30  
16  
0,15 NOM  
6,60  
6,20  
4,50  
4,30  
Gage Plane  
0,25  
1
15  
0°ā8°  
0,75  
0,50  
A
SeatingPlane  
0,10  
0,15  
0,05  
1,20 MAX  
PINS **  
20  
24  
28  
30  
38  
44  
50  
DIM  
5,10  
4.90  
6,60  
6,40  
7,90  
7,70  
7,90  
7,70  
9,80  
9,60  
11,10  
10,90  
12,60  
12,40  
A MAX  
A MIN  
4073252/E02/02  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion.  
D. Falls within JEDEC MO-153  
9
MECHANICAL DATA  
MPDS019D – FEBRUARY 1996 – REVISED FEBRUARY 2002  
DBT (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE PACKAGE  
30 PINS SHOWN  
0,27  
0,17  
M
0,50  
30  
0,08  
16  
0,15 NOM  
4,50  
4,30  
6,60  
6,20  
Gage Plane  
0,25  
1
15  
0°ā8°  
0,75  
0,50  
A
Seating Plane  
0,10  
0,15  
0,05  
1,20 MAX  
PINS **  
20  
24  
28  
30  
38  
44  
50  
DIM  
5,10  
4.90  
6,60  
6,40  
7,90  
7,70  
7,90  
7,70  
9,80  
9,60  
11,10  
10,90  
12,60  
12,40  
A MAX  
A MIN  
4073252/E 02/02  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion.  
D. Falls within JEDEC MO-153  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,  
enhancements, improvements, and other changes to its products and services at any time and to discontinue  
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and conditions of sale supplied at the time of order acknowledgment.  
TI warrants performance of its hardware products to the specifications applicable at the time of sale in  
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI  
deems necessary to support this warranty. Except where mandated by government requirements, testing of all  
parameters of each product is not necessarily performed.  
TI assumes no liability for applications assistance or customer product design. Customers are responsible for  
their products and applications using TI components. To minimize the risks associated with customer products  
and applications, customers should provide adequate design and operating safeguards.  
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Mailing Address:  
Texas Instruments  
Post Office Box 655303  
Dallas, Texas 75265  
Copyright 2003, Texas Instruments Incorporated  

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