SNJ54CBTD3384W [TI]

10-BIT FET BUS SWITCHES WITH LEVEL SHIFTING; 10位FET总线开关,电平转换
SNJ54CBTD3384W
型号: SNJ54CBTD3384W
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

10-BIT FET BUS SWITCHES WITH LEVEL SHIFTING
10位FET总线开关,电平转换

总线驱动器 总线收发器 开关 逻辑集成电路
文件: 总21页 (文件大小:1053K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SCDS025R − MAY 1995 − REVISED JANUARY 2004  
D
D
5-Switch Connection Between Two Ports  
TTL-Compatible Input Levels  
D
Designed to Be Used in Level-Shifting  
Applications  
SN54CBTD3384 . . . JT OR W PACKAGE  
SN54CBTD3384 . . . FK PACKAGE  
(TOP VIEW)  
SN74CBTD3384 . . . DB, DBQ, DGV, DW, OR PW PACKAGE  
(TOP VIEW)  
1OE  
1B1  
1A1  
1A2  
1B2  
1B3  
1A3  
1A4  
1B4  
V
CC  
1
2
3
4
5
6
7
8
9
24  
23  
22  
21  
20  
19  
18  
17  
16  
2B5  
2A5  
2A4  
2B4  
2B3  
2A3  
2A2  
2B2  
4
3
2 1 28 27 26  
5
6
7
8
9
25  
24  
23  
22  
21  
20  
19  
1A2  
1B2  
1B3  
NC  
2A4  
2B4  
2B3  
NC  
1A3  
1A4  
1B4  
2A3  
2A2  
2B2  
10  
11  
12 13 14 15 16 17 18  
1B5 10  
15 2B1  
1A5  
GND  
2A1  
2OE  
11  
12  
14  
13  
NC − No internal connection  
description/ordering information  
The ’CBTD3384 devices provide ten bits of high-speed TTL-compatible bus switching. The low on-state  
resistance of the switches allows connections to be made without adding propagation delay. A diode to V is  
CC  
integrated on the die to allow for level shifting from 5-V signals at the device inputs to 3.3-V signals at the device  
outputs.  
These devices are organized as two 5-bit switches with separate output-enable (OE) inputs. When OE is low,  
the switch is on, and port A is connected to port B. When OE is high, the switch is open, and the high-impedance  
state exists between the two ports.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
Tube  
SN74CBTD3384DW  
SN74CBTD3384DWR  
SN74CBTD3384DBR  
SN74CBTD3384DBQR  
SN74CBTD3384PW  
SN74CBTD3384PWR  
SN74CBTD3384DGVR  
SNJ54CBTD3384JT  
SNJ54CBTD3384W  
SNJ54CBTD3384FK  
SOIC − DW  
SSOP − DB  
CBTD3384  
Tape and reel  
Tape and reel  
CC384  
SSOP (QSOP) − DBQ Tape and reel  
Tube  
CBTD3384  
−40°C to 85°C  
TSSOP − PW  
CC384  
Tape and reel  
TVSOP − DGV  
CDIP − JT  
Tape and reel  
Tube  
CC384  
SNJ54CBTD3384JT  
SNJ54CBTD3384W  
SNJ54CBTD3384FK  
CFP − W  
Tube  
−55°C to 125°C  
LCCC − FK  
Tube  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2004, Texas Instruments Incorporated  
ꢚ ꢝ ꢨ ꢠ ꢟꢫ ꢦꢥ ꢣꢤ ꢥꢟ ꢡꢨ ꢪꢜ ꢢꢝ ꢣ ꢣꢟ ꢲꢏ ꢕꢎ ꢘꢙ ꢐ ꢎꢈꢉꢂ ꢈꢂꢊ ꢢꢪꢪ ꢨꢢ ꢠ ꢢ ꢡꢧ ꢣꢧꢠ ꢤ ꢢ ꢠ ꢧ ꢣꢧ ꢤꢣꢧ ꢫ  
ꢣ ꢧ ꢤ ꢣꢜ ꢝꢱ ꢟꢞ ꢢ ꢪꢪ ꢨꢢ ꢠ ꢢ ꢡ ꢧ ꢣ ꢧ ꢠ ꢤ ꢬ  
ꢦ ꢝꢪ ꢧꢤꢤ ꢟ ꢣꢭꢧ ꢠ ꢯꢜ ꢤꢧ ꢝ ꢟꢣꢧ ꢫꢬ ꢚ ꢝ ꢢꢪ ꢪ ꢟ ꢣꢭꢧ ꢠ ꢨꢠ ꢟ ꢫꢦꢥ ꢣꢤ ꢊ ꢨꢠ ꢟ ꢫꢦꢥ ꢣꢜꢟ ꢝ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆ ꢇ ꢈꢈ ꢉꢃꢊ ꢀ ꢁꢋ ꢃ ꢄꢅꢆ ꢇꢈ ꢈ ꢉꢃ  
ꢌꢍ ꢎꢅꢏ ꢆ ꢐ ꢑꢆ ꢅ ꢒꢀ ꢀ ꢓꢏ ꢆ ꢄꢔ ꢑꢀ  
ꢓꢏ ꢆ ꢔ ꢕ ꢑꢖ ꢑꢕ ꢀꢔꢏ ꢐ ꢆꢏ ꢁ ꢗ  
SCDS025R − MAY 1995 − REVISED JANUARY 2004  
FUNCTION TABLE  
(each 5-bit bus switch)  
INPUTS  
INPUTS/OUTPUTS  
1OE  
2OE  
L
1B1−1B5  
1A1−1A5  
1A1−1A5  
Z
2B1−2B5  
2A1−2A5  
Z
L
L
H
H
H
L
2A1−2A5  
Z
H
Z
logic diagram (positive logic)  
3
2
1B1  
1B5  
1A1  
1A5  
11  
10  
1
1OE  
2A1  
14  
15  
23  
2B1  
2B5  
22  
13  
2A5  
2OE  
Pin numbers shown are for the DB, DBQ, DGV, DW, JT, PW, and W packages.  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage range, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V  
CC  
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V  
I
Continuous channel current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA  
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA  
IK I/O  
Package thermal impedance, θ (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63°C/W  
JA  
DBQ package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61°C/W  
DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W  
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46°C/W  
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88°C/W  
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C  
stg  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.  
2. The package thermal impedance is calculated in accordance with JESD 51-7.  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SCDS025R − MAY 1995 − REVISED JANUARY 2004  
recommended operating conditions (see Note 3)  
SN54CBTD3384 SN74CBTD3384  
UNIT  
MIN  
4.5  
2
MAX  
MIN  
4.5  
2
MAX  
V
V
V
Supply voltage  
5.5  
5.5  
V
V
CC  
IH  
IL  
High-level control input voltage  
Low-level control input voltage  
Operating free-air temperature  
0.8  
0.8  
85  
V
T
A
−55  
125  
−40  
°C  
In applications with fast edge rates, multiple outputs switching, and operating at high frequencies, the output may have little or no level-shifting  
effect.  
NOTE 3: All unused control inputs of the device must be held at V  
or GND to ensure proper device operation. Refer to the TI application report,  
CC  
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
SN54CBTD3384  
SN74CBTD3384  
PARAMETER  
TEST CONDITIONS  
I = −18 mA  
UNIT  
MIN TYP  
MAX  
MIN TYP  
MAX  
V
V
V
= 4.5 V,  
−1.2  
−1.2  
V
IK  
CC  
See Figure 2  
I
OH  
I
V
V
V
= 5.5 V,  
= 5.5 V,  
V = 5.5 V or GND  
1
1
µA  
I
CC  
CC  
CC  
I
I
I
O
= 0,  
V = V  
I CC  
or GND  
1.5  
1.5  
mA  
CC  
= 5.5 V, One input at 3.4 V,  
or GND  
Control inputs  
2.5  
2.5  
mA  
I  
CC  
Other inputs at V  
CC  
C
C
Control inputs V = 3 V or 0  
3
3
pF  
pF  
i
I
V
O
= 3 V or 0, OE = V  
CC  
3.5  
5
3.5  
5
io(OFF)  
I = 64 mA  
I
7
7
V = 0  
I
§
V
CC  
= 4.5 V  
I = 30 mA  
I
5
5
r
on  
V = 2.4 V,  
I
I = 15 mA  
I
35  
35  
50  
§
Typical values are at V  
CC  
= 5 V, T = 25°C.  
A
This is the increase in supply current for each input that is at the specified TTL voltage level, rather than V  
or GND.  
CC  
Measured by the voltage drop between the A and B terminals at the indicated current through the switch. On-state resistance is determined by  
the lowest voltage of the two (A or B) terminals.  
switching characteristics over recommended ranges of supply voltage and operating free-air  
temperature range, C = 50 pF (unless otherwise noted) (see Figure 1)  
L
SN54CBTD3384 SN74CBTD3384  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
UNIT  
MIN  
MAX  
0.25  
9.7  
MIN  
MAX  
0.25  
7
t
pd  
t
en  
t
A or B  
OE  
B or A  
A or B  
A or B  
ns  
ns  
ns  
2.2  
1.5  
2.3  
1.7  
8.6  
5.3  
OE  
dis  
The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when  
driven by an ideal voltage source (zero output impedance).  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆ ꢇ ꢈꢈ ꢉꢃꢊ ꢀ ꢁꢋ ꢃ ꢄꢅꢆ ꢇꢈ ꢈ ꢉꢃ  
ꢌꢍ ꢎꢅꢏ ꢆ ꢐ ꢑꢆ ꢅ ꢒꢀ ꢀ ꢓꢏ ꢆ ꢄꢔ ꢑꢀ  
ꢓꢏ ꢆ ꢔ ꢕ ꢑꢖ ꢑꢕ ꢀꢔꢏ ꢐ ꢆꢏ ꢁ ꢗ  
SCDS025R − MAY 1995 − REVISED JANUARY 2004  
PARAMETER MEASUREMENT INFORMATION  
7 V  
TEST  
S1  
S1  
Open  
GND  
500 Ω  
t
Open  
7 V  
From Output  
Under Test  
pd  
/t  
t
PLZ PZL  
t
/t  
Open  
PHZ PZH  
C
= 50 pF  
L
500 Ω  
(see Note A)  
3 V  
0 V  
Output  
Control  
1.5 V  
1.5 V  
LOAD CIRCUIT  
t
t
PLZ  
PZL  
Output  
Waveform 1  
S1 at 7 V  
3.5 V  
3 V  
0 V  
1.5 V  
Input  
V
V
+ 0.3 V  
1.5 V  
1.5 V  
OL  
V
(see Note B)  
OL  
OH  
t
t
PHZ  
PZH  
t
t
PHL  
PLH  
Output  
Waveform 2  
S1 at Open  
(see Note B)  
V
V
OH  
− 0.3 V  
OH  
1.5 V  
Output  
1.5 V  
1.5 V  
0 V  
V
OL  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY TIMES  
VOLTAGE WAVEFORMS  
ENABLE AND DISABLE TIMES  
NOTES: A.  
C includes probe and jig capacitance.  
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, Z = 50 , t 2.5 ns, t 2.5 ns.  
O
r
f
D. The outputs are measured one at a time with one transition per measurement.  
E.  
F.  
G.  
t
t
t
and t  
and t  
and t  
are the same as t  
.
dis  
PLZ  
PZL  
PLH  
PHZ  
PZH  
PHL  
are the same as t  
.
en  
are the same as t .  
pd  
Figure 1. Load Circuit and Voltage Waveforms  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SCDS025R − MAY 1995 − REVISED JANUARY 2004  
TYPICAL CHARACTERISTICS  
OUTPUT VOLTAGE HIGH  
OUTPUT VOLTAGE HIGH  
vs  
vs  
SUPPLY VOLTAGE  
SUPPLY VOLTAGE  
4
3.75  
3.5  
4
3.75  
3.5  
T
A
= 85°C  
T
A
= 25°C  
100 µA  
100 µA  
6 mA  
12 mA  
6 mA  
3.25  
3.25  
24 mA  
12 mA  
24 mA  
3
3
2.75  
2.75  
2.5  
2.25  
2
2.5  
2.25  
2
1.75  
1.5  
1.75  
1.5  
4.5  
4.75  
V
5
5.25  
5.5  
5.75  
4.5  
4.75  
5
5.25  
− Supply Voltage − V  
CC  
5.5  
5.75  
− Supply Voltage − V  
V
CC  
OUTPUT VOLTAGE HIGH  
vs  
SUPPLY VOLTAGE  
4
T
A
= 0°C  
3.75  
3.5  
100 µA  
3.25  
6 mA  
12 mA  
3
24 mA  
2.75  
2.5  
2.25  
2
1.75  
1.5  
4.5  
4.75  
5
5.25  
5.5  
5.75  
V
CC  
− Supply Voltage − V  
Figure 2. V  
Values  
OH  
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
PACKAGE OPTION ADDENDUM  
www.ti.com  
11-Apr-2013  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan Lead/Ball Finish  
MSL Peak Temp  
Op Temp (°C)  
Top-Side Markings  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4)  
5962-9752701Q3A  
ACTIVE  
LCCC  
FK  
28  
1
TBD  
Call TI  
Call TI  
-55 to 125  
5962-  
9752701Q3A  
SNJ54CBTD  
3384FK  
5962-9752701QKA  
5962-9752701QLA  
ACTIVE  
ACTIVE  
CFP  
W
24  
24  
1
1
TBD  
TBD  
Call TI  
Call TI  
Call TI  
Call TI  
-55 to 125  
-55 to 125  
5962-9752701QK  
A
SNJ54CBTD3384W  
CDIP  
JT  
5962-9752701QL  
A
SNJ54CBTD3384J  
T
74CBTD3384DBQRE4  
74CBTD3384DBQRG4  
74CBTD3384DGVRE4  
74CBTD3384DGVRG4  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
SSOP  
SSOP  
DBQ  
DBQ  
DGV  
DGV  
24  
24  
24  
24  
2500  
2500  
2000  
2000  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
CBTD3384  
CBTD3384  
CC384  
Green (RoHS  
& no Sb/Br)  
TVSOP  
TVSOP  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
CC384  
SN74CBTD3384DBLE  
SN74CBTD3384DBQR  
OBSOLETE  
ACTIVE  
SSOP  
SSOP  
DB  
24  
24  
TBD  
Call TI  
Call TI  
-40 to 85  
-40 to 85  
DBQ  
2500  
2000  
2000  
2000  
25  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
Level-2-260C-1 YEAR  
CBTD3384  
CC384  
SN74CBTD3384DBR  
SN74CBTD3384DBRG4  
SN74CBTD3384DGVR  
SN74CBTD3384DW  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
SSOP  
SSOP  
TVSOP  
SOIC  
DB  
DB  
24  
24  
24  
24  
24  
24  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
Green (RoHS  
& no Sb/Br)  
CC384  
DGV  
DW  
DW  
DW  
Green (RoHS  
& no Sb/Br)  
CC384  
Green (RoHS  
& no Sb/Br)  
CBTD3384  
CBTD3384  
CBTD3384  
SN74CBTD3384DWE4  
SN74CBTD3384DWG4  
SOIC  
25  
Green (RoHS  
& no Sb/Br)  
SOIC  
25  
Green (RoHS  
& no Sb/Br)  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
11-Apr-2013  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan Lead/Ball Finish  
MSL Peak Temp  
Op Temp (°C)  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
Top-Side Markings  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4)  
SN74CBTD3384DWR  
SN74CBTD3384DWRE4  
SN74CBTD3384DWRG4  
SN74CBTD3384PW  
ACTIVE  
SOIC  
SOIC  
DW  
24  
24  
24  
24  
24  
24  
2000  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
CBTD3384  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
DW  
DW  
PW  
PW  
PW  
2000  
2000  
60  
Green (RoHS  
& no Sb/Br)  
CBTD3384  
CBTD3384  
CC384  
SOIC  
Green (RoHS  
& no Sb/Br)  
TSSOP  
TSSOP  
TSSOP  
Green (RoHS  
& no Sb/Br)  
SN74CBTD3384PWE4  
SN74CBTD3384PWG4  
60  
Green (RoHS  
& no Sb/Br)  
CC384  
60  
Green (RoHS  
& no Sb/Br)  
CC384  
SN74CBTD3384PWLE  
SN74CBTD3384PWR  
OBSOLETE  
ACTIVE  
TSSOP  
TSSOP  
PW  
PW  
24  
24  
TBD  
Call TI  
Call TI  
-40 to 85  
-40 to 85  
2000  
2000  
2000  
1
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
Level-1-260C-UNLIM  
CC384  
CC384  
CC384  
SN74CBTD3384PWRE4  
SN74CBTD3384PWRG4  
SNJ54CBTD3384FK  
ACTIVE  
ACTIVE  
ACTIVE  
TSSOP  
TSSOP  
LCCC  
PW  
PW  
FK  
24  
24  
28  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
CU NIPDAU  
POST-PLATE  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
N / A for Pkg Type  
-40 to 85  
-40 to 85  
-55 to 125  
Green (RoHS  
& no Sb/Br)  
TBD  
TBD  
TBD  
5962-  
9752701Q3A  
SNJ54CBTD  
3384FK  
SNJ54CBTD3384JT  
SNJ54CBTD3384W  
ACTIVE  
ACTIVE  
CDIP  
CFP  
JT  
W
24  
24  
1
1
A42  
A42  
N / A for Pkg Type  
N / A for Pkg Type  
-55 to 125  
-55 to 125  
5962-9752701QL  
A
SNJ54CBTD3384J  
T
5962-9752701QK  
A
SNJ54CBTD3384W  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
Addendum-Page 2  
PACKAGE OPTION ADDENDUM  
www.ti.com  
11-Apr-2013  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4)  
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a  
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
OTHER QUALIFIED VERSIONS OF SN54CBTD3384, SN74CBTD3384 :  
Catalog: SN74CBTD3384  
Military: SN54CBTD3384  
NOTE: Qualified Version Definitions:  
Catalog - TI's standard catalog product  
Military - QML certified for Military and Defense Applications  
Addendum-Page 3  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
26-Jan-2013  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
SN74CBTD3384DBQR  
SN74CBTD3384DBR  
SSOP  
SSOP  
DBQ  
DB  
24  
24  
24  
24  
24  
2500  
2000  
2000  
2000  
2000  
330.0  
330.0  
330.0  
330.0  
330.0  
16.4  
16.4  
12.4  
24.4  
16.4  
6.5  
8.2  
6.9  
9.0  
8.8  
5.6  
2.1  
2.5  
1.6  
2.7  
1.6  
8.0  
12.0  
8.0  
16.0  
16.0  
12.0  
24.0  
16.0  
Q1  
Q1  
Q1  
Q1  
Q1  
SN74CBTD3384DGVR TVSOP  
DGV  
DW  
PW  
SN74CBTD3384DWR  
SN74CBTD3384PWR  
SOIC  
10.75 15.7  
6.95 8.3  
12.0  
8.0  
TSSOP  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
26-Jan-2013  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
SN74CBTD3384DBQR  
SN74CBTD3384DBR  
SN74CBTD3384DGVR  
SN74CBTD3384DWR  
SN74CBTD3384PWR  
SSOP  
SSOP  
TVSOP  
SOIC  
DBQ  
DB  
24  
24  
24  
24  
24  
2500  
2000  
2000  
2000  
2000  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
38.0  
38.0  
35.0  
45.0  
38.0  
DGV  
DW  
PW  
TSSOP  
Pack Materials-Page 2  
MECHANICAL DATA  
MCER004A – JANUARY 1995 – REVISED JANUARY 1997  
JT (R-GDIP-T**)  
CERAMIC DUAL-IN-LINE  
24 LEADS SHOWN  
PINS **  
A
24  
28  
DIM  
13  
24  
1.280  
(32,51) (37,08)  
1.460  
A MAX  
1.240  
(31,50) (36,58)  
1.440  
B
A MIN  
B MAX  
B MIN  
0.300  
(7,62)  
0.291  
(7,39)  
1
12  
0.070 (1,78)  
0.030 (0,76)  
0.245  
(6,22)  
0.285  
(7,24)  
0.320 (8,13)  
0.290 (7,37)  
0.015 (0,38) MIN  
0.100 (2,54) MAX  
0.200 (5,08) MAX  
Seating Plane  
0.130 (3,30) MIN  
0.023 (0,58)  
0.015 (0,38)  
0°–15°  
0.014 (0,36)  
0.008 (0,20)  
0.100 (2,54)  
4040110/C 08/96  
NOTES: A. All linear dimensions are in inches (millimeters).  
B. This drawing is subject to change without notice.  
C. This package can be hermetically sealed with a ceramic lid using glass frit.  
D. Index point is provided on cap for terminal identification.  
E. Falls within MIL STD 1835 GDIP3-T24, GDIP4-T28, and JEDEC MO-058 AA, MO-058 AB  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MECHANICAL DATA  
MCFP007 – OCTOBER 1994  
W (R-GDFP-F24)  
CERAMIC DUAL FLATPACK  
0.375 (9,53)  
0.340 (8,64)  
Base and Seating Plane  
0.006 (0,15)  
0.004 (0,10)  
0.045 (1,14)  
0.026 (0,66)  
0.090 (2,29)  
0.045 (1,14)  
0.395 (10,03)  
0.360 (9,14)  
0.360 (9,14)  
0.240 (6,10)  
0.360 (9,14)  
0.240 (6,10)  
0.019 (0,48)  
0.015 (0,38)  
1
24  
0.050 (1,27)  
0.640 (16,26)  
0.490 (12,45)  
0.030 (0,76)  
0.015 (0,38)  
12  
13  
30° TYP  
1.115 (28,32)  
0.840 (21,34)  
4040180-5/B 03/95  
NOTES: A. All linear dimensions are in inches (millimeters).  
B. This drawing is subject to change without notice.  
C. This package can be hermetically sealed with a ceramic lid using glass frit.  
D. Falls within MIL-STD-1835 GDFP2-F24 and JEDEC MO-070AD  
E. Index point is provided on cap for terminal identification only.  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MECHANICAL DATA  
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000  
DGV (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE  
24 PINS SHOWN  
0,23  
0,13  
M
0,07  
0,40  
24  
13  
0,16 NOM  
4,50  
4,30  
6,60  
6,20  
Gage Plane  
0,25  
0°ā8°  
0,75  
1
12  
0,50  
A
Seating Plane  
0,08  
0,15  
0,05  
1,20 MAX  
PINS **  
14  
16  
20  
24  
38  
48  
56  
DIM  
A MAX  
A MIN  
3,70  
3,50  
3,70  
3,50  
5,10  
4,90  
5,10  
4,90  
7,90  
7,70  
9,80  
9,60  
11,40  
11,20  
4073251/E 08/00  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.  
D. Falls within JEDEC: 24/48 Pins – MO-153  
14/16/20/56 Pins – MO-194  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MECHANICAL DATA  
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001  
DB (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE  
28 PINS SHOWN  
0,38  
0,22  
0,65  
28  
M
0,15  
15  
0,25  
0,09  
5,60  
5,00  
8,20  
7,40  
Gage Plane  
1
14  
0,25  
A
0°ā8°  
0,95  
0,55  
Seating Plane  
0,10  
2,00 MAX  
0,05 MIN  
PINS **  
14  
16  
20  
24  
28  
30  
38  
DIM  
6,50  
5,90  
6,50  
5,90  
7,50  
8,50  
7,90  
10,50  
9,90  
10,50 12,90  
A MAX  
A MIN  
6,90  
9,90  
12,30  
4040065 /E 12/01  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.  
D. Falls within JEDEC MO-150  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other  
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest  
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supplied at the time of order acknowledgment.  
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms  
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary  
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TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and  
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