SN74AVCAH164245_07 [TI]

16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS; 可配置电压转换和3态输出的16位双电源总线收发器
SN74AVCAH164245_07
型号: SN74AVCAH164245_07
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
可配置电压转换和3态输出的16位双电源总线收发器

总线收发器 输出元件
文件: 总16页 (文件大小:385K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SN74AVCAH164245  
16-BIT DUAL-SUPPLY BUS TRANSCEIVER  
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS  
www.ti.com  
SCES396AJULY 2002REVISED JUNE 2005  
FEATURES  
Ioff Supports Partial-Power-Down Mode  
Operation  
Member of the Texas Instruments Widebus™  
Family  
Fully Configurable Dual-Rail Design Allows  
Each Port to Operate Over the Full 1.4-V to  
3.6-V Power-Supply Range  
DOC™ Circuitry Dynamically Changes Output  
Impedance, Resulting in Noise Reduction  
Without Speed Degradation  
Bus Hold on Data Inputs Eliminates the Need  
for External Pullup/Pulldown Resistors  
Dynamic Drive Capability Is Equivalent to  
Standard Outputs With IOH and IOL of ±24 mA  
at 2.5-V VCC  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
Control Inputs VIH/VIL Levels Are Referenced  
to VCCA Voltage  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
If Either VCC Input Is at GND, Both Ports Are in  
the High-Impedance State  
– 1000-V Charged-Device Model (C101)  
Overvoltage-Tolerant Inputs/Outputs Allow  
Mixed-Voltage-Mode Data Communications  
DESCRIPTION/ORDERING INFORMATION  
This 16-bit (dual-octal) noninverting bus transceiver uses two separate configurable power-supply rails. The  
A port is designed to track VCCA. VCCA accepts any supply voltage from 1.4 V to 3.6 V. The B port is designed to  
track VCCB. VCCB accepts any supply voltage from 1.4 V to 3.6 V. This allows for universal low-voltage  
bidirectional translation between any of the 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.  
The SN74AVCAH164245 is designed for asynchronous communication between data buses. The device  
transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the  
direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are  
effectively isolated.  
The SN74AVCAH164245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by VCCA  
.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or  
pulldown resistors with the bus-hold circuitry is not recommended.  
To ensure the high-impedance state during power up or power down, OE should be tied to VCCA through a pullup  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,  
preventing damaging current backflow through the device when it is powered down. If either VCC input is at GND,  
then both ports are in the high-impedance state.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
SN74AVCAH164245GR  
TOP-SIDE MARKING  
AVCAH164245  
WAH4245  
TSSOP – DGG  
TVSOP – DGV  
VFBGA – GQL  
Tape and reel  
–40°C to 85°C  
Tape and reel  
Tape and reel  
SN74AVCAH164245VR  
SN74AVCAH164245KR  
WAH4245  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus, DOC are trademarks of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2002–2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
SN74AVCAH164245  
16-BIT DUAL-SUPPLY BUS TRANSCEIVER  
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS  
www.ti.com  
SCES396AJULY 2002REVISED JUNE 2005  
TERMINAL ASSIGNMENTS  
DGG OR DGV PACKAGE  
(TOP VIEW)  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
1DIR  
1B1  
1B2  
GND  
1B3  
1B4  
1OE  
1A1  
1A2  
GND  
1A3  
1A4  
2
3
4
5
6
7
V
CCB  
V
CCA  
8
1B5  
1B6  
GND  
1B7  
1B8  
2B1  
2B2  
GND  
2B3  
2B4  
1A5  
1A6  
GND  
1A7  
1A8  
2A1  
2A2  
GND  
2A3  
2A4  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
V
CCB  
V
CCA  
2B5  
2B6  
GND  
2B7  
2B8  
2DIR  
2A5  
2A6  
GND  
2A7  
2A8  
2OE  
2
SN74AVCAH164245  
16-BIT DUAL-SUPPLY BUS TRANSCEIVER  
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS  
www.ti.com  
SCES396AJULY 2002REVISED JUNE 2005  
GQL PACKAGE  
(TOP VIEW)  
1
2
3
4
5
6
A
B
C
D
E
F
G
H
J
K
TERMINAL ASSIGNMENTS(1)  
1
2
3
4
5
6
A
B
C
D
E
F
1DIR  
1B2  
1B4  
1B6  
1B8  
2B1  
2B3  
2B5  
2B7  
2DIR  
NC  
NC  
NC  
NC  
1OE  
1A2  
1A4  
1A6  
1A8  
2A1  
2A3  
2A5  
2A7  
2OE  
1B1  
1B3  
1B5  
1B7  
2B2  
2B4  
2B6  
2B8  
NC  
GND  
VCCB  
GND  
GND  
VCCA  
GND  
1A1  
1A3  
1A5  
1A7  
2A2  
2A4  
2A6  
2A8  
NC  
G
H
J
GND  
VCCB  
GND  
NC  
GND  
VCCA  
GND  
NC  
K
(1) NC – No internal connection  
FUNCTION TABLE  
(EACH 8-BIT SECTION)  
INPUTS  
OPERATION  
OE  
L
DIR  
L
B data to A bus  
A data to B bus  
Isolation  
L
H
H
X
3
SN74AVCAH164245  
16-BIT DUAL-SUPPLY BUS TRANSCEIVER  
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS  
www.ti.com  
SCES396AJULY 2002REVISED JUNE 2005  
LOGIC DIAGRAM (POSITIVE LOGIC)  
24  
1
2DIR  
1DIR  
1A1  
48  
25  
1OE  
1B1  
2OE  
36  
47  
2A1  
13  
2
2B1  
To Seven Other Channels  
To Seven Other Channels  
Pin numbers shown are for the DGG and DGV packages.  
Absolute Maximum Ratings(1)  
over operating free-air temperature range (unless otherwise noted)  
MIN  
MAX  
UNIT  
VCCA  
Supply voltage range  
VCCB  
–0.5  
4.6  
V
I/O ports (A port)  
I/O ports (B port)  
Control inputs  
A port  
–0.5  
–0.5  
–0.5  
–0.5  
–0.5  
4.6  
4.6  
4.6  
4.6  
4.6  
VI  
Input voltage range(2)  
V
Voltage range applied to any output in the high-impedance or  
power-off state(2)  
VO  
VO  
V
V
B port  
A port  
–0.5 VCCA + 0.5  
Voltage range applied to any output in the high or low state(2)(3)  
B port  
–0.5 VCCB + 0.5  
IIK  
IOK  
IO  
Input clamp current  
VI < 0  
–50  
–50  
±50  
±100  
70  
mA  
mA  
mA  
mA  
Output clamp current  
VO < 0  
Continuous output current  
Continuous current through VCCA, VCCB, or GND  
DGG package  
DGV package  
GQL package  
θJA  
Package thermal impedance(4)  
58  
°C/W  
28  
Tstg  
Storage temperature range  
–65  
150  
°C  
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings  
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating  
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
(2) The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.  
(3) The output positive-voltage rating may be exceeded up to 4.6 V maximum if the output current rating is observed.  
(4) The package thermal impedance is calculated in accordance with JESD 51-7.  
4
SN74AVCAH164245  
16-BIT DUAL-SUPPLY BUS TRANSCEIVER  
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS  
www.ti.com  
SCES396AJULY 2002REVISED JUNE 2005  
Recommended Operating Conditions(1)(2)(3)  
VCCI  
VCCO  
MIN  
MAX UNIT  
VCCA  
VCCB  
Supply voltage  
Supply voltage  
1.4  
3.6  
3.6  
V
V
1.4  
1.4 V to 1.95 V  
1.95 V to 2.7 V  
2.7 V to 3.6 V  
1.4 V to 1.95 V  
1.95 V to 2.7 V  
2.7 V to 3.6 V  
1.4 V to 1.95 V  
1.95 V to 2.7 V  
2.7 V to 3.6 V  
1.4 V to 1.95 V  
1.95 V to 2.7 V  
2.7 V to 3.6 V  
VCCI × 0.65  
VIH  
VIL  
VIH  
VIL  
High-level input voltage Data inputs  
1.7  
2
V
V
V
V
VCCI × 0.35  
Low-level input voltage  
High-level input voltage  
Low-level input voltage  
Data inputs  
0.7  
0.8  
VCCA × 0.65  
Control inputs  
(referenced to VCCA  
1.7  
2
)
)
VCCA × 0.35  
Control inputs  
(referenced to VCCA  
0.7  
0.8  
3.6  
VCCO  
3.6  
–2  
–4  
–8  
–12  
2
VI  
Input voltage  
0
0
0
V
V
Active state  
3-state  
VO  
Output voltage  
1.4 V to 1.6 V  
1.65 V to 1.95 V  
2.3 V to 2.7 V  
3 V to 3.6 V  
IOH  
High-level output current  
Low-level output current  
mA  
mA  
1.4 V to 1.6 V  
1.65 V to 1.95 V  
2.3 V to 2.7 V  
3 V to 3.6 V  
4
IOL  
8
12  
5
t/v  
Input transition rise or fall rate  
Operating free-air temperature  
ns/V  
°C  
TA  
–40  
85  
(1) VCCI is the VCC associated with the data input port.  
(2) VCCO is the VCC associated with the output port.  
(3) All unused data inputs of the device must be held at VCCI or GND to ensure proper device operation. Refer to the TI application report,  
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.  
5
SN74AVCAH164245  
16-BIT DUAL-SUPPLY BUS TRANSCEIVER  
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS  
www.ti.com  
SCES396AJULY 2002REVISED JUNE 2005  
Electrical Characteristics(1)(2)  
over recommended operating free-air temperature range (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
VCCA  
VCCB  
MIN TYP(3)  
MAX UNIT  
IOH = –100 µA,  
VI = VIH  
VI = VIH  
VI = VIH  
VI = VIH  
VI = VIH  
VI = VIL  
VI = VIL  
VI = VIL  
VI = VIL  
VI = VIL  
1.4 V to 3.6 V 1.4 V to 3.6 V VCCO – 0.2 V  
IOH = –2 mA,  
IOH = –4 mA,  
IOH = –8 mA,  
IOH = –12 mA,  
IOH = 100 µA,  
IOH = 2 mA,  
IOH = 4 mA,  
IOH = 8 mA,  
IOH = 12 mA,  
1.4 V  
1.65 V  
2.3 V  
3 V  
1.4 V  
1.65 V  
2.3 V  
3 V  
1.05  
1.2  
VOH  
V
1.75  
2.3  
1.4 V to 3.6 V 1.4 V to 3.6 V  
0.2  
1.4 V  
1.65 V  
2.3 V  
1.4 V  
1.65 V  
2.3 V  
3 V  
0.35  
VOL  
0.45  
0.55  
0.7  
V
3 V  
II  
Control inputs VI = VCCA or GND  
VI = 0.49 V  
1.4 V to 3.6 V  
1.4 V  
3.6 V  
1.4 V  
1.65 V  
2.3 V  
3 V  
±2.5  
µA  
µA  
11  
30  
VI = 0.57 V  
1.65 V  
2.3 V  
(4)  
IBHL  
VI = 0.7 V  
45  
75  
VI = 0.8 V  
3 V  
VI = 0.91 V  
1.4 V  
1.4 V  
1.65 V  
2.3 V  
3 V  
–11  
–30  
VI = 1.07 V  
1.65 V  
2.3 V  
(5)  
IBHH  
µA  
µA  
µA  
VI = 1.7 V  
–45  
–75  
VI = 2 V  
3 V  
1.6 V  
1.6 V  
1.95 V  
2.7 V  
3.6 V  
1.6 V  
1.95 V  
2.7 V  
3.6 V  
0 to 3.6 V  
0 V  
100  
1.95 V  
2.7 V  
200  
(6)  
IBHLO  
VI = 0 to VCC  
300  
3.6 V  
525  
1.6 V  
–100  
–200  
–300  
–525  
1.95 V  
2.7 V  
(7)  
IBHHO  
VI = 0 to VCC  
3.6 V  
A port  
0 V  
±10  
±10  
Ioff  
VI or VO = 0 to 3.6 V  
µA  
µA  
B port  
0 to 3.6 V  
3.6 V  
A or B ports  
B port  
OE = VIH  
3.6 V  
3.6 V  
0 V  
±12.5  
±12.5  
±12.5  
VO = VCCO or GND,  
VI = VCCI or GND  
(8)  
IOZ  
0 V  
OE = don't care  
A port  
3.6 V  
(1) VCCO is the VCC associated with the output port.  
(2) VCCI is the VCC associated with the input port.  
(3) All typical values are at TA = 25°C.  
(4) The bus-hold circuit can sink at least the minimum low sustaining current at VIL max. IBHL should be measured after lowering VIN to GND  
and then raising it to VIL max.  
(5) The bus-hold circuit can source at least the minimum high sustaining current at VIH min. IBHH should be measured after raising VIN to  
VCC and then lowering it to VIH min.  
(6) An external driver must source at least IBHLO to switch this node from low to high.  
(7) An external driver must sink at least IBHHO to switch this node from high to low.  
(8) For I/O ports, the parameter IOZ includes the input leakage current.  
6
SN74AVCAH164245  
16-BIT DUAL-SUPPLY BUS TRANSCEIVER  
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS  
www.ti.com  
SCES396AJULY 2002REVISED JUNE 2005  
Electrical Characteristics(1)(continued)  
over recommended operating free-air temperature range (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
VCCA  
1.6 V  
1.95 V  
2.7 V  
0 V  
VCCB  
1.6 V  
1.95 V  
2.7 V  
3.6 V  
0 V  
MIN TYP(2)  
MAX UNIT  
20  
20  
30  
µA  
ICCA  
VI = VCCI or GND,  
IO = 0  
–40  
3.6 V  
3.6 V  
1.6 V  
1.95 V  
2.7 V  
0 V  
40  
40  
20  
20  
3.6 V  
1.6 V  
1.95 V  
2.7 V  
3.6 V  
0 V  
30  
µA  
40  
ICCB  
VI = VCCI or GND,  
IO = 0  
3.6 V  
3.6 V  
3.3 V  
3.3 V  
–40  
40  
3.6 V  
3.3 V  
3.3 V  
Ci  
Control inputs VI = 3.3 V or GND  
A or B ports VO = 3.3 V or GND  
4
5
pF  
pF  
Cio  
(1) VCCI is the VCC associated with the input port.  
(2) All typical values are at TA = 25°C.  
Switching Characteristics  
over recommended operating free-air temperature range, VCCA = 1.5 V ± 0.1 V (see Figure 2)  
VCCB = 1.5 V  
± 0.1 V  
VCCB = 1.8 V  
± 0.15 V  
VCCB = 2.5 V  
± 0.2 V  
VCCB = 3.3 V  
± 0.3 V  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
UNIT  
MIN  
1.7  
1.8  
2.6  
2.7  
2.1  
2.1  
MAX  
6.7  
6.8  
8.4  
8.6  
7
MIN  
1.9  
2.2  
2.7  
3.2  
2.5  
2.5  
MAX  
6.3  
7.4  
8.2  
10.2  
7
MIN MAX  
MIN MAX  
A
B
B
A
A
B
A
B
1.8  
2.1  
2.3  
3.2  
1.7  
2.1  
5.5  
7.6  
1.7  
2.1  
2.1  
3.2  
2
5.8  
7.3  
tpd  
ten  
tdis  
ns  
ns  
ns  
6.3  
5.6  
OE  
OE  
10.8  
5.3  
10.7  
6.1  
7.1  
7.1  
6.5  
2.1  
6.4  
Switching Characteristics  
over recommended operating free-air temperature range, VCCA = 1.8 V ± 0.15 V (see Figure 2)  
VCCB = 1.5 V  
± 0.1 V  
VCCB = 1.8 V  
± 0.15 V  
VCCB = 2.5 V  
± 0.2 V  
VCCB = 3.3 V  
± 0.3 V  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
UNIT  
MIN  
1.7  
1.4  
2.5  
1.8  
2.1  
2.1  
MAX  
6.4  
5.5  
8
MIN  
1.8  
1.8  
2.7  
2.7  
2.5  
2.5  
MAX  
6
MIN MAX  
MIN  
1.6  
1.8  
2
MAX  
4.3  
5.5  
5.1  
8.1  
5
A
B
B
A
A
B
A
B
1.7  
1.8  
2.2  
2.7  
1.5  
2
4.7  
5.8  
5.8  
8.1  
4.5  
5.5  
tpd  
ten  
tdis  
ns  
ns  
ns  
6
7.8  
7.8  
6.4  
6.4  
OE  
OE  
6.7  
6.4  
6.6  
2.7  
1.8  
2
5.5  
7
SN74AVCAH164245  
16-BIT DUAL-SUPPLY BUS TRANSCEIVER  
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS  
www.ti.com  
SCES396AJULY 2002REVISED JUNE 2005  
Switching Characteristics  
over recommended operating free-air temperature range, VCCA = 2.5 V ± 0.2 V (see Figure 2)  
VCCB = 1.5 V  
± 0.1 V  
VCCB = 1.8 V  
± 0.15 V  
VCCB = 2.5 V  
± 0.2 V  
VCCB = 3.3 V  
± 0.3 V  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
UNIT  
MIN  
1.6  
1.3  
2.6  
1.2  
2
MAX  
6
MIN  
1.8  
1.7  
2.7  
2.2  
2.3  
1.7  
MAX  
5.6  
4.4  
7.2  
5.1  
5.7  
4.5  
MIN  
1.5  
1.5  
2.2  
2.2  
1.4  
1.4  
MAX  
4
MIN MAX  
A
B
B
A
A
B
A
B
1.4  
1.4  
2
3.4  
3.7  
4.5  
5.3  
4
tpd  
ten  
tdis  
ns  
ns  
ns  
4.6  
7.4  
4.1  
5.7  
4.5  
4
5.3  
5.3  
3.7  
3.7  
OE  
OE  
2.2  
1.6  
1.4  
0.9  
3.7  
Switching Characteristics  
over recommended operating free-air temperature range, VCCA = 3.3 V ± 0.3 V (see Figure 2)  
VCCB = 1.5 V  
± 0.1 V  
VCCB = 1.8 V  
± 0.15 V  
VCCB = 2.5 V  
± 0.2 V  
VCCB = 3.3 V  
± 0.3 V  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
UNIT  
MIN  
1.5  
1.3  
2.5  
0.8  
1.2  
1.2  
MAX  
5.9  
4.5  
7
MIN  
1.7  
1.6  
2.6  
1.9  
2.2  
1.7  
MAX  
5.4  
3.8  
6.9  
4
MIN  
1.5  
1.5  
2.1  
2
MAX  
3.7  
3.3  
5
MIN  
1.4  
1.4  
1.9  
1.9  
1.5  
1.5  
MAX  
3.1  
3.1  
4.1  
4.1  
3.6  
3.6  
A
B
B
A
A
B
A
B
tpd  
ten  
tdis  
ns  
ns  
ns  
OE  
OE  
2.6  
5.4  
5.4  
4.1  
3.3  
3.6  
5.2  
4.4  
1.2  
1.5  
Operating Characteristics  
VCCA and VCCB = 3.3 V, TA = 25°C  
PARAMETER  
TEST CONDITIONS  
TYP UNIT  
Outputs enabled  
Outputs disabled  
Outputs enabled  
Outputs disabled  
Outputs enabled  
Outputs disabled  
Outputs enabled  
Outputs disabled  
14  
Power dissipation capacitance per transceiver,  
A-port input, B-port output  
7
pF  
20  
CpdA  
CL = 0,  
f = 10 MHz  
f = 10 MHz  
Power dissipation capacitance per transceiver,  
B-port input, A-port output  
7
14  
Power dissipation capacitance per transceiver,  
A-port input, B-port output  
7
pF  
20  
CpdB  
CL = 0,  
Power dissipation capacitance per transceiver,  
B-port input, A-port output  
7
8
SN74AVCAH164245  
16-BIT DUAL-SUPPLY BUS TRANSCEIVER  
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS  
www.ti.com  
SCES396AJULY 2002REVISED JUNE 2005  
Output Description  
The DOC™ circuitry is implemented, which, during the transition, initially lowers the output impedance to  
effectively drive the load and, subsequently, raises the impedance to reduce noise. Figure 1 shows typical VOL vs  
IOL and VOH vs IOH curves to illustrate the output impedance and drive capability of the circuit. At the beginning of  
the signal transition, the DOC circuit provides a maximum dynamic drive that is equivalent to a high-drive  
standard-output device. For more information, refer to the TI application reports, AVC Logic Family Technology  
and Applications, literature number SCEA006, and Dynamic Output Control (DOC) Circuitry Technology and  
Applications, literature number SCEA009.  
3.2  
T
A
= 25°C  
T
A
= 25°C  
Process = Nominal  
Process = Nominal  
2.8  
2.4  
2.0  
2.8  
2.4  
2.0  
V
CC  
= 3.3 V  
1.6  
1.2  
0.8  
0.4  
1.6  
1.2  
0.8  
0.4  
V
CC  
= 2.5 V  
V
CC  
= 1.8 V  
V
CC  
= 3.3 V  
V
CC  
= 2.5 V  
V
CC  
= 1.8 V  
0
17  
34  
51  
68  
85 102 119 136 153 170  
-160 -144 -128 -112 -96 -80 -64 -48 -32 -16  
- Output Current - mA  
0
I
- Output Current - mA  
I
OH  
OL  
Figure 1. Output Voltage vs Output Current  
9
SN74AVCAH164245  
16-BIT DUAL-SUPPLY BUS TRANSCEIVER  
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS  
www.ti.com  
SCES396AJULY 2002REVISED JUNE 2005  
PARAMETER MEASUREMENT INFORMATION  
2 × V  
CCO  
TEST  
S1  
S1  
R
L
Open  
GND  
t
Open  
pd  
From Output  
Under Test  
t
t
/t  
/t  
2 × V  
CCO  
GND  
PLZ PZL  
PHZ PZH  
C
L
R
L
(see Note A)  
t
w
LOAD CIRCUIT  
V
CCI  
V
CCI  
/2  
V
CCI  
/2  
Input  
C
L
V
TP  
R
L
V
CCO  
0 V  
1.5 V ± 0.1 V  
2 k  
1 kΩ  
500 Ω  
500 Ω  
0.1 V  
0.15 V  
0.15 V  
0.3 V  
15 pF  
30 pF  
30 pF  
30 pF  
VOLTAGE WAVEFORMS  
PULSE DURATION  
1.8 V ± 0.15 V  
2.5 V ± 0.2 V  
3.3 V ± 0.3 V  
V
CCB  
Output  
Control  
(low-level  
enabling)  
V /2  
CCB  
V
CCB  
/2  
t
0 V  
t
PZL  
PLZ  
V
V
CCO  
Output  
Waveform 1  
V
CCI  
V
/2  
/2  
CCO  
Input  
V
CCI  
/2  
V
CCI  
/2  
V
+ V  
OL  
TP  
S1 at 2 × V  
CCO  
OL  
0 V  
(see Note B)  
t
t
PZH  
PHZ  
t
t
PHL  
PLH  
Output  
Waveform 2  
S1 at GND  
V
OH  
V
OH  
V
OH  
– V  
TP  
V
CCO  
Output  
V /2  
CCO  
V
CCO  
/2  
(see Note B)  
0 V  
V
OL  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY TIMES  
VOLTAGE WAVEFORMS  
ENABLE AND DISABLE TIMES  
NOTES: A. C includes probe and jig capacitance.  
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.  
C. All input pulses are supplied by generators having the following characteristics: PRRv10 MHz, Z = 50 , dv/dt 1 V/ns.  
O
D. The outputs are measured one at a time, with one transition per measurement.  
E.  
F.  
G.  
H.  
I.  
t
t
t
V
V
and t  
and t  
and t  
are the same as t  
.
dis  
.
PLZ  
PZL  
PLH  
PHZ  
are the same as t  
PZH  
en  
are the same as t .  
pd  
PHL  
is the V associated with the input port.  
CC  
CCI  
is the V associated with the output port.  
CCO  
CC  
Figure 2. Load Circuit and Voltage Waveforms  
10  
PACKAGE OPTION ADDENDUM  
www.ti.com  
30-Mar-2007  
PACKAGING INFORMATION  
Orderable Device  
74AVCAH164245GRE4  
74AVCAH164245VRE4  
74AVCAH164245ZQLR  
Status (1)  
ACTIVE  
ACTIVE  
ACTIVE  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
Drawing  
TSSOP  
DGG  
48  
48  
56  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
TVSOP  
DGV  
ZQL  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
BGA MI  
CROSTA  
R JUNI  
OR  
1000 Green (RoHS &  
no Sb/Br)  
SNAGCU  
Level-1-260C-UNLIM  
SN74AVCAH164245GR  
SN74AVCAH164245KR  
ACTIVE  
NRND  
TSSOP  
DGG  
GQL  
48  
56  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
BGA MI  
CROSTA  
R JUNI  
OR  
1000  
TBD  
SNPB  
Level-1-240C-UNLIM  
SN74AVCAH164245VR  
ACTIVE  
TVSOP  
DGV  
48  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and  
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS  
compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on  
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
Addendum-Page 1  
MECHANICAL DATA  
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000  
DGV (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE  
24 PINS SHOWN  
0,23  
0,13  
M
0,07  
0,40  
24  
13  
0,16 NOM  
4,50  
4,30  
6,60  
6,20  
Gage Plane  
0,25  
0°ā8°  
0,75  
1
12  
0,50  
A
Seating Plane  
0,08  
0,15  
0,05  
1,20 MAX  
PINS **  
14  
16  
20  
24  
38  
48  
56  
DIM  
A MAX  
A MIN  
3,70  
3,50  
3,70  
3,50  
5,10  
4,90  
5,10  
4,90  
7,90  
7,70  
9,80  
9,60  
11,40  
11,20  
4073251/E 08/00  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.  
D. Falls within JEDEC: 24/48 Pins – MO-153  
14/16/20/56 Pins – MO-194  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MECHANICAL DATA  
MTSS003D – JANUARY 1995 – REVISED JANUARY 1998  
DGG (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE PACKAGE  
48 PINS SHOWN  
0,27  
0,17  
M
0,08  
0,50  
48  
25  
6,20  
6,00  
8,30  
7,90  
0,15 NOM  
Gage Plane  
0,25  
1
24  
0°8°  
A
0,75  
0,50  
Seating Plane  
0,10  
0,15  
0,05  
1,20 MAX  
PINS **  
48  
56  
64  
DIM  
A MAX  
12,60  
12,40  
14,10  
13,90  
17,10  
16,90  
A MIN  
4040078/F 12/97  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold protrusion not to exceed 0,15.  
D. Falls within JEDEC MO-153  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,  
enhancements, improvements, and other changes to its products and services at any time and to  
discontinue any product or service without notice. Customers should obtain the latest relevant information  
before placing orders and should verify that such information is current and complete. All products are sold  
subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.  
TI warrants performance of its hardware products to the specifications applicable at the time of sale in  
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent  
TI deems necessary to support this warranty. Except where mandated by government requirements, testing  
of all parameters of each product is not necessarily performed.  
TI assumes no liability for applications assistance or customer product design. Customers are responsible  
for their products and applications using TI components. To minimize the risks associated with customer  
products and applications, customers should provide adequate design and operating safeguards.  
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent  
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amplifier.ti.com  
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interface.ti.com  
logic.ti.com  
www.ti.com/audio  
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www.ti.com/broadband  
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www.ti.com/military  
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Copyright © 2007, Texas Instruments Incorporated  

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