SN74AVCB324245_技术文档

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SCES485A − AUGUST 2003 − REVISED JUNE 2004

D

Member of the Texas Instruments

Widebus+ Family

DOC Circuitry Dynamically Changes

Output Impedance, Resulting in Noise

D

Inputs/Outputs Can Tolerate Up to 4.6 V,

Which Allows Mixed-Voltage-Mode Data

Communications

D

I

Supports Partial-Power-Down Mode

off

Reduction Without Speed Degradation

Dynamic Drive Capability Is Equivalent to

Standard Outputs With I and I of

Operation

D

Fully Configurable Dual-Rail Design Allows

Each Port to Operate Over the Full 1.4-V to

3.6-V Power-Supply Range

OH

OL

−

24 mA at 3-V V

15 mA at 2.3-V V

9 mA at 1.65-V V

CC

D

Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

6 mA at 1.4-V V

CC

ESD Protection Exceeds JESD 22

− 2000-V Human-Body Model (A114-A)

− 200-V Machine Model (A115-A)

D

Control Inputs V /V Levels are

IH IL

CCB

Referenced to V

Voltage

If Either V

Are in the High-Impedance State

Input Is at GND, Both Ports

− 1000-V Charged-Device Model (C101)

CC

description/ordering information

This 32-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is

designed to track V . V accepts any supply voltage from 1.4 V to 3.6 V. The B port is designed to track

CCA CCA

V

. V

accepts any supply voltage from 1.4 V to 3.6 V. This allows for universal low-voltage bidirectional

CCB CCB

translation between any of the 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.

The SN74AVCB324245 is designed for asynchronous communication between data buses. The device

transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the

direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are

effectively isolated.

The SN74AVCB324245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by V

.

CCB

To ensure the high-impedance state during power up or power down, OE shall be tied to V

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

through a pullup

CCB

This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,

off

preventing damaging current backflow through the device when it is powered down. If either V

both ports are in the high-impedance state.

input is at GND,

CC

ORDERING INFORMATION

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

†

PACKAGE

T

A

LFBGA − GKE

LFBGA − ZKE (Pb-free)

SN74AVCB324245KR

74AVCB324245ZKER

−40°C to 85°C

Tape and reel

WD4245

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are

available at www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

DOC and Widebus+ are trademarks of Texas Instruments.

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Copyright  2004, Texas Instruments Incorporated

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ꢡ ꢥ ꢢ ꢡꢚ ꢛꢯ ꢝꢜ ꢠ ꢨꢨ ꢦꢠ ꢞ ꢠ ꢟ ꢥ ꢡ ꢥ ꢞ ꢢ ꢪ

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1

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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SCES485A − AUGUST 2003 − REVISED JUNE 2004

GKE OR ZKE PACKAGE

(TOP VIEW)

terminal assignments

1

2

3

4

5

6

1

2

3

4

5

6

A

B

C

D

E

F

1B2

1B4

1B6

1B8

2B2

2B4

2B6

2B7

3B2

3B4

3B6

3B8

4B2

4B4

4B6

4B7

1B1

1B3

1B5

1B7

2B1

2B3

2B5

2B8

3B1

3B3

3B5

3B7

4B1

4B3

4B5

4B8

1DIR

GND

1OE

1A1

1A3

1A5

1A7

2A1

2A3

2A5

2A8

3A1

3A3

3A5

3A7

4A1

4A3

4A5

4A8

1A2

1A4

1A6

1A8

2A2

2A4

2A6

2A7

3A2

3A4

3A6

3A8

4A2

4A4

4A6

4A7

A

B

C

D

GND

V

CCB

GND

V

CCA

GND

E

F

G

H

J

V

CCB

GND

V

CCA

GND

G

H

J

2DIR

3DIR

GND

2OE

3OE

GND

K

L

K

L

V

CCB

GND

V

CCA

GND

M

N

P

R

T

M

N

P

R

T

GND

V

CCB

GND

V

CCA

GND

4DIR

4OE

FUNCTION TABLE

(each 8-bit section)

INPUTS

OPERATION

OE

DIR

L

B data to A bus

A data to B bus

Isolation

H

X

2

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SCES485A − AUGUST 2003 − REVISED JUNE 2004

logic diagram (positive logic)

A3

H3

E5

1DIR

2DIR

2A1

A4

A2

H4

1OE

1B1

2OE

A5

1A1

E2

2B1

To Seven Other Channels

J3

J5

T3

N5

3DIR

3A1

4DIR

4A1

J4

J2

T4

N2

3OE

3B1

4OE

4B1

To Seven Other Channels

3

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SCES485A − AUGUST 2003 − REVISED JUNE 2004

†

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage range, V

and V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V

CCA

CCB

Input voltage range, V (see Note 1): I/O ports (A port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V

I

I/O ports (B port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V

Control inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V

Voltage range applied to any output in the high-impedance or power-off state, V

O

(see Note 1): (A port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V

(B port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V

Voltage range applied to any output in the high or low state, V

O

(see Notes 1 and 2): (A port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V

(B port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V

+ 0.5 V

CCA

CCB

Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA

IK

OK

I

Output clamp current, I

(V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA

O

Continuous output current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA

Continuous current through each V

O

, V

, or GND pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA

CCA CCB

Package thermal impedance, θ (see Note 3): GKE/ZKE package . . . . . . . . . . . . . . . . . . . . . . . . . . . 40°C/W

JA

stg

Storage temperature range, T

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input voltage and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.

2. The output positive-voltage rating may be exceeded up to 4.6 V maximum if the output current rating is observed.

3. The package thermal impedance is calculated in accordance with JESD 51-7.

4

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SCES485A − AUGUST 2003 − REVISED JUNE 2004

recommended operating conditions (see Notes 4 through 6)

V

CCI

V

CCO

MIN

MAX

3.6

UNIT

V

Supply voltage

1.4

CCA

1.4

3.6

V

CCB

1.4 V to 1.95 V

1.95 V to 2.7 V

2.7 V to 3.6 V

1.4 V to 1.95 V

1.95 V to 2.7 V

2.7 V to 3.6 V

1.4 V to 1.95 V

1.95 V to 2.7 V

2.7 V to 3.6 V

1.4 V to 1.95 V

1.95 V to 2.7 V

2.7 V to 3.6 V

V

× 0.65

3.6

CCI

High-level input

voltage

1.7

3.6

V

Data inputs

V

IH

2

3.6

0

V

× 0.35

0.7

CCI

Low-level input

voltage

0

Data inputs

IL

0

0.8

V

CCB

× 0.65

V

CCB

High-level input

voltage

Control inputs

(Referenced to V

1.7

2

IH

)

CCB

0

V

CCB

× 0.35

0.7

Low-level input

voltage

Control inputs

(Referenced to V

0

V

IL

CCB

0

0.8

Output voltage

0

V

O

CCO

−2

1.4 V to 1.6 V

1.65 V to 1.95 V

2.3 V to 2.7 V

3 V to 3.6 V

−4

−8

−12

2

I

High-level output current

mA

OH

1.4 V to 1.6 V

1.65 V to 1.95 V

2.3 V to 2.7 V

3 V to 3.6 V

4

I

Low-level output current

OL

8

12

5

∆t/∆v

Input transition rise or fall rate

Operating free-air temperature

ns/V

T

A

−40

85

°C

NOTES: 4. V

is the V

associated with the data input port.

associated with the output port.

6. All unused data inputs of the device must be held at V

CCI

CC

5.

V

is the V

CC

CCO

or GND to ensure proper device operation. Refer to the TI application report,

CCI

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

5

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SCES485A − AUGUST 2003 − REVISED JUNE 2004

electrical characteristics over recommended operating free-air temperature range (unless

otherwise noted) (see Notes 4 and 5)

†

PARAMETER

TEST CONDITIONS

MIN TYP

−0.2

MAX

UNIT

V

CCB

CCA

I

= −100 µA

= −2 mA

= −4 mA

= −8 mA

= −12 mA

= 100 µA

= 2 mA

V = V

1.4 V to 3.6 V

1.4 V

1.4 V to 3.6 V

1.4 V

V

CCO

OH

I

IH

IL

IH

IL

V = V

I

1.05

OH

V = V

I

1.65 V

2.3 V

1.65 V

2.3 V

1.2

V

OH

V = V

I

1.75

OH

V = V

I

3 V

2.3

OH

V = V

I

1.4 V to 3.6 V

1.4 V

1.4 V to 3.6 V

1.4 V

0.2

0.35

0.45

0.55

0.7

OH

V = V

I

OH

= 4 mA

V = V

I

1.65 V

2.3 V

1.65 V

2.3 V

V

OH

OL

= 8 mA

V = V

I

OH

= 12 mA

V = V

I

3 V

OH

= −6 mA

= −9 mA

= −15 mA

= −24 mA

= 6 mA

V = V

1.4 V

1.05

1.2

OHD

I

V = V

I

1.65 V

2.3 V

1.65 V

2.3 V

V

OH

V = V

I

1.75

2.3

V = V

I

3 V

V = V

I

1.4 V

0.35

0.45

0.55

0.7

= 9 mA

V = V

I

1.65 V

2.3 V

1.65 V

2.3 V

OL

= 15 mA

= 24 mA

V = V

I

V = V

I

3 V

I

Control inputs V = V

or GND

CCB

1.4 V to 3.6 V

0 V

3.6 V

2.5

µA

I

A port

0 to 3.6 V

0 V

10

V or V = 0 to 3.6 V

I

off

O

B port

0 to 3.6 V

3.6 V

10

OE = V

IH

3.6 V

12.5

A or B ports

B port

V

= V

or GND,

CCO

or GND

O

‡

0 V

3.6 V

12.5

µA

I

OZ

OE = don’t

care

V = V

I

CCI

3.6 V

1.6 V

1.95 V

2.7 V

0 V

1.6 V

1.95 V

2.7 V

3.6 V

0 V

12.5

40

A port

40

60

I

V = V

or GND,

I

O

= 0

µA

CCA

I

CCI

−80

80

3.6 V

1.6 V

1.95 V

2.7 V

0 V

3.6 V

1.6 V

1.95 V

2.7 V

3.6 V

0 V

80

40

60

I

V = V

or GND,

I

O

= 0

µA

CCB

I

CCI

80

3.6 V

3.3 V

−80

80

3.6 V

3.3 V

C

Control inputs V = 3.3 V or GND

4

5

pF

i

I

A or B ports

V

O

= 3.3 V or GND

io

†

‡

All typical values are at T = 25°C.

A

For I/O ports, the parameter I

includes the input leakage current.

OZ

NOTES: 4.

5.

V

is the V

CCI CC

associated with the input port.

is the V

associated with the output port.

CCO

CC

6

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SCES485A − AUGUST 2003 − REVISED JUNE 2004

switching characteristics over recommended operating free-air temperature range,

V

= 1.5 V 0.1 V (see Figure 2)

CCA

V

= 1.5 V

0.1 V

V

= 1.8 V

0.15 V

V

= 2.5 V

0.2 V

V

= 3.3 V

0.3 V

CCB

FROM

(INPUT)

TO

(OUTPUT)

PARAMETER

UNIT

MIN

1.7

1.8

2.1

2.5

2.1

2.2

MAX

6.7

6.8

9

MIN

1.9

1.7

2.9

2.4

2.3

1.8

MAX

6.4

6.2

9.8

8

MIN

1.8

1.6

3.2

2.3

1.7

1.1

MAX

5.5

5.9

10

MIN

1.5

3

MAX

5.8

5.9

9.8

7.5

4.8

5.7

A

B

A

B

A

B

t

ns

pd

en

dis

OE

8.4

7.1

6.9

7.6

5.1

5.8

2.2

1.6

1.8

6.4

switching characteristics over recommended operating free-air temperature range,

V

= 1.8 V 0.15 V (see Figure 2)

CCA

V

= 1.5 V

0.1 V

V

= 1.8 V

0.15 V

V

= 2.5 V

0.2 V

V

= 3.3 V

0.3 V

CCB

FROM

(INPUT)

TO

(OUTPUT)

PARAMETER

UNIT

MIN

1.7

2

MAX

6.4

6.6

7.6

8.2

7

MIN

1.8

2.6

2.5

2.3

MAX

6

MIN

1.7

1.8

2.6

2.4

1.8

2.2

MAX

4.7

5.6

7.6

7.4

4.7

5.5

MIN

1.6

1.8

2.6

2.3

1.7

1.3

MAX

4.3

5.5

7.4

7.2

4.4

5.3

A

B

A

B

A

B

t

ns

pd

en

dis

6

1.8

2.5

1.8

2.5

7.7

7.5

6.3

6.1

OE

6.7

switching characteristics over recommended operating free-air temperature range,

V

= 2.5 V 0.2 V (see Figure 2)

CCA

V

= 1.5 V

0.1 V

V

= 1.8 V

0.15 V

V

= 2.5 V

0.2 V

V

= 3.3 V

0.3 V

CCB

FROM

(INPUT)

TO

(OUTPUT)

PARAMETER

UNIT

MIN

1.6

1.7

3.1

1.2

2.4

MAX

6

MIN

1.8

1.7

2.2

2.5

1.9

3

MAX

5.6

4.6

5.5

5.6

5

MIN

1.5

2.2

1.4

MAX

4

MIN

1.5

2.2

1.9

1.3

1.2

MAX

3.4

3.7

5.1

4.2

3.3

3

A

B

A

B

A

B

t

ns

pd

en

dis

5.4

5.7

6.1

5.8

6

4

5.3

3.6

OE

5.2

7

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ꢕꢌ ꢍ ꢖ ꢆ ꢗꢁ ꢘꢌ ꢙꢏ ꢓ ꢄꢇꢐ ꢔ ꢅ ꢗꢐꢍꢄꢙ ꢔ ꢍꢓ ꢄꢁ ꢀꢐ ꢄꢍ ꢌꢗ ꢁ ꢄꢁꢎ ꢈ ꢋꢀꢍꢄꢍ ꢔ ꢗ ꢏꢍ ꢑꢏꢍ ꢀ

SCES485A − AUGUST 2003 − REVISED JUNE 2004

switching characteristics over recommended operating free-air temperature range,

V

= 3.3 V 0.3 V (see Figure 2)

CCA

V

= 1.5 V

0.1 V

V

= 1.8 V

0.15 V

V

= 2.5 V

0.2 V

V

= 3.3 V

0.3 V

CCB

FROM

(INPUT)

TO

(OUTPUT)

PARAMETER

UNIT

MIN

1.5

1.6

2

MAX

5.9

5.8

4.9

5.1

6.9

5.5

MIN

1.7

1.5

2

MAX

5.4

4.2

4.5

4.6

5.5

4.5

MIN

1.5

2

MAX

3.7

3.3

4.3

5.2

3.8

3.5

MIN

1.4

1.9

1.5

1.2

MAX

3.1

4.1

3.5

A

B

A

B

A

B

t

ns

pd

en

dis

OE

2

2.2

1.6

1.3

2.3

2.1

1.9

operating characteristics, V

and V

= 3.3 V, T = 25°C

CCA

CCB

A

PARAMETER

TEST CONDITIONS

TYP

14

7

UNIT

Outputs enabled

Outputs disabled

Outputs enabled

Outputs disabled

Outputs enabled

Outputs disabled

Outputs enabled

Outputs disabled

Power-dissipation capacitance per transceiver,

A-port input, B-port output

C

(V

pdA

CCA

C

= 0,

f = 10 MHz

pF

L

)

20

7

Power-dissipation capacitance per transceiver,

B-port input, A-port output

20

7

Power-dissipation capacitance per transceiver,

A-port input, B-port output

C

pdB

pF

(V

CCB

)

14

7

Power-dissipation capacitance per transceiver,

B-port input, A-port output

8

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SCES485A − AUGUST 2003 − REVISED JUNE 2004

output description

The dynamic output control (DOC) circuitry is implemented, which, during the transition, initially lowers the

output impedance to effectively drive the load and, subsequently, raises the impedance to reduce noise.

Figure 1 shows typical V vs I and V

vs I

curves to illustrate the output impedance and drive capability

OL

OH

of the circuit. At the beginning of the signal transition, the DOC circuit provides a maximum dynamic drive that

is equivalent to a high-drive standard-output device. For more information, refer to the TI application reports,

AVC Logic Family Technology and Applications, literature number SCEA006, and Dynamic Output Control

(DOC) Circuitry Technology and Applications, literature number SCEA009.

3.2

T

= 25°C

T

= 25°C

A

Process = Nominal

2.8

2.4

2.0

2.8

2.4

2.0

V

= 3.3 V

CC

1.6

1.2

0.8

0.4

1.6

1.2

0.8

0.4

V

= 2.5 V

CC

V

= 1.8 V

CC

V

= 3.3 V

V

= 2.5 V

CC

V

= 1.8 V

CC

−160 −144 −128 −112 −96 −80 −64 −48 −32 −16

− Output Current − mA

0

17

34

51

68

85 102 119 136 153 170

0

I

− Output Current − mA

I

OH

OL

Figure 1. Typical Output Voltage vs Output Current

9

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ꢕ

ꢌ

ꢍ

ꢖ

ꢆ

ꢗ

ꢁ

ꢘꢌ

ꢙ

ꢏ

ꢓ

ꢄ

ꢇ

ꢐ

ꢔ

ꢅ

ꢗ

ꢐ

ꢍ

ꢄ

ꢙ

ꢔ

ꢍ

ꢓ

ꢄ

ꢁ

ꢀ

ꢐ

ꢄꢍ

ꢌ

ꢗ

ꢁ

ꢄ

ꢁ

ꢎ

ꢈ

ꢋ

ꢀ

ꢍ

ꢄ

ꢍ

ꢔ

ꢗ

ꢏ

ꢍ

ꢑ

ꢏ

ꢍ

ꢀ

SCES485A − AUGUST 2003 − REVISED JUNE 2004

PARAMETER MEASUREMENT INFORMATION

2 × V

CCO

TEST

S1

R

Open

GND

t

Open

L

pd

/t

From Output

Under Test

t

2 × V

CCO

GND

PLZ PZL

/t

PHZ PZH

t

C

L

R

L

(see Note A)

t

LOAD CIRCUIT

w

V

CCI

V /2

CCI

V /2

CCI

Input

V

TP

C

R

V

CCO

L

0 V

1.5 V 0.1 V

1.8 V 0.15 V

2.5 V 0.2 V

3.3 V 0.3 V

2 kΩ

1 kΩ

500 Ω

0.1 V

0.15 V

0.3 V

15 pF

30 pF

VOLTAGE WAVEFORMS

PULSE DURATION

V

CCB

Output

Control

(low-level

enabling)

V

CCB

/2

V

CCB

/2

0 V

t

PLZ

PZL

V

CCO

Output

Waveform 1

V

CCI

V

CCO

/2

Input

t

V /2

CCI

V /2

CCI

V

OL

+ V

TP

S1 at 2 × V

CCO

OL

0 V

(see Note B)

t

PZH

PHZ

t

PLH

PHL

Output

Waveform 2

S1 at GND

V

OH

V

OH

V

OH

− V

TP

V

CCO

Output

V

CCO

/2

V

/2

CCO

(see Note B)

0 V

V

OL

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES

VOLTAGE WAVEFORMS

ENABLE AND DISABLE TIMES

NOTES: A.

C

includes probe and jig capacitance.

L

B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.

C. All input pulses are supplied by generators having the following characteristics: PRRv10 MHz, Z = 50 Ω, dv/dt ≥ 1 V/ns,

O

dv/dt ≥1 V/ns.

D. The outputs are measured one at a time with one transition per measurement.

E.

F.

G.

H.

I.

t

V

and t

are the same as t

.

PLZ

PZL

PLH

PHZ

PZH

dis

are the same as t

are the same as t .

en

and t

PHL

is the V

pd

associated with the input port.

associated with the output port.

CC

CCI

CC

is the V

CCO

Figure 2. Load Circuit and Voltage Waveforms

10

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Mailing Address:

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Post Office Box 655303 Dallas, Texas 75265


型号：	SN74AVCB324245
厂家：	TEXAS INSTRUMENTS
描述：	32 BIT DUAL SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3 STATE OUTPUTS 可配置电压转换和3态输出32位双电源总线收发器总线收发器输出元件
文件：	总13页 (文件大小：329K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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