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SN74AVCB164245-Q1 [TI]

16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS; 可配置电压转换和3态输出的16位双电源总线收发器
SN74AVCB164245-Q1
型号： SN74AVCB164245-Q1
厂家： TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述：

16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
可配置电压转换和3态输出的16位双电源总线收发器

总线收发器 输出元件
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SN74AVCB164245-Q1  
www.ti.com  
SCES809A –MARCH 2010–REVISED MAY 2010  
16-BIT DUAL-SUPPLY BUS TRANSCEIVER  
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS  
Check for Samples: SN74AVCB164245-Q1  
1
FEATURES  
•
Qualified for Automotive Applications  
•
•
•
Overvoltage-Tolerant Inputs/Outputs Allow  
Mixed-Voltage-Mode Data Communications  
•
Member of the Texas Instruments Widebus™  
Family  
Ioff Supports Partial-Power-Down Mode  
Operation  
•
•
DOC™ Circuitry Dynamically Changes Output  
Impedance, Resulting in Noise Reduction  
Without Speed Degradation  
Fully Configurable Dual-Rail Design Allows  
Each Port to Operate Over Full 1.4-V to 3.6-V  
Power-Supply Range  
Dynamic Drive Capability Is Equivalent to  
Standard Outputs With IOH and IOL of ±24 mA at  
2.5-V VCC  
•
•
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
•
•
Control Inputs VIH/VIL Levels Are Referenced to  
VCCB Voltage  
ESD Protection Exceeds JESD 22  
–
–
–
2000-V Human-Body Model (A114-A)  
200-V Machine Model (A115-A)  
If Either VCC Input Is at GND, Both Ports Are in  
the High-Impedance State  
750-V Charged-Device Model (C101)  
DESCRIPTION  
This 16-bit (dual-octal) noninverting bus transceiver uses two separate configurable power-supply rails. The  
A port is designed to track VCCA. VCCA accepts any supply voltage from 1.4 V to 3.6 V. The B port is designed to  
track VCCB. VCCB accepts any supply voltage from 1.4 V to 3.6 V. This allows for universal low-voltage  
bidirectional translation between any of the 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.  
The SN74AVCB164245 is designed for asynchronous communication between data buses. The device transmits  
data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the  
direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are  
effectively isolated.  
The SN74AVCB164245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by VCCB  
.
To ensure the high-impedance state during power up or power down, OE should be tied to VCCB through a pullup  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,  
preventing damaging current backflow through the device when it is powered down. If either VCC input is at GND,  
both ports are in the high-impedance state.  
ORDERING INFORMATION(1)  
TA  
PACKAGE(2)  
ORDERABLE PART NUMBER  
TOP-SIDE MARKING  
AVCB164245Q  
–40°C to 125°C  
TSSOP – DGG  
Tape and reel  
CAVCB164245QDGGRQ1  
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI  
web site at www.ti.com.  
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2010, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
SN74AVCB164245-Q1  
SCES809A –MARCH 2010–REVISED MAY 2010  
www.ti.com  
TERMINAL ASSIGNMENTS  
DGG PACKAGE  
(TOP VIEW)  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
1DIR  
1B1  
1B2  
GND  
1B3  
1B4  
1OE  
1A1  
1A2  
GND  
1A3  
1A4  
2
3
4
5
6
7
V
V
CCA  
CCB  
8
1B5  
1B6  
GND  
1B7  
1B8  
2B1  
2B2  
GND  
2B3  
2B4  
1A5  
1A6  
GND  
1A7  
1A8  
2A1  
2A2  
GND  
2A3  
2A4  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
V
V
CCA  
CCB  
2B5  
2B6  
2A5  
2A6  
GND  
2A7  
2A8  
2OE  
GND  
2B7  
2B8  
2DIR  
FUNCTION TABLE  
(EACH 8-BIT SECTION)  
INPUTS  
OPERATION  
OE  
DIR  
L
L
L
B data to A bus  
A data to B bus  
Isolation  
H
H
X
2
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Copyright © 2010, Texas Instruments Incorporated  
Product Folder Link(s): SN74AVCB164245-Q1  
SN74AVCB164245-Q1  
www.ti.com  
SCES809A –MARCH 2010–REVISED MAY 2010  
LOGIC DIAGRAM (POSITIVE LOGIC)  
24  
1
2DIR  
1DIR  
48  
25  
1OE  
2OE  
36  
47  
1A1  
2A1  
13  
2
2B1  
1B1  
To Seven Other Channels  
To Seven Other Channels  
Pin numbers shown are for the DGG and DGV packages.  
Absolute Maximum Ratings(1)  
over operating free-air temperature range (unless otherwise noted)  
MIN  
MAX UNIT  
VCCA  
Supply voltage range  
VCCB  
–0.5  
4.6  
V
I/O ports (A port)  
I/O ports (B port)  
Control inputs  
A port  
–0.5  
–0.5  
–0.5  
–0.5  
–0.5  
4.6  
4.6  
4.6  
4.6  
4.6  
VI  
Input voltage range(2)  
V
Voltage range applied to any output in the high-impedance or power-off  
state(2)  
VO  
VO  
V
V
B port  
A port  
–0.5 VCCA + 0.5  
Voltage range applied to any output in the high or low state(2) (3)  
B port  
–0.5 VCCB + 0.5  
IIK  
IOK  
IO  
Input clamp current  
VI < 0  
–50  
–50  
mA  
mA  
mA  
mA  
Output clamp current  
VO < 0  
Continuous output current  
±50  
Continuous current through VCCA, VCCB, or GND  
Package thermal impedance(4)  
Storage temperature range  
±100  
qJA  
DGG package  
70 °C/W  
150 °C  
Tstg  
–65  
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings  
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating  
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
(2) The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.  
(3) The output positive-voltage rating may be exceeded up to 4.6 V maximum if the output current rating is observed.  
(4) The package thermal impedance is calculated in accordance with JESD 51-7.  
Copyright © 2010, Texas Instruments Incorporated  
Submit Documentation Feedback  
3
Product Folder Link(s): SN74AVCB164245-Q1  
SN74AVCB164245-Q1  
SCES809A –MARCH 2010–REVISED MAY 2010  
www.ti.com  
MAX UNIT  
Recommended Operating Conditions(1) (2) (3)  
over operating free-air temperature range (unless otherwise noted)  
VCCI  
VCCO  
MIN  
VCCA  
VCCB  
Supply voltage  
Supply voltage  
1.4  
3.6  
3.6  
V
V
1.4  
1.4 V to 1.95 V  
1.95 V to 2.7 V  
2.7 V to 3.6 V  
1.4 V to 1.95 V  
1.95 V to 2.7 V  
2.7 V to 3.6 V  
1.4 V to 1.95 V  
1.95 V to 2.7 V  
2.7 V to 3.6 V  
1.4 V to 1.95 V  
1.95 V to 2.7 V  
2.7 V to 3.6 V  
VCCI × 0.65  
VIH  
VIL  
VIH  
VIL  
High-level input voltage  
Low-level input voltage  
High-level input voltage  
Low-level input voltage  
Data inputs  
Data inputs  
1.7  
2
V
V
V
V
VCCI × 0.35  
0.7  
0.8  
VCCB × 0.65  
Control inputs  
(referenced to VCCB  
1.7  
2
)
)
VCCB × 0.35  
Control inputs  
(referenced to VCCB  
0.7  
0.8  
3.6  
VCCO  
3.6  
–2  
VI  
Input voltage  
0
0
0
V
V
Active state  
3-state  
VO  
Output voltage  
1.4 V to 1.6 V  
1.65 V to 1.95 V  
2.3 V to 2.7 V  
3 V to 3.6 V  
–4  
IOH  
High-level output current  
Low-level output current  
mA  
mA  
–8  
–12  
2
1.4 V to 1.6 V  
1.65 V to 1.95 V  
2.3 V to 2.7 V  
3 V to 3.6 V  
4
IOL  
8
12  
Δt/Δv Input transition rise or fall rate  
TA Operating free-air temperature  
(1) VCCI is the VCC associated with the data input port.  
(2) VCCO is the VCC associated with the data output port.  
5
ns/V  
°C  
–40  
125  
(3) All unused data inputs of the device must be held at VCCI or GND to ensure proper device operation. Refer to the TI application report,  
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.  
4
Submit Documentation Feedback  
Copyright © 2010, Texas Instruments Incorporated  
Product Folder Link(s): SN74AVCB164245-Q1  
SN74AVCB164245-Q1  
www.ti.com  
SCES809A –MARCH 2010–REVISED MAY 2010  
Electrical Characteristics(1) (2)  
over operating free-air temperature range (unless otherwise noted)  
TA = -40°C to 85°C  
MIN TYP(3) MAX  
TA = -40°C to 125°C  
MIN TYP(3) MAX  
PARAMETER  
TEST CONDITIONS  
VCCA  
VCCB  
UNIT  
1.4 V to  
3.6 V  
1.4 V to  
3.6 V  
VCCO  
– 0.2  
VCCO  
– 0.2  
IOH = –100 mA  
VI = VIH  
IOH = –2 mA  
IOH = –4 mA  
IOH = –8 mA  
IOH = –12 mA  
VI = VIH  
VI = VIH  
VI = VIH  
VI = VIH  
1.4 V  
1.65 V  
2.3 V  
3 V  
1.4 V  
1.65 V  
2.3 V  
3 V  
1.05  
1.2  
1.05  
1.2  
VOH  
V
1.75  
2.3  
1.75  
2.3  
1.4 V to  
3.6 V  
1.4 V to  
3.6 V  
IOH = 100 mA  
VI = VIL  
0.2  
0.2  
IOH = 2 mA  
IOH = 4 mA  
IOH = 8 mA  
IOH = 12 mA  
VI = VIL  
VI = VIL  
VI = VIL  
VI = VIL  
1.4 V  
1.65 V  
2.3 V  
3 V  
1.4 V  
1.65 V  
2.3 V  
3 V  
0.35  
0.45  
0.55  
0.7  
0.35  
0.45  
0.55  
0.7  
VOL  
V
Control  
inputs  
1.4 V to  
3.6 V  
II  
VI = VCCB or GND  
3.6 V  
±2.5  
±2.5  
mA  
mA  
A port  
B port  
0 V  
0 to 3.6 V  
0 V  
±10  
±10  
±10  
±10  
Ioff  
VI or VO = 0 to 3.6 V  
0 to 3.6 V  
A or B  
ports  
OE = VIH  
3.6 V  
3.6 V  
±12.5  
±12.5  
VO = VCCO or GND,  
VI = VCCI or GND  
(4)  
IOZ  
mA  
mA  
B port  
A port  
0 V  
3.6 V  
1.6 V  
1.95 V  
2.7 V  
0 V  
3.6 V  
0 V  
±12.5  
±12.5  
20  
±12.5  
±12.5  
35  
OE = don't  
care  
1.6 V  
1.95 V  
2.7 V  
3.6 V  
0 V  
20  
35  
30  
45  
ICCA  
VI = VCCI or GND,  
IO = 0  
-40  
40  
-50  
50  
3.6 V  
3.6 V  
1.6 V  
1.95 V  
2.7 V  
0 V  
3.6 V  
1.6 V  
1.95 V  
2.7 V  
3.6 V  
0 V  
40  
50  
20  
35  
20  
35  
30  
45  
ICCB  
VI = VCCI or GND,  
IO = 0  
mA  
40  
50  
3.6 V  
3.6 V  
-40  
40  
-50  
50  
3.6 V  
Control  
inputs  
Ci  
VI = 3.3 V or GND  
VO = 3.3 V or GND  
3.3 V  
3.3 V  
3.3 V  
3.3 V  
4
5
4
5
pF  
pF  
A or B  
ports  
Cio  
(1) VCCO is the VCC associated with the output port.  
(2) VCCI is the VCC associated with the input port.  
(3) All typical values are at TA = 25°C.  
(4) For I/O ports, the parameter IOZ includes the input leakage current.  
Copyright © 2010, Texas Instruments Incorporated  
Submit Documentation Feedback  
5
Product Folder Link(s): SN74AVCB164245-Q1  
SN74AVCB164245-Q1  
SCES809A –MARCH 2010–REVISED MAY 2010  
www.ti.com  
Switching Characteristics  
TA = -40°C to 85°C, VCCA = 1.5 V ± 0.1 V (see Figure 2)  
VCCB = 1.5 V  
± 0.1 V  
VCCB = 1.8 V  
± 0.15 V  
VCCB = 2.5 V  
± 0.2 V  
VCCB = 3.3 V  
± 0.3 V  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
UNIT  
MIN  
1.7  
1.8  
2.5  
2.1  
2.2  
2.1  
MAX  
MIN  
1.9  
2.2  
2.4  
2.9  
2.3  
2.3  
MAX  
MIN  
1.8  
2.1  
2.1  
3.2  
1.3  
1.7  
MAX  
MIN  
1.7  
2.1  
1.9  
3
MAX  
5.8  
A
B
B
A
A
B
A
B
6.7  
6.8  
8.4  
9
6.3  
7.4  
7.4  
9.8  
6.1  
6.4  
5.5  
7.6  
5.2  
10  
tpd  
ten  
tdis  
ns  
ns  
ns  
7.3  
4.2  
9.8  
3
OE  
OE  
6.9  
7.1  
3.6  
5.1  
1.3  
1.6  
4.8  
Switching Characteristics  
TA = -40°C to 125°C, VCCA = 1.5 V ± 0.1 V (see Figure 2)  
VCCB = 1.5 V  
± 0.1 V  
VCCB = 1.8 V  
± 0.15 V  
VCCB = 2.5 V  
± 0.2 V  
VCCB = 3.3 V  
± 0.3 V  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
UNIT  
MIN  
MAX  
12.7  
12.8  
14.4  
15  
MIN  
1.9  
2.2  
2.4  
2.9  
2.3  
2.3  
MAX  
MIN  
1.8  
2.1  
2.1  
3.2  
1.3  
1.7  
MAX  
MIN  
1.7  
2.1  
1.9  
3
MAX  
A
B
B
A
A
B
A
B
1.7  
1.8  
2.5  
2.1  
2.2  
2.1  
12.3  
13.4  
13.4  
15.8  
12.1  
12.4  
11.5  
13.6  
11.2  
16  
11.8  
13.3  
10.2  
15.8  
9
tpd  
ten  
tdis  
ns  
ns  
ns  
OE  
OE  
12.9  
13.1  
9.6  
1.3  
1.6  
11.1  
10.8  
Switching Characteristics  
TA = -40°C to 85°C, VCCA = 1.8 V ± 0.15 V (see Figure 2)  
VCCB = 1.5 V  
± 0.1 V  
VCCB = 1.8 V  
± 0.15 V  
VCCB = 2.5 V  
± 0.2 V  
VCCB = 3.3 V  
± 0.3 V  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
UNIT  
MIN  
MAX  
6.7  
5.5  
8.5  
7.6  
7
MIN  
1.8  
1.8  
2.5  
2.6  
2.3  
2.5  
MAX  
MIN  
1.7  
1.8  
2.2  
2.6  
1.3  
1.8  
MAX  
MIN  
1.6  
1.8  
1.9  
2.6  
1.3  
1.7  
MAX  
A
B
B
A
A
B
A
B
1.7  
1.4  
2.6  
1.8  
2.3  
1.8  
6
6
4.7  
5.8  
5.3  
7.6  
3.6  
4.7  
4.3  
5.5  
4.2  
7.4  
3
tpd  
ten  
tdis  
ns  
ns  
ns  
7.5  
7.7  
6.1  
6.3  
OE  
OE  
7
4.4  
Switching Characteristics  
TA = -40°C to 125°C, VCCA = 1.8 V ± 0.15 V (see Figure 2)  
VCCB = 1.5 V  
± 0.1 V  
VCCB = 1.8 V  
± 0.15 V  
VCCB = 2.5 V  
± 0.2 V  
VCCB = 3.3 V  
± 0.3 V  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
UNIT  
MIN  
MAX  
12.7  
11.5  
14.5  
13.6  
13  
MIN  
1.8  
1.8  
2.5  
2.6  
2.3  
2.5  
MAX  
MIN  
1.7  
1.8  
2.2  
2.6  
1.3  
1.8  
MAX  
MIN  
1.6  
1.8  
1.9  
2.6  
1.3  
1.7  
MAX  
A
B
B
A
A
B
A
B
1.7  
1.4  
2.6  
1.8  
2.3  
1.8  
12  
12  
10.7  
11.8  
11.3  
13.6  
9.6  
10.3  
11.5  
10.2  
13.4  
9
tpd  
ten  
tdis  
ns  
ns  
ns  
13.5  
13.7  
12.1  
12.3  
OE  
OE  
13  
10.7  
10.4  
6
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Copyright © 2010, Texas Instruments Incorporated  
Product Folder Link(s): SN74AVCB164245-Q1  
SN74AVCB164245-Q1  
www.ti.com  
SCES809A –MARCH 2010–REVISED MAY 2010  
Switching Characteristics  
TA = -40°C to 85°C, VCCA = 2.5 V ± 0.2 V (see Figure 2)  
VCCB = 1.5 V  
± 0.1 V  
VCCB = 1.8 V  
± 0.15 V  
VCCB = 2.5 V  
± 0.2 V  
VCCB = 3.3 V  
± 0.3 V  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
UNIT  
MIN  
1.6  
1.3  
3.1  
1.7  
2.4  
1.2  
MAX  
MIN  
1.8  
1.7  
2.5  
2.2  
3
MAX  
MIN  
1.5  
1.5  
2.2  
2.2  
1.4  
1.4  
MAX  
MIN  
1.4  
1.4  
1.9  
2.2  
1.2  
1.3  
MAX  
A
B
B
A
A
B
A
B
6
4.6  
8.5  
5.7  
7
5.6  
4.4  
7.5  
5.5  
6.1  
5
4
4
3.4  
3.7  
4.2  
5.1  
3
tpd  
ten  
tdis  
ns  
ns  
ns  
5.3  
5.3  
3.6  
3.6  
OE  
OE  
5.8  
1.9  
3.3  
Switching Characteristics  
TA = -40°C to 125°C, VCCA = 2.5 V ± 0.2 V (see Figure 2)  
VCCB = 1.5 V  
± 0.1 V  
VCCB = 1.8 V  
± 0.15 V  
VCCB = 2.5 V  
± 0.2 V  
VCCB = 3.3 V  
± 0.3 V  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
UNIT  
MIN  
MAX  
12  
MIN  
1.8  
1.7  
2.5  
2.2  
3
MAX  
MIN  
1.5  
1.5  
2.2  
2.2  
1.4  
1.4  
MAX  
MIN  
1.4  
1.4  
1.9  
2.2  
1.2  
1.3  
MAX  
A
B
B
A
A
B
A
B
1.6  
1.3  
3.1  
1.7  
2.4  
1.2  
11.6  
10.4  
13.5  
11.5  
12.1  
11  
10  
10  
9.4  
9.7  
10.2  
11.1  
9
tpd  
ten  
tdis  
ns  
ns  
ns  
10.6  
14.5  
11.7  
13  
11.3  
11.3  
9.6  
OE  
OE  
11.8  
1.9  
9.6  
9.3  
Switching Characteristics  
TA = -40°C to 85°C, VCCA = 3.3 V ± 0.3 V (see Figure 2)  
VCCB = 1.5 V  
± 0.1 V  
VCCB = 1.8 V  
± 0.15 V  
VCCB = 2.5 V  
± 0.2 V  
VCCB = 3.3 V  
± 0.3 V  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
UNIT  
MIN  
MAX  
5.9  
4.5  
8.3  
4.9  
7
MIN  
1.7  
1.6  
2.5  
2
MAX  
MIN  
1.5  
1.5  
2.2  
2
MAX  
MIN  
1.4  
1.4  
1.9  
1.9  
1.2  
1.5  
MAX  
A
B
B
A
A
B
A
B
1.5  
1.3  
2.6  
1.6  
2.3  
1.3  
5.4  
3.8  
7.4  
4.5  
6
3.7  
3.3  
5.2  
4.3  
3.5  
3.8  
3.1  
3.1  
4.1  
4.1  
3.5  
3.5  
tpd  
ten  
tdis  
ns  
ns  
ns  
OE  
OE  
3
1.3  
1.6  
6.9  
2.1  
5.5  
Switching Characteristics  
TA = -40°C to 125°C, VCCA = 3.3 V ± 0.3 V (see Figure 2)  
VCCB = 1.5 V  
± 0.1 V  
VCCB = 1.8 V  
± 0.15 V  
VCCB = 2.5 V  
± 0.2 V  
VCCB = 3.3 V  
± 0.3 V  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
UNIT  
MIN  
MAX  
11.9  
10.5  
14.3  
10.9  
13  
MIN  
1.7  
1.6  
2.5  
2
MAX  
MIN  
1.5  
1.5  
2.2  
2
MAX  
MIN  
1.4  
1.4  
1.9  
1.9  
1.2  
1.5  
MAX  
A
B
B
A
A
B
A
B
1.5  
1.3  
2.6  
1.6  
2.3  
1.3  
11.4  
9.8  
9.7  
9.3  
9.1  
9.1  
tpd  
ten  
tdis  
ns  
ns  
ns  
13.4  
10.5  
12  
11.2  
10.3  
9.5  
10.1  
10.1  
9.5  
OE  
OE  
3
1.3  
1.6  
12.9  
2.1  
11.5  
9.8  
9.5  
Copyright © 2010, Texas Instruments Incorporated  
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7
Product Folder Link(s): SN74AVCB164245-Q1  
SN74AVCB164245-Q1  
SCES809A –MARCH 2010–REVISED MAY 2010  
www.ti.com  
Operating Characteristics  
VCCA and VCCB = 3.3 V, TA = 25°C  
PARAMETER  
TEST CONDITIONS  
TYP  
14  
7
UNIT  
Outputs enabled  
Outputs disabled  
Outputs enabled  
Outputs disabled  
Outputs enabled  
Outputs disabled  
Outputs enabled  
Outputs disabled  
Power dissipation capacitance per transceiver,  
A-port input, B-port output  
CpdA  
CL = 0,  
f = 10 MHz  
f = 10 MHz  
pF  
(VCCA  
)
)
20  
7
Power dissipation capacitance per transceiver,  
B-port input, A-port output  
20  
7
Power dissipation capacitance per transceiver,  
A-port input, B-port output  
CpdB  
(VCCB  
CL = 0,  
pF  
14  
7
Power dissipation capacitance per transceiver,  
B-port input, A-port output  
Output Description  
The DOC™ circuitry is implemented, which, during the transition, initially lowers the output impedance to  
effectively drive the load and, subsequently, raises the impedance to reduce noise. Figure 1 shows typical VOL vs  
IOL and VOH vs IOH curves to illustrate the output impedance and drive capability of the circuit. At the beginning of  
the signal transition, the DOC circuit provides a maximum dynamic drive that is equivalent to a high-drive  
standard-output device. For more information, refer to the TI application reports, AVC Logic Family Technology  
and Applications, literature number SCEA006, and Dynamic Output Control (DOC™) Circuitry Technology and  
Applications, literature number SCEA009.  
3.2  
T
A
= 25°C  
T
A
= 25°C  
Process = Nominal  
Process = Nominal  
2.8  
2.4  
2.0  
2.8  
2.4  
2.0  
V
CC  
= 3.3 V  
1.6  
1.2  
0.8  
0.4  
1.6  
1.2  
0.8  
0.4  
V
CC  
= 2.5 V  
V
CC  
= 1.8 V  
V
CC  
= 3.3 V  
V
CC  
= 2.5 V  
V
CC  
= 1.8 V  
0
17  
34  
51  
68  
85 102 119 136 153 170  
−160 −144 −128 −112 −96 −80 −64 −48 −32 −16  
− Output Current − mA  
0
I
− Output Current − mA  
I
OH  
OL  
Figure 1. Typical Output Voltage vs Output Current  
8
Submit Documentation Feedback  
Copyright © 2010, Texas Instruments Incorporated  
Product Folder Link(s): SN74AVCB164245-Q1  
SN74AVCB164245-Q1  
www.ti.com  
SCES809A –MARCH 2010–REVISED MAY 2010  
PARAMETER MEASUREMENT INFORMATION  
2 × V  
CCO  
TEST  
S1  
S1  
R
L
Open  
GND  
t
Open  
pd  
From Output  
Under Test  
t
/t  
PLZ PZL  
2 × V  
CCO  
t
/t  
PHZ PZH  
GND  
C
L
R
L
(see Note A)  
t
LOAD CIRCUIT  
w
V
CCI  
V
CCI  
/2  
V
CCI  
/2  
Input  
C
L
V
TP  
R
L
V
CCO  
0 V  
1.5 V 0.1 V  
0.1 V  
0.15 V  
0.15 V  
0.3 V  
15 pF  
30 pF  
30 pF  
30 pF  
500 Ω  
500 Ω  
500 Ω  
500 Ω  
VOLTAGE WAVEFORMS  
PULSE DURATION  
1.8 V 0.15 V  
2.5 V 0.2 V  
3.3 V 0.3 V  
V
CCB  
Output  
Control  
(low-level  
enabling)  
V
/2  
V
CCB  
/2  
t
CCB  
0 V  
t
t
PZL  
PLZ  
V
V
CCO  
Output  
V
CCI  
V
/2  
/2  
Waveform 1  
S1 at 2 × V  
CCO  
Input  
V
CCI  
/2  
V
CCI  
/2  
V
OL  
+ V  
TP  
CCO  
OL  
0 V  
(see Note B)  
t
PZH  
PHZ  
t
t
PHL  
PLH  
Output  
Waveform 2  
S1 at GND  
V
OH  
V
OH  
V
OH  
− V  
TP  
V
CCO  
Output  
V /2  
CCO  
V
CCO  
/2  
(see Note B)  
0 V  
V
OL  
VOLTAGE WAVEFORMS  
VOLTAGE WAVEFORMS  
ENABLE AND DISABLE TIMES  
PROPAGATION DELAY TIMES  
NOTES: A. C includes probe and jig capacitance.  
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.  
C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, Z = 50 Ω, dv/dt ≥ 1 V/ns.  
O
D. The outputs are measured one at a time, with one transition per measurement.  
E.  
F.  
t
t
t
and t  
and t  
are the same as t .  
dis  
are the same as t .  
PLZ  
PZL  
PLH  
PHZ  
PZH  
en  
G.  
H.  
I.  
and t  
are the same as t .  
PHL pd  
V
V
is the V associated with the input port.  
CC  
CCI  
is the V associated with the output port.  
CC  
CCO  
Figure 2. Load Circuit and Voltage Waveforms  
Copyright © 2010, Texas Instruments Incorporated  
Submit Documentation Feedback  
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Product Folder Link(s): SN74AVCB164245-Q1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
30-Jan-2012  
PACKAGING INFORMATION  
Status (1)  
Eco Plan (2)  
MSL Peak Temp (3)  
Samples  
Orderable Device  
Package Type Package  
Drawing  
Pins  
Package Qty  
Lead/  
Ball Finish  
(Requires Login)  
CAVCB164245QDGGRQ1  
ACTIVE  
TSSOP  
DGG  
48  
2000  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU Level-3-260C-168 HR  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
OTHER QUALIFIED VERSIONS OF SN74AVCB164245-Q1 :  
Catalog: SN74AVCB164245  
•
NOTE: Qualified Version Definitions:  
Catalog - TI's standard catalog product  
•
Addendum-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
14-Jul-2012  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
CAVCB164245QDGGRQ1 TSSOP  
DGG  
48  
2000  
330.0  
24.4  
8.6  
15.8  
1.8  
12.0  
24.0  
Q1  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
14-Jul-2012  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
TSSOP DGG 48  
SPQ  
Length (mm) Width (mm) Height (mm)  
367.0 367.0 45.0  
CAVCB164245QDGGRQ1  
2000  
Pack Materials-Page 2  
MECHANICAL DATA  
MTSS003D – JANUARY 1995 – REVISED JANUARY 1998  
DGG (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE PACKAGE  
48 PINS SHOWN  
0,27  
0,17  
M
0,08  
0,50  
48  
25  
6,20  
6,00  
8,30  
7,90  
0,15 NOM  
Gage Plane  
0,25  
1
24  
0°–8°  
A
0,75  
0,50  
Seating Plane  
0,10  
0,15  
0,05  
1,20 MAX  
PINS **  
48  
56  
64  
DIM  
A MAX  
12,60  
12,40  
14,10  
13,90  
17,10  
16,90  
A MIN  
4040078/F 12/97  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold protrusion not to exceed 0,15.  
D. Falls within JEDEC MO-153  
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