VN750-B513TR [STMICROELECTRONICS]
HIGH SIDE DRIVER; 高端驱动器
| 型号： | VN750-B513TR |
| 厂家： | 
ST |
| 描述： | HIGH SIDE DRIVER |
| 文件： | 总29页 (文件大小：512K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
VN750 / VN750S
/ VN750PT / VN750-B5
®
HIGH SIDE DRIVER
TYPE
VN750
R
I
V
CC
DS(on)
OUT
VN750S
60 mΩ
6 A
36 V
VN750PT
VN750-B5
SO-8
PENTAWATT
PPAK
■ CMOS COMPATIBLE INPUT
■ ON STATE OPEN LOAD DETECTION
■ OFF STATE OPEN LOAD DETECTION
■ SHORTED LOAD PROTECTION
P2PAK
■ UNDERVOLTAGE AND OVERVOLTAGE
SHUTDOWN
ORDER CODES
PACKAGE
TUBE
T&R
■ PROTECTION AGAINST LOSS OF GROUND
■ VERY LOW STAND-BY CURRENT
PENTAWATT VN750
-
SO-8
VN750S
VN750S13TR
P2PAK
PPAK
VN750-B5 VN750-B513TR
VN750PT VN750PT13TR
■ REVERSE BATTERY PROTECTION (*)
DESCRIPTION
compatibility table). Active current limitation
combined with thermal shutdown and automatic
restart protect the device against overload.
The VN750, VN750S, VN750PT, VN750-B5 are a
monolithic device designed in STMicroelectronics
VIPower M0-3 Technology, intended for driving
any kind of load with one side connected to
ground.
The device detects open load condition both is on
and off state. Output shorted to VCC is detected in
the off state. Device automatically turns off in case
of ground pin disconnection.
Active VCC pin voltage clamp protects the device
against low energy spikes (see ISO7637 transient
BLOCK DIAGRAM
VCC
OVERVOLTAGE
DETECTION
VCC
CLAMP
UNDERVOLTAGE
DETECTION
GND
Power CLAMP
DRIVER
INPUT
OUTPUT
LOGIC
CURRENT LIMITER
ON STATE OPENLOAD
DETECTION
STATUS
OVERTEMPERATURE
DETECTION
OFF STATE OPENLOAD
AND OUTPUT SHORTED TO VCC
DETECTION
(*) See application schematic at page 8
August 2002
1/29
1
VN750 / VN750S / VN750PT / VN750-B5
ABSOLUTE MAXIMUM RATING
Value
Symbol
Parameter
Unit
2
SO-8 PENTAWATT P PAK PPAK
V
DC Supply Voltage
41
- 0.3
V
V
CC
- V
Reverse DC Supply Voltage
DC Reverse Ground Pin Current
DC Output Current
CC
- I
- 200
mA
A
gnd
I
Internally Limited
- 6
OUT
- I
Reverse DC Output Current
DC Input Current
A
OUT
I
+/- 10
mA
mA
IN
I
DC Status Current
+/- 10
STAT
Electrostatic Discharge
(Human Body Model: R=1.5KΩ; C=100pF)
- INPUT
4000
4000
5000
5000
V
V
V
V
V
ESD
- STATUS
- OUTPUT
- V
CC
Maximum Switching Energy
(L=1.8mH; R =0Ω; V =13.5V; T
E
100
mJ
mJ
MAX
=150ºC; I =9A)
L
bat
jstart
L
Maximum Switching Energy
(L=2.46mH; R =0Ω; V =13.5V; T
E
138
60
138
60
MAX
=150ºC; I =9A)
L
bat
jstart
L
P
Power Dissipation T =25°C
4.2
60
W
°C
°C
°C
tot
C
T
Junction Operating Temperature
Case Operating Temperature
Storage Temperature
Internally Limited
- 40 to 150
j
T
c
T
- 55 to 150
stg
CONNECTION DIAGRAM (TOP VIEW)
5
OUTPUT
STATUS
5
4
V
N.C.
CC
4
OUTPUT
OUTPUT
STATUS
INPUT
GND
3
V
CC
2
1
INPUT
GND
8
1
V
CC
PPAK / P2PAK
SO-8
PENTAWATT
CURRENT AND VOLTAGE CONVENTIONS
IS
IIN
VCC
GND
INPUT
ISTAT
IOUT
STATUS
VCC
OUTPUT
VIN
VOUT
VSTAT
IGND
2/29
VN750 / VN750S / VN750PT / VN750-B5
THERMAL DATA
Symbol
Value
Parameter
Unit
2
S0-8
-
PENTAWATT P PAK
PPAK
R
Thermal Resistance Junction-case
Thermal Resistance Junction-lead
Max
Max
2.1
-
2.1
-
2.1
-
°C/W
°C/W
thj-case
R
R
30
thj-lead
thj-amb
Thermal Resistance Junction-ambient Max
93 (*)
62.1
52.1 (**) 77.1 (**) °C/W
2
(*) When mounted on a standard single-sided FR-4 board with 0.5cm of Cu (at least 35µm thick) connected to all V
pins. Horizontal
CC
mounting and no artificial air flow.
2
(**) When mounted on a standard single-sided FR-4 board with 0.5cm of Cu (at least 35µm thick). Horizontal mounting and no artificial air
flow.
ELECTRICAL CHARACTERISTICS (8V<VCC<36V; -40°C<Tj<150°C unless otherwise specified)
POWER
Symbol
Parameter
Test Conditions
Min
5.5
3
Typ
13
4
Max Unit
V
Operating Supply Voltage
Undervoltage Shut-down
36
V
V
CC
V
5.5
USD
Undervoltage Shut-down
Hysteresis
V
0.5
V
USDhyst
V
Overvoltage Shut-down
36
V
OV
ON
I
I
=2A; T =25°C; V >8V
60
120
25
mΩ
mΩ
µA
OUT
OUT
j
CC
R
On State Resistance
(#)
10
=2A; V >8V
CC
Off State; V =13V; V =V
=0V
CC
IN
OUT
I
Supply Current
Off State; V =13V; V =V
=0V; T=25°C
S
CC
IN
OUT
j
10
2
20
3.5
50
0
µA
mA
µA
µA
µA
µA
On State; V =13V; V =5V; I =0A
OUT
CC
IN
I
Off State Output Current V =V =0V
OUT
0
(#)
L(off1)
L(off2)
L(off3)
L(off4)
IN
I
I
I
Off State Output Current V =0V; V
=3.5V
-75
IN
OUT
Off State Output Current V =V
=0V; Vcc=13V; T =125°C
5
IN
OUT
OUT
j
Off State Output Current V =V
=0V; Vcc=13V; T =25°C
3
IN
j
SWITCHING (VCC=13V)
Symbol
Parameter
Test Conditions
Min
Typ
40
Max Unit
t
t
Turn-on Delay Time
Turn-off Delay Time
Turn-on Voltage Slope
Turn-off Voltage Slope
R =6.5Ω from V rising edge to V =1.3V
OUT
µs
µs
d(on)
L
IN
R =6.5Ω from V falling edge to V =11.7V
OUT
30
d(off)
L
IN
dV
dV
/dt
R =6.5Ω from V
=1.3V to V =10.4V
OUT
(#)
(#)
V/µs
V/µs
OUT (on)
L
OUT
OUT
/dt
R =6.5Ω from V
=11.7V to V
=1.3V
OUT (off)
L
OUT
INPUT PIN
Symbol
Parameter
Test Conditions
Min
Typ
(#)
Max Unit
V
Input Low Level
1.25
V
µA
V
IL
I
Low Level Input Current V =1.25V
1
(#)
IL
IN
V
Input High Level
3.25
(#)
IH
IH
I
High Level Input Current V =3.25V
(#)
10
8
µA
V
IN
V
Input Hysteresis Voltage
0.5
6
(#)
hyst
I =1mA
6.8
-0.7
V
IN
V
Input Clamp Voltage
ICL
I =-1mA
V
IN
(#) See relative diagram
3/29
1
VN750 / VN750S / VN750PT / VN750-B5
ELECTRICAL CHARACTERISTICS (continued)
STATUS PIN
Symbol
Parameter
Test Conditions
=1.6mA
STAT
Min
Typ
(#)
Max
0.5
10
Unit
V
V
Status Low Output Voltage I
Status Leakage Current
STAT
I
Normal Operation; V
=5V
(#)
µA
LSTAT
STAT
Status Pin Input
Capacitance
C
Normal Operation; V
=5V
100
8
pF
STAT
STAT
I
=1mA
6
6.8
V
V
STAT
V
Status Clamp Voltage
I
SCL
=-1mA
-0.7
STAT
PROTECTIONS
Symbol
Parameter
Test Conditions
Min
150
135
7
Typ
Max
Unit
°C
T
Shut-down Temperature
Reset Temperature
Thermal Hysteresis
175
200
TSD
T
°C
R
T
15
9
°C
hyst
Status delay in overload
condition
t
T>T
20
µs
SDL
j
jsh
9V<V <36V
6
15
15
A
A
CC
I
Current limitation
lim
5V<V <36V
CC
Turn-off Output Clamp
Voltage
V
I
=2A; V =0V; L=6mH
V
-41 V -48 V -55
V
demag
OUT
IN
CC
CC
CC
OPENLOAD DETECTION
Symbol
Parameter
Openload ON State
Detection Threshold
Openload ON State
Detection Delay
Test Conditions
Min
Typ
Max
Unit
I
V
=5V
50
(#)
200
mA
OL
IN
t
I
=0A
200
µs
DOL(on)
OUT
Openload OFF State
Voltage Detection
Threshold
V
V =0V
1.5
(#)
3.5
V
OL
IN
Openload Detection Delay
at Turn Off
t
1000
µs
DOL(off)
(#) See relative diagram
OPEN LOAD STATUS TIMING (with external pull-up)
< I
OVERTEMP STATUS TIMING
T > T
I
V
> V
OL
OUT OL
OUT
j
jsh
V
IN
V
IN
V
STAT
V
STAT
t
t
t
t
DOL(off)
DOL(on)
SDL
SDL
4/29
2
1
VN750 / VN750S / VN750PT / VN750-B5
Switching time Waveforms
V
OUT
90%
80%
dV
/dt
OUT (off)
dV
/dt
OUT (on)
10%
t
V
IN
t
d(on)
t
d(off)
t
TRUTH TABLE
CONDITIONS
INPUT
OUTPUT
STATUS
L
H
L
H
H
H
Normal Operation
L
H
H
L
X
X
H
) H
) L
Current Limitation
(T < T
j
TSD
TSD
(T > T
j
L
H
L
L
H
L
Overtemperature
Undervoltage
Overvoltage
L
H
L
L
X
X
L
H
L
L
H
H
L
H
H
H
L
H
Output Voltage > V
OL
OL
L
H
L
H
H
L
Output Current < I
5/29
1
VN750 / VN750S / VN750PT / VN750-B5
ELECTRICAL TRANSIENT REQUIREMENTS ON VCC PIN
TEST LEVELS
ISO T/R 7637/1
Test Pulse
Delays and
Impedance
I
II
III
IV
1
2
-25 V
+25 V
-25 V
-50 V
+50 V
-50 V
-75 V
+75 V
-100 V
+75 V
-6 V
-100 V
+100 V
-150 V
+100 V
-7 V
2 ms 10 Ω
0.2 ms 10 Ω
0.1 µs 50 Ω
0.1 µs 50 Ω
100 ms, 0.01 Ω
400 ms, 2 Ω
3a
3b
4
+25 V
-4 V
+50 V
-5 V
5
+26.5 V
+46.5 V
+66.5 V
+86.5 V
ISO T/R 7637/1
TEST LEVELS RESULTS
I
II
III
C
C
C
C
C
E
IV
C
C
C
C
C
E
Test Pulse
1
2
C
C
C
C
C
C
C
C
C
C
C
E
3a
3b
4
5
CLASS
CONTENTS
C
E
All functions of the device are performed as designed after exposure to disturbance.
One or more functions of the device is not performed as designed after exposure to disturbance
and cannot be returned to proper operation without replacing the device.
6/29
1
VN750 / VN750S / VN750PT / VN750-B5
Figure 1: Waveforms
NORMAL OPERATION
INPUT
LOAD VOLTAGE
STATUS
UNDERVOLTAGE
V
V
USDhyst
CC
V
USD
INPUT
LOAD VOLTAGE
STATUS
undefined
OVERVOLTAGE
V
<V
OV
V
>V
OV
CC
CC
V
CC
INPUT
LOAD VOLTAGE
STATUS
OPEN LOAD with external pull-up
INPUT
V
>V
OL
OUT
LOAD VOLTAGE
STATUS
V
OL
OPEN LOAD without external pull-up
INPUT
LOAD VOLTAGE
STATUS
OVERTEMPERATURE
T
T
TSD
R
T
j
INPUT
LOAD CURRENT
STATUS
7/29
1
1
VN750 / VN750S / VN750PT / VN750-B5
APPLICATION SCHEMATIC
+5V
+5V
V
R
CC
prot
STATUS
INPUT
D
ld
R
prot
µC
OUTPUT
GND
R
GND
V
D
GND
GND
This small signal diode can be safely shared amongst
several different HSD. Also in this case, the presence of
the ground network will produce a shift ( 600mV) in the
input threshold and the status output values if the
microprocessor ground is not common with the device
ground. This shift will not vary if more than one HSD
shares the same diode/resistor network.
GND PROTECTION NETWORK AGAINST
REVERSE BATTERY
Solution 1: Resistor in the ground line (R
can be used with any type of load.
only). This
GND
The following is an indication on how to dimension the
R
resistor.
GND
1) R
2) R
where -I
≤ 600mV / (I
).
S(on)max
LOAD DUMP PROTECTION
GND
GND
≥ (−V ) / (-I
)
CC
GND
D
is necessary (Voltage Transient Suppressor) if the
ld
is the DC reverse ground pin current and can
load dump peak voltage exceeds V max DC rating. The
GND
CC
be found in the absolute maximum rating section of the
device’s datasheet.
Power Dissipation in R
battery situations) is:
same applies if the device will be subject to transients on
the V
line that are greater than the ones shown in the
CC
ISO T/R 7637/1 table.
(when V <0: during reverse
CC
GND
µC I/Os PROTECTION:
2
P = (-V ) /R
D
CC
GND
If a ground protection network is used and negative
This resistor can be shared amongst several different
HSD. Please note that the value of this resistor should be
transients are present on the V line, the control pins will
CC
be pulled negative. ST suggests to insert a resistor (R
)
prot
calculated with formula (1) where I
becomes the
in line to prevent the µC I/Os pins to latch-up.
S(on)max
sum of the maximum on-state currents of the different
devices.
The value of these resistors is a compromise between the
leakage current of µC and the current required by the
HSD I/Os (Input levels compatibility) with the latch-up limit
of µC I/Os.
Please note that if the microprocessor ground is not
common with the device ground then the R
will
GND
produce a shift (I
* R
) in the input thresholds
S(on)max
GND
-V
/I
≤ R
≤ (V
-V -V
) / I
CCpeak latchup
prot
OHµC IH GND
IHmax
and the status output values. This shift will vary
depending on many devices are ON in the case of several
Calculation example:
high side drivers sharing the same R
.
For V
= - 100V and I
≥ 20mA; V
≥ 4.5V
CCpeak
latchup
OHµC
GND
If the calculated power dissipation leads to a large resistor
or several devices have to share the same resistor then
the ST suggests to utilize Solution 2 (see below).
5kΩ ≤ R
Recommended R
≤ 65kΩ.
prot
value is 10kΩ.
prot
Solution 2: A diode (D
) in the ground line.
GND
A resistor (R
GND
=1kΩ) should be inserted in parallel to
GND
D
if the device will be driving an inductive load.
8/29
1
1
VN750 / VN750S / VN750PT / VN750-B5
OPEN LOAD DETECTION IN OFF STATE
2) no misdetection when load is disconnected: in this
Off state open load detection requires an external pull-up
case the V
has to be higher than V
; this
OLmax
resistor (R ) connected between OUTPUT pin and a
OUT
PU
results in the following condition R <(V
V
)/
positive supply voltage (V ) like the +5V line used to
PU
PU– OLmax
PU
I
.
L(off2)
supply the microprocessor.
Because I
may significantly increase if V is pulled
out
The external resistor has to be selected according to the
following requirements:
1) no false open load indication when load is connected:
s(OFF)
high (up to several mA), the pull-up resistor R
should
PU
be connected to a supply that is switched OFF when the
module is in standby.
in this case we have to avoid V
to be higher than
OUT
V
; this results in the following condition
The values of V
, V
and I are available in
L(off2)
Olmin
OLmin
OLmax
V
=(V /(R +R ))R <V
PU L PU L Olmin.
the Electrical Characteristics section.
OUT
Open Load detection in off state
PU
V batt.
V
VCC
PU
R
DRIVER
+
L(off2)
I
INPUT
LOGIC
OUT
+
-
R
STATUS
OL
V
L
R
GROUND
9/29
1
VN750 / VN750S / VN750PT / VN750-B5
Off State Output Current
High Level Input Current
Iih (uA)
IL(off1) (uA)
7
3
2.5
6
Off state
Vin=3.25V
2
1.5
1
Vcc=36V
Vin=Vout=0V
5
4
3
2
1
0
0.5
0
-0.5
-1
-50
-25
0
25
50
75
100 125 150 175
-50
-25
0
25
50
75
100
125
150
175
Tc (ºC)
Tc (ºC)
Status Leakage Current
Input Clamp Voltage
Vicl (V)
Ilstat (uA)
8
0.05
7.8
Iin=1mA
7.6
0.04
7.4
7.2
7
Vstat=5V
0.03
6.8
6.6
6.4
6.2
6
0.02
0.01
0
-50
-25
0
25
50
75
100 125 150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
Tc (°C)
Status Low Output Voltage
Status Clamp Voltage
Vstat (V)
Vscl (V)
0.6
8
7.8
Istat=1mA
0.5
7.6
Istat=1.6mA
7.4
7.2
7
0.4
0.3
0.2
0.1
0
6.8
6.6
6.4
6.2
6
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
Tc (ºC)
10/29
1
VN750 / VN750S / VN750PT / VN750-B5
On State Resistance Vs Tcase
On State Resistance Vs VCC
Ron (mOhm)
Ron (mOhm)
120
140
110
120
Iout=2A
Iout=2A
100
Tc= 150°C
Vcc=8V; 13V; 36V
100
90
80
80
60
40
20
0
Tc= 125°C
70
60
50
Tc= 25°C
40
Tc= - 40°C
30
20
-50
-25
0
25
50
75
100 125
150
175
5
10
15
20
25
30
35
40
Tc (ºC)
Vcc (V)
Openload On State Detection Threshold
Input High Level
Iol (mA)
Vih (V)
220
3.6
200
3.4
3.2
3
Vcc=13V
Vin=5V
180
160
140
120
100
80
2.8
2.6
2.4
2.2
2
60
40
20
0
-50
-25
0
25
50
75
100 125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (ºC)
Tc (ºC)
Input Low Level
Input Hysteresis Voltage
Vil (V)
Vhyst (V)
2.8
1.5
1.4
1.3
1.2
1.1
1
2.6
2.4
2.2
2
1.8
1.6
1.4
1.2
1
0.9
0.8
0.7
0.6
0.5
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (ºC)
Tc (ºC)
11/29
1
1
VN750 / VN750S / VN750PT / VN750-B5
Overvoltage Shutdown
Openload Off State Voltage Detection Threshold
Vol (V)
Vov (V)
5
50
48
46
44
42
40
38
36
34
32
30
4.5
Vin=0V
4
3.5
3
2.5
2
1.5
1
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (ºC)
Tc (°C)
Turn-on Voltage Slope
Turn-off Voltage Slope
dVout/dt/(on) (V/ms)
dVout/dt(off) (V/ms)
1000
500
900
450
Vcc=13V
Rl=6.5Ohm
Vcc=13V
Rl=6.5Ohm
800
400
700
350
600
500
400
300
200
100
0
300
250
200
150
100
50
0
-50
-25
0
25
50
75
100 125 150 175
-50
-25
0
25
50
75
100 125
150
175
Tc (ºC)
Tc (ºC)
Ilim Vs Tcase
Ilim (A)
20
18
16
14
12
10
8
Vcc=13V
6
4
2
0
-50
-25
0
25
50
75
100
125
150
175
Tc (ºC)
12/29
1
1
VN750 / VN750S / VN750PT / VN750-B5
SO-8 Maximum turn off current versus load inductance
LMAX (A)
I
100
10
1
A
B
C
0.1
1
10
100
L(mH)
A = Single Pulse at TJstart=150ºC
B= Repetitive pulse at TJstart=100ºC
C= Repetitive Pulse at TJstart=125ºC
Conditions:
VCC=13.5V
Values are generated with RL=0Ω
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed
the temperature specified above for curves B and C.
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
13/29
VN750 / VN750S / VN750PT / VN750-B5
PPAK, P2PAK Maximum turn off current versus load inductance
LMAX (A)
I
100
10
1
A
B
C
0.1
1
10
100
L(mH)
A = Single Pulse at TJstart=150ºC
B= Repetitive pulse at TJstart=100ºC
C= Repetitive Pulse at TJstart=125ºC
Conditions:
VCC=13.5V
Values are generated with RL=0Ω
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed
the temperature specified above for curves B and C.
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
14/29
VN750 / VN750S / VN750PT / VN750-B5
SO-8 THERMAL DATA
SO-8 PC Board
Layout condition of R and Z measurements (PCB FR4 area= 58mm x 58mm, PCB thickness=2mm,
th
th
2
2
2
Cu thickness=35µm, Copper areas: 0.14cm , 0.8cm , 2cm ).
Rthj-amb Vs PCB copper area in open box free air condition
SO-8 at 2 pins connected to TAB
RTHj_am b (ºC/W)
110
105
100
95
90
85
80
75
70
0
0.5
1
1.5
2
2.5
PCB Cu heatsink area (cm^2)
15/29
VN750 / VN750S / VN750PT / VN750-B5
2
P PAK THERMAL DATA
P2PAK PC Board
Layout condition of R and Z measurements (PCB FR4 area= 60mm x 60mm, PCB thickness=2mm,
th
th
2
2
Cu thickness=35µm, Copper areas: 0.97cm , 8cm ).
Rthj-amb Vs PCB copper area in open box free air condition
RTHj_amb (°C/W)
55
Tj-Tamb=50°C
50
45
40
35
30
0
2
4
6
8
10
PCB Cu heatsink area (cm^2)
16/29
VN750 / VN750S / VN750PT / VN750-B5
PPAK THERMAL DATA
PPAK PC Board
Layout condition of R and Z measurements (PCB FR4 area= 60mm x 60mm, PCB thickness=2mm,
th
th
2
2
Cu thickness=35µm, Copper areas: 0.44cm , 8cm ).
Rthj-amb Vs PCB copper area in open box free air condition
RTHj_amb
(ºC/W)
90
80
70
60
50
40
30
20
10
0
0
2
4
6
8
10
PCB Cu heatsink area (cm^2)
17/29
VN750 / VN750S / VN750PT / VN750-B5
SO-8 Thermal Impedance Junction Ambient Single Pulse
ZTH (°C/W)
1000
2
0.5 cm
100
10
2
2 cm
1
0.1
0.01
0.0001 0.001
0.01
0.1
1
10
100
1000
Time (s)
Pulse calculation formula
Thermal fitting model of a single channel HSD
in SO-8
ZTHδ = RTH δ + ZTHtp(1 – δ)
δ = tp ⁄ T
where
Thermal Parameter
2
Area/island (cm )
R1 (°C/W)
0.5
0.05
0.8
2
28
2
R2 (°C/W)
Tj
C1
R1
C2
R2
C3
R3
C4
R4
C5
R5
C6
R6
R3 ( °C/W)
R4 (°C/W)
3.5
21
R5 (°C/W)
16
Pd
R6 (°C/W)
58
T_amb
C1 (W.s/°C)
C2 (W.s/°C)
C3 (W.s/°C)
C4 (W.s/°C)
C5 (W.s/°C)
C6 (W.s/°C)
0.006
2.60E-03
0.0075
0.045
0.35
1.05
18/29
VN750 / VN750S / VN750PT / VN750-B5
PPAK Thermal Impedance Junction Ambient Single Pulse
ZTH (°C/W)
1000
2
0.44 cm
100
10
1
2
6 cm
0.1
0.0001 0.001
0.01
0.1
1
10
100
1000
Time (s)
Thermal fitting model of a single channel HSD
in PPAK
Pulse calculation formula
ZTHδ = RTH δ + ZTHtp(1 – δ)
δ = tp ⁄ T
where
Thermal Parameter
2
Area/island (cm )
R1 (°C/W)
0.5
0.15
0.7
6
24
5
Tj
R2 (°C/W)
C1
R1
C2
R2
C3
R3
C4
R4
C5
R5
C6
R6
R3 ( °C/W)
R4 (°C/W)
1.6
2
R5 (°C/W)
15
Pd
R6 (°C/W)
61
T_amb
C1 (W.s/°C)
C2 (W.s/°C)
C3 (W.s/°C)
C4 (W.s/°C)
C5 (W.s/°C)
C6 (W.s/°C)
0.0006
0.0025
0.08
0.3
0.45
0.8
19/29
VN750 / VN750S / VN750PT / VN750-B5
P2PAK Thermal Impedance Junction Ambient Single Pulse
ZTH (°C/W)
1000
100
10
1
2
0.5 cm
2
6 cm
0.1
0.0001 0.001
0.01
0.1
1
10
100
1000
Time (s)
Thermal fitting model of a single channel HSD
in P2PAK
Pulse calculation formula
ZTHδ = RTH δ + ZTHtp(1 – δ)
δ = tp ⁄ T
where
Thermal Parameter
2
Area/island (cm )
R1 (°C/W)
0.5
0.15
0.7
6
22
5
Tj
R2 (°C/W)
C1
R1
C2
R2
C3
R3
C4
R4
C5
R5
C6
R6
R3 ( °C/W)
R4 (°C/W)
0.7
4
R5 (°C/W)
9
Pd
R6 (°C/W)
37
T_amb
C1 (W.s/°C)
C2 (W.s/°C)
C3 (W.s/°C)
C4 (W.s/°C)
C5 (W.s/°C)
C6 (W.s/°C)
0.0006
0.0025
0.055
0.4
2
3
20/29
VN750 / VN750S / VN750PT / VN750-B5
SO-8 MECHANICAL DATA
mm.
TYP
inch
TYP.
DIM.
MIN.
MAX.
1.75
0.25
1.65
0.85
0.48
0.25
0.5
MIN.
MAX.
0.068
0.009
0.064
0.033
0.018
0.010
0.019
A
a1
a2
a3
b
0.1
0.003
0.65
0.35
0.19
0.25
0.025
0.013
0.007
0.010
b1
C
c1
D
45 (typ.)
4.8
5.8
5
0.188
0.228
0.196
0.244
E
6.2
e
1.27
3.81
0.050
0.150
e3
F
3.8
0.4
4
0.14
0.157
0.050
0.023
L
1.27
0.6
0.015
M
S
8 (max.)
L1
0.8
1.2
0.031
0.047
21/29
VN750 / VN750S / VN750PT / VN750-B5
PENTAWATT (VERTICAL) MECHANICAL DATA
mm.
TYP
inch
TYP.
DIM.
MIN.
MAX.
4.8
MIN.
MAX.
0.189
0.054
0.110
0.053
0.022
0.041
0.055
0.142
0.276
0.409
0.409
A
C
1.37
2.8
D
2.4
1.2
0.35
0.8
1
0.094
0.047
0.014
0.031
0.039
0.126
0.260
D1
E
1.35
0.55
1.05
1.4
F
F1
G
3.2
6.6
3.4
6.8
3.6
0.134
0.268
G1
H2
H3
L
7
10.4
10.4
10.05
0.396
17.85
15.75
21.4
0.703
0.620
0.843
0.886
L1
L2
L3
L5
L6
L7
M
22.5
2.6
15.1
6
3
0.102
0.594
0.236
0.118
0.622
0.260
15.8
6.6
4.5
4
0.177
0.157
M1
Diam.
3.65
3.85
0.144
0.152
22/29
VN750 / VN750S / VN750PT / VN750-B5
2
P PAK MECHANICAL DATA
mm.
DIM.
MIN.
4.30
0.03
1.17
2.40
8.95
0.45
0.80
3.20
6.60
TYP
MAX.
4.80
0.23
1.37
2.80
9.35
0.60
1.05
3.60
7.00
A
A2
C
D
D1
E
F
G
G1
H1
8.5
8
H2
10.00
15
10.40
15.85
L
L1
L2
1.27
1.30
2.40
1.40
1.70
3.20
L3
M
0.40
R
V2
0º
8º
Package Weight
1.43 Gr (typ)
P010R
23/29
VN750 / VN750S / VN750PT / VN750-B5
PPAK MECHANICAL DATA
DIM.
MIN.
2.20
0.90
0.03
0.40
5.20
0.45
0.48
TYP
MAX.
2.40
1.10
0.23
0.60
5.40
0.60
0.60
A
A1
A2
B
B2
C
C2
D1
5.1
D
6.00
6.40
6.20
6.60
E
E1
4.7
e
1.27
G
4.90
2.38
9.35
5.25
2.70
10.10
1.00
1.00
G1
H
L2
0.8
0.2
L4
0.60
R
V2
0º
8º
Package Weight
Gr. 0.3
P032T1
24/29
VN750 / VN750S / VN750PT / VN750-B5
SO-8 TUBE SHIPMENT (no suffix)
B
Base Q.ty
100
2000
532
3.2
6
C
A
Bulk Q.ty
Tube length (± 0.5)
A
B
C (± 0.1)
0.6
All dimensions are in mm.
TAPE AND REEL SHIPMENT (suffix “13TR”)
REEL DIMENSIONS
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
2500
2500
330
1.5
13
20.2
12.4
60
G (+ 2 / -0)
N (min)
T (max)
18.4
All dimensions are in mm.
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width
W
P0 (± 0.1)
P
12
4
Tape Hole Spacing
Component Spacing
Hole Diameter
8
D (± 0.1/-0) 1.5
Hole Diameter
D1 (min)
F (± 0.05)
K (max)
1.5
5.5
4.5
2
Hole Position
Compartment Depth
Hole Spacing
P1 (± 0.1)
End
All dimensions are in mm.
Start
Top
No components
500mm min
Components
No components
cover
tape
Empty components pockets
saled with cover tape.
500mm min
User direction of feed
25/29
VN750 / VN750S / VN750PT / VN750-B5
PENTAWATT TUBE SHIPMENT (no suffix)
Base Q.ty
50
1000
532
18
Bulk Q.ty
B
Tube length (± 0.5)
A
B
33.1
1
C (± 0.1)
C
All dimensions are in mm.
A
26/29
VN750 / VN750S / VN750PT / VN750-B5
2
P PAK TUBE SHIPMENT (no suffix)
Base Q.ty
50
1000
532
18
Bulk Q.ty
B
Tube length (± 0.5)
A
B
33.1
1
C
C (± 0.1)
All dimensions are in mm.
A
TAPE AND REEL SHIPMENT (suffix “13TR”)
REEL DIMENSIONS
Base Q.ty
1000
1000
330
1.5
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
13
20.2
24.4
60
G (+ 2 / -0)
N (min)
T (max)
30.4
All dimensions are in mm.
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width
W
P0 (± 0.1)
P
24
4
Tape Hole Spacing
Component Spacing
Hole Diameter
16
D (± 0.1/-0) 1.5
Hole Diameter
D1 (min)
F (± 0.05)
K (max)
1.5
11.5
6.5
2
Hole Position
Compartment Depth
Hole Spacing
P1 (± 0.1)
End
All dimensions are in mm.
Start
Top
No components
500mm min
Components
No components
cover
tape
Empty components pockets
saled with cover tape.
500mm min
User direction of feed
27/29
VN750 / VN750S / VN750PT / VN750-B5
PPAK SUGGESTED PAD LAYOUT
PPAK TUBE SHIPMENT (no suffix)
A
C
Base Q.ty
75
3000
532
6
Bulk Q.ty
Tube length (± 0.5)
A
B
B
21.3
0.6
C (± 0.1)
3
1.8
6.7
All dimensions are in mm.
TAPE AND REEL SHIPMENT (suffix “13TR”)
REEL DIMENSIONS
Base Q.ty
2500
2500
330
1.5
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
13
20.2
16.4
60
G (+ 2 / -0)
N (min)
T (max)
22.4
All dimensions are in mm.
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width
W
P0 (± 0.1)
P
16
4
Tape Hole Spacing
Component Spacing
Hole Diameter
8
D (± 0.1/-0) 1.5
Hole Diameter
D1 (min)
F (± 0.05)
K (max)
1.5
7.5
2.75
2
Hole Position
Compartment Depth
Hole Spacing
P1 (± 0.1)
End
All dimensions are in mm.
Start
Top
No components
500mm min
Components
No components
cover
tape
Empty components pockets
saled with cover tape.
500mm min
User direction of feed
28/29
1
VN750 / VN750S / VN750PT / VN750-B5
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a trademark of STMicroelectronics
2002 STMicroelectronics - Printed in ITALY- All Rights Reserved.
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29/29
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